?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
pinctrl-sx150x: Improve OF device matching code
[linux-2.6/btrfs-unstable.git] / drivers / pinctrl / pinctrl-sx150x.c
blob0523f5a1c6a4813c8ba732ac4c6bb10a9b0be638
1 /*
2 * Copyright (c) 2016, BayLibre, SAS. All rights reserved.
3 * Author: Neil Armstrong <narmstrong@baylibre.com>
4 *
5 * Copyright (c) 2010, Code Aurora Forum. All rights reserved.
6 *
7 * Driver for Semtech SX150X I2C GPIO Expanders
8 *
9 * Author: Gregory Bean <gbean@codeaurora.org>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 and
13 * only version 2 as published by the Free Software Foundation.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 */
20
21 #include <linux/i2c.h>
22 #include <linux/init.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/mutex.h>
26 #include <linux/slab.h>
27 #include <linux/of.h>
28 #include <linux/of_device.h>
29 #include <linux/gpio.h>
30 #include <linux/pinctrl/machine.h>
31 #include <linux/pinctrl/pinconf.h>
32 #include <linux/pinctrl/pinctrl.h>
33 #include <linux/pinctrl/pinmux.h>
34 #include <linux/pinctrl/pinconf-generic.h>
35
36 #include "core.h"
37 #include "pinconf.h"
38 #include "pinctrl-utils.h"
39
40 /* The chip models of sx150x */
41 enum {
42 SX150X_123 = 0,
43 SX150X_456,
44 SX150X_789,
45 };
46
47 struct sx150x_123_pri {
48 u8 reg_pld_mode;
49 u8 reg_pld_table0;
50 u8 reg_pld_table1;
51 u8 reg_pld_table2;
52 u8 reg_pld_table3;
53 u8 reg_pld_table4;
54 u8 reg_advance;
55 };
56
57 struct sx150x_456_pri {
58 u8 reg_pld_mode;
59 u8 reg_pld_table0;
60 u8 reg_pld_table1;
61 u8 reg_pld_table2;
62 u8 reg_pld_table3;
63 u8 reg_pld_table4;
64 u8 reg_advance;
65 };
66
67 struct sx150x_789_pri {
68 u8 reg_drain;
69 u8 reg_polarity;
70 u8 reg_clock;
71 u8 reg_misc;
72 u8 reg_reset;
73 u8 ngpios;
74 };
75
76 struct sx150x_device_data {
77 u8 model;
78 u8 reg_pullup;
79 u8 reg_pulldn;
80 u8 reg_dir;
81 u8 reg_data;
82 u8 reg_irq_mask;
83 u8 reg_irq_src;
84 u8 reg_sense;
85 u8 ngpios;
86 union {
87 struct sx150x_123_pri x123;
88 struct sx150x_456_pri x456;
89 struct sx150x_789_pri x789;
90 } pri;
91 const struct pinctrl_pin_desc *pins;
92 unsigned int npins;
93 };
94
95 struct sx150x_pinctrl {
96 struct device *dev;
97 struct i2c_client *client;
98 struct pinctrl_dev *pctldev;
99 struct pinctrl_desc pinctrl_desc;
100 struct gpio_chip gpio;
101 struct irq_chip irq_chip;
102 struct {
103 int update;
104 u32 sense;
105 u32 masked;
106 u32 dev_sense;
107 u32 dev_masked;
108 } irq;
109 struct mutex lock;
110 const struct sx150x_device_data *data;
111 };
112
113 static const struct pinctrl_pin_desc sx150x_8_pins[] = {
114 PINCTRL_PIN(0, "gpio0"),
115 PINCTRL_PIN(1, "gpio1"),
116 PINCTRL_PIN(2, "gpio2"),
117 PINCTRL_PIN(3, "gpio3"),
118 PINCTRL_PIN(4, "gpio4"),
119 PINCTRL_PIN(5, "gpio5"),
120 PINCTRL_PIN(6, "gpio6"),
121 PINCTRL_PIN(7, "gpio7"),
122 PINCTRL_PIN(8, "oscio"),
123 };
124
125 static const struct pinctrl_pin_desc sx150x_16_pins[] = {
126 PINCTRL_PIN(0, "gpio0"),
127 PINCTRL_PIN(1, "gpio1"),
128 PINCTRL_PIN(2, "gpio2"),
129 PINCTRL_PIN(3, "gpio3"),
130 PINCTRL_PIN(4, "gpio4"),
131 PINCTRL_PIN(5, "gpio5"),
132 PINCTRL_PIN(6, "gpio6"),
133 PINCTRL_PIN(7, "gpio7"),
134 PINCTRL_PIN(8, "gpio8"),
135 PINCTRL_PIN(9, "gpio9"),
136 PINCTRL_PIN(10, "gpio10"),
137 PINCTRL_PIN(11, "gpio11"),
138 PINCTRL_PIN(12, "gpio12"),
139 PINCTRL_PIN(13, "gpio13"),
140 PINCTRL_PIN(14, "gpio14"),
141 PINCTRL_PIN(15, "gpio15"),
142 PINCTRL_PIN(16, "oscio"),
143 };
144
145 static const struct sx150x_device_data sx1508q_device_data = {
146 .model = SX150X_789,
147 .reg_pullup = 0x03,
148 .reg_pulldn = 0x04,
149 .reg_dir = 0x07,
150 .reg_data = 0x08,
151 .reg_irq_mask = 0x09,
152 .reg_irq_src = 0x0c,
153 .reg_sense = 0x0b,
154 .pri.x789 = {
155 .reg_drain = 0x05,
156 .reg_polarity = 0x06,
157 .reg_clock = 0x0f,
158 .reg_misc = 0x10,
159 .reg_reset = 0x7d,
160 },
161 .ngpios = 8,
162 .pins = sx150x_8_pins,
163 .npins = ARRAY_SIZE(sx150x_8_pins),
164 };
165
166 static const struct sx150x_device_data sx1509q_device_data = {
167 .model = SX150X_789,
168 .reg_pullup = 0x07,
169 .reg_pulldn = 0x09,
170 .reg_dir = 0x0f,
171 .reg_data = 0x11,
172 .reg_irq_mask = 0x13,
173 .reg_irq_src = 0x19,
174 .reg_sense = 0x17,
175 .pri.x789 = {
176 .reg_drain = 0x0b,
177 .reg_polarity = 0x0d,
178 .reg_clock = 0x1e,
179 .reg_misc = 0x1f,
180 .reg_reset = 0x7d,
181 },
182 .ngpios = 16,
183 .pins = sx150x_16_pins,
184 .npins = ARRAY_SIZE(sx150x_16_pins),
185 };
186
187 static const struct sx150x_device_data sx1506q_device_data = {
188 .model = SX150X_456,
189 .reg_pullup = 0x05,
190 .reg_pulldn = 0x07,
191 .reg_dir = 0x03,
192 .reg_data = 0x01,
193 .reg_irq_mask = 0x09,
194 .reg_irq_src = 0x0f,
195 .reg_sense = 0x0d,
196 .pri.x456 = {
197 .reg_pld_mode = 0x21,
198 .reg_pld_table0 = 0x23,
199 .reg_pld_table1 = 0x25,
200 .reg_pld_table2 = 0x27,
201 .reg_pld_table3 = 0x29,
202 .reg_pld_table4 = 0x2b,
203 .reg_advance = 0xad,
204 },
205 .ngpios = 16,
206 .pins = sx150x_16_pins,
207 .npins = 16, /* oscio not available */
208 };
209
210 static const struct sx150x_device_data sx1502q_device_data = {
211 .model = SX150X_123,
212 .reg_pullup = 0x02,
213 .reg_pulldn = 0x03,
214 .reg_dir = 0x01,
215 .reg_data = 0x00,
216 .reg_irq_mask = 0x05,
217 .reg_irq_src = 0x08,
218 .reg_sense = 0x07,
219 .pri.x123 = {
220 .reg_pld_mode = 0x10,
221 .reg_pld_table0 = 0x11,
222 .reg_pld_table1 = 0x12,
223 .reg_pld_table2 = 0x13,
224 .reg_pld_table3 = 0x14,
225 .reg_pld_table4 = 0x15,
226 .reg_advance = 0xad,
227 },
228 .ngpios = 8,
229 .pins = sx150x_8_pins,
230 .npins = 8, /* oscio not available */
231 };
232
233 static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val)
234 {
235 s32 err = i2c_smbus_write_byte_data(client, reg, val);
236
237 if (err < 0)
238 dev_warn(&client->dev,
239 "i2c write fail: can't write %02x to %02x: %d\n",
240 val, reg, err);
241 return err;
242 }
243
244 static s32 sx150x_i2c_read(struct i2c_client *client, u8 reg, u8 *val)
245 {
246 s32 err = i2c_smbus_read_byte_data(client, reg);
247
248 if (err >= 0)
249 *val = err;
250 else
251 dev_warn(&client->dev,
252 "i2c read fail: can't read from %02x: %d\n",
253 reg, err);
254 return err;
255 }
256
257 /*
258 * These utility functions solve the common problem of locating and setting
259 * configuration bits. Configuration bits are grouped into registers
260 * whose indexes increase downwards. For example, with eight-bit registers,
261 * sixteen gpios would have their config bits grouped in the following order:
262 * REGISTER N-1 [ f e d c b a 9 8 ]
263 * N [ 7 6 5 4 3 2 1 0 ]
264 *
265 * For multi-bit configurations, the pattern gets wider:
266 * REGISTER N-3 [ f f e e d d c c ]
267 * N-2 [ b b a a 9 9 8 8 ]
268 * N-1 [ 7 7 6 6 5 5 4 4 ]
269 * N [ 3 3 2 2 1 1 0 0 ]
270 *
271 * Given the address of the starting register 'N', the index of the gpio
272 * whose configuration we seek to change, and the width in bits of that
273 * configuration, these functions allow us to locate the correct
274 * register and mask the correct bits.
275 */
276 static inline void sx150x_find_cfg(u8 offset, u8 width,
277 u8 *reg, u8 *mask, u8 *shift)
278 {
279 *reg -= offset * width / 8;
280 *mask = (1 << width) - 1;
281 *shift = (offset * width) % 8;
282 *mask <<= *shift;
283 }
284
285 static int sx150x_write_cfg(struct i2c_client *client,
286 u8 offset, u8 width, u8 reg, u8 val)
287 {
288 u8 mask;
289 u8 data;
290 u8 shift;
291 int err;
292
293 sx150x_find_cfg(offset, width, &reg, &mask, &shift);
294 err = sx150x_i2c_read(client, reg, &data);
295 if (err < 0)
296 return err;
297
298 data &= ~mask;
299 data |= (val << shift) & mask;
300 return sx150x_i2c_write(client, reg, data);
301 }
302
303 static int sx150x_read_cfg(struct i2c_client *client,
304 u8 offset, u8 width, u8 reg)
305 {
306 u8 mask;
307 u8 data;
308 u8 shift;
309 int err;
310
311 sx150x_find_cfg(offset, width, &reg, &mask, &shift);
312 err = sx150x_i2c_read(client, reg, &data);
313 if (err < 0)
314 return err;
315
316 return (data & mask);
317 }
318
319 static int sx150x_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
320 {
321 return 0;
322 }
323
324 static const char *sx150x_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
325 unsigned int group)
326 {
327 return NULL;
328 }
329
330 static int sx150x_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
331 unsigned int group,
332 const unsigned int **pins,
333 unsigned int *num_pins)
334 {
335 return -ENOTSUPP;
336 }
337
338 static const struct pinctrl_ops sx150x_pinctrl_ops = {
339 .get_groups_count = sx150x_pinctrl_get_groups_count,
340 .get_group_name = sx150x_pinctrl_get_group_name,
341 .get_group_pins = sx150x_pinctrl_get_group_pins,
342 #ifdef CONFIG_OF
343 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
344 .dt_free_map = pinctrl_utils_free_map,
345 #endif
346 };
347
348 static bool sx150x_pin_is_oscio(struct sx150x_pinctrl *pctl, unsigned int pin)
349 {
350 if (pin >= pctl->data->npins)
351 return false;
352
353 /* OSCIO pin is only present in 789 devices */
354 if (pctl->data->model != SX150X_789)
355 return false;
356
357 return !strcmp(pctl->data->pins[pin].name, "oscio");
358 }
359
360 static int sx150x_gpio_get_direction(struct gpio_chip *chip,
361 unsigned int offset)
362 {
363 struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
364 int status;
365
366 if (sx150x_pin_is_oscio(pctl, offset))
367 return false;
368
369 status = sx150x_read_cfg(pctl->client, offset, 1, pctl->data->reg_dir);
370 if (status >= 0)
371 status = !!status;
372
373 return status;
374 }
375
376 static int sx150x_gpio_get(struct gpio_chip *chip, unsigned int offset)
377 {
378 struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
379 int status;
380
381 if (sx150x_pin_is_oscio(pctl, offset))
382 return -EINVAL;
383
384 status = sx150x_read_cfg(pctl->client, offset, 1, pctl->data->reg_data);
385 if (status >= 0)
386 status = !!status;
387
388 return status;
389 }
390
391 static int sx150x_gpio_set_single_ended(struct gpio_chip *chip,
392 unsigned int offset,
393 enum single_ended_mode mode)
394 {
395 struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
396 int ret;
397
398 switch (mode) {
399 case LINE_MODE_PUSH_PULL:
400 if (pctl->data->model != SX150X_789 ||
401 sx150x_pin_is_oscio(pctl, offset))
402 return 0;
403
404 mutex_lock(&pctl->lock);
405 ret = sx150x_write_cfg(pctl->client, offset, 1,
406 pctl->data->pri.x789.reg_drain,
407 0);
408 mutex_unlock(&pctl->lock);
409 if (ret < 0)
410 return ret;
411 break;
412
413 case LINE_MODE_OPEN_DRAIN:
414 if (pctl->data->model != SX150X_789 ||
415 sx150x_pin_is_oscio(pctl, offset))
416 return -ENOTSUPP;
417
418 mutex_lock(&pctl->lock);
419 ret = sx150x_write_cfg(pctl->client, offset, 1,
420 pctl->data->pri.x789.reg_drain,
421 1);
422 mutex_unlock(&pctl->lock);
423 if (ret < 0)
424 return ret;
425 break;
426
427 default:
428 return -ENOTSUPP;
429 }
430
431 return 0;
432 }
433
434 static void sx150x_gpio_set(struct gpio_chip *chip, unsigned int offset,
435 int value)
436 {
437 struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
438
439 if (sx150x_pin_is_oscio(pctl, offset)) {
440
441 mutex_lock(&pctl->lock);
442 sx150x_i2c_write(pctl->client,
443 pctl->data->pri.x789.reg_clock,
444 (value ? 0x1f : 0x10));
445 mutex_unlock(&pctl->lock);
446 } else {
447 mutex_lock(&pctl->lock);
448 sx150x_write_cfg(pctl->client, offset, 1,
449 pctl->data->reg_data,
450 (value ? 1 : 0));
451 mutex_unlock(&pctl->lock);
452 }
453 }
454
455 static int sx150x_gpio_direction_input(struct gpio_chip *chip,
456 unsigned int offset)
457 {
458 struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
459 int ret;
460
461 if (sx150x_pin_is_oscio(pctl, offset))
462 return -EINVAL;
463
464 mutex_lock(&pctl->lock);
465 ret = sx150x_write_cfg(pctl->client, offset, 1,
466 pctl->data->reg_dir, 1);
467 mutex_unlock(&pctl->lock);
468
469 return ret;
470 }
471
472 static int sx150x_gpio_direction_output(struct gpio_chip *chip,
473 unsigned int offset, int value)
474 {
475 struct sx150x_pinctrl *pctl = gpiochip_get_data(chip);
476 int status;
477
478 if (sx150x_pin_is_oscio(pctl, offset)) {
479 sx150x_gpio_set(chip, offset, value);
480 return 0;
481 }
482
483 mutex_lock(&pctl->lock);
484 status = sx150x_write_cfg(pctl->client, offset, 1,
485 pctl->data->reg_data,
486 (value ? 1 : 0));
487 if (status >= 0)
488 status = sx150x_write_cfg(pctl->client, offset, 1,
489 pctl->data->reg_dir, 0);
490 mutex_unlock(&pctl->lock);
491
492 return status;
493 }
494
495 static void sx150x_irq_mask(struct irq_data *d)
496 {
497 struct sx150x_pinctrl *pctl =
498 gpiochip_get_data(irq_data_get_irq_chip_data(d));
499 unsigned int n = d->hwirq;
500
501 pctl->irq.masked |= (1 << n);
502 pctl->irq.update = n;
503 }
504
505 static void sx150x_irq_unmask(struct irq_data *d)
506 {
507 struct sx150x_pinctrl *pctl =
508 gpiochip_get_data(irq_data_get_irq_chip_data(d));
509 unsigned int n = d->hwirq;
510
511 pctl->irq.masked &= ~(1 << n);
512 pctl->irq.update = n;
513 }
514
515 static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type)
516 {
517 struct sx150x_pinctrl *pctl =
518 gpiochip_get_data(irq_data_get_irq_chip_data(d));
519 unsigned int n, val = 0;
520
521 if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
522 return -EINVAL;
523
524 n = d->hwirq;
525
526 if (flow_type & IRQ_TYPE_EDGE_RISING)
527 val |= 0x1;
528 if (flow_type & IRQ_TYPE_EDGE_FALLING)
529 val |= 0x2;
530
531 pctl->irq.sense &= ~(3UL << (n * 2));
532 pctl->irq.sense |= val << (n * 2);
533 pctl->irq.update = n;
534 return 0;
535 }
536
537 static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id)
538 {
539 struct sx150x_pinctrl *pctl = (struct sx150x_pinctrl *)dev_id;
540 unsigned int nhandled = 0;
541 unsigned int sub_irq;
542 unsigned int n;
543 s32 err;
544 u8 val;
545 int i;
546
547 for (i = (pctl->data->ngpios / 8) - 1; i >= 0; --i) {
548 err = sx150x_i2c_read(pctl->client,
549 pctl->data->reg_irq_src - i,
550 &val);
551 if (err < 0)
552 continue;
553
554 err = sx150x_i2c_write(pctl->client,
555 pctl->data->reg_irq_src - i,
556 val);
557 if (err < 0)
558 continue;
559
560 for (n = 0; n < 8; ++n) {
561 if (val & (1 << n)) {
562 sub_irq = irq_find_mapping(
563 pctl->gpio.irqdomain,
564 (i * 8) + n);
565 handle_nested_irq(sub_irq);
566 ++nhandled;
567 }
568 }
569 }
570
571 return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
572 }
573
574 static void sx150x_irq_bus_lock(struct irq_data *d)
575 {
576 struct sx150x_pinctrl *pctl =
577 gpiochip_get_data(irq_data_get_irq_chip_data(d));
578
579 mutex_lock(&pctl->lock);
580 }
581
582 static void sx150x_irq_bus_sync_unlock(struct irq_data *d)
583 {
584 struct sx150x_pinctrl *pctl =
585 gpiochip_get_data(irq_data_get_irq_chip_data(d));
586 unsigned int n;
587
588 if (pctl->irq.update < 0)
589 goto out;
590
591 n = pctl->irq.update;
592 pctl->irq.update = -1;
593
594 /* Avoid updates if nothing changed */
595 if (pctl->irq.dev_sense == pctl->irq.sense &&
596 pctl->irq.dev_masked == pctl->irq.masked)
597 goto out;
598
599 pctl->irq.dev_sense = pctl->irq.sense;
600 pctl->irq.dev_masked = pctl->irq.masked;
601
602 if (pctl->irq.masked & (1 << n)) {
603 sx150x_write_cfg(pctl->client, n, 1,
604 pctl->data->reg_irq_mask, 1);
605 sx150x_write_cfg(pctl->client, n, 2,
606 pctl->data->reg_sense, 0);
607 } else {
608 sx150x_write_cfg(pctl->client, n, 1,
609 pctl->data->reg_irq_mask, 0);
610 sx150x_write_cfg(pctl->client, n, 2,
611 pctl->data->reg_sense,
612 pctl->irq.sense >> (n * 2));
613 }
614 out:
615 mutex_unlock(&pctl->lock);
616 }
617
618 static int sx150x_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
619 unsigned long *config)
620 {
621 struct sx150x_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
622 unsigned int param = pinconf_to_config_param(*config);
623 int ret;
624 u32 arg;
625
626 if (sx150x_pin_is_oscio(pctl, pin)) {
627 u8 data;
628
629 switch (param) {
630 case PIN_CONFIG_DRIVE_PUSH_PULL:
631 case PIN_CONFIG_OUTPUT:
632 mutex_lock(&pctl->lock);
633 ret = sx150x_i2c_read(pctl->client,
634 pctl->data->pri.x789.reg_clock,
635 &data);
636 mutex_unlock(&pctl->lock);
637
638 if (ret < 0)
639 return ret;
640
641 if (param == PIN_CONFIG_DRIVE_PUSH_PULL)
642 arg = (data & 0x1f) ? 1 : 0;
643 else {
644 if ((data & 0x1f) == 0x1f)
645 arg = 1;
646 else if ((data & 0x1f) == 0x10)
647 arg = 0;
648 else
649 return -EINVAL;
650 }
651
652 break;
653 default:
654 return -ENOTSUPP;
655 }
656
657 goto out;
658 }
659
660 switch (param) {
661 case PIN_CONFIG_BIAS_PULL_DOWN:
662 mutex_lock(&pctl->lock);
663 ret = sx150x_read_cfg(pctl->client, pin, 1,
664 pctl->data->reg_pulldn);
665 mutex_unlock(&pctl->lock);
666
667 if (ret < 0)
668 return ret;
669
670 if (!ret)
671 return -EINVAL;
672
673 arg = 1;
674 break;
675
676 case PIN_CONFIG_BIAS_PULL_UP:
677 mutex_lock(&pctl->lock);
678 ret = sx150x_read_cfg(pctl->client, pin, 1,
679 pctl->data->reg_pullup);
680 mutex_unlock(&pctl->lock);
681
682 if (ret < 0)
683 return ret;
684
685 if (!ret)
686 return -EINVAL;
687
688 arg = 1;
689 break;
690
691 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
692 if (pctl->data->model != SX150X_789)
693 return -ENOTSUPP;
694
695 mutex_lock(&pctl->lock);
696 ret = sx150x_read_cfg(pctl->client, pin, 1,
697 pctl->data->pri.x789.reg_drain);
698 mutex_unlock(&pctl->lock);
699
700 if (ret < 0)
701 return ret;
702
703 if (!ret)
704 return -EINVAL;
705
706 arg = 1;
707 break;
708
709 case PIN_CONFIG_DRIVE_PUSH_PULL:
710 if (pctl->data->model != SX150X_789)
711 arg = true;
712 else {
713 mutex_lock(&pctl->lock);
714 ret = sx150x_read_cfg(pctl->client, pin, 1,
715 pctl->data->pri.x789.reg_drain);
716 mutex_unlock(&pctl->lock);
717
718 if (ret < 0)
719 return ret;
720
721 if (ret)
722 return -EINVAL;
723
724 arg = 1;
725 }
726 break;
727
728 case PIN_CONFIG_OUTPUT:
729 ret = sx150x_gpio_get_direction(&pctl->gpio, pin);
730 if (ret < 0)
731 return ret;
732
733 if (ret)
734 return -EINVAL;
735
736 ret = sx150x_gpio_get(&pctl->gpio, pin);
737 if (ret < 0)
738 return ret;
739
740 arg = ret;
741 break;
742
743 default:
744 return -ENOTSUPP;
745 }
746
747 out:
748 *config = pinconf_to_config_packed(param, arg);
749
750 return 0;
751 }
752
753 static int sx150x_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
754 unsigned long *configs, unsigned int num_configs)
755 {
756 struct sx150x_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
757 enum pin_config_param param;
758 u32 arg;
759 int i;
760 int ret;
761
762 for (i = 0; i < num_configs; i++) {
763 param = pinconf_to_config_param(configs[i]);
764 arg = pinconf_to_config_argument(configs[i]);
765
766 if (sx150x_pin_is_oscio(pctl, pin)) {
767 if (param == PIN_CONFIG_OUTPUT) {
768 ret = sx150x_gpio_direction_output(&pctl->gpio,
769 pin, arg);
770 if (ret < 0)
771 return ret;
772
773 continue;
774 } else
775 return -ENOTSUPP;
776 }
777
778 switch (param) {
779 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
780 case PIN_CONFIG_BIAS_DISABLE:
781 mutex_lock(&pctl->lock);
782 ret = sx150x_write_cfg(pctl->client, pin, 1,
783 pctl->data->reg_pulldn, 0);
784 mutex_unlock(&pctl->lock);
785 if (ret < 0)
786 return ret;
787
788 mutex_lock(&pctl->lock);
789 ret = sx150x_write_cfg(pctl->client, pin, 1,
790 pctl->data->reg_pullup, 0);
791 mutex_unlock(&pctl->lock);
792 if (ret < 0)
793 return ret;
794
795 break;
796
797 case PIN_CONFIG_BIAS_PULL_UP:
798 mutex_lock(&pctl->lock);
799 ret = sx150x_write_cfg(pctl->client, pin, 1,
800 pctl->data->reg_pullup,
801 1);
802 mutex_unlock(&pctl->lock);
803 if (ret < 0)
804 return ret;
805
806 break;
807
808 case PIN_CONFIG_BIAS_PULL_DOWN:
809 mutex_lock(&pctl->lock);
810 ret = sx150x_write_cfg(pctl->client, pin, 1,
811 pctl->data->reg_pulldn,
812 1);
813 mutex_unlock(&pctl->lock);
814 if (ret < 0)
815 return ret;
816
817 break;
818
819 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
820 ret = sx150x_gpio_set_single_ended(&pctl->gpio,
821 pin, LINE_MODE_OPEN_DRAIN);
822 if (ret < 0)
823 return ret;
824
825 break;
826
827 case PIN_CONFIG_DRIVE_PUSH_PULL:
828 ret = sx150x_gpio_set_single_ended(&pctl->gpio,
829 pin, LINE_MODE_PUSH_PULL);
830 if (ret < 0)
831 return ret;
832
833 break;
834
835 case PIN_CONFIG_OUTPUT:
836 ret = sx150x_gpio_direction_output(&pctl->gpio,
837 pin, arg);
838 if (ret < 0)
839 return ret;
840
841 break;
842
843 default:
844 return -ENOTSUPP;
845 }
846 } /* for each config */
847
848 return 0;
849 }
850
851 static const struct pinconf_ops sx150x_pinconf_ops = {
852 .pin_config_get = sx150x_pinconf_get,
853 .pin_config_set = sx150x_pinconf_set,
854 .is_generic = true,
855 };
856
857 static const struct i2c_device_id sx150x_id[] = {
858 {"sx1508q", (kernel_ulong_t) &sx1508q_device_data },
859 {"sx1509q", (kernel_ulong_t) &sx1509q_device_data },
860 {"sx1506q", (kernel_ulong_t) &sx1506q_device_data },
861 {"sx1502q", (kernel_ulong_t) &sx1502q_device_data },
862 {}
863 };
864
865 static const struct of_device_id sx150x_of_match[] = {
866 { .compatible = "semtech,sx1508q", .data = &sx1508q_device_data },
867 { .compatible = "semtech,sx1509q", .data = &sx1509q_device_data },
868 { .compatible = "semtech,sx1506q", .data = &sx1506q_device_data },
869 { .compatible = "semtech,sx1502q", .data = &sx1502q_device_data },
870 {},
871 };
872
873 static int sx150x_init_io(struct sx150x_pinctrl *pctl, u8 base, u16 cfg)
874 {
875 int err = 0;
876 unsigned int n;
877
878 for (n = 0; err >= 0 && n < (pctl->data->ngpios / 8); ++n)
879 err = sx150x_i2c_write(pctl->client, base - n, cfg >> (n * 8));
880 return err;
881 }
882
883 static int sx150x_reset(struct sx150x_pinctrl *pctl)
884 {
885 int err;
886
887 err = i2c_smbus_write_byte_data(pctl->client,
888 pctl->data->pri.x789.reg_reset,
889 0x12);
890 if (err < 0)
891 return err;
892
893 err = i2c_smbus_write_byte_data(pctl->client,
894 pctl->data->pri.x789.reg_reset,
895 0x34);
896 return err;
897 }
898
899 static int sx150x_init_hw(struct sx150x_pinctrl *pctl)
900 {
901 int err;
902
903 if (pctl->data->model == SX150X_789 &&
904 of_property_read_bool(pctl->dev->of_node, "semtech,probe-reset")) {
905 err = sx150x_reset(pctl);
906 if (err < 0)
907 return err;
908 }
909
910 if (pctl->data->model == SX150X_789)
911 err = sx150x_i2c_write(pctl->client,
912 pctl->data->pri.x789.reg_misc,
913 0x01);
914 else if (pctl->data->model == SX150X_456)
915 err = sx150x_i2c_write(pctl->client,
916 pctl->data->pri.x456.reg_advance,
917 0x04);
918 else
919 err = sx150x_i2c_write(pctl->client,
920 pctl->data->pri.x123.reg_advance,
921 0x00);
922 if (err < 0)
923 return err;
924
925 /* Set all pins to work in normal mode */
926 if (pctl->data->model == SX150X_789) {
927 err = sx150x_init_io(pctl,
928 pctl->data->pri.x789.reg_polarity,
929 0);
930 if (err < 0)
931 return err;
932 } else if (pctl->data->model == SX150X_456) {
933 /* Set all pins to work in normal mode */
934 err = sx150x_init_io(pctl,
935 pctl->data->pri.x456.reg_pld_mode,
936 0);
937 if (err < 0)
938 return err;
939 } else {
940 /* Set all pins to work in normal mode */
941 err = sx150x_init_io(pctl,
942 pctl->data->pri.x123.reg_pld_mode,
943 0);
944 if (err < 0)
945 return err;
946 }
947
948 return 0;
949 }
950
951 static int sx150x_probe(struct i2c_client *client,
952 const struct i2c_device_id *id)
953 {
954 static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA |
955 I2C_FUNC_SMBUS_WRITE_WORD_DATA;
956 struct device *dev = &client->dev;
957 struct sx150x_pinctrl *pctl;
958 int ret;
959
960 if (!i2c_check_functionality(client->adapter, i2c_funcs))
961 return -ENOSYS;
962
963 pctl = devm_kzalloc(dev, sizeof(*pctl), GFP_KERNEL);
964 if (!pctl)
965 return -ENOMEM;
966
967 pctl->dev = dev;
968 pctl->client = client;
969
970 if (dev->of_node)
971 pctl->data = of_device_get_match_data(dev);
972 else
973 pctl->data = (struct sx150x_device_data *)id->driver_data;
974
975 if (!pctl->data)
976 return -EINVAL;
977
978 mutex_init(&pctl->lock);
979
980 ret = sx150x_init_hw(pctl);
981 if (ret)
982 return ret;
983
984 /* Register GPIO controller */
985 pctl->gpio.label = devm_kstrdup(dev, client->name, GFP_KERNEL);
986 pctl->gpio.base = -1;
987 pctl->gpio.ngpio = pctl->data->npins;
988 pctl->gpio.get_direction = sx150x_gpio_get_direction;
989 pctl->gpio.direction_input = sx150x_gpio_direction_input;
990 pctl->gpio.direction_output = sx150x_gpio_direction_output;
991 pctl->gpio.get = sx150x_gpio_get;
992 pctl->gpio.set = sx150x_gpio_set;
993 pctl->gpio.set_single_ended = sx150x_gpio_set_single_ended;
994 pctl->gpio.parent = dev;
995 #ifdef CONFIG_OF_GPIO
996 pctl->gpio.of_node = dev->of_node;
997 #endif
998 pctl->gpio.can_sleep = true;
999
1000 ret = devm_gpiochip_add_data(dev, &pctl->gpio, pctl);
1001 if (ret)
1002 return ret;
1003
1004 /* Add Interrupt support if an irq is specified */
1005 if (client->irq > 0) {
1006 pctl->irq_chip.name = devm_kstrdup(dev, client->name,
1007 GFP_KERNEL);
1008 pctl->irq_chip.irq_mask = sx150x_irq_mask;
1009 pctl->irq_chip.irq_unmask = sx150x_irq_unmask;
1010 pctl->irq_chip.irq_set_type = sx150x_irq_set_type;
1011 pctl->irq_chip.irq_bus_lock = sx150x_irq_bus_lock;
1012 pctl->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock;
1013
1014 pctl->irq.masked = ~0;
1015 pctl->irq.sense = 0;
1016 pctl->irq.dev_masked = ~0;
1017 pctl->irq.dev_sense = 0;
1018 pctl->irq.update = -1;
1019
1020 ret = gpiochip_irqchip_add(&pctl->gpio,
1021 &pctl->irq_chip, 0,
1022 handle_edge_irq, IRQ_TYPE_NONE);
1023 if (ret) {
1024 dev_err(dev, "could not connect irqchip to gpiochip\n");
1025 return ret;
1026 }
1027
1028 ret = devm_request_threaded_irq(dev, client->irq, NULL,
1029 sx150x_irq_thread_fn,
1030 IRQF_ONESHOT | IRQF_SHARED |
1031 IRQF_TRIGGER_FALLING,
1032 pctl->irq_chip.name, pctl);
1033 if (ret < 0)
1034 return ret;
1035 }
1036
1037 /* Pinctrl_desc */
1038 pctl->pinctrl_desc.name = "sx150x-pinctrl";
1039 pctl->pinctrl_desc.pctlops = &sx150x_pinctrl_ops;
1040 pctl->pinctrl_desc.confops = &sx150x_pinconf_ops;
1041 pctl->pinctrl_desc.pins = pctl->data->pins;
1042 pctl->pinctrl_desc.npins = pctl->data->npins;
1043 pctl->pinctrl_desc.owner = THIS_MODULE;
1044
1045 pctl->pctldev = pinctrl_register(&pctl->pinctrl_desc, dev, pctl);
1046 if (IS_ERR(pctl->pctldev)) {
1047 dev_err(dev, "Failed to register pinctrl device\n");
1048 return PTR_ERR(pctl->pctldev);
1049 }
1050
1051 return 0;
1052 }
1053
1054 static struct i2c_driver sx150x_driver = {
1055 .driver = {
1056 .name = "sx150x-pinctrl",
1057 .of_match_table = of_match_ptr(sx150x_of_match),
1058 },
1059 .probe = sx150x_probe,
1060 .id_table = sx150x_id,
1061 };
1062
1063 static int __init sx150x_init(void)
1064 {
1065 return i2c_add_driver(&sx150x_driver);
1066 }
1067 subsys_initcall(sx150x_init);
(deprecated) Btrfs devel tree