2 * linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
4 * Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
12 #include <linux/delay.h>
13 #include <linux/highmem.h>
14 #include <linux/pci.h>
15 #include <linux/dma-mapping.h>
17 #include <linux/mmc/host.h>
18 #include <linux/mmc/protocol.h>
20 #include <asm/scatterlist.h>
24 #define DRIVER_NAME "sdhci"
25 #define DRIVER_VERSION "0.12"
27 #define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
29 #define DBG(f, x...) \
30 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
32 static unsigned int debug_nodma
= 0;
33 static unsigned int debug_forcedma
= 0;
34 static unsigned int debug_quirks
= 0;
36 #define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0)
37 #define SDHCI_QUIRK_FORCE_DMA (1<<1)
38 /* Controller doesn't like some resets when there is no card inserted. */
39 #define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<2)
40 #define SDHCI_QUIRK_SINGLE_POWER_WRITE (1<<3)
42 static const struct pci_device_id pci_ids
[] __devinitdata
= {
44 .vendor
= PCI_VENDOR_ID_RICOH
,
45 .device
= PCI_DEVICE_ID_RICOH_R5C822
,
46 .subvendor
= PCI_VENDOR_ID_IBM
,
47 .subdevice
= PCI_ANY_ID
,
48 .driver_data
= SDHCI_QUIRK_CLOCK_BEFORE_RESET
|
49 SDHCI_QUIRK_FORCE_DMA
,
53 .vendor
= PCI_VENDOR_ID_RICOH
,
54 .device
= PCI_DEVICE_ID_RICOH_R5C822
,
55 .subvendor
= PCI_ANY_ID
,
56 .subdevice
= PCI_ANY_ID
,
57 .driver_data
= SDHCI_QUIRK_FORCE_DMA
|
58 SDHCI_QUIRK_NO_CARD_NO_RESET
,
62 .vendor
= PCI_VENDOR_ID_TI
,
63 .device
= PCI_DEVICE_ID_TI_XX21_XX11_SD
,
64 .subvendor
= PCI_ANY_ID
,
65 .subdevice
= PCI_ANY_ID
,
66 .driver_data
= SDHCI_QUIRK_FORCE_DMA
,
70 .vendor
= PCI_VENDOR_ID_ENE
,
71 .device
= PCI_DEVICE_ID_ENE_CB712_SD
,
72 .subvendor
= PCI_ANY_ID
,
73 .subdevice
= PCI_ANY_ID
,
74 .driver_data
= SDHCI_QUIRK_SINGLE_POWER_WRITE
,
77 { /* Generic SD host controller */
78 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI
<< 8), 0xFFFF00)
81 { /* end: all zeroes */ },
84 MODULE_DEVICE_TABLE(pci
, pci_ids
);
86 static void sdhci_prepare_data(struct sdhci_host
*, struct mmc_data
*);
87 static void sdhci_finish_data(struct sdhci_host
*);
89 static void sdhci_send_command(struct sdhci_host
*, struct mmc_command
*);
90 static void sdhci_finish_command(struct sdhci_host
*);
92 static void sdhci_dumpregs(struct sdhci_host
*host
)
94 printk(KERN_DEBUG DRIVER_NAME
": ============== REGISTER DUMP ==============\n");
96 printk(KERN_DEBUG DRIVER_NAME
": Sys addr: 0x%08x | Version: 0x%08x\n",
97 readl(host
->ioaddr
+ SDHCI_DMA_ADDRESS
),
98 readw(host
->ioaddr
+ SDHCI_HOST_VERSION
));
99 printk(KERN_DEBUG DRIVER_NAME
": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
100 readw(host
->ioaddr
+ SDHCI_BLOCK_SIZE
),
101 readw(host
->ioaddr
+ SDHCI_BLOCK_COUNT
));
102 printk(KERN_DEBUG DRIVER_NAME
": Argument: 0x%08x | Trn mode: 0x%08x\n",
103 readl(host
->ioaddr
+ SDHCI_ARGUMENT
),
104 readw(host
->ioaddr
+ SDHCI_TRANSFER_MODE
));
105 printk(KERN_DEBUG DRIVER_NAME
": Present: 0x%08x | Host ctl: 0x%08x\n",
106 readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
),
107 readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
));
108 printk(KERN_DEBUG DRIVER_NAME
": Power: 0x%08x | Blk gap: 0x%08x\n",
109 readb(host
->ioaddr
+ SDHCI_POWER_CONTROL
),
110 readb(host
->ioaddr
+ SDHCI_BLOCK_GAP_CONTROL
));
111 printk(KERN_DEBUG DRIVER_NAME
": Wake-up: 0x%08x | Clock: 0x%08x\n",
112 readb(host
->ioaddr
+ SDHCI_WALK_UP_CONTROL
),
113 readw(host
->ioaddr
+ SDHCI_CLOCK_CONTROL
));
114 printk(KERN_DEBUG DRIVER_NAME
": Timeout: 0x%08x | Int stat: 0x%08x\n",
115 readb(host
->ioaddr
+ SDHCI_TIMEOUT_CONTROL
),
116 readl(host
->ioaddr
+ SDHCI_INT_STATUS
));
117 printk(KERN_DEBUG DRIVER_NAME
": Int enab: 0x%08x | Sig enab: 0x%08x\n",
118 readl(host
->ioaddr
+ SDHCI_INT_ENABLE
),
119 readl(host
->ioaddr
+ SDHCI_SIGNAL_ENABLE
));
120 printk(KERN_DEBUG DRIVER_NAME
": AC12 err: 0x%08x | Slot int: 0x%08x\n",
121 readw(host
->ioaddr
+ SDHCI_ACMD12_ERR
),
122 readw(host
->ioaddr
+ SDHCI_SLOT_INT_STATUS
));
123 printk(KERN_DEBUG DRIVER_NAME
": Caps: 0x%08x | Max curr: 0x%08x\n",
124 readl(host
->ioaddr
+ SDHCI_CAPABILITIES
),
125 readl(host
->ioaddr
+ SDHCI_MAX_CURRENT
));
127 printk(KERN_DEBUG DRIVER_NAME
": ===========================================\n");
130 /*****************************************************************************\
132 * Low level functions *
134 \*****************************************************************************/
136 static void sdhci_reset(struct sdhci_host
*host
, u8 mask
)
138 unsigned long timeout
;
140 if (host
->chip
->quirks
& SDHCI_QUIRK_NO_CARD_NO_RESET
) {
141 if (!(readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) &
146 writeb(mask
, host
->ioaddr
+ SDHCI_SOFTWARE_RESET
);
148 if (mask
& SDHCI_RESET_ALL
)
151 /* Wait max 100 ms */
154 /* hw clears the bit when it's done */
155 while (readb(host
->ioaddr
+ SDHCI_SOFTWARE_RESET
) & mask
) {
157 printk(KERN_ERR
"%s: Reset 0x%x never completed. "
158 "Please report this to " BUGMAIL
".\n",
159 mmc_hostname(host
->mmc
), (int)mask
);
160 sdhci_dumpregs(host
);
168 static void sdhci_init(struct sdhci_host
*host
)
172 sdhci_reset(host
, SDHCI_RESET_ALL
);
174 intmask
= SDHCI_INT_BUS_POWER
| SDHCI_INT_DATA_END_BIT
|
175 SDHCI_INT_DATA_CRC
| SDHCI_INT_DATA_TIMEOUT
| SDHCI_INT_INDEX
|
176 SDHCI_INT_END_BIT
| SDHCI_INT_CRC
| SDHCI_INT_TIMEOUT
|
177 SDHCI_INT_CARD_REMOVE
| SDHCI_INT_CARD_INSERT
|
178 SDHCI_INT_DATA_AVAIL
| SDHCI_INT_SPACE_AVAIL
|
179 SDHCI_INT_DMA_END
| SDHCI_INT_DATA_END
| SDHCI_INT_RESPONSE
;
181 writel(intmask
, host
->ioaddr
+ SDHCI_INT_ENABLE
);
182 writel(intmask
, host
->ioaddr
+ SDHCI_SIGNAL_ENABLE
);
185 static void sdhci_activate_led(struct sdhci_host
*host
)
189 ctrl
= readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
);
190 ctrl
|= SDHCI_CTRL_LED
;
191 writeb(ctrl
, host
->ioaddr
+ SDHCI_HOST_CONTROL
);
194 static void sdhci_deactivate_led(struct sdhci_host
*host
)
198 ctrl
= readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
);
199 ctrl
&= ~SDHCI_CTRL_LED
;
200 writeb(ctrl
, host
->ioaddr
+ SDHCI_HOST_CONTROL
);
203 /*****************************************************************************\
207 \*****************************************************************************/
209 static inline char* sdhci_kmap_sg(struct sdhci_host
* host
)
211 host
->mapped_sg
= kmap_atomic(host
->cur_sg
->page
, KM_BIO_SRC_IRQ
);
212 return host
->mapped_sg
+ host
->cur_sg
->offset
;
215 static inline void sdhci_kunmap_sg(struct sdhci_host
* host
)
217 kunmap_atomic(host
->mapped_sg
, KM_BIO_SRC_IRQ
);
220 static inline int sdhci_next_sg(struct sdhci_host
* host
)
223 * Skip to next SG entry.
231 if (host
->num_sg
> 0) {
233 host
->remain
= host
->cur_sg
->length
;
239 static void sdhci_read_block_pio(struct sdhci_host
*host
)
241 int blksize
, chunk_remain
;
246 DBG("PIO reading\n");
248 blksize
= host
->data
->blksz
;
252 buffer
= sdhci_kmap_sg(host
) + host
->offset
;
255 if (chunk_remain
== 0) {
256 data
= readl(host
->ioaddr
+ SDHCI_BUFFER
);
257 chunk_remain
= min(blksize
, 4);
260 size
= min(host
->size
, host
->remain
);
261 size
= min(size
, chunk_remain
);
263 chunk_remain
-= size
;
265 host
->offset
+= size
;
266 host
->remain
-= size
;
269 *buffer
= data
& 0xFF;
275 if (host
->remain
== 0) {
276 sdhci_kunmap_sg(host
);
277 if (sdhci_next_sg(host
) == 0) {
278 BUG_ON(blksize
!= 0);
281 buffer
= sdhci_kmap_sg(host
);
285 sdhci_kunmap_sg(host
);
288 static void sdhci_write_block_pio(struct sdhci_host
*host
)
290 int blksize
, chunk_remain
;
295 DBG("PIO writing\n");
297 blksize
= host
->data
->blksz
;
302 buffer
= sdhci_kmap_sg(host
) + host
->offset
;
305 size
= min(host
->size
, host
->remain
);
306 size
= min(size
, chunk_remain
);
308 chunk_remain
-= size
;
310 host
->offset
+= size
;
311 host
->remain
-= size
;
315 data
|= (u32
)*buffer
<< 24;
320 if (chunk_remain
== 0) {
321 writel(data
, host
->ioaddr
+ SDHCI_BUFFER
);
322 chunk_remain
= min(blksize
, 4);
325 if (host
->remain
== 0) {
326 sdhci_kunmap_sg(host
);
327 if (sdhci_next_sg(host
) == 0) {
328 BUG_ON(blksize
!= 0);
331 buffer
= sdhci_kmap_sg(host
);
335 sdhci_kunmap_sg(host
);
338 static void sdhci_transfer_pio(struct sdhci_host
*host
)
347 if (host
->data
->flags
& MMC_DATA_READ
)
348 mask
= SDHCI_DATA_AVAILABLE
;
350 mask
= SDHCI_SPACE_AVAILABLE
;
352 while (readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) & mask
) {
353 if (host
->data
->flags
& MMC_DATA_READ
)
354 sdhci_read_block_pio(host
);
356 sdhci_write_block_pio(host
);
361 BUG_ON(host
->num_sg
== 0);
364 DBG("PIO transfer complete.\n");
367 static void sdhci_prepare_data(struct sdhci_host
*host
, struct mmc_data
*data
)
370 unsigned target_timeout
, current_timeout
;
377 DBG("blksz %04x blks %04x flags %08x\n",
378 data
->blksz
, data
->blocks
, data
->flags
);
379 DBG("tsac %d ms nsac %d clk\n",
380 data
->timeout_ns
/ 1000000, data
->timeout_clks
);
383 BUG_ON(data
->blksz
* data
->blocks
> 524288);
384 BUG_ON(data
->blksz
> host
->mmc
->max_blk_size
);
385 BUG_ON(data
->blocks
> 65535);
388 target_timeout
= data
->timeout_ns
/ 1000 +
389 data
->timeout_clks
/ host
->clock
;
392 * Figure out needed cycles.
393 * We do this in steps in order to fit inside a 32 bit int.
394 * The first step is the minimum timeout, which will have a
395 * minimum resolution of 6 bits:
396 * (1) 2^13*1000 > 2^22,
397 * (2) host->timeout_clk < 2^16
402 current_timeout
= (1 << 13) * 1000 / host
->timeout_clk
;
403 while (current_timeout
< target_timeout
) {
405 current_timeout
<<= 1;
411 printk(KERN_WARNING
"%s: Too large timeout requested!\n",
412 mmc_hostname(host
->mmc
));
416 writeb(count
, host
->ioaddr
+ SDHCI_TIMEOUT_CONTROL
);
418 if (host
->flags
& SDHCI_USE_DMA
) {
421 count
= pci_map_sg(host
->chip
->pdev
, data
->sg
, data
->sg_len
,
422 (data
->flags
& MMC_DATA_READ
)?PCI_DMA_FROMDEVICE
:PCI_DMA_TODEVICE
);
425 writel(sg_dma_address(data
->sg
), host
->ioaddr
+ SDHCI_DMA_ADDRESS
);
427 host
->size
= data
->blksz
* data
->blocks
;
429 host
->cur_sg
= data
->sg
;
430 host
->num_sg
= data
->sg_len
;
433 host
->remain
= host
->cur_sg
->length
;
436 /* We do not handle DMA boundaries, so set it to max (512 KiB) */
437 writew(SDHCI_MAKE_BLKSZ(7, data
->blksz
),
438 host
->ioaddr
+ SDHCI_BLOCK_SIZE
);
439 writew(data
->blocks
, host
->ioaddr
+ SDHCI_BLOCK_COUNT
);
442 static void sdhci_set_transfer_mode(struct sdhci_host
*host
,
443 struct mmc_data
*data
)
452 mode
= SDHCI_TRNS_BLK_CNT_EN
;
453 if (data
->blocks
> 1)
454 mode
|= SDHCI_TRNS_MULTI
;
455 if (data
->flags
& MMC_DATA_READ
)
456 mode
|= SDHCI_TRNS_READ
;
457 if (host
->flags
& SDHCI_USE_DMA
)
458 mode
|= SDHCI_TRNS_DMA
;
460 writew(mode
, host
->ioaddr
+ SDHCI_TRANSFER_MODE
);
463 static void sdhci_finish_data(struct sdhci_host
*host
)
465 struct mmc_data
*data
;
473 if (host
->flags
& SDHCI_USE_DMA
) {
474 pci_unmap_sg(host
->chip
->pdev
, data
->sg
, data
->sg_len
,
475 (data
->flags
& MMC_DATA_READ
)?PCI_DMA_FROMDEVICE
:PCI_DMA_TODEVICE
);
479 * Controller doesn't count down when in single block mode.
481 if ((data
->blocks
== 1) && (data
->error
== MMC_ERR_NONE
))
484 blocks
= readw(host
->ioaddr
+ SDHCI_BLOCK_COUNT
);
485 data
->bytes_xfered
= data
->blksz
* (data
->blocks
- blocks
);
487 if ((data
->error
== MMC_ERR_NONE
) && blocks
) {
488 printk(KERN_ERR
"%s: Controller signalled completion even "
489 "though there were blocks left. Please report this "
490 "to " BUGMAIL
".\n", mmc_hostname(host
->mmc
));
491 data
->error
= MMC_ERR_FAILED
;
492 } else if (host
->size
!= 0) {
493 printk(KERN_ERR
"%s: %d bytes were left untransferred. "
494 "Please report this to " BUGMAIL
".\n",
495 mmc_hostname(host
->mmc
), host
->size
);
496 data
->error
= MMC_ERR_FAILED
;
499 DBG("Ending data transfer (%d bytes)\n", data
->bytes_xfered
);
503 * The controller needs a reset of internal state machines
504 * upon error conditions.
506 if (data
->error
!= MMC_ERR_NONE
) {
507 sdhci_reset(host
, SDHCI_RESET_CMD
);
508 sdhci_reset(host
, SDHCI_RESET_DATA
);
511 sdhci_send_command(host
, data
->stop
);
513 tasklet_schedule(&host
->finish_tasklet
);
516 static void sdhci_send_command(struct sdhci_host
*host
, struct mmc_command
*cmd
)
520 unsigned long timeout
;
524 DBG("Sending cmd (%x)\n", cmd
->opcode
);
529 mask
= SDHCI_CMD_INHIBIT
;
530 if ((cmd
->data
!= NULL
) || (cmd
->flags
& MMC_RSP_BUSY
))
531 mask
|= SDHCI_DATA_INHIBIT
;
533 /* We shouldn't wait for data inihibit for stop commands, even
534 though they might use busy signaling */
535 if (host
->mrq
->data
&& (cmd
== host
->mrq
->data
->stop
))
536 mask
&= ~SDHCI_DATA_INHIBIT
;
538 while (readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) & mask
) {
540 printk(KERN_ERR
"%s: Controller never released "
541 "inhibit bit(s). Please report this to "
542 BUGMAIL
".\n", mmc_hostname(host
->mmc
));
543 sdhci_dumpregs(host
);
544 cmd
->error
= MMC_ERR_FAILED
;
545 tasklet_schedule(&host
->finish_tasklet
);
552 mod_timer(&host
->timer
, jiffies
+ 10 * HZ
);
556 sdhci_prepare_data(host
, cmd
->data
);
558 writel(cmd
->arg
, host
->ioaddr
+ SDHCI_ARGUMENT
);
560 sdhci_set_transfer_mode(host
, cmd
->data
);
562 if ((cmd
->flags
& MMC_RSP_136
) && (cmd
->flags
& MMC_RSP_BUSY
)) {
563 printk(KERN_ERR
"%s: Unsupported response type! "
564 "Please report this to " BUGMAIL
".\n",
565 mmc_hostname(host
->mmc
));
566 cmd
->error
= MMC_ERR_INVALID
;
567 tasklet_schedule(&host
->finish_tasklet
);
571 if (!(cmd
->flags
& MMC_RSP_PRESENT
))
572 flags
= SDHCI_CMD_RESP_NONE
;
573 else if (cmd
->flags
& MMC_RSP_136
)
574 flags
= SDHCI_CMD_RESP_LONG
;
575 else if (cmd
->flags
& MMC_RSP_BUSY
)
576 flags
= SDHCI_CMD_RESP_SHORT_BUSY
;
578 flags
= SDHCI_CMD_RESP_SHORT
;
580 if (cmd
->flags
& MMC_RSP_CRC
)
581 flags
|= SDHCI_CMD_CRC
;
582 if (cmd
->flags
& MMC_RSP_OPCODE
)
583 flags
|= SDHCI_CMD_INDEX
;
585 flags
|= SDHCI_CMD_DATA
;
587 writew(SDHCI_MAKE_CMD(cmd
->opcode
, flags
),
588 host
->ioaddr
+ SDHCI_COMMAND
);
591 static void sdhci_finish_command(struct sdhci_host
*host
)
595 BUG_ON(host
->cmd
== NULL
);
597 if (host
->cmd
->flags
& MMC_RSP_PRESENT
) {
598 if (host
->cmd
->flags
& MMC_RSP_136
) {
599 /* CRC is stripped so we need to do some shifting. */
600 for (i
= 0;i
< 4;i
++) {
601 host
->cmd
->resp
[i
] = readl(host
->ioaddr
+
602 SDHCI_RESPONSE
+ (3-i
)*4) << 8;
604 host
->cmd
->resp
[i
] |=
606 SDHCI_RESPONSE
+ (3-i
)*4-1);
609 host
->cmd
->resp
[0] = readl(host
->ioaddr
+ SDHCI_RESPONSE
);
613 host
->cmd
->error
= MMC_ERR_NONE
;
615 DBG("Ending cmd (%x)\n", host
->cmd
->opcode
);
618 host
->data
= host
->cmd
->data
;
620 tasklet_schedule(&host
->finish_tasklet
);
625 static void sdhci_set_clock(struct sdhci_host
*host
, unsigned int clock
)
630 unsigned long timeout
;
632 if (clock
== host
->clock
)
635 writew(0, host
->ioaddr
+ SDHCI_CLOCK_CONTROL
);
637 ctrl
= readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
);
638 if (clock
> 25000000)
639 ctrl
|= SDHCI_CTRL_HISPD
;
641 ctrl
&= ~SDHCI_CTRL_HISPD
;
642 writeb(ctrl
, host
->ioaddr
+ SDHCI_HOST_CONTROL
);
647 for (div
= 1;div
< 256;div
*= 2) {
648 if ((host
->max_clk
/ div
) <= clock
)
653 clk
= div
<< SDHCI_DIVIDER_SHIFT
;
654 clk
|= SDHCI_CLOCK_INT_EN
;
655 writew(clk
, host
->ioaddr
+ SDHCI_CLOCK_CONTROL
);
659 while (!((clk
= readw(host
->ioaddr
+ SDHCI_CLOCK_CONTROL
))
660 & SDHCI_CLOCK_INT_STABLE
)) {
662 printk(KERN_ERR
"%s: Internal clock never stabilised. "
663 "Please report this to " BUGMAIL
".\n",
664 mmc_hostname(host
->mmc
));
665 sdhci_dumpregs(host
);
672 clk
|= SDHCI_CLOCK_CARD_EN
;
673 writew(clk
, host
->ioaddr
+ SDHCI_CLOCK_CONTROL
);
679 static void sdhci_set_power(struct sdhci_host
*host
, unsigned short power
)
683 if (host
->power
== power
)
686 if (power
== (unsigned short)-1) {
687 writeb(0, host
->ioaddr
+ SDHCI_POWER_CONTROL
);
692 * Spec says that we should clear the power reg before setting
693 * a new value. Some controllers don't seem to like this though.
695 if (!(host
->chip
->quirks
& SDHCI_QUIRK_SINGLE_POWER_WRITE
))
696 writeb(0, host
->ioaddr
+ SDHCI_POWER_CONTROL
);
698 pwr
= SDHCI_POWER_ON
;
704 pwr
|= SDHCI_POWER_180
;
709 pwr
|= SDHCI_POWER_300
;
714 pwr
|= SDHCI_POWER_330
;
720 writeb(pwr
, host
->ioaddr
+ SDHCI_POWER_CONTROL
);
726 /*****************************************************************************\
730 \*****************************************************************************/
732 static void sdhci_request(struct mmc_host
*mmc
, struct mmc_request
*mrq
)
734 struct sdhci_host
*host
;
737 host
= mmc_priv(mmc
);
739 spin_lock_irqsave(&host
->lock
, flags
);
741 WARN_ON(host
->mrq
!= NULL
);
743 sdhci_activate_led(host
);
747 if (!(readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) & SDHCI_CARD_PRESENT
)) {
748 host
->mrq
->cmd
->error
= MMC_ERR_TIMEOUT
;
749 tasklet_schedule(&host
->finish_tasklet
);
751 sdhci_send_command(host
, mrq
->cmd
);
754 spin_unlock_irqrestore(&host
->lock
, flags
);
757 static void sdhci_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
759 struct sdhci_host
*host
;
763 host
= mmc_priv(mmc
);
765 spin_lock_irqsave(&host
->lock
, flags
);
768 * Reset the chip on each power off.
769 * Should clear out any weird states.
771 if (ios
->power_mode
== MMC_POWER_OFF
) {
772 writel(0, host
->ioaddr
+ SDHCI_SIGNAL_ENABLE
);
776 sdhci_set_clock(host
, ios
->clock
);
778 if (ios
->power_mode
== MMC_POWER_OFF
)
779 sdhci_set_power(host
, -1);
781 sdhci_set_power(host
, ios
->vdd
);
783 ctrl
= readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
);
784 if (ios
->bus_width
== MMC_BUS_WIDTH_4
)
785 ctrl
|= SDHCI_CTRL_4BITBUS
;
787 ctrl
&= ~SDHCI_CTRL_4BITBUS
;
788 writeb(ctrl
, host
->ioaddr
+ SDHCI_HOST_CONTROL
);
791 spin_unlock_irqrestore(&host
->lock
, flags
);
794 static int sdhci_get_ro(struct mmc_host
*mmc
)
796 struct sdhci_host
*host
;
800 host
= mmc_priv(mmc
);
802 spin_lock_irqsave(&host
->lock
, flags
);
804 present
= readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
);
806 spin_unlock_irqrestore(&host
->lock
, flags
);
808 return !(present
& SDHCI_WRITE_PROTECT
);
811 static const struct mmc_host_ops sdhci_ops
= {
812 .request
= sdhci_request
,
813 .set_ios
= sdhci_set_ios
,
814 .get_ro
= sdhci_get_ro
,
817 /*****************************************************************************\
821 \*****************************************************************************/
823 static void sdhci_tasklet_card(unsigned long param
)
825 struct sdhci_host
*host
;
828 host
= (struct sdhci_host
*)param
;
830 spin_lock_irqsave(&host
->lock
, flags
);
832 if (!(readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) & SDHCI_CARD_PRESENT
)) {
834 printk(KERN_ERR
"%s: Card removed during transfer!\n",
835 mmc_hostname(host
->mmc
));
836 printk(KERN_ERR
"%s: Resetting controller.\n",
837 mmc_hostname(host
->mmc
));
839 sdhci_reset(host
, SDHCI_RESET_CMD
);
840 sdhci_reset(host
, SDHCI_RESET_DATA
);
842 host
->mrq
->cmd
->error
= MMC_ERR_FAILED
;
843 tasklet_schedule(&host
->finish_tasklet
);
847 spin_unlock_irqrestore(&host
->lock
, flags
);
849 mmc_detect_change(host
->mmc
, msecs_to_jiffies(500));
852 static void sdhci_tasklet_finish(unsigned long param
)
854 struct sdhci_host
*host
;
856 struct mmc_request
*mrq
;
858 host
= (struct sdhci_host
*)param
;
860 spin_lock_irqsave(&host
->lock
, flags
);
862 del_timer(&host
->timer
);
866 DBG("Ending request, cmd (%x)\n", mrq
->cmd
->opcode
);
869 * The controller needs a reset of internal state machines
870 * upon error conditions.
872 if ((mrq
->cmd
->error
!= MMC_ERR_NONE
) ||
873 (mrq
->data
&& ((mrq
->data
->error
!= MMC_ERR_NONE
) ||
874 (mrq
->data
->stop
&& (mrq
->data
->stop
->error
!= MMC_ERR_NONE
))))) {
876 /* Some controllers need this kick or reset won't work here */
877 if (host
->chip
->quirks
& SDHCI_QUIRK_CLOCK_BEFORE_RESET
) {
880 /* This is to force an update */
883 sdhci_set_clock(host
, clock
);
886 /* Spec says we should do both at the same time, but Ricoh
887 controllers do not like that. */
888 sdhci_reset(host
, SDHCI_RESET_CMD
);
889 sdhci_reset(host
, SDHCI_RESET_DATA
);
896 sdhci_deactivate_led(host
);
899 spin_unlock_irqrestore(&host
->lock
, flags
);
901 mmc_request_done(host
->mmc
, mrq
);
904 static void sdhci_timeout_timer(unsigned long data
)
906 struct sdhci_host
*host
;
909 host
= (struct sdhci_host
*)data
;
911 spin_lock_irqsave(&host
->lock
, flags
);
914 printk(KERN_ERR
"%s: Timeout waiting for hardware interrupt. "
915 "Please report this to " BUGMAIL
".\n",
916 mmc_hostname(host
->mmc
));
917 sdhci_dumpregs(host
);
920 host
->data
->error
= MMC_ERR_TIMEOUT
;
921 sdhci_finish_data(host
);
924 host
->cmd
->error
= MMC_ERR_TIMEOUT
;
926 host
->mrq
->cmd
->error
= MMC_ERR_TIMEOUT
;
928 tasklet_schedule(&host
->finish_tasklet
);
933 spin_unlock_irqrestore(&host
->lock
, flags
);
936 /*****************************************************************************\
938 * Interrupt handling *
940 \*****************************************************************************/
942 static void sdhci_cmd_irq(struct sdhci_host
*host
, u32 intmask
)
944 BUG_ON(intmask
== 0);
947 printk(KERN_ERR
"%s: Got command interrupt even though no "
948 "command operation was in progress.\n",
949 mmc_hostname(host
->mmc
));
950 printk(KERN_ERR
"%s: Please report this to " BUGMAIL
".\n",
951 mmc_hostname(host
->mmc
));
952 sdhci_dumpregs(host
);
956 if (intmask
& SDHCI_INT_RESPONSE
)
957 sdhci_finish_command(host
);
959 if (intmask
& SDHCI_INT_TIMEOUT
)
960 host
->cmd
->error
= MMC_ERR_TIMEOUT
;
961 else if (intmask
& SDHCI_INT_CRC
)
962 host
->cmd
->error
= MMC_ERR_BADCRC
;
963 else if (intmask
& (SDHCI_INT_END_BIT
| SDHCI_INT_INDEX
))
964 host
->cmd
->error
= MMC_ERR_FAILED
;
966 host
->cmd
->error
= MMC_ERR_INVALID
;
968 tasklet_schedule(&host
->finish_tasklet
);
972 static void sdhci_data_irq(struct sdhci_host
*host
, u32 intmask
)
974 BUG_ON(intmask
== 0);
978 * A data end interrupt is sent together with the response
979 * for the stop command.
981 if (intmask
& SDHCI_INT_DATA_END
)
984 printk(KERN_ERR
"%s: Got data interrupt even though no "
985 "data operation was in progress.\n",
986 mmc_hostname(host
->mmc
));
987 printk(KERN_ERR
"%s: Please report this to " BUGMAIL
".\n",
988 mmc_hostname(host
->mmc
));
989 sdhci_dumpregs(host
);
994 if (intmask
& SDHCI_INT_DATA_TIMEOUT
)
995 host
->data
->error
= MMC_ERR_TIMEOUT
;
996 else if (intmask
& SDHCI_INT_DATA_CRC
)
997 host
->data
->error
= MMC_ERR_BADCRC
;
998 else if (intmask
& SDHCI_INT_DATA_END_BIT
)
999 host
->data
->error
= MMC_ERR_FAILED
;
1001 if (host
->data
->error
!= MMC_ERR_NONE
)
1002 sdhci_finish_data(host
);
1004 if (intmask
& (SDHCI_INT_DATA_AVAIL
| SDHCI_INT_SPACE_AVAIL
))
1005 sdhci_transfer_pio(host
);
1007 if (intmask
& SDHCI_INT_DATA_END
)
1008 sdhci_finish_data(host
);
1012 static irqreturn_t
sdhci_irq(int irq
, void *dev_id
)
1015 struct sdhci_host
* host
= dev_id
;
1018 spin_lock(&host
->lock
);
1020 intmask
= readl(host
->ioaddr
+ SDHCI_INT_STATUS
);
1027 DBG("*** %s got interrupt: 0x%08x\n", host
->slot_descr
, intmask
);
1029 if (intmask
& (SDHCI_INT_CARD_INSERT
| SDHCI_INT_CARD_REMOVE
)) {
1030 writel(intmask
& (SDHCI_INT_CARD_INSERT
| SDHCI_INT_CARD_REMOVE
),
1031 host
->ioaddr
+ SDHCI_INT_STATUS
);
1032 tasklet_schedule(&host
->card_tasklet
);
1035 intmask
&= ~(SDHCI_INT_CARD_INSERT
| SDHCI_INT_CARD_REMOVE
);
1037 if (intmask
& SDHCI_INT_CMD_MASK
) {
1038 writel(intmask
& SDHCI_INT_CMD_MASK
,
1039 host
->ioaddr
+ SDHCI_INT_STATUS
);
1040 sdhci_cmd_irq(host
, intmask
& SDHCI_INT_CMD_MASK
);
1043 if (intmask
& SDHCI_INT_DATA_MASK
) {
1044 writel(intmask
& SDHCI_INT_DATA_MASK
,
1045 host
->ioaddr
+ SDHCI_INT_STATUS
);
1046 sdhci_data_irq(host
, intmask
& SDHCI_INT_DATA_MASK
);
1049 intmask
&= ~(SDHCI_INT_CMD_MASK
| SDHCI_INT_DATA_MASK
);
1051 if (intmask
& SDHCI_INT_BUS_POWER
) {
1052 printk(KERN_ERR
"%s: Card is consuming too much power!\n",
1053 mmc_hostname(host
->mmc
));
1054 writel(SDHCI_INT_BUS_POWER
, host
->ioaddr
+ SDHCI_INT_STATUS
);
1057 intmask
&= SDHCI_INT_BUS_POWER
;
1060 printk(KERN_ERR
"%s: Unexpected interrupt 0x%08x. Please "
1061 "report this to " BUGMAIL
".\n",
1062 mmc_hostname(host
->mmc
), intmask
);
1063 sdhci_dumpregs(host
);
1065 writel(intmask
, host
->ioaddr
+ SDHCI_INT_STATUS
);
1068 result
= IRQ_HANDLED
;
1072 spin_unlock(&host
->lock
);
1077 /*****************************************************************************\
1081 \*****************************************************************************/
1085 static int sdhci_suspend (struct pci_dev
*pdev
, pm_message_t state
)
1087 struct sdhci_chip
*chip
;
1090 chip
= pci_get_drvdata(pdev
);
1094 DBG("Suspending...\n");
1096 for (i
= 0;i
< chip
->num_slots
;i
++) {
1097 if (!chip
->hosts
[i
])
1099 ret
= mmc_suspend_host(chip
->hosts
[i
]->mmc
, state
);
1101 for (i
--;i
>= 0;i
--)
1102 mmc_resume_host(chip
->hosts
[i
]->mmc
);
1107 pci_save_state(pdev
);
1108 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), 0);
1109 pci_disable_device(pdev
);
1110 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
1115 static int sdhci_resume (struct pci_dev
*pdev
)
1117 struct sdhci_chip
*chip
;
1120 chip
= pci_get_drvdata(pdev
);
1124 DBG("Resuming...\n");
1126 pci_set_power_state(pdev
, PCI_D0
);
1127 pci_restore_state(pdev
);
1128 ret
= pci_enable_device(pdev
);
1132 for (i
= 0;i
< chip
->num_slots
;i
++) {
1133 if (!chip
->hosts
[i
])
1135 if (chip
->hosts
[i
]->flags
& SDHCI_USE_DMA
)
1136 pci_set_master(pdev
);
1137 sdhci_init(chip
->hosts
[i
]);
1139 ret
= mmc_resume_host(chip
->hosts
[i
]->mmc
);
1147 #else /* CONFIG_PM */
1149 #define sdhci_suspend NULL
1150 #define sdhci_resume NULL
1152 #endif /* CONFIG_PM */
1154 /*****************************************************************************\
1156 * Device probing/removal *
1158 \*****************************************************************************/
1160 static int __devinit
sdhci_probe_slot(struct pci_dev
*pdev
, int slot
)
1163 unsigned int version
;
1164 struct sdhci_chip
*chip
;
1165 struct mmc_host
*mmc
;
1166 struct sdhci_host
*host
;
1171 chip
= pci_get_drvdata(pdev
);
1174 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &first_bar
);
1178 first_bar
&= PCI_SLOT_INFO_FIRST_BAR_MASK
;
1180 if (first_bar
> 5) {
1181 printk(KERN_ERR DRIVER_NAME
": Invalid first BAR. Aborting.\n");
1185 if (!(pci_resource_flags(pdev
, first_bar
+ slot
) & IORESOURCE_MEM
)) {
1186 printk(KERN_ERR DRIVER_NAME
": BAR is not iomem. Aborting.\n");
1190 if (pci_resource_len(pdev
, first_bar
+ slot
) != 0x100) {
1191 printk(KERN_ERR DRIVER_NAME
": Invalid iomem size. "
1192 "You may experience problems.\n");
1195 if ((pdev
->class & 0x0000FF) == PCI_SDHCI_IFVENDOR
) {
1196 printk(KERN_ERR DRIVER_NAME
": Vendor specific interface. Aborting.\n");
1200 if ((pdev
->class & 0x0000FF) > PCI_SDHCI_IFVENDOR
) {
1201 printk(KERN_ERR DRIVER_NAME
": Unknown interface. Aborting.\n");
1205 mmc
= mmc_alloc_host(sizeof(struct sdhci_host
), &pdev
->dev
);
1209 host
= mmc_priv(mmc
);
1213 chip
->hosts
[slot
] = host
;
1215 host
->bar
= first_bar
+ slot
;
1217 host
->addr
= pci_resource_start(pdev
, host
->bar
);
1218 host
->irq
= pdev
->irq
;
1220 DBG("slot %d at 0x%08lx, irq %d\n", slot
, host
->addr
, host
->irq
);
1222 snprintf(host
->slot_descr
, 20, "sdhci:slot%d", slot
);
1224 ret
= pci_request_region(pdev
, host
->bar
, host
->slot_descr
);
1228 host
->ioaddr
= ioremap_nocache(host
->addr
,
1229 pci_resource_len(pdev
, host
->bar
));
1230 if (!host
->ioaddr
) {
1235 sdhci_reset(host
, SDHCI_RESET_ALL
);
1237 version
= readw(host
->ioaddr
+ SDHCI_HOST_VERSION
);
1238 version
= (version
& SDHCI_SPEC_VER_MASK
) >> SDHCI_SPEC_VER_SHIFT
;
1240 printk(KERN_ERR
"%s: Unknown controller version (%d). "
1241 "You may experience problems.\n", host
->slot_descr
,
1245 caps
= readl(host
->ioaddr
+ SDHCI_CAPABILITIES
);
1248 DBG("DMA forced off\n");
1249 else if (debug_forcedma
) {
1250 DBG("DMA forced on\n");
1251 host
->flags
|= SDHCI_USE_DMA
;
1252 } else if (chip
->quirks
& SDHCI_QUIRK_FORCE_DMA
)
1253 host
->flags
|= SDHCI_USE_DMA
;
1254 else if ((pdev
->class & 0x0000FF) != PCI_SDHCI_IFDMA
)
1255 DBG("Controller doesn't have DMA interface\n");
1256 else if (!(caps
& SDHCI_CAN_DO_DMA
))
1257 DBG("Controller doesn't have DMA capability\n");
1259 host
->flags
|= SDHCI_USE_DMA
;
1261 if (host
->flags
& SDHCI_USE_DMA
) {
1262 if (pci_set_dma_mask(pdev
, DMA_32BIT_MASK
)) {
1263 printk(KERN_WARNING
"%s: No suitable DMA available. "
1264 "Falling back to PIO.\n", host
->slot_descr
);
1265 host
->flags
&= ~SDHCI_USE_DMA
;
1269 if (host
->flags
& SDHCI_USE_DMA
)
1270 pci_set_master(pdev
);
1271 else /* XXX: Hack to get MMC layer to avoid highmem */
1275 (caps
& SDHCI_CLOCK_BASE_MASK
) >> SDHCI_CLOCK_BASE_SHIFT
;
1276 if (host
->max_clk
== 0) {
1277 printk(KERN_ERR
"%s: Hardware doesn't specify base clock "
1278 "frequency.\n", host
->slot_descr
);
1282 host
->max_clk
*= 1000000;
1285 (caps
& SDHCI_TIMEOUT_CLK_MASK
) >> SDHCI_TIMEOUT_CLK_SHIFT
;
1286 if (host
->timeout_clk
== 0) {
1287 printk(KERN_ERR
"%s: Hardware doesn't specify timeout clock "
1288 "frequency.\n", host
->slot_descr
);
1292 if (caps
& SDHCI_TIMEOUT_CLK_UNIT
)
1293 host
->timeout_clk
*= 1000;
1296 * Set host parameters.
1298 mmc
->ops
= &sdhci_ops
;
1299 mmc
->f_min
= host
->max_clk
/ 256;
1300 mmc
->f_max
= host
->max_clk
;
1301 mmc
->caps
= MMC_CAP_4_BIT_DATA
| MMC_CAP_MULTIWRITE
| MMC_CAP_BYTEBLOCK
;
1304 if (caps
& SDHCI_CAN_VDD_330
)
1305 mmc
->ocr_avail
|= MMC_VDD_32_33
|MMC_VDD_33_34
;
1306 else if (caps
& SDHCI_CAN_VDD_300
)
1307 mmc
->ocr_avail
|= MMC_VDD_29_30
|MMC_VDD_30_31
;
1308 else if (caps
& SDHCI_CAN_VDD_180
)
1309 mmc
->ocr_avail
|= MMC_VDD_17_18
|MMC_VDD_18_19
;
1311 if ((host
->max_clk
> 25000000) && !(caps
& SDHCI_CAN_DO_HISPD
)) {
1312 printk(KERN_ERR
"%s: Controller reports > 25 MHz base clock,"
1313 " but no high speed support.\n",
1315 mmc
->f_max
= 25000000;
1318 if (mmc
->ocr_avail
== 0) {
1319 printk(KERN_ERR
"%s: Hardware doesn't report any "
1320 "support voltages.\n", host
->slot_descr
);
1325 spin_lock_init(&host
->lock
);
1328 * Maximum number of segments. Hardware cannot do scatter lists.
1330 if (host
->flags
& SDHCI_USE_DMA
)
1331 mmc
->max_hw_segs
= 1;
1333 mmc
->max_hw_segs
= 16;
1334 mmc
->max_phys_segs
= 16;
1337 * Maximum number of sectors in one transfer. Limited by DMA boundary
1340 mmc
->max_req_size
= 524288;
1343 * Maximum segment size. Could be one segment with the maximum number
1346 mmc
->max_seg_size
= mmc
->max_req_size
;
1349 * Maximum block size. This varies from controller to controller and
1350 * is specified in the capabilities register.
1352 mmc
->max_blk_size
= (caps
& SDHCI_MAX_BLOCK_MASK
) >> SDHCI_MAX_BLOCK_SHIFT
;
1353 if (mmc
->max_blk_size
>= 3) {
1354 printk(KERN_ERR
"%s: Invalid maximum block size.\n",
1359 mmc
->max_blk_size
= 512 << mmc
->max_blk_size
;
1362 * Maximum block count.
1364 mmc
->max_blk_count
= 65535;
1369 tasklet_init(&host
->card_tasklet
,
1370 sdhci_tasklet_card
, (unsigned long)host
);
1371 tasklet_init(&host
->finish_tasklet
,
1372 sdhci_tasklet_finish
, (unsigned long)host
);
1374 setup_timer(&host
->timer
, sdhci_timeout_timer
, (unsigned long)host
);
1376 ret
= request_irq(host
->irq
, sdhci_irq
, IRQF_SHARED
,
1377 host
->slot_descr
, host
);
1383 #ifdef CONFIG_MMC_DEBUG
1384 sdhci_dumpregs(host
);
1391 printk(KERN_INFO
"%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc
),
1392 host
->addr
, host
->irq
,
1393 (host
->flags
& SDHCI_USE_DMA
)?"DMA":"PIO");
1398 tasklet_kill(&host
->card_tasklet
);
1399 tasklet_kill(&host
->finish_tasklet
);
1401 iounmap(host
->ioaddr
);
1403 pci_release_region(pdev
, host
->bar
);
1410 static void sdhci_remove_slot(struct pci_dev
*pdev
, int slot
)
1412 struct sdhci_chip
*chip
;
1413 struct mmc_host
*mmc
;
1414 struct sdhci_host
*host
;
1416 chip
= pci_get_drvdata(pdev
);
1417 host
= chip
->hosts
[slot
];
1420 chip
->hosts
[slot
] = NULL
;
1422 mmc_remove_host(mmc
);
1424 sdhci_reset(host
, SDHCI_RESET_ALL
);
1426 free_irq(host
->irq
, host
);
1428 del_timer_sync(&host
->timer
);
1430 tasklet_kill(&host
->card_tasklet
);
1431 tasklet_kill(&host
->finish_tasklet
);
1433 iounmap(host
->ioaddr
);
1435 pci_release_region(pdev
, host
->bar
);
1440 static int __devinit
sdhci_probe(struct pci_dev
*pdev
,
1441 const struct pci_device_id
*ent
)
1445 struct sdhci_chip
*chip
;
1447 BUG_ON(pdev
== NULL
);
1448 BUG_ON(ent
== NULL
);
1450 pci_read_config_byte(pdev
, PCI_CLASS_REVISION
, &rev
);
1452 printk(KERN_INFO DRIVER_NAME
1453 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1454 pci_name(pdev
), (int)pdev
->vendor
, (int)pdev
->device
,
1457 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &slots
);
1461 slots
= PCI_SLOT_INFO_SLOTS(slots
) + 1;
1462 DBG("found %d slot(s)\n", slots
);
1466 ret
= pci_enable_device(pdev
);
1470 chip
= kzalloc(sizeof(struct sdhci_chip
) +
1471 sizeof(struct sdhci_host
*) * slots
, GFP_KERNEL
);
1478 chip
->quirks
= ent
->driver_data
;
1481 chip
->quirks
= debug_quirks
;
1483 chip
->num_slots
= slots
;
1484 pci_set_drvdata(pdev
, chip
);
1486 for (i
= 0;i
< slots
;i
++) {
1487 ret
= sdhci_probe_slot(pdev
, i
);
1489 for (i
--;i
>= 0;i
--)
1490 sdhci_remove_slot(pdev
, i
);
1498 pci_set_drvdata(pdev
, NULL
);
1502 pci_disable_device(pdev
);
1506 static void __devexit
sdhci_remove(struct pci_dev
*pdev
)
1509 struct sdhci_chip
*chip
;
1511 chip
= pci_get_drvdata(pdev
);
1514 for (i
= 0;i
< chip
->num_slots
;i
++)
1515 sdhci_remove_slot(pdev
, i
);
1517 pci_set_drvdata(pdev
, NULL
);
1522 pci_disable_device(pdev
);
1525 static struct pci_driver sdhci_driver
= {
1526 .name
= DRIVER_NAME
,
1527 .id_table
= pci_ids
,
1528 .probe
= sdhci_probe
,
1529 .remove
= __devexit_p(sdhci_remove
),
1530 .suspend
= sdhci_suspend
,
1531 .resume
= sdhci_resume
,
1534 /*****************************************************************************\
1536 * Driver init/exit *
1538 \*****************************************************************************/
1540 static int __init
sdhci_drv_init(void)
1542 printk(KERN_INFO DRIVER_NAME
1543 ": Secure Digital Host Controller Interface driver, "
1544 DRIVER_VERSION
"\n");
1545 printk(KERN_INFO DRIVER_NAME
": Copyright(c) Pierre Ossman\n");
1547 return pci_register_driver(&sdhci_driver
);
1550 static void __exit
sdhci_drv_exit(void)
1554 pci_unregister_driver(&sdhci_driver
);
1557 module_init(sdhci_drv_init
);
1558 module_exit(sdhci_drv_exit
);
1560 module_param(debug_nodma
, uint
, 0444);
1561 module_param(debug_forcedma
, uint
, 0444);
1562 module_param(debug_quirks
, uint
, 0444);
1564 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1565 MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1566 MODULE_VERSION(DRIVER_VERSION
);
1567 MODULE_LICENSE("GPL");
1569 MODULE_PARM_DESC(debug_nodma
, "Forcefully disable DMA transfers. (default 0)");
1570 MODULE_PARM_DESC(debug_forcedma
, "Forcefully enable DMA transfers. (default 0)");
1571 MODULE_PARM_DESC(debug_quirks
, "Force certain quirks.");