drivers/watchdog/qcom-wdt.c

   1 /* Copyright (c) 2014, The Linux Foundation. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  */
  13 #include <linux/clk.h>
  14 #include <linux/delay.h>
  15 #include <linux/io.h>
  16 #include <linux/kernel.h>
  17 #include <linux/module.h>
  18 #include <linux/of.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/watchdog.h>
  21
  22 #define WDT_RST         0x38
  23 #define WDT_EN          0x40
  24 #define WDT_BITE_TIME   0x5C
  25
  26 struct qcom_wdt {
  27         struct watchdog_device  wdd;
  28         struct clk              *clk;
  29         unsigned long           rate;
  30         void __iomem            *base;
  31 };
  32
  33 static inline
  34 struct qcom_wdt *to_qcom_wdt(struct watchdog_device *wdd)
  35 {
  36         return container_of(wdd, struct qcom_wdt, wdd);
  37 }
  38
  39 static int qcom_wdt_start(struct watchdog_device *wdd)
  40 {
  41         struct qcom_wdt *wdt = to_qcom_wdt(wdd);
  42
  43         writel(0, wdt->base + WDT_EN);
  44         writel(1, wdt->base + WDT_RST);
  45         writel(wdd->timeout * wdt->rate, wdt->base + WDT_BITE_TIME);
  46         writel(1, wdt->base + WDT_EN);
  47         return 0;
  48 }
  49
  50 static int qcom_wdt_stop(struct watchdog_device *wdd)
  51 {
  52         struct qcom_wdt *wdt = to_qcom_wdt(wdd);
  53
  54         writel(0, wdt->base + WDT_EN);
  55         return 0;
  56 }
  57
  58 static int qcom_wdt_ping(struct watchdog_device *wdd)
  59 {
  60         struct qcom_wdt *wdt = to_qcom_wdt(wdd);
  61
  62         writel(1, wdt->base + WDT_RST);
  63         return 0;
  64 }
  65
  66 static int qcom_wdt_set_timeout(struct watchdog_device *wdd,
  67                                 unsigned int timeout)
  68 {
  69         wdd->timeout = timeout;
  70         return qcom_wdt_start(wdd);
  71 }
  72
  73 static int qcom_wdt_restart(struct watchdog_device *wdd)
  74 {
  75         struct qcom_wdt *wdt = to_qcom_wdt(wdd);
  76         u32 timeout;
  77
  78         /*
  79          * Trigger watchdog bite:
  80          *    Setup BITE_TIME to be 128ms, and enable WDT.
  81          */
  82         timeout = 128 * wdt->rate / 1000;
  83
  84         writel(0, wdt->base + WDT_EN);
  85         writel(1, wdt->base + WDT_RST);
  86         writel(timeout, wdt->base + WDT_BITE_TIME);
  87         writel(1, wdt->base + WDT_EN);
  88
  89         /*
  90          * Actually make sure the above sequence hits hardware before sleeping.
  91          */
  92         wmb();
  93
  94         msleep(150);
  95         return 0;
  96 }
  97
  98 static const struct watchdog_ops qcom_wdt_ops = {
  99         .start          = qcom_wdt_start,
 100         .stop           = qcom_wdt_stop,
 101         .ping           = qcom_wdt_ping,
 102         .set_timeout    = qcom_wdt_set_timeout,
 103         .restart        = qcom_wdt_restart,
 104         .owner          = THIS_MODULE,
 105 };
 106
 107 static const struct watchdog_info qcom_wdt_info = {
 108         .options        = WDIOF_KEEPALIVEPING
 109                         | WDIOF_MAGICCLOSE
 110                         | WDIOF_SETTIMEOUT,
 111         .identity       = KBUILD_MODNAME,
 112 };
 113
 114 static int qcom_wdt_probe(struct platform_device *pdev)
 115 {
 116         struct qcom_wdt *wdt;
 117         struct resource *res;
 118         struct device_node *np = pdev->dev.of_node;
 119         u32 percpu_offset;
 120         int ret;
 121
 122         wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
 123         if (!wdt)
 124                 return -ENOMEM;
 125
 126         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 127
 128         /* We use CPU0's DGT for the watchdog */
 129         if (of_property_read_u32(np, "cpu-offset", &percpu_offset))
 130                 percpu_offset = 0;
 131
 132         res->start += percpu_offset;
 133         res->end += percpu_offset;
 134
 135         wdt->base = devm_ioremap_resource(&pdev->dev, res);
 136         if (IS_ERR(wdt->base))
 137                 return PTR_ERR(wdt->base);
 138
 139         wdt->clk = devm_clk_get(&pdev->dev, NULL);
 140         if (IS_ERR(wdt->clk)) {
 141                 dev_err(&pdev->dev, "failed to get input clock\n");
 142                 return PTR_ERR(wdt->clk);
 143         }
 144
 145         ret = clk_prepare_enable(wdt->clk);
 146         if (ret) {
 147                 dev_err(&pdev->dev, "failed to setup clock\n");
 148                 return ret;
 149         }
 150
 151         /*
 152          * We use the clock rate to calculate the max timeout, so ensure it's
 153          * not zero to avoid a divide-by-zero exception.
 154          *
 155          * WATCHDOG_CORE assumes units of seconds, if the WDT is clocked such
 156          * that it would bite before a second elapses it's usefulness is
 157          * limited.  Bail if this is the case.
 158          */
 159         wdt->rate = clk_get_rate(wdt->clk);
 160         if (wdt->rate == 0 ||
 161             wdt->rate > 0x10000000U) {
 162                 dev_err(&pdev->dev, "invalid clock rate\n");
 163                 ret = -EINVAL;
 164                 goto err_clk_unprepare;
 165         }
 166
 167         wdt->wdd.info = &qcom_wdt_info;
 168         wdt->wdd.ops = &qcom_wdt_ops;
 169         wdt->wdd.min_timeout = 1;
 170         wdt->wdd.max_timeout = 0x10000000U / wdt->rate;
 171         wdt->wdd.parent = &pdev->dev;
 172
 173         /*
 174          * If 'timeout-sec' unspecified in devicetree, assume a 30 second
 175          * default, unless the max timeout is less than 30 seconds, then use
 176          * the max instead.
 177          */
 178         wdt->wdd.timeout = min(wdt->wdd.max_timeout, 30U);
 179         watchdog_init_timeout(&wdt->wdd, 0, &pdev->dev);
 180
 181         ret = watchdog_register_device(&wdt->wdd);
 182         if (ret) {
 183                 dev_err(&pdev->dev, "failed to register watchdog\n");
 184                 goto err_clk_unprepare;
 185         }
 186
 187         platform_set_drvdata(pdev, wdt);
 188         return 0;
 189
 190 err_clk_unprepare:
 191         clk_disable_unprepare(wdt->clk);
 192         return ret;
 193 }
 194
 195 static int qcom_wdt_remove(struct platform_device *pdev)
 196 {
 197         struct qcom_wdt *wdt = platform_get_drvdata(pdev);
 198
 199         watchdog_unregister_device(&wdt->wdd);
 200         clk_disable_unprepare(wdt->clk);
 201         return 0;
 202 }
 203
 204 static const struct of_device_id qcom_wdt_of_table[] = {
 205         { .compatible = "qcom,kpss-timer" },
 206         { .compatible = "qcom,scss-timer" },
 207         { },
 208 };
 209 MODULE_DEVICE_TABLE(of, qcom_wdt_of_table);
 210
 211 static struct platform_driver qcom_watchdog_driver = {
 212         .probe  = qcom_wdt_probe,
 213         .remove = qcom_wdt_remove,
 214         .driver = {
 215                 .name           = KBUILD_MODNAME,
 216                 .of_match_table = qcom_wdt_of_table,
 217         },
 218 };
 219 module_platform_driver(qcom_watchdog_driver);
 220
 221 MODULE_DESCRIPTION("QCOM KPSS Watchdog Driver");
 222 MODULE_LICENSE("GPL v2");