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mtd: OneNAND: Fix multi block erase support at 4KiB pagesize
[linux-2.6/btrfs-unstable.git] / drivers / mtd / onenand / onenand_base.c
blob88f23e3f3014a460c109f914b280755c1e2460c5
1 /*
2 * linux/drivers/mtd/onenand/onenand_base.c
3 *
4 * Copyright © 2005-2009 Samsung Electronics
5 * Copyright © 2007 Nokia Corporation
6 *
7 * Kyungmin Park <kyungmin.park@samsung.com>
8 *
9 * Credits:
10 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
11 * auto-placement support, read-while load support, various fixes
12 *
13 * Vishak G <vishak.g at samsung.com>, Rohit Hagargundgi <h.rohit at samsung.com>
14 * Flex-OneNAND support
15 * Amul Kumar Saha <amul.saha at samsung.com>
16 * OTP support
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
22
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/moduleparam.h>
26 #include <linux/slab.h>
27 #include <linux/init.h>
28 #include <linux/sched.h>
29 #include <linux/delay.h>
30 #include <linux/interrupt.h>
31 #include <linux/jiffies.h>
32 #include <linux/mtd/mtd.h>
33 #include <linux/mtd/onenand.h>
34 #include <linux/mtd/partitions.h>
35
36 #include <asm/io.h>
37
38 /*
39 * Multiblock erase if number of blocks to erase is 2 or more.
40 * Maximum number of blocks for simultaneous erase is 64.
41 */
42 #define MB_ERASE_MIN_BLK_COUNT 2
43 #define MB_ERASE_MAX_BLK_COUNT 64
44
45 /* Default Flex-OneNAND boundary and lock respectively */
46 static int flex_bdry[MAX_DIES * 2] = { -1, 0, -1, 0 };
47
48 module_param_array(flex_bdry, int, NULL, 0400);
49 MODULE_PARM_DESC(flex_bdry, "SLC Boundary information for Flex-OneNAND"
50 "Syntax:flex_bdry=DIE_BDRY,LOCK,..."
51 "DIE_BDRY: SLC boundary of the die"
52 "LOCK: Locking information for SLC boundary"
53 " : 0->Set boundary in unlocked status"
54 " : 1->Set boundary in locked status");
55
56 /* Default OneNAND/Flex-OneNAND OTP options*/
57 static int otp;
58
59 module_param(otp, int, 0400);
60 MODULE_PARM_DESC(otp, "Corresponding behaviour of OneNAND in OTP"
61 "Syntax : otp=LOCK_TYPE"
62 "LOCK_TYPE : Keys issued, for specific OTP Lock type"
63 " : 0 -> Default (No Blocks Locked)"
64 " : 1 -> OTP Block lock"
65 " : 2 -> 1st Block lock"
66 " : 3 -> BOTH OTP Block and 1st Block lock");
67
68 /**
69 * onenand_oob_128 - oob info for Flex-Onenand with 4KB page
70 * For now, we expose only 64 out of 80 ecc bytes
71 */
72 static struct nand_ecclayout onenand_oob_128 = {
73 .eccbytes = 64,
74 .eccpos = {
75 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
76 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
77 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
78 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
79 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,
80 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,
81 102, 103, 104, 105
82 },
83 .oobfree = {
84 {2, 4}, {18, 4}, {34, 4}, {50, 4},
85 {66, 4}, {82, 4}, {98, 4}, {114, 4}
86 }
87 };
88
89 /**
90 * onenand_oob_64 - oob info for large (2KB) page
91 */
92 static struct nand_ecclayout onenand_oob_64 = {
93 .eccbytes = 20,
94 .eccpos = {
95 8, 9, 10, 11, 12,
96 24, 25, 26, 27, 28,
97 40, 41, 42, 43, 44,
98 56, 57, 58, 59, 60,
99 },
100 .oobfree = {
101 {2, 3}, {14, 2}, {18, 3}, {30, 2},
102 {34, 3}, {46, 2}, {50, 3}, {62, 2}
103 }
104 };
105
106 /**
107 * onenand_oob_32 - oob info for middle (1KB) page
108 */
109 static struct nand_ecclayout onenand_oob_32 = {
110 .eccbytes = 10,
111 .eccpos = {
112 8, 9, 10, 11, 12,
113 24, 25, 26, 27, 28,
114 },
115 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
116 };
117
118 static const unsigned char ffchars[] = {
119 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
120 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
121 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
122 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
123 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
124 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
125 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
126 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
127 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
128 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 80 */
129 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
130 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 96 */
131 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
132 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 112 */
133 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
134 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 128 */
135 };
136
137 /**
138 * onenand_readw - [OneNAND Interface] Read OneNAND register
139 * @param addr address to read
140 *
141 * Read OneNAND register
142 */
143 static unsigned short onenand_readw(void __iomem *addr)
144 {
145 return readw(addr);
146 }
147
148 /**
149 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
150 * @param value value to write
151 * @param addr address to write
152 *
153 * Write OneNAND register with value
154 */
155 static void onenand_writew(unsigned short value, void __iomem *addr)
156 {
157 writew(value, addr);
158 }
159
160 /**
161 * onenand_block_address - [DEFAULT] Get block address
162 * @param this onenand chip data structure
163 * @param block the block
164 * @return translated block address if DDP, otherwise same
165 *
166 * Setup Start Address 1 Register (F100h)
167 */
168 static int onenand_block_address(struct onenand_chip *this, int block)
169 {
170 /* Device Flash Core select, NAND Flash Block Address */
171 if (block & this->density_mask)
172 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
173
174 return block;
175 }
176
177 /**
178 * onenand_bufferram_address - [DEFAULT] Get bufferram address
179 * @param this onenand chip data structure
180 * @param block the block
181 * @return set DBS value if DDP, otherwise 0
182 *
183 * Setup Start Address 2 Register (F101h) for DDP
184 */
185 static int onenand_bufferram_address(struct onenand_chip *this, int block)
186 {
187 /* Device BufferRAM Select */
188 if (block & this->density_mask)
189 return ONENAND_DDP_CHIP1;
190
191 return ONENAND_DDP_CHIP0;
192 }
193
194 /**
195 * onenand_page_address - [DEFAULT] Get page address
196 * @param page the page address
197 * @param sector the sector address
198 * @return combined page and sector address
199 *
200 * Setup Start Address 8 Register (F107h)
201 */
202 static int onenand_page_address(int page, int sector)
203 {
204 /* Flash Page Address, Flash Sector Address */
205 int fpa, fsa;
206
207 fpa = page & ONENAND_FPA_MASK;
208 fsa = sector & ONENAND_FSA_MASK;
209
210 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
211 }
212
213 /**
214 * onenand_buffer_address - [DEFAULT] Get buffer address
215 * @param dataram1 DataRAM index
216 * @param sectors the sector address
217 * @param count the number of sectors
218 * @return the start buffer value
219 *
220 * Setup Start Buffer Register (F200h)
221 */
222 static int onenand_buffer_address(int dataram1, int sectors, int count)
223 {
224 int bsa, bsc;
225
226 /* BufferRAM Sector Address */
227 bsa = sectors & ONENAND_BSA_MASK;
228
229 if (dataram1)
230 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
231 else
232 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
233
234 /* BufferRAM Sector Count */
235 bsc = count & ONENAND_BSC_MASK;
236
237 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
238 }
239
240 /**
241 * flexonenand_block- For given address return block number
242 * @param this - OneNAND device structure
243 * @param addr - Address for which block number is needed
244 */
245 static unsigned flexonenand_block(struct onenand_chip *this, loff_t addr)
246 {
247 unsigned boundary, blk, die = 0;
248
249 if (ONENAND_IS_DDP(this) && addr >= this->diesize[0]) {
250 die = 1;
251 addr -= this->diesize[0];
252 }
253
254 boundary = this->boundary[die];
255
256 blk = addr >> (this->erase_shift - 1);
257 if (blk > boundary)
258 blk = (blk + boundary + 1) >> 1;
259
260 blk += die ? this->density_mask : 0;
261 return blk;
262 }
263
264 inline unsigned onenand_block(struct onenand_chip *this, loff_t addr)
265 {
266 if (!FLEXONENAND(this))
267 return addr >> this->erase_shift;
268 return flexonenand_block(this, addr);
269 }
270
271 /**
272 * flexonenand_addr - Return address of the block
273 * @this: OneNAND device structure
274 * @block: Block number on Flex-OneNAND
275 *
276 * Return address of the block
277 */
278 static loff_t flexonenand_addr(struct onenand_chip *this, int block)
279 {
280 loff_t ofs = 0;
281 int die = 0, boundary;
282
283 if (ONENAND_IS_DDP(this) && block >= this->density_mask) {
284 block -= this->density_mask;
285 die = 1;
286 ofs = this->diesize[0];
287 }
288
289 boundary = this->boundary[die];
290 ofs += (loff_t)block << (this->erase_shift - 1);
291 if (block > (boundary + 1))
292 ofs += (loff_t)(block - boundary - 1) << (this->erase_shift - 1);
293 return ofs;
294 }
295
296 loff_t onenand_addr(struct onenand_chip *this, int block)
297 {
298 if (!FLEXONENAND(this))
299 return (loff_t)block << this->erase_shift;
300 return flexonenand_addr(this, block);
301 }
302 EXPORT_SYMBOL(onenand_addr);
303
304 /**
305 * onenand_get_density - [DEFAULT] Get OneNAND density
306 * @param dev_id OneNAND device ID
307 *
308 * Get OneNAND density from device ID
309 */
310 static inline int onenand_get_density(int dev_id)
311 {
312 int density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
313 return (density & ONENAND_DEVICE_DENSITY_MASK);
314 }
315
316 /**
317 * flexonenand_region - [Flex-OneNAND] Return erase region of addr
318 * @param mtd MTD device structure
319 * @param addr address whose erase region needs to be identified
320 */
321 int flexonenand_region(struct mtd_info *mtd, loff_t addr)
322 {
323 int i;
324
325 for (i = 0; i < mtd->numeraseregions; i++)
326 if (addr < mtd->eraseregions[i].offset)
327 break;
328 return i - 1;
329 }
330 EXPORT_SYMBOL(flexonenand_region);
331
332 /**
333 * onenand_command - [DEFAULT] Send command to OneNAND device
334 * @param mtd MTD device structure
335 * @param cmd the command to be sent
336 * @param addr offset to read from or write to
337 * @param len number of bytes to read or write
338 *
339 * Send command to OneNAND device. This function is used for middle/large page
340 * devices (1KB/2KB Bytes per page)
341 */
342 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
343 {
344 struct onenand_chip *this = mtd->priv;
345 int value, block, page;
346
347 /* Address translation */
348 switch (cmd) {
349 case ONENAND_CMD_UNLOCK:
350 case ONENAND_CMD_LOCK:
351 case ONENAND_CMD_LOCK_TIGHT:
352 case ONENAND_CMD_UNLOCK_ALL:
353 block = -1;
354 page = -1;
355 break;
356
357 case FLEXONENAND_CMD_PI_ACCESS:
358 /* addr contains die index */
359 block = addr * this->density_mask;
360 page = -1;
361 break;
362
363 case ONENAND_CMD_ERASE:
364 case ONENAND_CMD_MULTIBLOCK_ERASE:
365 case ONENAND_CMD_ERASE_VERIFY:
366 case ONENAND_CMD_BUFFERRAM:
367 case ONENAND_CMD_OTP_ACCESS:
368 block = onenand_block(this, addr);
369 page = -1;
370 break;
371
372 case FLEXONENAND_CMD_READ_PI:
373 cmd = ONENAND_CMD_READ;
374 block = addr * this->density_mask;
375 page = 0;
376 break;
377
378 default:
379 block = onenand_block(this, addr);
380 if (FLEXONENAND(this))
381 page = (int) (addr - onenand_addr(this, block))>>\
382 this->page_shift;
383 else
384 page = (int) (addr >> this->page_shift);
385 if (ONENAND_IS_2PLANE(this)) {
386 /* Make the even block number */
387 block &= ~1;
388 /* Is it the odd plane? */
389 if (addr & this->writesize)
390 block++;
391 page >>= 1;
392 }
393 page &= this->page_mask;
394 break;
395 }
396
397 /* NOTE: The setting order of the registers is very important! */
398 if (cmd == ONENAND_CMD_BUFFERRAM) {
399 /* Select DataRAM for DDP */
400 value = onenand_bufferram_address(this, block);
401 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
402
403 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this))
404 /* It is always BufferRAM0 */
405 ONENAND_SET_BUFFERRAM0(this);
406 else
407 /* Switch to the next data buffer */
408 ONENAND_SET_NEXT_BUFFERRAM(this);
409
410 return 0;
411 }
412
413 if (block != -1) {
414 /* Write 'DFS, FBA' of Flash */
415 value = onenand_block_address(this, block);
416 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
417
418 /* Select DataRAM for DDP */
419 value = onenand_bufferram_address(this, block);
420 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
421 }
422
423 if (page != -1) {
424 /* Now we use page size operation */
425 int sectors = 0, count = 0;
426 int dataram;
427
428 switch (cmd) {
429 case FLEXONENAND_CMD_RECOVER_LSB:
430 case ONENAND_CMD_READ:
431 case ONENAND_CMD_READOOB:
432 if (ONENAND_IS_4KB_PAGE(this))
433 /* It is always BufferRAM0 */
434 dataram = ONENAND_SET_BUFFERRAM0(this);
435 else
436 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
437 break;
438
439 default:
440 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
441 cmd = ONENAND_CMD_2X_PROG;
442 dataram = ONENAND_CURRENT_BUFFERRAM(this);
443 break;
444 }
445
446 /* Write 'FPA, FSA' of Flash */
447 value = onenand_page_address(page, sectors);
448 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
449
450 /* Write 'BSA, BSC' of DataRAM */
451 value = onenand_buffer_address(dataram, sectors, count);
452 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
453 }
454
455 /* Interrupt clear */
456 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
457
458 /* Write command */
459 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
460
461 return 0;
462 }
463
464 /**
465 * onenand_read_ecc - return ecc status
466 * @param this onenand chip structure
467 */
468 static inline int onenand_read_ecc(struct onenand_chip *this)
469 {
470 int ecc, i, result = 0;
471
472 if (!FLEXONENAND(this) && !ONENAND_IS_4KB_PAGE(this))
473 return this->read_word(this->base + ONENAND_REG_ECC_STATUS);
474
475 for (i = 0; i < 4; i++) {
476 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS + i*2);
477 if (likely(!ecc))
478 continue;
479 if (ecc & FLEXONENAND_UNCORRECTABLE_ERROR)
480 return ONENAND_ECC_2BIT_ALL;
481 else
482 result = ONENAND_ECC_1BIT_ALL;
483 }
484
485 return result;
486 }
487
488 /**
489 * onenand_wait - [DEFAULT] wait until the command is done
490 * @param mtd MTD device structure
491 * @param state state to select the max. timeout value
492 *
493 * Wait for command done. This applies to all OneNAND command
494 * Read can take up to 30us, erase up to 2ms and program up to 350us
495 * according to general OneNAND specs
496 */
497 static int onenand_wait(struct mtd_info *mtd, int state)
498 {
499 struct onenand_chip * this = mtd->priv;
500 unsigned long timeout;
501 unsigned int flags = ONENAND_INT_MASTER;
502 unsigned int interrupt = 0;
503 unsigned int ctrl;
504
505 /* The 20 msec is enough */
506 timeout = jiffies + msecs_to_jiffies(20);
507 while (time_before(jiffies, timeout)) {
508 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
509
510 if (interrupt & flags)
511 break;
512
513 if (state != FL_READING && state != FL_PREPARING_ERASE)
514 cond_resched();
515 }
516 /* To get correct interrupt status in timeout case */
517 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
518
519 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
520
521 /*
522 * In the Spec. it checks the controller status first
523 * However if you get the correct information in case of
524 * power off recovery (POR) test, it should read ECC status first
525 */
526 if (interrupt & ONENAND_INT_READ) {
527 int ecc = onenand_read_ecc(this);
528 if (ecc) {
529 if (ecc & ONENAND_ECC_2BIT_ALL) {
530 printk(KERN_ERR "%s: ECC error = 0x%04x\n",
531 __func__, ecc);
532 mtd->ecc_stats.failed++;
533 return -EBADMSG;
534 } else if (ecc & ONENAND_ECC_1BIT_ALL) {
535 printk(KERN_DEBUG "%s: correctable ECC error = 0x%04x\n",
536 __func__, ecc);
537 mtd->ecc_stats.corrected++;
538 }
539 }
540 } else if (state == FL_READING) {
541 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
542 __func__, ctrl, interrupt);
543 return -EIO;
544 }
545
546 if (state == FL_PREPARING_ERASE && !(interrupt & ONENAND_INT_ERASE)) {
547 printk(KERN_ERR "%s: mb erase timeout! ctrl=0x%04x intr=0x%04x\n",
548 __func__, ctrl, interrupt);
549 return -EIO;
550 }
551
552 if (!(interrupt & ONENAND_INT_MASTER)) {
553 printk(KERN_ERR "%s: timeout! ctrl=0x%04x intr=0x%04x\n",
554 __func__, ctrl, interrupt);
555 return -EIO;
556 }
557
558 /* If there's controller error, it's a real error */
559 if (ctrl & ONENAND_CTRL_ERROR) {
560 printk(KERN_ERR "%s: controller error = 0x%04x\n",
561 __func__, ctrl);
562 if (ctrl & ONENAND_CTRL_LOCK)
563 printk(KERN_ERR "%s: it's locked error.\n", __func__);
564 return -EIO;
565 }
566
567 return 0;
568 }
569
570 /*
571 * onenand_interrupt - [DEFAULT] onenand interrupt handler
572 * @param irq onenand interrupt number
573 * @param dev_id interrupt data
574 *
575 * complete the work
576 */
577 static irqreturn_t onenand_interrupt(int irq, void *data)
578 {
579 struct onenand_chip *this = data;
580
581 /* To handle shared interrupt */
582 if (!this->complete.done)
583 complete(&this->complete);
584
585 return IRQ_HANDLED;
586 }
587
588 /*
589 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
590 * @param mtd MTD device structure
591 * @param state state to select the max. timeout value
592 *
593 * Wait for command done.
594 */
595 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
596 {
597 struct onenand_chip *this = mtd->priv;
598
599 wait_for_completion(&this->complete);
600
601 return onenand_wait(mtd, state);
602 }
603
604 /*
605 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
606 * @param mtd MTD device structure
607 * @param state state to select the max. timeout value
608 *
609 * Try interrupt based wait (It is used one-time)
610 */
611 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
612 {
613 struct onenand_chip *this = mtd->priv;
614 unsigned long remain, timeout;
615
616 /* We use interrupt wait first */
617 this->wait = onenand_interrupt_wait;
618
619 timeout = msecs_to_jiffies(100);
620 remain = wait_for_completion_timeout(&this->complete, timeout);
621 if (!remain) {
622 printk(KERN_INFO "OneNAND: There's no interrupt. "
623 "We use the normal wait\n");
624
625 /* Release the irq */
626 free_irq(this->irq, this);
627
628 this->wait = onenand_wait;
629 }
630
631 return onenand_wait(mtd, state);
632 }
633
634 /*
635 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
636 * @param mtd MTD device structure
637 *
638 * There's two method to wait onenand work
639 * 1. polling - read interrupt status register
640 * 2. interrupt - use the kernel interrupt method
641 */
642 static void onenand_setup_wait(struct mtd_info *mtd)
643 {
644 struct onenand_chip *this = mtd->priv;
645 int syscfg;
646
647 init_completion(&this->complete);
648
649 if (this->irq <= 0) {
650 this->wait = onenand_wait;
651 return;
652 }
653
654 if (request_irq(this->irq, &onenand_interrupt,
655 IRQF_SHARED, "onenand", this)) {
656 /* If we can't get irq, use the normal wait */
657 this->wait = onenand_wait;
658 return;
659 }
660
661 /* Enable interrupt */
662 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
663 syscfg |= ONENAND_SYS_CFG1_IOBE;
664 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
665
666 this->wait = onenand_try_interrupt_wait;
667 }
668
669 /**
670 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
671 * @param mtd MTD data structure
672 * @param area BufferRAM area
673 * @return offset given area
674 *
675 * Return BufferRAM offset given area
676 */
677 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
678 {
679 struct onenand_chip *this = mtd->priv;
680
681 if (ONENAND_CURRENT_BUFFERRAM(this)) {
682 /* Note: the 'this->writesize' is a real page size */
683 if (area == ONENAND_DATARAM)
684 return this->writesize;
685 if (area == ONENAND_SPARERAM)
686 return mtd->oobsize;
687 }
688
689 return 0;
690 }
691
692 /**
693 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
694 * @param mtd MTD data structure
695 * @param area BufferRAM area
696 * @param buffer the databuffer to put/get data
697 * @param offset offset to read from or write to
698 * @param count number of bytes to read/write
699 *
700 * Read the BufferRAM area
701 */
702 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
703 unsigned char *buffer, int offset, size_t count)
704 {
705 struct onenand_chip *this = mtd->priv;
706 void __iomem *bufferram;
707
708 bufferram = this->base + area;
709
710 bufferram += onenand_bufferram_offset(mtd, area);
711
712 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
713 unsigned short word;
714
715 /* Align with word(16-bit) size */
716 count--;
717
718 /* Read word and save byte */
719 word = this->read_word(bufferram + offset + count);
720 buffer[count] = (word & 0xff);
721 }
722
723 memcpy(buffer, bufferram + offset, count);
724
725 return 0;
726 }
727
728 /**
729 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
730 * @param mtd MTD data structure
731 * @param area BufferRAM area
732 * @param buffer the databuffer to put/get data
733 * @param offset offset to read from or write to
734 * @param count number of bytes to read/write
735 *
736 * Read the BufferRAM area with Sync. Burst Mode
737 */
738 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
739 unsigned char *buffer, int offset, size_t count)
740 {
741 struct onenand_chip *this = mtd->priv;
742 void __iomem *bufferram;
743
744 bufferram = this->base + area;
745
746 bufferram += onenand_bufferram_offset(mtd, area);
747
748 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
749
750 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
751 unsigned short word;
752
753 /* Align with word(16-bit) size */
754 count--;
755
756 /* Read word and save byte */
757 word = this->read_word(bufferram + offset + count);
758 buffer[count] = (word & 0xff);
759 }
760
761 memcpy(buffer, bufferram + offset, count);
762
763 this->mmcontrol(mtd, 0);
764
765 return 0;
766 }
767
768 /**
769 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
770 * @param mtd MTD data structure
771 * @param area BufferRAM area
772 * @param buffer the databuffer to put/get data
773 * @param offset offset to read from or write to
774 * @param count number of bytes to read/write
775 *
776 * Write the BufferRAM area
777 */
778 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
779 const unsigned char *buffer, int offset, size_t count)
780 {
781 struct onenand_chip *this = mtd->priv;
782 void __iomem *bufferram;
783
784 bufferram = this->base + area;
785
786 bufferram += onenand_bufferram_offset(mtd, area);
787
788 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
789 unsigned short word;
790 int byte_offset;
791
792 /* Align with word(16-bit) size */
793 count--;
794
795 /* Calculate byte access offset */
796 byte_offset = offset + count;
797
798 /* Read word and save byte */
799 word = this->read_word(bufferram + byte_offset);
800 word = (word & ~0xff) | buffer[count];
801 this->write_word(word, bufferram + byte_offset);
802 }
803
804 memcpy(bufferram + offset, buffer, count);
805
806 return 0;
807 }
808
809 /**
810 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
811 * @param mtd MTD data structure
812 * @param addr address to check
813 * @return blockpage address
814 *
815 * Get blockpage address at 2x program mode
816 */
817 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
818 {
819 struct onenand_chip *this = mtd->priv;
820 int blockpage, block, page;
821
822 /* Calculate the even block number */
823 block = (int) (addr >> this->erase_shift) & ~1;
824 /* Is it the odd plane? */
825 if (addr & this->writesize)
826 block++;
827 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
828 blockpage = (block << 7) | page;
829
830 return blockpage;
831 }
832
833 /**
834 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
835 * @param mtd MTD data structure
836 * @param addr address to check
837 * @return 1 if there are valid data, otherwise 0
838 *
839 * Check bufferram if there is data we required
840 */
841 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
842 {
843 struct onenand_chip *this = mtd->priv;
844 int blockpage, found = 0;
845 unsigned int i;
846
847 if (ONENAND_IS_2PLANE(this))
848 blockpage = onenand_get_2x_blockpage(mtd, addr);
849 else
850 blockpage = (int) (addr >> this->page_shift);
851
852 /* Is there valid data? */
853 i = ONENAND_CURRENT_BUFFERRAM(this);
854 if (this->bufferram[i].blockpage == blockpage)
855 found = 1;
856 else {
857 /* Check another BufferRAM */
858 i = ONENAND_NEXT_BUFFERRAM(this);
859 if (this->bufferram[i].blockpage == blockpage) {
860 ONENAND_SET_NEXT_BUFFERRAM(this);
861 found = 1;
862 }
863 }
864
865 if (found && ONENAND_IS_DDP(this)) {
866 /* Select DataRAM for DDP */
867 int block = onenand_block(this, addr);
868 int value = onenand_bufferram_address(this, block);
869 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
870 }
871
872 return found;
873 }
874
875 /**
876 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
877 * @param mtd MTD data structure
878 * @param addr address to update
879 * @param valid valid flag
880 *
881 * Update BufferRAM information
882 */
883 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
884 int valid)
885 {
886 struct onenand_chip *this = mtd->priv;
887 int blockpage;
888 unsigned int i;
889
890 if (ONENAND_IS_2PLANE(this))
891 blockpage = onenand_get_2x_blockpage(mtd, addr);
892 else
893 blockpage = (int) (addr >> this->page_shift);
894
895 /* Invalidate another BufferRAM */
896 i = ONENAND_NEXT_BUFFERRAM(this);
897 if (this->bufferram[i].blockpage == blockpage)
898 this->bufferram[i].blockpage = -1;
899
900 /* Update BufferRAM */
901 i = ONENAND_CURRENT_BUFFERRAM(this);
902 if (valid)
903 this->bufferram[i].blockpage = blockpage;
904 else
905 this->bufferram[i].blockpage = -1;
906 }
907
908 /**
909 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
910 * @param mtd MTD data structure
911 * @param addr start address to invalidate
912 * @param len length to invalidate
913 *
914 * Invalidate BufferRAM information
915 */
916 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
917 unsigned int len)
918 {
919 struct onenand_chip *this = mtd->priv;
920 int i;
921 loff_t end_addr = addr + len;
922
923 /* Invalidate BufferRAM */
924 for (i = 0; i < MAX_BUFFERRAM; i++) {
925 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
926 if (buf_addr >= addr && buf_addr < end_addr)
927 this->bufferram[i].blockpage = -1;
928 }
929 }
930
931 /**
932 * onenand_get_device - [GENERIC] Get chip for selected access
933 * @param mtd MTD device structure
934 * @param new_state the state which is requested
935 *
936 * Get the device and lock it for exclusive access
937 */
938 static int onenand_get_device(struct mtd_info *mtd, int new_state)
939 {
940 struct onenand_chip *this = mtd->priv;
941 DECLARE_WAITQUEUE(wait, current);
942
943 /*
944 * Grab the lock and see if the device is available
945 */
946 while (1) {
947 spin_lock(&this->chip_lock);
948 if (this->state == FL_READY) {
949 this->state = new_state;
950 spin_unlock(&this->chip_lock);
951 break;
952 }
953 if (new_state == FL_PM_SUSPENDED) {
954 spin_unlock(&this->chip_lock);
955 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
956 }
957 set_current_state(TASK_UNINTERRUPTIBLE);
958 add_wait_queue(&this->wq, &wait);
959 spin_unlock(&this->chip_lock);
960 schedule();
961 remove_wait_queue(&this->wq, &wait);
962 }
963
964 return 0;
965 }
966
967 /**
968 * onenand_release_device - [GENERIC] release chip
969 * @param mtd MTD device structure
970 *
971 * Deselect, release chip lock and wake up anyone waiting on the device
972 */
973 static void onenand_release_device(struct mtd_info *mtd)
974 {
975 struct onenand_chip *this = mtd->priv;
976
977 /* Release the chip */
978 spin_lock(&this->chip_lock);
979 this->state = FL_READY;
980 wake_up(&this->wq);
981 spin_unlock(&this->chip_lock);
982 }
983
984 /**
985 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
986 * @param mtd MTD device structure
987 * @param buf destination address
988 * @param column oob offset to read from
989 * @param thislen oob length to read
990 */
991 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
992 int thislen)
993 {
994 struct onenand_chip *this = mtd->priv;
995 struct nand_oobfree *free;
996 int readcol = column;
997 int readend = column + thislen;
998 int lastgap = 0;
999 unsigned int i;
1000 uint8_t *oob_buf = this->oob_buf;
1001
1002 free = this->ecclayout->oobfree;
1003 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1004 if (readcol >= lastgap)
1005 readcol += free->offset - lastgap;
1006 if (readend >= lastgap)
1007 readend += free->offset - lastgap;
1008 lastgap = free->offset + free->length;
1009 }
1010 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1011 free = this->ecclayout->oobfree;
1012 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1013 int free_end = free->offset + free->length;
1014 if (free->offset < readend && free_end > readcol) {
1015 int st = max_t(int,free->offset,readcol);
1016 int ed = min_t(int,free_end,readend);
1017 int n = ed - st;
1018 memcpy(buf, oob_buf + st, n);
1019 buf += n;
1020 } else if (column == 0)
1021 break;
1022 }
1023 return 0;
1024 }
1025
1026 /**
1027 * onenand_recover_lsb - [Flex-OneNAND] Recover LSB page data
1028 * @param mtd MTD device structure
1029 * @param addr address to recover
1030 * @param status return value from onenand_wait / onenand_bbt_wait
1031 *
1032 * MLC NAND Flash cell has paired pages - LSB page and MSB page. LSB page has
1033 * lower page address and MSB page has higher page address in paired pages.
1034 * If power off occurs during MSB page program, the paired LSB page data can
1035 * become corrupt. LSB page recovery read is a way to read LSB page though page
1036 * data are corrupted. When uncorrectable error occurs as a result of LSB page
1037 * read after power up, issue LSB page recovery read.
1038 */
1039 static int onenand_recover_lsb(struct mtd_info *mtd, loff_t addr, int status)
1040 {
1041 struct onenand_chip *this = mtd->priv;
1042 int i;
1043
1044 /* Recovery is only for Flex-OneNAND */
1045 if (!FLEXONENAND(this))
1046 return status;
1047
1048 /* check if we failed due to uncorrectable error */
1049 if (status != -EBADMSG && status != ONENAND_BBT_READ_ECC_ERROR)
1050 return status;
1051
1052 /* check if address lies in MLC region */
1053 i = flexonenand_region(mtd, addr);
1054 if (mtd->eraseregions[i].erasesize < (1 << this->erase_shift))
1055 return status;
1056
1057 /* We are attempting to reread, so decrement stats.failed
1058 * which was incremented by onenand_wait due to read failure
1059 */
1060 printk(KERN_INFO "%s: Attempting to recover from uncorrectable read\n",
1061 __func__);
1062 mtd->ecc_stats.failed--;
1063
1064 /* Issue the LSB page recovery command */
1065 this->command(mtd, FLEXONENAND_CMD_RECOVER_LSB, addr, this->writesize);
1066 return this->wait(mtd, FL_READING);
1067 }
1068
1069 /**
1070 * onenand_mlc_read_ops_nolock - MLC OneNAND read main and/or out-of-band
1071 * @param mtd MTD device structure
1072 * @param from offset to read from
1073 * @param ops: oob operation description structure
1074 *
1075 * MLC OneNAND / Flex-OneNAND has 4KB page size and 4KB dataram.
1076 * So, read-while-load is not present.
1077 */
1078 static int onenand_mlc_read_ops_nolock(struct mtd_info *mtd, loff_t from,
1079 struct mtd_oob_ops *ops)
1080 {
1081 struct onenand_chip *this = mtd->priv;
1082 struct mtd_ecc_stats stats;
1083 size_t len = ops->len;
1084 size_t ooblen = ops->ooblen;
1085 u_char *buf = ops->datbuf;
1086 u_char *oobbuf = ops->oobbuf;
1087 int read = 0, column, thislen;
1088 int oobread = 0, oobcolumn, thisooblen, oobsize;
1089 int ret = 0;
1090 int writesize = this->writesize;
1091
1092 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
1093 __func__, (unsigned int) from, (int) len);
1094
1095 if (ops->mode == MTD_OOB_AUTO)
1096 oobsize = this->ecclayout->oobavail;
1097 else
1098 oobsize = mtd->oobsize;
1099
1100 oobcolumn = from & (mtd->oobsize - 1);
1101
1102 /* Do not allow reads past end of device */
1103 if (from + len > mtd->size) {
1104 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1105 __func__);
1106 ops->retlen = 0;
1107 ops->oobretlen = 0;
1108 return -EINVAL;
1109 }
1110
1111 stats = mtd->ecc_stats;
1112
1113 while (read < len) {
1114 cond_resched();
1115
1116 thislen = min_t(int, writesize, len - read);
1117
1118 column = from & (writesize - 1);
1119 if (column + thislen > writesize)
1120 thislen = writesize - column;
1121
1122 if (!onenand_check_bufferram(mtd, from)) {
1123 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1124
1125 ret = this->wait(mtd, FL_READING);
1126 if (unlikely(ret))
1127 ret = onenand_recover_lsb(mtd, from, ret);
1128 onenand_update_bufferram(mtd, from, !ret);
1129 if (ret == -EBADMSG)
1130 ret = 0;
1131 }
1132
1133 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
1134 if (oobbuf) {
1135 thisooblen = oobsize - oobcolumn;
1136 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1137
1138 if (ops->mode == MTD_OOB_AUTO)
1139 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1140 else
1141 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1142 oobread += thisooblen;
1143 oobbuf += thisooblen;
1144 oobcolumn = 0;
1145 }
1146
1147 read += thislen;
1148 if (read == len)
1149 break;
1150
1151 from += thislen;
1152 buf += thislen;
1153 }
1154
1155 /*
1156 * Return success, if no ECC failures, else -EBADMSG
1157 * fs driver will take care of that, because
1158 * retlen == desired len and result == -EBADMSG
1159 */
1160 ops->retlen = read;
1161 ops->oobretlen = oobread;
1162
1163 if (ret)
1164 return ret;
1165
1166 if (mtd->ecc_stats.failed - stats.failed)
1167 return -EBADMSG;
1168
1169 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
1170 }
1171
1172 /**
1173 * onenand_read_ops_nolock - [OneNAND Interface] OneNAND read main and/or out-of-band
1174 * @param mtd MTD device structure
1175 * @param from offset to read from
1176 * @param ops: oob operation description structure
1177 *
1178 * OneNAND read main and/or out-of-band data
1179 */
1180 static int onenand_read_ops_nolock(struct mtd_info *mtd, loff_t from,
1181 struct mtd_oob_ops *ops)
1182 {
1183 struct onenand_chip *this = mtd->priv;
1184 struct mtd_ecc_stats stats;
1185 size_t len = ops->len;
1186 size_t ooblen = ops->ooblen;
1187 u_char *buf = ops->datbuf;
1188 u_char *oobbuf = ops->oobbuf;
1189 int read = 0, column, thislen;
1190 int oobread = 0, oobcolumn, thisooblen, oobsize;
1191 int ret = 0, boundary = 0;
1192 int writesize = this->writesize;
1193
1194 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
1195 __func__, (unsigned int) from, (int) len);
1196
1197 if (ops->mode == MTD_OOB_AUTO)
1198 oobsize = this->ecclayout->oobavail;
1199 else
1200 oobsize = mtd->oobsize;
1201
1202 oobcolumn = from & (mtd->oobsize - 1);
1203
1204 /* Do not allow reads past end of device */
1205 if ((from + len) > mtd->size) {
1206 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1207 __func__);
1208 ops->retlen = 0;
1209 ops->oobretlen = 0;
1210 return -EINVAL;
1211 }
1212
1213 stats = mtd->ecc_stats;
1214
1215 /* Read-while-load method */
1216
1217 /* Do first load to bufferRAM */
1218 if (read < len) {
1219 if (!onenand_check_bufferram(mtd, from)) {
1220 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1221 ret = this->wait(mtd, FL_READING);
1222 onenand_update_bufferram(mtd, from, !ret);
1223 if (ret == -EBADMSG)
1224 ret = 0;
1225 }
1226 }
1227
1228 thislen = min_t(int, writesize, len - read);
1229 column = from & (writesize - 1);
1230 if (column + thislen > writesize)
1231 thislen = writesize - column;
1232
1233 while (!ret) {
1234 /* If there is more to load then start next load */
1235 from += thislen;
1236 if (read + thislen < len) {
1237 this->command(mtd, ONENAND_CMD_READ, from, writesize);
1238 /*
1239 * Chip boundary handling in DDP
1240 * Now we issued chip 1 read and pointed chip 1
1241 * bufferram so we have to point chip 0 bufferram.
1242 */
1243 if (ONENAND_IS_DDP(this) &&
1244 unlikely(from == (this->chipsize >> 1))) {
1245 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
1246 boundary = 1;
1247 } else
1248 boundary = 0;
1249 ONENAND_SET_PREV_BUFFERRAM(this);
1250 }
1251 /* While load is going, read from last bufferRAM */
1252 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
1253
1254 /* Read oob area if needed */
1255 if (oobbuf) {
1256 thisooblen = oobsize - oobcolumn;
1257 thisooblen = min_t(int, thisooblen, ooblen - oobread);
1258
1259 if (ops->mode == MTD_OOB_AUTO)
1260 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
1261 else
1262 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
1263 oobread += thisooblen;
1264 oobbuf += thisooblen;
1265 oobcolumn = 0;
1266 }
1267
1268 /* See if we are done */
1269 read += thislen;
1270 if (read == len)
1271 break;
1272 /* Set up for next read from bufferRAM */
1273 if (unlikely(boundary))
1274 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
1275 ONENAND_SET_NEXT_BUFFERRAM(this);
1276 buf += thislen;
1277 thislen = min_t(int, writesize, len - read);
1278 column = 0;
1279 cond_resched();
1280 /* Now wait for load */
1281 ret = this->wait(mtd, FL_READING);
1282 onenand_update_bufferram(mtd, from, !ret);
1283 if (ret == -EBADMSG)
1284 ret = 0;
1285 }
1286
1287 /*
1288 * Return success, if no ECC failures, else -EBADMSG
1289 * fs driver will take care of that, because
1290 * retlen == desired len and result == -EBADMSG
1291 */
1292 ops->retlen = read;
1293 ops->oobretlen = oobread;
1294
1295 if (ret)
1296 return ret;
1297
1298 if (mtd->ecc_stats.failed - stats.failed)
1299 return -EBADMSG;
1300
1301 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
1302 }
1303
1304 /**
1305 * onenand_read_oob_nolock - [MTD Interface] OneNAND read out-of-band
1306 * @param mtd MTD device structure
1307 * @param from offset to read from
1308 * @param ops: oob operation description structure
1309 *
1310 * OneNAND read out-of-band data from the spare area
1311 */
1312 static int onenand_read_oob_nolock(struct mtd_info *mtd, loff_t from,
1313 struct mtd_oob_ops *ops)
1314 {
1315 struct onenand_chip *this = mtd->priv;
1316 struct mtd_ecc_stats stats;
1317 int read = 0, thislen, column, oobsize;
1318 size_t len = ops->ooblen;
1319 mtd_oob_mode_t mode = ops->mode;
1320 u_char *buf = ops->oobbuf;
1321 int ret = 0, readcmd;
1322
1323 from += ops->ooboffs;
1324
1325 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %i\n",
1326 __func__, (unsigned int) from, (int) len);
1327
1328 /* Initialize return length value */
1329 ops->oobretlen = 0;
1330
1331 if (mode == MTD_OOB_AUTO)
1332 oobsize = this->ecclayout->oobavail;
1333 else
1334 oobsize = mtd->oobsize;
1335
1336 column = from & (mtd->oobsize - 1);
1337
1338 if (unlikely(column >= oobsize)) {
1339 printk(KERN_ERR "%s: Attempted to start read outside oob\n",
1340 __func__);
1341 return -EINVAL;
1342 }
1343
1344 /* Do not allow reads past end of device */
1345 if (unlikely(from >= mtd->size ||
1346 column + len > ((mtd->size >> this->page_shift) -
1347 (from >> this->page_shift)) * oobsize)) {
1348 printk(KERN_ERR "%s: Attempted to read beyond end of device\n",
1349 __func__);
1350 return -EINVAL;
1351 }
1352
1353 stats = mtd->ecc_stats;
1354
1355 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1356
1357 while (read < len) {
1358 cond_resched();
1359
1360 thislen = oobsize - column;
1361 thislen = min_t(int, thislen, len);
1362
1363 this->command(mtd, readcmd, from, mtd->oobsize);
1364
1365 onenand_update_bufferram(mtd, from, 0);
1366
1367 ret = this->wait(mtd, FL_READING);
1368 if (unlikely(ret))
1369 ret = onenand_recover_lsb(mtd, from, ret);
1370
1371 if (ret && ret != -EBADMSG) {
1372 printk(KERN_ERR "%s: read failed = 0x%x\n",
1373 __func__, ret);
1374 break;
1375 }
1376
1377 if (mode == MTD_OOB_AUTO)
1378 onenand_transfer_auto_oob(mtd, buf, column, thislen);
1379 else
1380 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1381
1382 read += thislen;
1383
1384 if (read == len)
1385 break;
1386
1387 buf += thislen;
1388
1389 /* Read more? */
1390 if (read < len) {
1391 /* Page size */
1392 from += mtd->writesize;
1393 column = 0;
1394 }
1395 }
1396
1397 ops->oobretlen = read;
1398
1399 if (ret)
1400 return ret;
1401
1402 if (mtd->ecc_stats.failed - stats.failed)
1403 return -EBADMSG;
1404
1405 return 0;
1406 }
1407
1408 /**
1409 * onenand_read - [MTD Interface] Read data from flash
1410 * @param mtd MTD device structure
1411 * @param from offset to read from
1412 * @param len number of bytes to read
1413 * @param retlen pointer to variable to store the number of read bytes
1414 * @param buf the databuffer to put data
1415 *
1416 * Read with ecc
1417 */
1418 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1419 size_t *retlen, u_char *buf)
1420 {
1421 struct onenand_chip *this = mtd->priv;
1422 struct mtd_oob_ops ops = {
1423 .len = len,
1424 .ooblen = 0,
1425 .datbuf = buf,
1426 .oobbuf = NULL,
1427 };
1428 int ret;
1429
1430 onenand_get_device(mtd, FL_READING);
1431 ret = ONENAND_IS_4KB_PAGE(this) ?
1432 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
1433 onenand_read_ops_nolock(mtd, from, &ops);
1434 onenand_release_device(mtd);
1435
1436 *retlen = ops.retlen;
1437 return ret;
1438 }
1439
1440 /**
1441 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
1442 * @param mtd: MTD device structure
1443 * @param from: offset to read from
1444 * @param ops: oob operation description structure
1445
1446 * Read main and/or out-of-band
1447 */
1448 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1449 struct mtd_oob_ops *ops)
1450 {
1451 struct onenand_chip *this = mtd->priv;
1452 int ret;
1453
1454 switch (ops->mode) {
1455 case MTD_OOB_PLACE:
1456 case MTD_OOB_AUTO:
1457 break;
1458 case MTD_OOB_RAW:
1459 /* Not implemented yet */
1460 default:
1461 return -EINVAL;
1462 }
1463
1464 onenand_get_device(mtd, FL_READING);
1465 if (ops->datbuf)
1466 ret = ONENAND_IS_4KB_PAGE(this) ?
1467 onenand_mlc_read_ops_nolock(mtd, from, ops) :
1468 onenand_read_ops_nolock(mtd, from, ops);
1469 else
1470 ret = onenand_read_oob_nolock(mtd, from, ops);
1471 onenand_release_device(mtd);
1472
1473 return ret;
1474 }
1475
1476 /**
1477 * onenand_bbt_wait - [DEFAULT] wait until the command is done
1478 * @param mtd MTD device structure
1479 * @param state state to select the max. timeout value
1480 *
1481 * Wait for command done.
1482 */
1483 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1484 {
1485 struct onenand_chip *this = mtd->priv;
1486 unsigned long timeout;
1487 unsigned int interrupt;
1488 unsigned int ctrl;
1489
1490 /* The 20 msec is enough */
1491 timeout = jiffies + msecs_to_jiffies(20);
1492 while (time_before(jiffies, timeout)) {
1493 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1494 if (interrupt & ONENAND_INT_MASTER)
1495 break;
1496 }
1497 /* To get correct interrupt status in timeout case */
1498 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1499 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1500
1501 if (interrupt & ONENAND_INT_READ) {
1502 int ecc = onenand_read_ecc(this);
1503 if (ecc & ONENAND_ECC_2BIT_ALL) {
1504 printk(KERN_WARNING "%s: ecc error = 0x%04x, "
1505 "controller error 0x%04x\n",
1506 __func__, ecc, ctrl);
1507 return ONENAND_BBT_READ_ECC_ERROR;
1508 }
1509 } else {
1510 printk(KERN_ERR "%s: read timeout! ctrl=0x%04x intr=0x%04x\n",
1511 __func__, ctrl, interrupt);
1512 return ONENAND_BBT_READ_FATAL_ERROR;
1513 }
1514
1515 /* Initial bad block case: 0x2400 or 0x0400 */
1516 if (ctrl & ONENAND_CTRL_ERROR) {
1517 printk(KERN_DEBUG "%s: controller error = 0x%04x\n",
1518 __func__, ctrl);
1519 return ONENAND_BBT_READ_ERROR;
1520 }
1521
1522 return 0;
1523 }
1524
1525 /**
1526 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1527 * @param mtd MTD device structure
1528 * @param from offset to read from
1529 * @param ops oob operation description structure
1530 *
1531 * OneNAND read out-of-band data from the spare area for bbt scan
1532 */
1533 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1534 struct mtd_oob_ops *ops)
1535 {
1536 struct onenand_chip *this = mtd->priv;
1537 int read = 0, thislen, column;
1538 int ret = 0, readcmd;
1539 size_t len = ops->ooblen;
1540 u_char *buf = ops->oobbuf;
1541
1542 DEBUG(MTD_DEBUG_LEVEL3, "%s: from = 0x%08x, len = %zi\n",
1543 __func__, (unsigned int) from, len);
1544
1545 /* Initialize return value */
1546 ops->oobretlen = 0;
1547
1548 /* Do not allow reads past end of device */
1549 if (unlikely((from + len) > mtd->size)) {
1550 printk(KERN_ERR "%s: Attempt read beyond end of device\n",
1551 __func__);
1552 return ONENAND_BBT_READ_FATAL_ERROR;
1553 }
1554
1555 /* Grab the lock and see if the device is available */
1556 onenand_get_device(mtd, FL_READING);
1557
1558 column = from & (mtd->oobsize - 1);
1559
1560 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1561
1562 while (read < len) {
1563 cond_resched();
1564
1565 thislen = mtd->oobsize - column;
1566 thislen = min_t(int, thislen, len);
1567
1568 this->command(mtd, readcmd, from, mtd->oobsize);
1569
1570 onenand_update_bufferram(mtd, from, 0);
1571
1572 ret = this->bbt_wait(mtd, FL_READING);
1573 if (unlikely(ret))
1574 ret = onenand_recover_lsb(mtd, from, ret);
1575
1576 if (ret)
1577 break;
1578
1579 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1580 read += thislen;
1581 if (read == len)
1582 break;
1583
1584 buf += thislen;
1585
1586 /* Read more? */
1587 if (read < len) {
1588 /* Update Page size */
1589 from += this->writesize;
1590 column = 0;
1591 }
1592 }
1593
1594 /* Deselect and wake up anyone waiting on the device */
1595 onenand_release_device(mtd);
1596
1597 ops->oobretlen = read;
1598 return ret;
1599 }
1600
1601 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1602 /**
1603 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1604 * @param mtd MTD device structure
1605 * @param buf the databuffer to verify
1606 * @param to offset to read from
1607 */
1608 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1609 {
1610 struct onenand_chip *this = mtd->priv;
1611 u_char *oob_buf = this->oob_buf;
1612 int status, i, readcmd;
1613
1614 readcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_READ : ONENAND_CMD_READOOB;
1615
1616 this->command(mtd, readcmd, to, mtd->oobsize);
1617 onenand_update_bufferram(mtd, to, 0);
1618 status = this->wait(mtd, FL_READING);
1619 if (status)
1620 return status;
1621
1622 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
1623 for (i = 0; i < mtd->oobsize; i++)
1624 if (buf[i] != 0xFF && buf[i] != oob_buf[i])
1625 return -EBADMSG;
1626
1627 return 0;
1628 }
1629
1630 /**
1631 * onenand_verify - [GENERIC] verify the chip contents after a write
1632 * @param mtd MTD device structure
1633 * @param buf the databuffer to verify
1634 * @param addr offset to read from
1635 * @param len number of bytes to read and compare
1636 */
1637 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1638 {
1639 struct onenand_chip *this = mtd->priv;
1640 int ret = 0;
1641 int thislen, column;
1642
1643 while (len != 0) {
1644 thislen = min_t(int, this->writesize, len);
1645 column = addr & (this->writesize - 1);
1646 if (column + thislen > this->writesize)
1647 thislen = this->writesize - column;
1648
1649 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1650
1651 onenand_update_bufferram(mtd, addr, 0);
1652
1653 ret = this->wait(mtd, FL_READING);
1654 if (ret)
1655 return ret;
1656
1657 onenand_update_bufferram(mtd, addr, 1);
1658
1659 this->read_bufferram(mtd, ONENAND_DATARAM, this->verify_buf, 0, mtd->writesize);
1660
1661 if (memcmp(buf, this->verify_buf, thislen))
1662 return -EBADMSG;
1663
1664 len -= thislen;
1665 buf += thislen;
1666 addr += thislen;
1667 }
1668
1669 return 0;
1670 }
1671 #else
1672 #define onenand_verify(...) (0)
1673 #define onenand_verify_oob(...) (0)
1674 #endif
1675
1676 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
1677
1678 static void onenand_panic_wait(struct mtd_info *mtd)
1679 {
1680 struct onenand_chip *this = mtd->priv;
1681 unsigned int interrupt;
1682 int i;
1683
1684 for (i = 0; i < 2000; i++) {
1685 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1686 if (interrupt & ONENAND_INT_MASTER)
1687 break;
1688 udelay(10);
1689 }
1690 }
1691
1692 /**
1693 * onenand_panic_write - [MTD Interface] write buffer to FLASH in a panic context
1694 * @param mtd MTD device structure
1695 * @param to offset to write to
1696 * @param len number of bytes to write
1697 * @param retlen pointer to variable to store the number of written bytes
1698 * @param buf the data to write
1699 *
1700 * Write with ECC
1701 */
1702 static int onenand_panic_write(struct mtd_info *mtd, loff_t to, size_t len,
1703 size_t *retlen, const u_char *buf)
1704 {
1705 struct onenand_chip *this = mtd->priv;
1706 int column, subpage;
1707 int written = 0;
1708 int ret = 0;
1709
1710 if (this->state == FL_PM_SUSPENDED)
1711 return -EBUSY;
1712
1713 /* Wait for any existing operation to clear */
1714 onenand_panic_wait(mtd);
1715
1716 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
1717 __func__, (unsigned int) to, (int) len);
1718
1719 /* Initialize retlen, in case of early exit */
1720 *retlen = 0;
1721
1722 /* Do not allow writes past end of device */
1723 if (unlikely((to + len) > mtd->size)) {
1724 printk(KERN_ERR "%s: Attempt write to past end of device\n",
1725 __func__);
1726 return -EINVAL;
1727 }
1728
1729 /* Reject writes, which are not page aligned */
1730 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1731 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1732 __func__);
1733 return -EINVAL;
1734 }
1735
1736 column = to & (mtd->writesize - 1);
1737
1738 /* Loop until all data write */
1739 while (written < len) {
1740 int thislen = min_t(int, mtd->writesize - column, len - written);
1741 u_char *wbuf = (u_char *) buf;
1742
1743 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1744
1745 /* Partial page write */
1746 subpage = thislen < mtd->writesize;
1747 if (subpage) {
1748 memset(this->page_buf, 0xff, mtd->writesize);
1749 memcpy(this->page_buf + column, buf, thislen);
1750 wbuf = this->page_buf;
1751 }
1752
1753 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1754 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1755
1756 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1757
1758 onenand_panic_wait(mtd);
1759
1760 /* In partial page write we don't update bufferram */
1761 onenand_update_bufferram(mtd, to, !ret && !subpage);
1762 if (ONENAND_IS_2PLANE(this)) {
1763 ONENAND_SET_BUFFERRAM1(this);
1764 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1765 }
1766
1767 if (ret) {
1768 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
1769 break;
1770 }
1771
1772 written += thislen;
1773
1774 if (written == len)
1775 break;
1776
1777 column = 0;
1778 to += thislen;
1779 buf += thislen;
1780 }
1781
1782 *retlen = written;
1783 return ret;
1784 }
1785
1786 /**
1787 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1788 * @param mtd MTD device structure
1789 * @param oob_buf oob buffer
1790 * @param buf source address
1791 * @param column oob offset to write to
1792 * @param thislen oob length to write
1793 */
1794 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1795 const u_char *buf, int column, int thislen)
1796 {
1797 struct onenand_chip *this = mtd->priv;
1798 struct nand_oobfree *free;
1799 int writecol = column;
1800 int writeend = column + thislen;
1801 int lastgap = 0;
1802 unsigned int i;
1803
1804 free = this->ecclayout->oobfree;
1805 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1806 if (writecol >= lastgap)
1807 writecol += free->offset - lastgap;
1808 if (writeend >= lastgap)
1809 writeend += free->offset - lastgap;
1810 lastgap = free->offset + free->length;
1811 }
1812 free = this->ecclayout->oobfree;
1813 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1814 int free_end = free->offset + free->length;
1815 if (free->offset < writeend && free_end > writecol) {
1816 int st = max_t(int,free->offset,writecol);
1817 int ed = min_t(int,free_end,writeend);
1818 int n = ed - st;
1819 memcpy(oob_buf + st, buf, n);
1820 buf += n;
1821 } else if (column == 0)
1822 break;
1823 }
1824 return 0;
1825 }
1826
1827 /**
1828 * onenand_write_ops_nolock - [OneNAND Interface] write main and/or out-of-band
1829 * @param mtd MTD device structure
1830 * @param to offset to write to
1831 * @param ops oob operation description structure
1832 *
1833 * Write main and/or oob with ECC
1834 */
1835 static int onenand_write_ops_nolock(struct mtd_info *mtd, loff_t to,
1836 struct mtd_oob_ops *ops)
1837 {
1838 struct onenand_chip *this = mtd->priv;
1839 int written = 0, column, thislen = 0, subpage = 0;
1840 int prev = 0, prevlen = 0, prev_subpage = 0, first = 1;
1841 int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1842 size_t len = ops->len;
1843 size_t ooblen = ops->ooblen;
1844 const u_char *buf = ops->datbuf;
1845 const u_char *oob = ops->oobbuf;
1846 u_char *oobbuf;
1847 int ret = 0, cmd;
1848
1849 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
1850 __func__, (unsigned int) to, (int) len);
1851
1852 /* Initialize retlen, in case of early exit */
1853 ops->retlen = 0;
1854 ops->oobretlen = 0;
1855
1856 /* Do not allow writes past end of device */
1857 if (unlikely((to + len) > mtd->size)) {
1858 printk(KERN_ERR "%s: Attempt write to past end of device\n",
1859 __func__);
1860 return -EINVAL;
1861 }
1862
1863 /* Reject writes, which are not page aligned */
1864 if (unlikely(NOTALIGNED(to) || NOTALIGNED(len))) {
1865 printk(KERN_ERR "%s: Attempt to write not page aligned data\n",
1866 __func__);
1867 return -EINVAL;
1868 }
1869
1870 /* Check zero length */
1871 if (!len)
1872 return 0;
1873
1874 if (ops->mode == MTD_OOB_AUTO)
1875 oobsize = this->ecclayout->oobavail;
1876 else
1877 oobsize = mtd->oobsize;
1878
1879 oobcolumn = to & (mtd->oobsize - 1);
1880
1881 column = to & (mtd->writesize - 1);
1882
1883 /* Loop until all data write */
1884 while (1) {
1885 if (written < len) {
1886 u_char *wbuf = (u_char *) buf;
1887
1888 thislen = min_t(int, mtd->writesize - column, len - written);
1889 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1890
1891 cond_resched();
1892
1893 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1894
1895 /* Partial page write */
1896 subpage = thislen < mtd->writesize;
1897 if (subpage) {
1898 memset(this->page_buf, 0xff, mtd->writesize);
1899 memcpy(this->page_buf + column, buf, thislen);
1900 wbuf = this->page_buf;
1901 }
1902
1903 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1904
1905 if (oob) {
1906 oobbuf = this->oob_buf;
1907
1908 /* We send data to spare ram with oobsize
1909 * to prevent byte access */
1910 memset(oobbuf, 0xff, mtd->oobsize);
1911 if (ops->mode == MTD_OOB_AUTO)
1912 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1913 else
1914 memcpy(oobbuf + oobcolumn, oob, thisooblen);
1915
1916 oobwritten += thisooblen;
1917 oob += thisooblen;
1918 oobcolumn = 0;
1919 } else
1920 oobbuf = (u_char *) ffchars;
1921
1922 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1923 } else
1924 ONENAND_SET_NEXT_BUFFERRAM(this);
1925
1926 /*
1927 * 2 PLANE, MLC, and Flex-OneNAND do not support
1928 * write-while-program feature.
1929 */
1930 if (!ONENAND_IS_2PLANE(this) && !ONENAND_IS_4KB_PAGE(this) && !first) {
1931 ONENAND_SET_PREV_BUFFERRAM(this);
1932
1933 ret = this->wait(mtd, FL_WRITING);
1934
1935 /* In partial page write we don't update bufferram */
1936 onenand_update_bufferram(mtd, prev, !ret && !prev_subpage);
1937 if (ret) {
1938 written -= prevlen;
1939 printk(KERN_ERR "%s: write failed %d\n",
1940 __func__, ret);
1941 break;
1942 }
1943
1944 if (written == len) {
1945 /* Only check verify write turn on */
1946 ret = onenand_verify(mtd, buf - len, to - len, len);
1947 if (ret)
1948 printk(KERN_ERR "%s: verify failed %d\n",
1949 __func__, ret);
1950 break;
1951 }
1952
1953 ONENAND_SET_NEXT_BUFFERRAM(this);
1954 }
1955
1956 this->ongoing = 0;
1957 cmd = ONENAND_CMD_PROG;
1958
1959 /* Exclude 1st OTP and OTP blocks for cache program feature */
1960 if (ONENAND_IS_CACHE_PROGRAM(this) &&
1961 likely(onenand_block(this, to) != 0) &&
1962 ONENAND_IS_4KB_PAGE(this) &&
1963 ((written + thislen) < len)) {
1964 cmd = ONENAND_CMD_2X_CACHE_PROG;
1965 this->ongoing = 1;
1966 }
1967
1968 this->command(mtd, cmd, to, mtd->writesize);
1969
1970 /*
1971 * 2 PLANE, MLC, and Flex-OneNAND wait here
1972 */
1973 if (ONENAND_IS_2PLANE(this) || ONENAND_IS_4KB_PAGE(this)) {
1974 ret = this->wait(mtd, FL_WRITING);
1975
1976 /* In partial page write we don't update bufferram */
1977 onenand_update_bufferram(mtd, to, !ret && !subpage);
1978 if (ret) {
1979 printk(KERN_ERR "%s: write failed %d\n",
1980 __func__, ret);
1981 break;
1982 }
1983
1984 /* Only check verify write turn on */
1985 ret = onenand_verify(mtd, buf, to, thislen);
1986 if (ret) {
1987 printk(KERN_ERR "%s: verify failed %d\n",
1988 __func__, ret);
1989 break;
1990 }
1991
1992 written += thislen;
1993
1994 if (written == len)
1995 break;
1996
1997 } else
1998 written += thislen;
1999
2000 column = 0;
2001 prev_subpage = subpage;
2002 prev = to;
2003 prevlen = thislen;
2004 to += thislen;
2005 buf += thislen;
2006 first = 0;
2007 }
2008
2009 /* In error case, clear all bufferrams */
2010 if (written != len)
2011 onenand_invalidate_bufferram(mtd, 0, -1);
2012
2013 ops->retlen = written;
2014 ops->oobretlen = oobwritten;
2015
2016 return ret;
2017 }
2018
2019
2020 /**
2021 * onenand_write_oob_nolock - [Internal] OneNAND write out-of-band
2022 * @param mtd MTD device structure
2023 * @param to offset to write to
2024 * @param len number of bytes to write
2025 * @param retlen pointer to variable to store the number of written bytes
2026 * @param buf the data to write
2027 * @param mode operation mode
2028 *
2029 * OneNAND write out-of-band
2030 */
2031 static int onenand_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2032 struct mtd_oob_ops *ops)
2033 {
2034 struct onenand_chip *this = mtd->priv;
2035 int column, ret = 0, oobsize;
2036 int written = 0, oobcmd;
2037 u_char *oobbuf;
2038 size_t len = ops->ooblen;
2039 const u_char *buf = ops->oobbuf;
2040 mtd_oob_mode_t mode = ops->mode;
2041
2042 to += ops->ooboffs;
2043
2044 DEBUG(MTD_DEBUG_LEVEL3, "%s: to = 0x%08x, len = %i\n",
2045 __func__, (unsigned int) to, (int) len);
2046
2047 /* Initialize retlen, in case of early exit */
2048 ops->oobretlen = 0;
2049
2050 if (mode == MTD_OOB_AUTO)
2051 oobsize = this->ecclayout->oobavail;
2052 else
2053 oobsize = mtd->oobsize;
2054
2055 column = to & (mtd->oobsize - 1);
2056
2057 if (unlikely(column >= oobsize)) {
2058 printk(KERN_ERR "%s: Attempted to start write outside oob\n",
2059 __func__);
2060 return -EINVAL;
2061 }
2062
2063 /* For compatibility with NAND: Do not allow write past end of page */
2064 if (unlikely(column + len > oobsize)) {
2065 printk(KERN_ERR "%s: Attempt to write past end of page\n",
2066 __func__);
2067 return -EINVAL;
2068 }
2069
2070 /* Do not allow reads past end of device */
2071 if (unlikely(to >= mtd->size ||
2072 column + len > ((mtd->size >> this->page_shift) -
2073 (to >> this->page_shift)) * oobsize)) {
2074 printk(KERN_ERR "%s: Attempted to write past end of device\n",
2075 __func__);
2076 return -EINVAL;
2077 }
2078
2079 oobbuf = this->oob_buf;
2080
2081 oobcmd = ONENAND_IS_4KB_PAGE(this) ? ONENAND_CMD_PROG : ONENAND_CMD_PROGOOB;
2082
2083 /* Loop until all data write */
2084 while (written < len) {
2085 int thislen = min_t(int, oobsize, len - written);
2086
2087 cond_resched();
2088
2089 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
2090
2091 /* We send data to spare ram with oobsize
2092 * to prevent byte access */
2093 memset(oobbuf, 0xff, mtd->oobsize);
2094 if (mode == MTD_OOB_AUTO)
2095 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
2096 else
2097 memcpy(oobbuf + column, buf, thislen);
2098 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
2099
2100 if (ONENAND_IS_4KB_PAGE(this)) {
2101 /* Set main area of DataRAM to 0xff*/
2102 memset(this->page_buf, 0xff, mtd->writesize);
2103 this->write_bufferram(mtd, ONENAND_DATARAM,
2104 this->page_buf, 0, mtd->writesize);
2105 }
2106
2107 this->command(mtd, oobcmd, to, mtd->oobsize);
2108
2109 onenand_update_bufferram(mtd, to, 0);
2110 if (ONENAND_IS_2PLANE(this)) {
2111 ONENAND_SET_BUFFERRAM1(this);
2112 onenand_update_bufferram(mtd, to + this->writesize, 0);
2113 }
2114
2115 ret = this->wait(mtd, FL_WRITING);
2116 if (ret) {
2117 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
2118 break;
2119 }
2120
2121 ret = onenand_verify_oob(mtd, oobbuf, to);
2122 if (ret) {
2123 printk(KERN_ERR "%s: verify failed %d\n",
2124 __func__, ret);
2125 break;
2126 }
2127
2128 written += thislen;
2129 if (written == len)
2130 break;
2131
2132 to += mtd->writesize;
2133 buf += thislen;
2134 column = 0;
2135 }
2136
2137 ops->oobretlen = written;
2138
2139 return ret;
2140 }
2141
2142 /**
2143 * onenand_write - [MTD Interface] write buffer to FLASH
2144 * @param mtd MTD device structure
2145 * @param to offset to write to
2146 * @param len number of bytes to write
2147 * @param retlen pointer to variable to store the number of written bytes
2148 * @param buf the data to write
2149 *
2150 * Write with ECC
2151 */
2152 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
2153 size_t *retlen, const u_char *buf)
2154 {
2155 struct mtd_oob_ops ops = {
2156 .len = len,
2157 .ooblen = 0,
2158 .datbuf = (u_char *) buf,
2159 .oobbuf = NULL,
2160 };
2161 int ret;
2162
2163 onenand_get_device(mtd, FL_WRITING);
2164 ret = onenand_write_ops_nolock(mtd, to, &ops);
2165 onenand_release_device(mtd);
2166
2167 *retlen = ops.retlen;
2168 return ret;
2169 }
2170
2171 /**
2172 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
2173 * @param mtd: MTD device structure
2174 * @param to: offset to write
2175 * @param ops: oob operation description structure
2176 */
2177 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
2178 struct mtd_oob_ops *ops)
2179 {
2180 int ret;
2181
2182 switch (ops->mode) {
2183 case MTD_OOB_PLACE:
2184 case MTD_OOB_AUTO:
2185 break;
2186 case MTD_OOB_RAW:
2187 /* Not implemented yet */
2188 default:
2189 return -EINVAL;
2190 }
2191
2192 onenand_get_device(mtd, FL_WRITING);
2193 if (ops->datbuf)
2194 ret = onenand_write_ops_nolock(mtd, to, ops);
2195 else
2196 ret = onenand_write_oob_nolock(mtd, to, ops);
2197 onenand_release_device(mtd);
2198
2199 return ret;
2200 }
2201
2202 /**
2203 * onenand_block_isbad_nolock - [GENERIC] Check if a block is marked bad
2204 * @param mtd MTD device structure
2205 * @param ofs offset from device start
2206 * @param allowbbt 1, if its allowed to access the bbt area
2207 *
2208 * Check, if the block is bad. Either by reading the bad block table or
2209 * calling of the scan function.
2210 */
2211 static int onenand_block_isbad_nolock(struct mtd_info *mtd, loff_t ofs, int allowbbt)
2212 {
2213 struct onenand_chip *this = mtd->priv;
2214 struct bbm_info *bbm = this->bbm;
2215
2216 /* Return info from the table */
2217 return bbm->isbad_bbt(mtd, ofs, allowbbt);
2218 }
2219
2220
2221 static int onenand_multiblock_erase_verify(struct mtd_info *mtd,
2222 struct erase_info *instr)
2223 {
2224 struct onenand_chip *this = mtd->priv;
2225 loff_t addr = instr->addr;
2226 int len = instr->len;
2227 unsigned int block_size = (1 << this->erase_shift);
2228 int ret = 0;
2229
2230 while (len) {
2231 this->command(mtd, ONENAND_CMD_ERASE_VERIFY, addr, block_size);
2232 ret = this->wait(mtd, FL_VERIFYING_ERASE);
2233 if (ret) {
2234 printk(KERN_ERR "%s: Failed verify, block %d\n",
2235 __func__, onenand_block(this, addr));
2236 instr->state = MTD_ERASE_FAILED;
2237 instr->fail_addr = addr;
2238 return -1;
2239 }
2240 len -= block_size;
2241 addr += block_size;
2242 }
2243 return 0;
2244 }
2245
2246 /**
2247 * onenand_multiblock_erase - [Internal] erase block(s) using multiblock erase
2248 * @param mtd MTD device structure
2249 * @param instr erase instruction
2250 * @param region erase region
2251 *
2252 * Erase one or more blocks up to 64 block at a time
2253 */
2254 static int onenand_multiblock_erase(struct mtd_info *mtd,
2255 struct erase_info *instr,
2256 unsigned int block_size)
2257 {
2258 struct onenand_chip *this = mtd->priv;
2259 loff_t addr = instr->addr;
2260 int len = instr->len;
2261 int eb_count = 0;
2262 int ret = 0;
2263 int bdry_block = 0;
2264
2265 instr->state = MTD_ERASING;
2266
2267 if (ONENAND_IS_DDP(this)) {
2268 loff_t bdry_addr = this->chipsize >> 1;
2269 if (addr < bdry_addr && (addr + len) > bdry_addr)
2270 bdry_block = bdry_addr >> this->erase_shift;
2271 }
2272
2273 /* Pre-check bbs */
2274 while (len) {
2275 /* Check if we have a bad block, we do not erase bad blocks */
2276 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
2277 printk(KERN_WARNING "%s: attempt to erase a bad block "
2278 "at addr 0x%012llx\n",
2279 __func__, (unsigned long long) addr);
2280 instr->state = MTD_ERASE_FAILED;
2281 return -EIO;
2282 }
2283 len -= block_size;
2284 addr += block_size;
2285 }
2286
2287 len = instr->len;
2288 addr = instr->addr;
2289
2290 /* loop over 64 eb batches */
2291 while (len) {
2292 struct erase_info verify_instr = *instr;
2293 int max_eb_count = MB_ERASE_MAX_BLK_COUNT;
2294
2295 verify_instr.addr = addr;
2296 verify_instr.len = 0;
2297
2298 /* do not cross chip boundary */
2299 if (bdry_block) {
2300 int this_block = (addr >> this->erase_shift);
2301
2302 if (this_block < bdry_block) {
2303 max_eb_count = min(max_eb_count,
2304 (bdry_block - this_block));
2305 }
2306 }
2307
2308 eb_count = 0;
2309
2310 while (len > block_size && eb_count < (max_eb_count - 1)) {
2311 this->command(mtd, ONENAND_CMD_MULTIBLOCK_ERASE,
2312 addr, block_size);
2313 onenand_invalidate_bufferram(mtd, addr, block_size);
2314
2315 ret = this->wait(mtd, FL_PREPARING_ERASE);
2316 if (ret) {
2317 printk(KERN_ERR "%s: Failed multiblock erase, "
2318 "block %d\n", __func__,
2319 onenand_block(this, addr));
2320 instr->state = MTD_ERASE_FAILED;
2321 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2322 return -EIO;
2323 }
2324
2325 len -= block_size;
2326 addr += block_size;
2327 eb_count++;
2328 }
2329
2330 /* last block of 64-eb series */
2331 cond_resched();
2332 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2333 onenand_invalidate_bufferram(mtd, addr, block_size);
2334
2335 ret = this->wait(mtd, FL_ERASING);
2336 /* Check if it is write protected */
2337 if (ret) {
2338 printk(KERN_ERR "%s: Failed erase, block %d\n",
2339 __func__, onenand_block(this, addr));
2340 instr->state = MTD_ERASE_FAILED;
2341 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2342 return -EIO;
2343 }
2344
2345 len -= block_size;
2346 addr += block_size;
2347 eb_count++;
2348
2349 /* verify */
2350 verify_instr.len = eb_count * block_size;
2351 if (onenand_multiblock_erase_verify(mtd, &verify_instr)) {
2352 instr->state = verify_instr.state;
2353 instr->fail_addr = verify_instr.fail_addr;
2354 return -EIO;
2355 }
2356
2357 }
2358 return 0;
2359 }
2360
2361
2362 /**
2363 * onenand_block_by_block_erase - [Internal] erase block(s) using regular erase
2364 * @param mtd MTD device structure
2365 * @param instr erase instruction
2366 * @param region erase region
2367 * @param block_size erase block size
2368 *
2369 * Erase one or more blocks one block at a time
2370 */
2371 static int onenand_block_by_block_erase(struct mtd_info *mtd,
2372 struct erase_info *instr,
2373 struct mtd_erase_region_info *region,
2374 unsigned int block_size)
2375 {
2376 struct onenand_chip *this = mtd->priv;
2377 loff_t addr = instr->addr;
2378 int len = instr->len;
2379 loff_t region_end = 0;
2380 int ret = 0;
2381
2382 if (region) {
2383 /* region is set for Flex-OneNAND */
2384 region_end = region->offset + region->erasesize * region->numblocks;
2385 }
2386
2387 instr->state = MTD_ERASING;
2388
2389 /* Loop through the blocks */
2390 while (len) {
2391 cond_resched();
2392
2393 /* Check if we have a bad block, we do not erase bad blocks */
2394 if (onenand_block_isbad_nolock(mtd, addr, 0)) {
2395 printk(KERN_WARNING "%s: attempt to erase a bad block "
2396 "at addr 0x%012llx\n",
2397 __func__, (unsigned long long) addr);
2398 instr->state = MTD_ERASE_FAILED;
2399 return -EIO;
2400 }
2401
2402 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
2403
2404 onenand_invalidate_bufferram(mtd, addr, block_size);
2405
2406 ret = this->wait(mtd, FL_ERASING);
2407 /* Check, if it is write protected */
2408 if (ret) {
2409 printk(KERN_ERR "%s: Failed erase, block %d\n",
2410 __func__, onenand_block(this, addr));
2411 instr->state = MTD_ERASE_FAILED;
2412 instr->fail_addr = addr;
2413 return -EIO;
2414 }
2415
2416 len -= block_size;
2417 addr += block_size;
2418
2419 if (addr == region_end) {
2420 if (!len)
2421 break;
2422 region++;
2423
2424 block_size = region->erasesize;
2425 region_end = region->offset + region->erasesize * region->numblocks;
2426
2427 if (len & (block_size - 1)) {
2428 /* FIXME: This should be handled at MTD partitioning level. */
2429 printk(KERN_ERR "%s: Unaligned address\n",
2430 __func__);
2431 return -EIO;
2432 }
2433 }
2434 }
2435 return 0;
2436 }
2437
2438 /**
2439 * onenand_erase - [MTD Interface] erase block(s)
2440 * @param mtd MTD device structure
2441 * @param instr erase instruction
2442 *
2443 * Erase one or more blocks
2444 */
2445 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
2446 {
2447 struct onenand_chip *this = mtd->priv;
2448 unsigned int block_size;
2449 loff_t addr = instr->addr;
2450 loff_t len = instr->len;
2451 int ret = 0;
2452 struct mtd_erase_region_info *region = NULL;
2453 loff_t region_offset = 0;
2454
2455 DEBUG(MTD_DEBUG_LEVEL3, "%s: start=0x%012llx, len=%llu\n", __func__,
2456 (unsigned long long) instr->addr, (unsigned long long) instr->len);
2457
2458 /* Do not allow erase past end of device */
2459 if (unlikely((len + addr) > mtd->size)) {
2460 printk(KERN_ERR "%s: Erase past end of device\n", __func__);
2461 return -EINVAL;
2462 }
2463
2464 if (FLEXONENAND(this)) {
2465 /* Find the eraseregion of this address */
2466 int i = flexonenand_region(mtd, addr);
2467
2468 region = &mtd->eraseregions[i];
2469 block_size = region->erasesize;
2470
2471 /* Start address within region must align on block boundary.
2472 * Erase region's start offset is always block start address.
2473 */
2474 region_offset = region->offset;
2475 } else
2476 block_size = 1 << this->erase_shift;
2477
2478 /* Start address must align on block boundary */
2479 if (unlikely((addr - region_offset) & (block_size - 1))) {
2480 printk(KERN_ERR "%s: Unaligned address\n", __func__);
2481 return -EINVAL;
2482 }
2483
2484 /* Length must align on block boundary */
2485 if (unlikely(len & (block_size - 1))) {
2486 printk(KERN_ERR "%s: Length not block aligned\n", __func__);
2487 return -EINVAL;
2488 }
2489
2490 instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
2491
2492 /* Grab the lock and see if the device is available */
2493 onenand_get_device(mtd, FL_ERASING);
2494
2495 if (ONENAND_IS_4KB_PAGE(this) || region ||
2496 instr->len < MB_ERASE_MIN_BLK_COUNT * block_size) {
2497 /* region is set for Flex-OneNAND (no mb erase) */
2498 ret = onenand_block_by_block_erase(mtd, instr,
2499 region, block_size);
2500 } else {
2501 ret = onenand_multiblock_erase(mtd, instr, block_size);
2502 }
2503
2504 /* Deselect and wake up anyone waiting on the device */
2505 onenand_release_device(mtd);
2506
2507 /* Do call back function */
2508 if (!ret) {
2509 instr->state = MTD_ERASE_DONE;
2510 mtd_erase_callback(instr);
2511 }
2512
2513 return ret;
2514 }
2515
2516 /**
2517 * onenand_sync - [MTD Interface] sync
2518 * @param mtd MTD device structure
2519 *
2520 * Sync is actually a wait for chip ready function
2521 */
2522 static void onenand_sync(struct mtd_info *mtd)
2523 {
2524 DEBUG(MTD_DEBUG_LEVEL3, "%s: called\n", __func__);
2525
2526 /* Grab the lock and see if the device is available */
2527 onenand_get_device(mtd, FL_SYNCING);
2528
2529 /* Release it and go back */
2530 onenand_release_device(mtd);
2531 }
2532
2533 /**
2534 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
2535 * @param mtd MTD device structure
2536 * @param ofs offset relative to mtd start
2537 *
2538 * Check whether the block is bad
2539 */
2540 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
2541 {
2542 int ret;
2543
2544 /* Check for invalid offset */
2545 if (ofs > mtd->size)
2546 return -EINVAL;
2547
2548 onenand_get_device(mtd, FL_READING);
2549 ret = onenand_block_isbad_nolock(mtd, ofs, 0);
2550 onenand_release_device(mtd);
2551 return ret;
2552 }
2553
2554 /**
2555 * onenand_default_block_markbad - [DEFAULT] mark a block bad
2556 * @param mtd MTD device structure
2557 * @param ofs offset from device start
2558 *
2559 * This is the default implementation, which can be overridden by
2560 * a hardware specific driver.
2561 */
2562 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
2563 {
2564 struct onenand_chip *this = mtd->priv;
2565 struct bbm_info *bbm = this->bbm;
2566 u_char buf[2] = {0, 0};
2567 struct mtd_oob_ops ops = {
2568 .mode = MTD_OOB_PLACE,
2569 .ooblen = 2,
2570 .oobbuf = buf,
2571 .ooboffs = 0,
2572 };
2573 int block;
2574
2575 /* Get block number */
2576 block = onenand_block(this, ofs);
2577 if (bbm->bbt)
2578 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
2579
2580 /* We write two bytes, so we don't have to mess with 16-bit access */
2581 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
2582 /* FIXME : What to do when marking SLC block in partition
2583 * with MLC erasesize? For now, it is not advisable to
2584 * create partitions containing both SLC and MLC regions.
2585 */
2586 return onenand_write_oob_nolock(mtd, ofs, &ops);
2587 }
2588
2589 /**
2590 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
2591 * @param mtd MTD device structure
2592 * @param ofs offset relative to mtd start
2593 *
2594 * Mark the block as bad
2595 */
2596 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
2597 {
2598 struct onenand_chip *this = mtd->priv;
2599 int ret;
2600
2601 ret = onenand_block_isbad(mtd, ofs);
2602 if (ret) {
2603 /* If it was bad already, return success and do nothing */
2604 if (ret > 0)
2605 return 0;
2606 return ret;
2607 }
2608
2609 onenand_get_device(mtd, FL_WRITING);
2610 ret = this->block_markbad(mtd, ofs);
2611 onenand_release_device(mtd);
2612 return ret;
2613 }
2614
2615 /**
2616 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
2617 * @param mtd MTD device structure
2618 * @param ofs offset relative to mtd start
2619 * @param len number of bytes to lock or unlock
2620 * @param cmd lock or unlock command
2621 *
2622 * Lock or unlock one or more blocks
2623 */
2624 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
2625 {
2626 struct onenand_chip *this = mtd->priv;
2627 int start, end, block, value, status;
2628 int wp_status_mask;
2629
2630 start = onenand_block(this, ofs);
2631 end = onenand_block(this, ofs + len) - 1;
2632
2633 if (cmd == ONENAND_CMD_LOCK)
2634 wp_status_mask = ONENAND_WP_LS;
2635 else
2636 wp_status_mask = ONENAND_WP_US;
2637
2638 /* Continuous lock scheme */
2639 if (this->options & ONENAND_HAS_CONT_LOCK) {
2640 /* Set start block address */
2641 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2642 /* Set end block address */
2643 this->write_word(end, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
2644 /* Write lock command */
2645 this->command(mtd, cmd, 0, 0);
2646
2647 /* There's no return value */
2648 this->wait(mtd, FL_LOCKING);
2649
2650 /* Sanity check */
2651 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2652 & ONENAND_CTRL_ONGO)
2653 continue;
2654
2655 /* Check lock status */
2656 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2657 if (!(status & wp_status_mask))
2658 printk(KERN_ERR "%s: wp status = 0x%x\n",
2659 __func__, status);
2660
2661 return 0;
2662 }
2663
2664 /* Block lock scheme */
2665 for (block = start; block < end + 1; block++) {
2666 /* Set block address */
2667 value = onenand_block_address(this, block);
2668 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2669 /* Select DataRAM for DDP */
2670 value = onenand_bufferram_address(this, block);
2671 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2672 /* Set start block address */
2673 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2674 /* Write lock command */
2675 this->command(mtd, cmd, 0, 0);
2676
2677 /* There's no return value */
2678 this->wait(mtd, FL_LOCKING);
2679
2680 /* Sanity check */
2681 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2682 & ONENAND_CTRL_ONGO)
2683 continue;
2684
2685 /* Check lock status */
2686 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2687 if (!(status & wp_status_mask))
2688 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2689 __func__, block, status);
2690 }
2691
2692 return 0;
2693 }
2694
2695 /**
2696 * onenand_lock - [MTD Interface] Lock block(s)
2697 * @param mtd MTD device structure
2698 * @param ofs offset relative to mtd start
2699 * @param len number of bytes to unlock
2700 *
2701 * Lock one or more blocks
2702 */
2703 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2704 {
2705 int ret;
2706
2707 onenand_get_device(mtd, FL_LOCKING);
2708 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
2709 onenand_release_device(mtd);
2710 return ret;
2711 }
2712
2713 /**
2714 * onenand_unlock - [MTD Interface] Unlock block(s)
2715 * @param mtd MTD device structure
2716 * @param ofs offset relative to mtd start
2717 * @param len number of bytes to unlock
2718 *
2719 * Unlock one or more blocks
2720 */
2721 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2722 {
2723 int ret;
2724
2725 onenand_get_device(mtd, FL_LOCKING);
2726 ret = onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2727 onenand_release_device(mtd);
2728 return ret;
2729 }
2730
2731 /**
2732 * onenand_check_lock_status - [OneNAND Interface] Check lock status
2733 * @param this onenand chip data structure
2734 *
2735 * Check lock status
2736 */
2737 static int onenand_check_lock_status(struct onenand_chip *this)
2738 {
2739 unsigned int value, block, status;
2740 unsigned int end;
2741
2742 end = this->chipsize >> this->erase_shift;
2743 for (block = 0; block < end; block++) {
2744 /* Set block address */
2745 value = onenand_block_address(this, block);
2746 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
2747 /* Select DataRAM for DDP */
2748 value = onenand_bufferram_address(this, block);
2749 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
2750 /* Set start block address */
2751 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2752
2753 /* Check lock status */
2754 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
2755 if (!(status & ONENAND_WP_US)) {
2756 printk(KERN_ERR "%s: block = %d, wp status = 0x%x\n",
2757 __func__, block, status);
2758 return 0;
2759 }
2760 }
2761
2762 return 1;
2763 }
2764
2765 /**
2766 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
2767 * @param mtd MTD device structure
2768 *
2769 * Unlock all blocks
2770 */
2771 static void onenand_unlock_all(struct mtd_info *mtd)
2772 {
2773 struct onenand_chip *this = mtd->priv;
2774 loff_t ofs = 0;
2775 loff_t len = mtd->size;
2776
2777 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
2778 /* Set start block address */
2779 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
2780 /* Write unlock command */
2781 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
2782
2783 /* There's no return value */
2784 this->wait(mtd, FL_LOCKING);
2785
2786 /* Sanity check */
2787 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
2788 & ONENAND_CTRL_ONGO)
2789 continue;
2790
2791 /* Don't check lock status */
2792 if (this->options & ONENAND_SKIP_UNLOCK_CHECK)
2793 return;
2794
2795 /* Check lock status */
2796 if (onenand_check_lock_status(this))
2797 return;
2798
2799 /* Workaround for all block unlock in DDP */
2800 if (ONENAND_IS_DDP(this) && !FLEXONENAND(this)) {
2801 /* All blocks on another chip */
2802 ofs = this->chipsize >> 1;
2803 len = this->chipsize >> 1;
2804 }
2805 }
2806
2807 onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
2808 }
2809
2810 #ifdef CONFIG_MTD_ONENAND_OTP
2811
2812 /**
2813 * onenand_otp_command - Send OTP specific command to OneNAND device
2814 * @param mtd MTD device structure
2815 * @param cmd the command to be sent
2816 * @param addr offset to read from or write to
2817 * @param len number of bytes to read or write
2818 */
2819 static int onenand_otp_command(struct mtd_info *mtd, int cmd, loff_t addr,
2820 size_t len)
2821 {
2822 struct onenand_chip *this = mtd->priv;
2823 int value, block, page;
2824
2825 /* Address translation */
2826 switch (cmd) {
2827 case ONENAND_CMD_OTP_ACCESS:
2828 block = (int) (addr >> this->erase_shift);
2829 page = -1;
2830 break;
2831
2832 default:
2833 block = (int) (addr >> this->erase_shift);
2834 page = (int) (addr >> this->page_shift);
2835
2836 if (ONENAND_IS_2PLANE(this)) {
2837 /* Make the even block number */
2838 block &= ~1;
2839 /* Is it the odd plane? */
2840 if (addr & this->writesize)
2841 block++;
2842 page >>= 1;
2843 }
2844 page &= this->page_mask;
2845 break;
2846 }
2847
2848 if (block != -1) {
2849 /* Write 'DFS, FBA' of Flash */
2850 value = onenand_block_address(this, block);
2851 this->write_word(value, this->base +
2852 ONENAND_REG_START_ADDRESS1);
2853 }
2854
2855 if (page != -1) {
2856 /* Now we use page size operation */
2857 int sectors = 4, count = 4;
2858 int dataram;
2859
2860 switch (cmd) {
2861 default:
2862 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
2863 cmd = ONENAND_CMD_2X_PROG;
2864 dataram = ONENAND_CURRENT_BUFFERRAM(this);
2865 break;
2866 }
2867
2868 /* Write 'FPA, FSA' of Flash */
2869 value = onenand_page_address(page, sectors);
2870 this->write_word(value, this->base +
2871 ONENAND_REG_START_ADDRESS8);
2872
2873 /* Write 'BSA, BSC' of DataRAM */
2874 value = onenand_buffer_address(dataram, sectors, count);
2875 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
2876 }
2877
2878 /* Interrupt clear */
2879 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
2880
2881 /* Write command */
2882 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
2883
2884 return 0;
2885 }
2886
2887 /**
2888 * onenand_otp_write_oob_nolock - [Internal] OneNAND write out-of-band, specific to OTP
2889 * @param mtd MTD device structure
2890 * @param to offset to write to
2891 * @param len number of bytes to write
2892 * @param retlen pointer to variable to store the number of written bytes
2893 * @param buf the data to write
2894 *
2895 * OneNAND write out-of-band only for OTP
2896 */
2897 static int onenand_otp_write_oob_nolock(struct mtd_info *mtd, loff_t to,
2898 struct mtd_oob_ops *ops)
2899 {
2900 struct onenand_chip *this = mtd->priv;
2901 int column, ret = 0, oobsize;
2902 int written = 0;
2903 u_char *oobbuf;
2904 size_t len = ops->ooblen;
2905 const u_char *buf = ops->oobbuf;
2906 int block, value, status;
2907
2908 to += ops->ooboffs;
2909
2910 /* Initialize retlen, in case of early exit */
2911 ops->oobretlen = 0;
2912
2913 oobsize = mtd->oobsize;
2914
2915 column = to & (mtd->oobsize - 1);
2916
2917 oobbuf = this->oob_buf;
2918
2919 /* Loop until all data write */
2920 while (written < len) {
2921 int thislen = min_t(int, oobsize, len - written);
2922
2923 cond_resched();
2924
2925 block = (int) (to >> this->erase_shift);
2926 /*
2927 * Write 'DFS, FBA' of Flash
2928 * Add: F100h DQ=DFS, FBA
2929 */
2930
2931 value = onenand_block_address(this, block);
2932 this->write_word(value, this->base +
2933 ONENAND_REG_START_ADDRESS1);
2934
2935 /*
2936 * Select DataRAM for DDP
2937 * Add: F101h DQ=DBS
2938 */
2939
2940 value = onenand_bufferram_address(this, block);
2941 this->write_word(value, this->base +
2942 ONENAND_REG_START_ADDRESS2);
2943 ONENAND_SET_NEXT_BUFFERRAM(this);
2944
2945 /*
2946 * Enter OTP access mode
2947 */
2948 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2949 this->wait(mtd, FL_OTPING);
2950
2951 /* We send data to spare ram with oobsize
2952 * to prevent byte access */
2953 memcpy(oobbuf + column, buf, thislen);
2954
2955 /*
2956 * Write Data into DataRAM
2957 * Add: 8th Word
2958 * in sector0/spare/page0
2959 * DQ=XXFCh
2960 */
2961 this->write_bufferram(mtd, ONENAND_SPARERAM,
2962 oobbuf, 0, mtd->oobsize);
2963
2964 onenand_otp_command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
2965 onenand_update_bufferram(mtd, to, 0);
2966 if (ONENAND_IS_2PLANE(this)) {
2967 ONENAND_SET_BUFFERRAM1(this);
2968 onenand_update_bufferram(mtd, to + this->writesize, 0);
2969 }
2970
2971 ret = this->wait(mtd, FL_WRITING);
2972 if (ret) {
2973 printk(KERN_ERR "%s: write failed %d\n", __func__, ret);
2974 break;
2975 }
2976
2977 /* Exit OTP access mode */
2978 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2979 this->wait(mtd, FL_RESETING);
2980
2981 status = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
2982 status &= 0x60;
2983
2984 if (status == 0x60) {
2985 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2986 printk(KERN_DEBUG "1st Block\tLOCKED\n");
2987 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
2988 } else if (status == 0x20) {
2989 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2990 printk(KERN_DEBUG "1st Block\tLOCKED\n");
2991 printk(KERN_DEBUG "OTP Block\tUN-LOCKED\n");
2992 } else if (status == 0x40) {
2993 printk(KERN_DEBUG "\nBLOCK\tSTATUS\n");
2994 printk(KERN_DEBUG "1st Block\tUN-LOCKED\n");
2995 printk(KERN_DEBUG "OTP Block\tLOCKED\n");
2996 } else {
2997 printk(KERN_DEBUG "Reboot to check\n");
2998 }
2999
3000 written += thislen;
3001 if (written == len)
3002 break;
3003
3004 to += mtd->writesize;
3005 buf += thislen;
3006 column = 0;
3007 }
3008
3009 ops->oobretlen = written;
3010
3011 return ret;
3012 }
3013
3014 /* Internal OTP operation */
3015 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
3016 size_t *retlen, u_char *buf);
3017
3018 /**
3019 * do_otp_read - [DEFAULT] Read OTP block area
3020 * @param mtd MTD device structure
3021 * @param from The offset to read
3022 * @param len number of bytes to read
3023 * @param retlen pointer to variable to store the number of readbytes
3024 * @param buf the databuffer to put/get data
3025 *
3026 * Read OTP block area.
3027 */
3028 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
3029 size_t *retlen, u_char *buf)
3030 {
3031 struct onenand_chip *this = mtd->priv;
3032 struct mtd_oob_ops ops = {
3033 .len = len,
3034 .ooblen = 0,
3035 .datbuf = buf,
3036 .oobbuf = NULL,
3037 };
3038 int ret;
3039
3040 /* Enter OTP access mode */
3041 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3042 this->wait(mtd, FL_OTPING);
3043
3044 ret = ONENAND_IS_4KB_PAGE(this) ?
3045 onenand_mlc_read_ops_nolock(mtd, from, &ops) :
3046 onenand_read_ops_nolock(mtd, from, &ops);
3047
3048 /* Exit OTP access mode */
3049 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3050 this->wait(mtd, FL_RESETING);
3051
3052 return ret;
3053 }
3054
3055 /**
3056 * do_otp_write - [DEFAULT] Write OTP block area
3057 * @param mtd MTD device structure
3058 * @param to The offset to write
3059 * @param len number of bytes to write
3060 * @param retlen pointer to variable to store the number of write bytes
3061 * @param buf the databuffer to put/get data
3062 *
3063 * Write OTP block area.
3064 */
3065 static int do_otp_write(struct mtd_info *mtd, loff_t to, size_t len,
3066 size_t *retlen, u_char *buf)
3067 {
3068 struct onenand_chip *this = mtd->priv;
3069 unsigned char *pbuf = buf;
3070 int ret;
3071 struct mtd_oob_ops ops;
3072
3073 /* Force buffer page aligned */
3074 if (len < mtd->writesize) {
3075 memcpy(this->page_buf, buf, len);
3076 memset(this->page_buf + len, 0xff, mtd->writesize - len);
3077 pbuf = this->page_buf;
3078 len = mtd->writesize;
3079 }
3080
3081 /* Enter OTP access mode */
3082 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3083 this->wait(mtd, FL_OTPING);
3084
3085 ops.len = len;
3086 ops.ooblen = 0;
3087 ops.datbuf = pbuf;
3088 ops.oobbuf = NULL;
3089 ret = onenand_write_ops_nolock(mtd, to, &ops);
3090 *retlen = ops.retlen;
3091
3092 /* Exit OTP access mode */
3093 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3094 this->wait(mtd, FL_RESETING);
3095
3096 return ret;
3097 }
3098
3099 /**
3100 * do_otp_lock - [DEFAULT] Lock OTP block area
3101 * @param mtd MTD device structure
3102 * @param from The offset to lock
3103 * @param len number of bytes to lock
3104 * @param retlen pointer to variable to store the number of lock bytes
3105 * @param buf the databuffer to put/get data
3106 *
3107 * Lock OTP block area.
3108 */
3109 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
3110 size_t *retlen, u_char *buf)
3111 {
3112 struct onenand_chip *this = mtd->priv;
3113 struct mtd_oob_ops ops;
3114 int ret;
3115
3116 if (FLEXONENAND(this)) {
3117
3118 /* Enter OTP access mode */
3119 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
3120 this->wait(mtd, FL_OTPING);
3121 /*
3122 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3123 * main area of page 49.
3124 */
3125 ops.len = mtd->writesize;
3126 ops.ooblen = 0;
3127 ops.datbuf = buf;
3128 ops.oobbuf = NULL;
3129 ret = onenand_write_ops_nolock(mtd, mtd->writesize * 49, &ops);
3130 *retlen = ops.retlen;
3131
3132 /* Exit OTP access mode */
3133 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3134 this->wait(mtd, FL_RESETING);
3135 } else {
3136 ops.mode = MTD_OOB_PLACE;
3137 ops.ooblen = len;
3138 ops.oobbuf = buf;
3139 ops.ooboffs = 0;
3140 ret = onenand_otp_write_oob_nolock(mtd, from, &ops);
3141 *retlen = ops.oobretlen;
3142 }
3143
3144 return ret;
3145 }
3146
3147 /**
3148 * onenand_otp_walk - [DEFAULT] Handle OTP operation
3149 * @param mtd MTD device structure
3150 * @param from The offset to read/write
3151 * @param len number of bytes to read/write
3152 * @param retlen pointer to variable to store the number of read bytes
3153 * @param buf the databuffer to put/get data
3154 * @param action do given action
3155 * @param mode specify user and factory
3156 *
3157 * Handle OTP operation.
3158 */
3159 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
3160 size_t *retlen, u_char *buf,
3161 otp_op_t action, int mode)
3162 {
3163 struct onenand_chip *this = mtd->priv;
3164 int otp_pages;
3165 int density;
3166 int ret = 0;
3167
3168 *retlen = 0;
3169
3170 density = onenand_get_density(this->device_id);
3171 if (density < ONENAND_DEVICE_DENSITY_512Mb)
3172 otp_pages = 20;
3173 else
3174 otp_pages = 50;
3175
3176 if (mode == MTD_OTP_FACTORY) {
3177 from += mtd->writesize * otp_pages;
3178 otp_pages = ONENAND_PAGES_PER_BLOCK - otp_pages;
3179 }
3180
3181 /* Check User/Factory boundary */
3182 if (mode == MTD_OTP_USER) {
3183 if (mtd->writesize * otp_pages < from + len)
3184 return 0;
3185 } else {
3186 if (mtd->writesize * otp_pages < len)
3187 return 0;
3188 }
3189
3190 onenand_get_device(mtd, FL_OTPING);
3191 while (len > 0 && otp_pages > 0) {
3192 if (!action) { /* OTP Info functions */
3193 struct otp_info *otpinfo;
3194
3195 len -= sizeof(struct otp_info);
3196 if (len <= 0) {
3197 ret = -ENOSPC;
3198 break;
3199 }
3200
3201 otpinfo = (struct otp_info *) buf;
3202 otpinfo->start = from;
3203 otpinfo->length = mtd->writesize;
3204 otpinfo->locked = 0;
3205
3206 from += mtd->writesize;
3207 buf += sizeof(struct otp_info);
3208 *retlen += sizeof(struct otp_info);
3209 } else {
3210 size_t tmp_retlen;
3211
3212 ret = action(mtd, from, len, &tmp_retlen, buf);
3213
3214 buf += tmp_retlen;
3215 len -= tmp_retlen;
3216 *retlen += tmp_retlen;
3217
3218 if (ret)
3219 break;
3220 }
3221 otp_pages--;
3222 }
3223 onenand_release_device(mtd);
3224
3225 return ret;
3226 }
3227
3228 /**
3229 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
3230 * @param mtd MTD device structure
3231 * @param buf the databuffer to put/get data
3232 * @param len number of bytes to read
3233 *
3234 * Read factory OTP info.
3235 */
3236 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
3237 struct otp_info *buf, size_t len)
3238 {
3239 size_t retlen;
3240 int ret;
3241
3242 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
3243
3244 return ret ? : retlen;
3245 }
3246
3247 /**
3248 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
3249 * @param mtd MTD device structure
3250 * @param from The offset to read
3251 * @param len number of bytes to read
3252 * @param retlen pointer to variable to store the number of read bytes
3253 * @param buf the databuffer to put/get data
3254 *
3255 * Read factory OTP area.
3256 */
3257 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
3258 size_t len, size_t *retlen, u_char *buf)
3259 {
3260 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
3261 }
3262
3263 /**
3264 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
3265 * @param mtd MTD device structure
3266 * @param buf the databuffer to put/get data
3267 * @param len number of bytes to read
3268 *
3269 * Read user OTP info.
3270 */
3271 static int onenand_get_user_prot_info(struct mtd_info *mtd,
3272 struct otp_info *buf, size_t len)
3273 {
3274 size_t retlen;
3275 int ret;
3276
3277 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
3278
3279 return ret ? : retlen;
3280 }
3281
3282 /**
3283 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
3284 * @param mtd MTD device structure
3285 * @param from The offset to read
3286 * @param len number of bytes to read
3287 * @param retlen pointer to variable to store the number of read bytes
3288 * @param buf the databuffer to put/get data
3289 *
3290 * Read user OTP area.
3291 */
3292 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
3293 size_t len, size_t *retlen, u_char *buf)
3294 {
3295 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
3296 }
3297
3298 /**
3299 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
3300 * @param mtd MTD device structure
3301 * @param from The offset to write
3302 * @param len number of bytes to write
3303 * @param retlen pointer to variable to store the number of write bytes
3304 * @param buf the databuffer to put/get data
3305 *
3306 * Write user OTP area.
3307 */
3308 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
3309 size_t len, size_t *retlen, u_char *buf)
3310 {
3311 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
3312 }
3313
3314 /**
3315 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
3316 * @param mtd MTD device structure
3317 * @param from The offset to lock
3318 * @param len number of bytes to unlock
3319 *
3320 * Write lock mark on spare area in page 0 in OTP block
3321 */
3322 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
3323 size_t len)
3324 {
3325 struct onenand_chip *this = mtd->priv;
3326 u_char *buf = FLEXONENAND(this) ? this->page_buf : this->oob_buf;
3327 size_t retlen;
3328 int ret;
3329 unsigned int otp_lock_offset = ONENAND_OTP_LOCK_OFFSET;
3330
3331 memset(buf, 0xff, FLEXONENAND(this) ? this->writesize
3332 : mtd->oobsize);
3333 /*
3334 * Write lock mark to 8th word of sector0 of page0 of the spare0.
3335 * We write 16 bytes spare area instead of 2 bytes.
3336 * For Flex-OneNAND, we write lock mark to 1st word of sector 4 of
3337 * main area of page 49.
3338 */
3339
3340 from = 0;
3341 len = FLEXONENAND(this) ? mtd->writesize : 16;
3342
3343 /*
3344 * Note: OTP lock operation
3345 * OTP block : 0xXXFC XX 1111 1100
3346 * 1st block : 0xXXF3 (If chip support) XX 1111 0011
3347 * Both : 0xXXF0 (If chip support) XX 1111 0000
3348 */
3349 if (FLEXONENAND(this))
3350 otp_lock_offset = FLEXONENAND_OTP_LOCK_OFFSET;
3351
3352 /* ONENAND_OTP_AREA | ONENAND_OTP_BLOCK0 | ONENAND_OTP_AREA_BLOCK0 */
3353 if (otp == 1)
3354 buf[otp_lock_offset] = 0xFC;
3355 else if (otp == 2)
3356 buf[otp_lock_offset] = 0xF3;
3357 else if (otp == 3)
3358 buf[otp_lock_offset] = 0xF0;
3359 else if (otp != 0)
3360 printk(KERN_DEBUG "[OneNAND] Invalid option selected for OTP\n");
3361
3362 ret = onenand_otp_walk(mtd, from, len, &retlen, buf, do_otp_lock, MTD_OTP_USER);
3363
3364 return ret ? : retlen;
3365 }
3366
3367 #endif /* CONFIG_MTD_ONENAND_OTP */
3368
3369 /**
3370 * onenand_check_features - Check and set OneNAND features
3371 * @param mtd MTD data structure
3372 *
3373 * Check and set OneNAND features
3374 * - lock scheme
3375 * - two plane
3376 */
3377 static void onenand_check_features(struct mtd_info *mtd)
3378 {
3379 struct onenand_chip *this = mtd->priv;
3380 unsigned int density, process, numbufs;
3381
3382 /* Lock scheme depends on density and process */
3383 density = onenand_get_density(this->device_id);
3384 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
3385 numbufs = this->read_word(this->base + ONENAND_REG_NUM_BUFFERS) >> 8;
3386
3387 /* Lock scheme */
3388 switch (density) {
3389 case ONENAND_DEVICE_DENSITY_4Gb:
3390 if (ONENAND_IS_DDP(this))
3391 this->options |= ONENAND_HAS_2PLANE;
3392 else if (numbufs == 1) {
3393 this->options |= ONENAND_HAS_4KB_PAGE;
3394 this->options |= ONENAND_HAS_CACHE_PROGRAM;
3395 }
3396
3397 case ONENAND_DEVICE_DENSITY_2Gb:
3398 /* 2Gb DDP does not have 2 plane */
3399 if (!ONENAND_IS_DDP(this))
3400 this->options |= ONENAND_HAS_2PLANE;
3401 this->options |= ONENAND_HAS_UNLOCK_ALL;
3402
3403 case ONENAND_DEVICE_DENSITY_1Gb:
3404 /* A-Die has all block unlock */
3405 if (process)
3406 this->options |= ONENAND_HAS_UNLOCK_ALL;
3407 break;
3408
3409 default:
3410 /* Some OneNAND has continuous lock scheme */
3411 if (!process)
3412 this->options |= ONENAND_HAS_CONT_LOCK;
3413 break;
3414 }
3415
3416 /* The MLC has 4KiB pagesize. */
3417 if (ONENAND_IS_MLC(this))
3418 this->options |= ONENAND_HAS_4KB_PAGE;
3419
3420 if (ONENAND_IS_4KB_PAGE(this))
3421 this->options &= ~ONENAND_HAS_2PLANE;
3422
3423 if (FLEXONENAND(this)) {
3424 this->options &= ~ONENAND_HAS_CONT_LOCK;
3425 this->options |= ONENAND_HAS_UNLOCK_ALL;
3426 }
3427
3428 if (this->options & ONENAND_HAS_CONT_LOCK)
3429 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
3430 if (this->options & ONENAND_HAS_UNLOCK_ALL)
3431 printk(KERN_DEBUG "Chip support all block unlock\n");
3432 if (this->options & ONENAND_HAS_2PLANE)
3433 printk(KERN_DEBUG "Chip has 2 plane\n");
3434 if (this->options & ONENAND_HAS_4KB_PAGE)
3435 printk(KERN_DEBUG "Chip has 4KiB pagesize\n");
3436 if (this->options & ONENAND_HAS_CACHE_PROGRAM)
3437 printk(KERN_DEBUG "Chip has cache program feature\n");
3438 }
3439
3440 /**
3441 * onenand_print_device_info - Print device & version ID
3442 * @param device device ID
3443 * @param version version ID
3444 *
3445 * Print device & version ID
3446 */
3447 static void onenand_print_device_info(int device, int version)
3448 {
3449 int vcc, demuxed, ddp, density, flexonenand;
3450
3451 vcc = device & ONENAND_DEVICE_VCC_MASK;
3452 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
3453 ddp = device & ONENAND_DEVICE_IS_DDP;
3454 density = onenand_get_density(device);
3455 flexonenand = device & DEVICE_IS_FLEXONENAND;
3456 printk(KERN_INFO "%s%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
3457 demuxed ? "" : "Muxed ",
3458 flexonenand ? "Flex-" : "",
3459 ddp ? "(DDP)" : "",
3460 (16 << density),
3461 vcc ? "2.65/3.3" : "1.8",
3462 device);
3463 printk(KERN_INFO "OneNAND version = 0x%04x\n", version);
3464 }
3465
3466 static const struct onenand_manufacturers onenand_manuf_ids[] = {
3467 {ONENAND_MFR_SAMSUNG, "Samsung"},
3468 {ONENAND_MFR_NUMONYX, "Numonyx"},
3469 };
3470
3471 /**
3472 * onenand_check_maf - Check manufacturer ID
3473 * @param manuf manufacturer ID
3474 *
3475 * Check manufacturer ID
3476 */
3477 static int onenand_check_maf(int manuf)
3478 {
3479 int size = ARRAY_SIZE(onenand_manuf_ids);
3480 char *name;
3481 int i;
3482
3483 for (i = 0; i < size; i++)
3484 if (manuf == onenand_manuf_ids[i].id)
3485 break;
3486
3487 if (i < size)
3488 name = onenand_manuf_ids[i].name;
3489 else
3490 name = "Unknown";
3491
3492 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
3493
3494 return (i == size);
3495 }
3496
3497 /**
3498 * flexonenand_get_boundary - Reads the SLC boundary
3499 * @param onenand_info - onenand info structure
3500 **/
3501 static int flexonenand_get_boundary(struct mtd_info *mtd)
3502 {
3503 struct onenand_chip *this = mtd->priv;
3504 unsigned die, bdry;
3505 int ret, syscfg, locked;
3506
3507 /* Disable ECC */
3508 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3509 this->write_word((syscfg | 0x0100), this->base + ONENAND_REG_SYS_CFG1);
3510
3511 for (die = 0; die < this->dies; die++) {
3512 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3513 this->wait(mtd, FL_SYNCING);
3514
3515 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
3516 ret = this->wait(mtd, FL_READING);
3517
3518 bdry = this->read_word(this->base + ONENAND_DATARAM);
3519 if ((bdry >> FLEXONENAND_PI_UNLOCK_SHIFT) == 3)
3520 locked = 0;
3521 else
3522 locked = 1;
3523 this->boundary[die] = bdry & FLEXONENAND_PI_MASK;
3524
3525 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
3526 ret = this->wait(mtd, FL_RESETING);
3527
3528 printk(KERN_INFO "Die %d boundary: %d%s\n", die,
3529 this->boundary[die], locked ? "(Locked)" : "(Unlocked)");
3530 }
3531
3532 /* Enable ECC */
3533 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3534 return 0;
3535 }
3536
3537 /**
3538 * flexonenand_get_size - Fill up fields in onenand_chip and mtd_info
3539 * boundary[], diesize[], mtd->size, mtd->erasesize
3540 * @param mtd - MTD device structure
3541 */
3542 static void flexonenand_get_size(struct mtd_info *mtd)
3543 {
3544 struct onenand_chip *this = mtd->priv;
3545 int die, i, eraseshift, density;
3546 int blksperdie, maxbdry;
3547 loff_t ofs;
3548
3549 density = onenand_get_density(this->device_id);
3550 blksperdie = ((loff_t)(16 << density) << 20) >> (this->erase_shift);
3551 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3552 maxbdry = blksperdie - 1;
3553 eraseshift = this->erase_shift - 1;
3554
3555 mtd->numeraseregions = this->dies << 1;
3556
3557 /* This fills up the device boundary */
3558 flexonenand_get_boundary(mtd);
3559 die = ofs = 0;
3560 i = -1;
3561 for (; die < this->dies; die++) {
3562 if (!die || this->boundary[die-1] != maxbdry) {
3563 i++;
3564 mtd->eraseregions[i].offset = ofs;
3565 mtd->eraseregions[i].erasesize = 1 << eraseshift;
3566 mtd->eraseregions[i].numblocks =
3567 this->boundary[die] + 1;
3568 ofs += mtd->eraseregions[i].numblocks << eraseshift;
3569 eraseshift++;
3570 } else {
3571 mtd->numeraseregions -= 1;
3572 mtd->eraseregions[i].numblocks +=
3573 this->boundary[die] + 1;
3574 ofs += (this->boundary[die] + 1) << (eraseshift - 1);
3575 }
3576 if (this->boundary[die] != maxbdry) {
3577 i++;
3578 mtd->eraseregions[i].offset = ofs;
3579 mtd->eraseregions[i].erasesize = 1 << eraseshift;
3580 mtd->eraseregions[i].numblocks = maxbdry ^
3581 this->boundary[die];
3582 ofs += mtd->eraseregions[i].numblocks << eraseshift;
3583 eraseshift--;
3584 } else
3585 mtd->numeraseregions -= 1;
3586 }
3587
3588 /* Expose MLC erase size except when all blocks are SLC */
3589 mtd->erasesize = 1 << this->erase_shift;
3590 if (mtd->numeraseregions == 1)
3591 mtd->erasesize >>= 1;
3592
3593 printk(KERN_INFO "Device has %d eraseregions\n", mtd->numeraseregions);
3594 for (i = 0; i < mtd->numeraseregions; i++)
3595 printk(KERN_INFO "[offset: 0x%08x, erasesize: 0x%05x,"
3596 " numblocks: %04u]\n",
3597 (unsigned int) mtd->eraseregions[i].offset,
3598 mtd->eraseregions[i].erasesize,
3599 mtd->eraseregions[i].numblocks);
3600
3601 for (die = 0, mtd->size = 0; die < this->dies; die++) {
3602 this->diesize[die] = (loff_t)blksperdie << this->erase_shift;
3603 this->diesize[die] -= (loff_t)(this->boundary[die] + 1)
3604 << (this->erase_shift - 1);
3605 mtd->size += this->diesize[die];
3606 }
3607 }
3608
3609 /**
3610 * flexonenand_check_blocks_erased - Check if blocks are erased
3611 * @param mtd_info - mtd info structure
3612 * @param start - first erase block to check
3613 * @param end - last erase block to check
3614 *
3615 * Converting an unerased block from MLC to SLC
3616 * causes byte values to change. Since both data and its ECC
3617 * have changed, reads on the block give uncorrectable error.
3618 * This might lead to the block being detected as bad.
3619 *
3620 * Avoid this by ensuring that the block to be converted is
3621 * erased.
3622 */
3623 static int flexonenand_check_blocks_erased(struct mtd_info *mtd, int start, int end)
3624 {
3625 struct onenand_chip *this = mtd->priv;
3626 int i, ret;
3627 int block;
3628 struct mtd_oob_ops ops = {
3629 .mode = MTD_OOB_PLACE,
3630 .ooboffs = 0,
3631 .ooblen = mtd->oobsize,
3632 .datbuf = NULL,
3633 .oobbuf = this->oob_buf,
3634 };
3635 loff_t addr;
3636
3637 printk(KERN_DEBUG "Check blocks from %d to %d\n", start, end);
3638
3639 for (block = start; block <= end; block++) {
3640 addr = flexonenand_addr(this, block);
3641 if (onenand_block_isbad_nolock(mtd, addr, 0))
3642 continue;
3643
3644 /*
3645 * Since main area write results in ECC write to spare,
3646 * it is sufficient to check only ECC bytes for change.
3647 */
3648 ret = onenand_read_oob_nolock(mtd, addr, &ops);
3649 if (ret)
3650 return ret;
3651
3652 for (i = 0; i < mtd->oobsize; i++)
3653 if (this->oob_buf[i] != 0xff)
3654 break;
3655
3656 if (i != mtd->oobsize) {
3657 printk(KERN_WARNING "%s: Block %d not erased.\n",
3658 __func__, block);
3659 return 1;
3660 }
3661 }
3662
3663 return 0;
3664 }
3665
3666 /**
3667 * flexonenand_set_boundary - Writes the SLC boundary
3668 * @param mtd - mtd info structure
3669 */
3670 int flexonenand_set_boundary(struct mtd_info *mtd, int die,
3671 int boundary, int lock)
3672 {
3673 struct onenand_chip *this = mtd->priv;
3674 int ret, density, blksperdie, old, new, thisboundary;
3675 loff_t addr;
3676
3677 /* Change only once for SDP Flex-OneNAND */
3678 if (die && (!ONENAND_IS_DDP(this)))
3679 return 0;
3680
3681 /* boundary value of -1 indicates no required change */
3682 if (boundary < 0 || boundary == this->boundary[die])
3683 return 0;
3684
3685 density = onenand_get_density(this->device_id);
3686 blksperdie = ((16 << density) << 20) >> this->erase_shift;
3687 blksperdie >>= ONENAND_IS_DDP(this) ? 1 : 0;
3688
3689 if (boundary >= blksperdie) {
3690 printk(KERN_ERR "%s: Invalid boundary value. "
3691 "Boundary not changed.\n", __func__);
3692 return -EINVAL;
3693 }
3694
3695 /* Check if converting blocks are erased */
3696 old = this->boundary[die] + (die * this->density_mask);
3697 new = boundary + (die * this->density_mask);
3698 ret = flexonenand_check_blocks_erased(mtd, min(old, new) + 1, max(old, new));
3699 if (ret) {
3700 printk(KERN_ERR "%s: Please erase blocks "
3701 "before boundary change\n", __func__);
3702 return ret;
3703 }
3704
3705 this->command(mtd, FLEXONENAND_CMD_PI_ACCESS, die, 0);
3706 this->wait(mtd, FL_SYNCING);
3707
3708 /* Check is boundary is locked */
3709 this->command(mtd, FLEXONENAND_CMD_READ_PI, die, 0);
3710 ret = this->wait(mtd, FL_READING);
3711
3712 thisboundary = this->read_word(this->base + ONENAND_DATARAM);
3713 if ((thisboundary >> FLEXONENAND_PI_UNLOCK_SHIFT) != 3) {
3714 printk(KERN_ERR "%s: boundary locked\n", __func__);
3715 ret = 1;
3716 goto out;
3717 }
3718
3719 printk(KERN_INFO "Changing die %d boundary: %d%s\n",
3720 die, boundary, lock ? "(Locked)" : "(Unlocked)");
3721
3722 addr = die ? this->diesize[0] : 0;
3723
3724 boundary &= FLEXONENAND_PI_MASK;
3725 boundary |= lock ? 0 : (3 << FLEXONENAND_PI_UNLOCK_SHIFT);
3726
3727 this->command(mtd, ONENAND_CMD_ERASE, addr, 0);
3728 ret = this->wait(mtd, FL_ERASING);
3729 if (ret) {
3730 printk(KERN_ERR "%s: Failed PI erase for Die %d\n",
3731 __func__, die);
3732 goto out;
3733 }
3734
3735 this->write_word(boundary, this->base + ONENAND_DATARAM);
3736 this->command(mtd, ONENAND_CMD_PROG, addr, 0);
3737 ret = this->wait(mtd, FL_WRITING);
3738 if (ret) {
3739 printk(KERN_ERR "%s: Failed PI write for Die %d\n",
3740 __func__, die);
3741 goto out;
3742 }
3743
3744 this->command(mtd, FLEXONENAND_CMD_PI_UPDATE, die, 0);
3745 ret = this->wait(mtd, FL_WRITING);
3746 out:
3747 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_REG_COMMAND);
3748 this->wait(mtd, FL_RESETING);
3749 if (!ret)
3750 /* Recalculate device size on boundary change*/
3751 flexonenand_get_size(mtd);
3752
3753 return ret;
3754 }
3755
3756 /**
3757 * onenand_chip_probe - [OneNAND Interface] The generic chip probe
3758 * @param mtd MTD device structure
3759 *
3760 * OneNAND detection method:
3761 * Compare the values from command with ones from register
3762 */
3763 static int onenand_chip_probe(struct mtd_info *mtd)
3764 {
3765 struct onenand_chip *this = mtd->priv;
3766 int bram_maf_id, bram_dev_id, maf_id, dev_id;
3767 int syscfg;
3768
3769 /* Save system configuration 1 */
3770 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
3771 /* Clear Sync. Burst Read mode to read BootRAM */
3772 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ & ~ONENAND_SYS_CFG1_SYNC_WRITE), this->base + ONENAND_REG_SYS_CFG1);
3773
3774 /* Send the command for reading device ID from BootRAM */
3775 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
3776
3777 /* Read manufacturer and device IDs from BootRAM */
3778 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
3779 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
3780
3781 /* Reset OneNAND to read default register values */
3782 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
3783 /* Wait reset */
3784 this->wait(mtd, FL_RESETING);
3785
3786 /* Restore system configuration 1 */
3787 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
3788
3789 /* Check manufacturer ID */
3790 if (onenand_check_maf(bram_maf_id))
3791 return -ENXIO;
3792
3793 /* Read manufacturer and device IDs from Register */
3794 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
3795 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
3796
3797 /* Check OneNAND device */
3798 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
3799 return -ENXIO;
3800
3801 return 0;
3802 }
3803
3804 /**
3805 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
3806 * @param mtd MTD device structure
3807 */
3808 static int onenand_probe(struct mtd_info *mtd)
3809 {
3810 struct onenand_chip *this = mtd->priv;
3811 int maf_id, dev_id, ver_id;
3812 int density;
3813 int ret;
3814
3815 ret = this->chip_probe(mtd);
3816 if (ret)
3817 return ret;
3818
3819 /* Read manufacturer and device IDs from Register */
3820 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
3821 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
3822 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
3823 this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY);
3824
3825 /* Flash device information */
3826 onenand_print_device_info(dev_id, ver_id);
3827 this->device_id = dev_id;
3828 this->version_id = ver_id;
3829
3830 /* Check OneNAND features */
3831 onenand_check_features(mtd);
3832
3833 density = onenand_get_density(dev_id);
3834 if (FLEXONENAND(this)) {
3835 this->dies = ONENAND_IS_DDP(this) ? 2 : 1;
3836 /* Maximum possible erase regions */
3837 mtd->numeraseregions = this->dies << 1;
3838 mtd->eraseregions = kzalloc(sizeof(struct mtd_erase_region_info)
3839 * (this->dies << 1), GFP_KERNEL);
3840 if (!mtd->eraseregions)
3841 return -ENOMEM;
3842 }
3843
3844 /*
3845 * For Flex-OneNAND, chipsize represents maximum possible device size.
3846 * mtd->size represents the actual device size.
3847 */
3848 this->chipsize = (16 << density) << 20;
3849
3850 /* OneNAND page size & block size */
3851 /* The data buffer size is equal to page size */
3852 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
3853 /* We use the full BufferRAM */
3854 if (ONENAND_IS_4KB_PAGE(this))
3855 mtd->writesize <<= 1;
3856
3857 mtd->oobsize = mtd->writesize >> 5;
3858 /* Pages per a block are always 64 in OneNAND */
3859 mtd->erasesize = mtd->writesize << 6;
3860 /*
3861 * Flex-OneNAND SLC area has 64 pages per block.
3862 * Flex-OneNAND MLC area has 128 pages per block.
3863 * Expose MLC erase size to find erase_shift and page_mask.
3864 */
3865 if (FLEXONENAND(this))
3866 mtd->erasesize <<= 1;
3867
3868 this->erase_shift = ffs(mtd->erasesize) - 1;
3869 this->page_shift = ffs(mtd->writesize) - 1;
3870 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
3871 /* Set density mask. it is used for DDP */
3872 if (ONENAND_IS_DDP(this))
3873 this->density_mask = this->chipsize >> (this->erase_shift + 1);
3874 /* It's real page size */
3875 this->writesize = mtd->writesize;
3876
3877 /* REVISIT: Multichip handling */
3878
3879 if (FLEXONENAND(this))
3880 flexonenand_get_size(mtd);
3881 else
3882 mtd->size = this->chipsize;
3883
3884 /*
3885 * We emulate the 4KiB page and 256KiB erase block size
3886 * But oobsize is still 64 bytes.
3887 * It is only valid if you turn on 2X program support,
3888 * Otherwise it will be ignored by compiler.
3889 */
3890 if (ONENAND_IS_2PLANE(this)) {
3891 mtd->writesize <<= 1;
3892 mtd->erasesize <<= 1;
3893 }
3894
3895 return 0;
3896 }
3897
3898 /**
3899 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
3900 * @param mtd MTD device structure
3901 */
3902 static int onenand_suspend(struct mtd_info *mtd)
3903 {
3904 return onenand_get_device(mtd, FL_PM_SUSPENDED);
3905 }
3906
3907 /**
3908 * onenand_resume - [MTD Interface] Resume the OneNAND flash
3909 * @param mtd MTD device structure
3910 */
3911 static void onenand_resume(struct mtd_info *mtd)
3912 {
3913 struct onenand_chip *this = mtd->priv;
3914
3915 if (this->state == FL_PM_SUSPENDED)
3916 onenand_release_device(mtd);
3917 else
3918 printk(KERN_ERR "%s: resume() called for the chip which is not "
3919 "in suspended state\n", __func__);
3920 }
3921
3922 /**
3923 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
3924 * @param mtd MTD device structure
3925 * @param maxchips Number of chips to scan for
3926 *
3927 * This fills out all the not initialized function pointers
3928 * with the defaults.
3929 * The flash ID is read and the mtd/chip structures are
3930 * filled with the appropriate values.
3931 */
3932 int onenand_scan(struct mtd_info *mtd, int maxchips)
3933 {
3934 int i, ret;
3935 struct onenand_chip *this = mtd->priv;
3936
3937 if (!this->read_word)
3938 this->read_word = onenand_readw;
3939 if (!this->write_word)
3940 this->write_word = onenand_writew;
3941
3942 if (!this->command)
3943 this->command = onenand_command;
3944 if (!this->wait)
3945 onenand_setup_wait(mtd);
3946 if (!this->bbt_wait)
3947 this->bbt_wait = onenand_bbt_wait;
3948 if (!this->unlock_all)
3949 this->unlock_all = onenand_unlock_all;
3950
3951 if (!this->chip_probe)
3952 this->chip_probe = onenand_chip_probe;
3953
3954 if (!this->read_bufferram)
3955 this->read_bufferram = onenand_read_bufferram;
3956 if (!this->write_bufferram)
3957 this->write_bufferram = onenand_write_bufferram;
3958
3959 if (!this->block_markbad)
3960 this->block_markbad = onenand_default_block_markbad;
3961 if (!this->scan_bbt)
3962 this->scan_bbt = onenand_default_bbt;
3963
3964 if (onenand_probe(mtd))
3965 return -ENXIO;
3966
3967 /* Set Sync. Burst Read after probing */
3968 if (this->mmcontrol) {
3969 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
3970 this->read_bufferram = onenand_sync_read_bufferram;
3971 }
3972
3973 /* Allocate buffers, if necessary */
3974 if (!this->page_buf) {
3975 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
3976 if (!this->page_buf) {
3977 printk(KERN_ERR "%s: Can't allocate page_buf\n",
3978 __func__);
3979 return -ENOMEM;
3980 }
3981 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
3982 this->verify_buf = kzalloc(mtd->writesize, GFP_KERNEL);
3983 if (!this->verify_buf) {
3984 kfree(this->page_buf);
3985 return -ENOMEM;
3986 }
3987 #endif
3988 this->options |= ONENAND_PAGEBUF_ALLOC;
3989 }
3990 if (!this->oob_buf) {
3991 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
3992 if (!this->oob_buf) {
3993 printk(KERN_ERR "%s: Can't allocate oob_buf\n",
3994 __func__);
3995 if (this->options & ONENAND_PAGEBUF_ALLOC) {
3996 this->options &= ~ONENAND_PAGEBUF_ALLOC;
3997 kfree(this->page_buf);
3998 }
3999 return -ENOMEM;
4000 }
4001 this->options |= ONENAND_OOBBUF_ALLOC;
4002 }
4003
4004 this->state = FL_READY;
4005 init_waitqueue_head(&this->wq);
4006 spin_lock_init(&this->chip_lock);
4007
4008 /*
4009 * Allow subpage writes up to oobsize.
4010 */
4011 switch (mtd->oobsize) {
4012 case 128:
4013 this->ecclayout = &onenand_oob_128;
4014 mtd->subpage_sft = 0;
4015 break;
4016 case 64:
4017 this->ecclayout = &onenand_oob_64;
4018 mtd->subpage_sft = 2;
4019 break;
4020
4021 case 32:
4022 this->ecclayout = &onenand_oob_32;
4023 mtd->subpage_sft = 1;
4024 break;
4025
4026 default:
4027 printk(KERN_WARNING "%s: No OOB scheme defined for oobsize %d\n",
4028 __func__, mtd->oobsize);
4029 mtd->subpage_sft = 0;
4030 /* To prevent kernel oops */
4031 this->ecclayout = &onenand_oob_32;
4032 break;
4033 }
4034
4035 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
4036
4037 /*
4038 * The number of bytes available for a client to place data into
4039 * the out of band area
4040 */
4041 this->ecclayout->oobavail = 0;
4042 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
4043 this->ecclayout->oobfree[i].length; i++)
4044 this->ecclayout->oobavail +=
4045 this->ecclayout->oobfree[i].length;
4046 mtd->oobavail = this->ecclayout->oobavail;
4047
4048 mtd->ecclayout = this->ecclayout;
4049
4050 /* Fill in remaining MTD driver data */
4051 mtd->type = ONENAND_IS_MLC(this) ? MTD_MLCNANDFLASH : MTD_NANDFLASH;
4052 mtd->flags = MTD_CAP_NANDFLASH;
4053 mtd->erase = onenand_erase;
4054 mtd->point = NULL;
4055 mtd->unpoint = NULL;
4056 mtd->read = onenand_read;
4057 mtd->write = onenand_write;
4058 mtd->read_oob = onenand_read_oob;
4059 mtd->write_oob = onenand_write_oob;
4060 mtd->panic_write = onenand_panic_write;
4061 #ifdef CONFIG_MTD_ONENAND_OTP
4062 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
4063 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
4064 mtd->get_user_prot_info = onenand_get_user_prot_info;
4065 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
4066 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
4067 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
4068 #endif
4069 mtd->sync = onenand_sync;
4070 mtd->lock = onenand_lock;
4071 mtd->unlock = onenand_unlock;
4072 mtd->suspend = onenand_suspend;
4073 mtd->resume = onenand_resume;
4074 mtd->block_isbad = onenand_block_isbad;
4075 mtd->block_markbad = onenand_block_markbad;
4076 mtd->owner = THIS_MODULE;
4077
4078 /* Unlock whole block */
4079 this->unlock_all(mtd);
4080
4081 ret = this->scan_bbt(mtd);
4082 if ((!FLEXONENAND(this)) || ret)
4083 return ret;
4084
4085 /* Change Flex-OneNAND boundaries if required */
4086 for (i = 0; i < MAX_DIES; i++)
4087 flexonenand_set_boundary(mtd, i, flex_bdry[2 * i],
4088 flex_bdry[(2 * i) + 1]);
4089
4090 return 0;
4091 }
4092
4093 /**
4094 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
4095 * @param mtd MTD device structure
4096 */
4097 void onenand_release(struct mtd_info *mtd)
4098 {
4099 struct onenand_chip *this = mtd->priv;
4100
4101 #ifdef CONFIG_MTD_PARTITIONS
4102 /* Deregister partitions */
4103 del_mtd_partitions (mtd);
4104 #endif
4105 /* Deregister the device */
4106 del_mtd_device (mtd);
4107
4108 /* Free bad block table memory, if allocated */
4109 if (this->bbm) {
4110 struct bbm_info *bbm = this->bbm;
4111 kfree(bbm->bbt);
4112 kfree(this->bbm);
4113 }
4114 /* Buffers allocated by onenand_scan */
4115 if (this->options & ONENAND_PAGEBUF_ALLOC) {
4116 kfree(this->page_buf);
4117 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
4118 kfree(this->verify_buf);
4119 #endif
4120 }
4121 if (this->options & ONENAND_OOBBUF_ALLOC)
4122 kfree(this->oob_buf);
4123 kfree(mtd->eraseregions);
4124 }
4125
4126 EXPORT_SYMBOL_GPL(onenand_scan);
4127 EXPORT_SYMBOL_GPL(onenand_release);
4128
4129 MODULE_LICENSE("GPL");
4130 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
4131 MODULE_DESCRIPTION("Generic OneNAND flash driver code");
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