2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Code to handle x86 style IRQs plus some generic interrupt stuff.
8 * Copyright (C) 1992 Linus Torvalds
9 * Copyright (C) 1994 - 2000 Ralf Baechle
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <linux/ioport.h>
14 #include <linux/interrupt.h>
15 #include <linux/kernel.h>
16 #include <linux/spinlock.h>
17 #include <linux/sysdev.h>
19 #include <asm/i8259.h>
23 * This is the 'legacy' 8259A Programmable Interrupt Controller,
24 * present in the majority of PC/AT boxes.
25 * plus some generic x86 specific things if generic specifics makes
27 * this file should become arch/i386/kernel/irq.c when the old irq.c
28 * moves to arch independent land
31 static int i8259A_auto_eoi
= -1;
32 DEFINE_SPINLOCK(i8259A_lock
);
33 /* some platforms call this... */
34 void mask_and_ack_8259A(unsigned int);
36 static struct irq_chip i8259A_chip
= {
38 .mask
= disable_8259A_irq
,
39 .disable
= disable_8259A_irq
,
40 .unmask
= enable_8259A_irq
,
41 .mask_ack
= mask_and_ack_8259A
,
45 * 8259A PIC functions to handle ISA devices:
49 * This contains the irq mask for both 8259A irq controllers,
51 static unsigned int cached_irq_mask
= 0xffff;
53 #define cached_master_mask (cached_irq_mask)
54 #define cached_slave_mask (cached_irq_mask >> 8)
56 void disable_8259A_irq(unsigned int irq
)
61 irq
-= I8259A_IRQ_BASE
;
63 spin_lock_irqsave(&i8259A_lock
, flags
);
64 cached_irq_mask
|= mask
;
66 outb(cached_slave_mask
, PIC_SLAVE_IMR
);
68 outb(cached_master_mask
, PIC_MASTER_IMR
);
69 spin_unlock_irqrestore(&i8259A_lock
, flags
);
72 void enable_8259A_irq(unsigned int irq
)
77 irq
-= I8259A_IRQ_BASE
;
79 spin_lock_irqsave(&i8259A_lock
, flags
);
80 cached_irq_mask
&= mask
;
82 outb(cached_slave_mask
, PIC_SLAVE_IMR
);
84 outb(cached_master_mask
, PIC_MASTER_IMR
);
85 spin_unlock_irqrestore(&i8259A_lock
, flags
);
88 int i8259A_irq_pending(unsigned int irq
)
94 irq
-= I8259A_IRQ_BASE
;
96 spin_lock_irqsave(&i8259A_lock
, flags
);
98 ret
= inb(PIC_MASTER_CMD
) & mask
;
100 ret
= inb(PIC_SLAVE_CMD
) & (mask
>> 8);
101 spin_unlock_irqrestore(&i8259A_lock
, flags
);
106 void make_8259A_irq(unsigned int irq
)
108 disable_irq_nosync(irq
);
109 set_irq_chip_and_handler(irq
, &i8259A_chip
, handle_level_irq
);
114 * This function assumes to be called rarely. Switching between
115 * 8259A registers is slow.
116 * This has to be protected by the irq controller spinlock
117 * before being called.
119 static inline int i8259A_irq_real(unsigned int irq
)
122 int irqmask
= 1 << irq
;
125 outb(0x0B,PIC_MASTER_CMD
); /* ISR register */
126 value
= inb(PIC_MASTER_CMD
) & irqmask
;
127 outb(0x0A,PIC_MASTER_CMD
); /* back to the IRR register */
130 outb(0x0B,PIC_SLAVE_CMD
); /* ISR register */
131 value
= inb(PIC_SLAVE_CMD
) & (irqmask
>> 8);
132 outb(0x0A,PIC_SLAVE_CMD
); /* back to the IRR register */
137 * Careful! The 8259A is a fragile beast, it pretty
138 * much _has_ to be done exactly like this (mask it
139 * first, _then_ send the EOI, and the order of EOI
140 * to the two 8259s is important!
142 void mask_and_ack_8259A(unsigned int irq
)
144 unsigned int irqmask
;
147 irq
-= I8259A_IRQ_BASE
;
149 spin_lock_irqsave(&i8259A_lock
, flags
);
151 * Lightweight spurious IRQ detection. We do not want
152 * to overdo spurious IRQ handling - it's usually a sign
153 * of hardware problems, so we only do the checks we can
154 * do without slowing down good hardware unnecessarily.
156 * Note that IRQ7 and IRQ15 (the two spurious IRQs
157 * usually resulting from the 8259A-1|2 PICs) occur
158 * even if the IRQ is masked in the 8259A. Thus we
159 * can check spurious 8259A IRQs without doing the
160 * quite slow i8259A_irq_real() call for every IRQ.
161 * This does not cover 100% of spurious interrupts,
162 * but should be enough to warn the user that there
163 * is something bad going on ...
165 if (cached_irq_mask
& irqmask
)
166 goto spurious_8259A_irq
;
167 cached_irq_mask
|= irqmask
;
171 inb(PIC_SLAVE_IMR
); /* DUMMY - (do we need this?) */
172 outb(cached_slave_mask
, PIC_SLAVE_IMR
);
173 outb(0x60+(irq
&7),PIC_SLAVE_CMD
);/* 'Specific EOI' to slave */
174 outb(0x60+PIC_CASCADE_IR
,PIC_MASTER_CMD
); /* 'Specific EOI' to master-IRQ2 */
176 inb(PIC_MASTER_IMR
); /* DUMMY - (do we need this?) */
177 outb(cached_master_mask
, PIC_MASTER_IMR
);
178 outb(0x60+irq
,PIC_MASTER_CMD
); /* 'Specific EOI to master */
180 smtc_im_ack_irq(irq
);
181 spin_unlock_irqrestore(&i8259A_lock
, flags
);
186 * this is the slow path - should happen rarely.
188 if (i8259A_irq_real(irq
))
190 * oops, the IRQ _is_ in service according to the
191 * 8259A - not spurious, go handle it.
193 goto handle_real_irq
;
196 static int spurious_irq_mask
;
198 * At this point we can be sure the IRQ is spurious,
199 * lets ACK and report it. [once per IRQ]
201 if (!(spurious_irq_mask
& irqmask
)) {
202 printk(KERN_DEBUG
"spurious 8259A interrupt: IRQ%d.\n", irq
);
203 spurious_irq_mask
|= irqmask
;
205 atomic_inc(&irq_err_count
);
207 * Theoretically we do not have to handle this IRQ,
208 * but in Linux this does not cause problems and is
211 goto handle_real_irq
;
215 static int i8259A_resume(struct sys_device
*dev
)
217 if (i8259A_auto_eoi
>= 0)
218 init_8259A(i8259A_auto_eoi
);
222 static int i8259A_shutdown(struct sys_device
*dev
)
224 /* Put the i8259A into a quiescent state that
225 * the kernel initialization code can get it
228 if (i8259A_auto_eoi
>= 0) {
229 outb(0xff, PIC_MASTER_IMR
); /* mask all of 8259A-1 */
230 outb(0xff, PIC_SLAVE_IMR
); /* mask all of 8259A-1 */
235 static struct sysdev_class i8259_sysdev_class
= {
236 set_kset_name("i8259"),
237 .resume
= i8259A_resume
,
238 .shutdown
= i8259A_shutdown
,
241 static struct sys_device device_i8259A
= {
243 .cls
= &i8259_sysdev_class
,
246 static int __init
i8259A_init_sysfs(void)
248 int error
= sysdev_class_register(&i8259_sysdev_class
);
250 error
= sysdev_register(&device_i8259A
);
254 device_initcall(i8259A_init_sysfs
);
256 void init_8259A(int auto_eoi
)
260 i8259A_auto_eoi
= auto_eoi
;
262 spin_lock_irqsave(&i8259A_lock
, flags
);
264 outb(0xff, PIC_MASTER_IMR
); /* mask all of 8259A-1 */
265 outb(0xff, PIC_SLAVE_IMR
); /* mask all of 8259A-2 */
268 * outb_p - this has to work on a wide range of PC hardware.
270 outb_p(0x11, PIC_MASTER_CMD
); /* ICW1: select 8259A-1 init */
271 outb_p(I8259A_IRQ_BASE
+ 0, PIC_MASTER_IMR
); /* ICW2: 8259A-1 IR0 mapped to I8259A_IRQ_BASE + 0x00 */
272 outb_p(1U << PIC_CASCADE_IR
, PIC_MASTER_IMR
); /* 8259A-1 (the master) has a slave on IR2 */
273 if (auto_eoi
) /* master does Auto EOI */
274 outb_p(MASTER_ICW4_DEFAULT
| PIC_ICW4_AEOI
, PIC_MASTER_IMR
);
275 else /* master expects normal EOI */
276 outb_p(MASTER_ICW4_DEFAULT
, PIC_MASTER_IMR
);
278 outb_p(0x11, PIC_SLAVE_CMD
); /* ICW1: select 8259A-2 init */
279 outb_p(I8259A_IRQ_BASE
+ 8, PIC_SLAVE_IMR
); /* ICW2: 8259A-2 IR0 mapped to I8259A_IRQ_BASE + 0x08 */
280 outb_p(PIC_CASCADE_IR
, PIC_SLAVE_IMR
); /* 8259A-2 is a slave on master's IR2 */
281 outb_p(SLAVE_ICW4_DEFAULT
, PIC_SLAVE_IMR
); /* (slave's support for AEOI in flat mode is to be investigated) */
284 * In AEOI mode we just have to mask the interrupt
287 i8259A_chip
.mask_ack
= disable_8259A_irq
;
289 i8259A_chip
.mask_ack
= mask_and_ack_8259A
;
291 udelay(100); /* wait for 8259A to initialize */
293 outb(cached_master_mask
, PIC_MASTER_IMR
); /* restore master IRQ mask */
294 outb(cached_slave_mask
, PIC_SLAVE_IMR
); /* restore slave IRQ mask */
296 spin_unlock_irqrestore(&i8259A_lock
, flags
);
300 * IRQ2 is cascade interrupt to second interrupt controller
302 static struct irqaction irq2
= {
303 no_action
, 0, CPU_MASK_NONE
, "cascade", NULL
, NULL
306 static struct resource pic1_io_resource
= {
308 .start
= PIC_MASTER_CMD
,
309 .end
= PIC_MASTER_IMR
,
310 .flags
= IORESOURCE_BUSY
313 static struct resource pic2_io_resource
= {
315 .start
= PIC_SLAVE_CMD
,
316 .end
= PIC_SLAVE_IMR
,
317 .flags
= IORESOURCE_BUSY
321 * On systems with i8259-style interrupt controllers we assume for
322 * driver compatibility reasons interrupts 0 - 15 to be the i8259
323 * interrupts even if the hardware uses a different interrupt numbering.
325 void __init
init_i8259_irqs (void)
329 insert_resource(&ioport_resource
, &pic1_io_resource
);
330 insert_resource(&ioport_resource
, &pic2_io_resource
);
334 for (i
= I8259A_IRQ_BASE
; i
< I8259A_IRQ_BASE
+ 16; i
++)
335 set_irq_chip_and_handler(i
, &i8259A_chip
, handle_level_irq
);
337 setup_irq(I8259A_IRQ_BASE
+ PIC_CASCADE_IR
, &irq2
);