arch/x86/include/asm/spinlock.h

   1 #ifndef _ASM_X86_SPINLOCK_H
   2 #define _ASM_X86_SPINLOCK_H
   3
   4 #include <linux/jump_label.h>
   5 #include <linux/atomic.h>
   6 #include <asm/page.h>
   7 #include <asm/processor.h>
   8 #include <linux/compiler.h>
   9 #include <asm/paravirt.h>
  10 #include <asm/bitops.h>
  11
  12 /*
  13  * Your basic SMP spinlocks, allowing only a single CPU anywhere
  14  *
  15  * Simple spin lock operations.  There are two variants, one clears IRQ's
  16  * on the local processor, one does not.
  17  *
  18  * These are fair FIFO ticket locks, which support up to 2^16 CPUs.
  19  *
  20  * (the type definitions are in asm/spinlock_types.h)
  21  */
  22
  23 /* How long a lock should spin before we consider blocking */
  24 #define SPIN_THRESHOLD  (1 << 15)
  25
  26 extern struct static_key paravirt_ticketlocks_enabled;
  27 static __always_inline bool static_key_false(struct static_key *key);
  28
  29 #include <asm/qspinlock.h>
  30
  31 /*
  32  * Read-write spinlocks, allowing multiple readers
  33  * but only one writer.
  34  *
  35  * NOTE! it is quite common to have readers in interrupts
  36  * but no interrupt writers. For those circumstances we
  37  * can "mix" irq-safe locks - any writer needs to get a
  38  * irq-safe write-lock, but readers can get non-irqsafe
  39  * read-locks.
  40  *
  41  * On x86, we implement read-write locks using the generic qrwlock with
  42  * x86 specific optimization.
  43  */
  44
  45 #include <asm/qrwlock.h>
  46
  47 #define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
  48 #define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
  49
  50 #define arch_spin_relax(lock)   cpu_relax()
  51 #define arch_read_relax(lock)   cpu_relax()
  52 #define arch_write_relax(lock)  cpu_relax()
  53
  54 #endif /* _ASM_X86_SPINLOCK_H */