ixgbe: dcb: use DCB config values for FCoE traffic class on open
[linux-2.6/btrfs-unstable.git] / drivers / mfd / twl6030-irq.c
blobc6b456ad7342755c83e4f31d1106dd9d74cf5ca6
1 /*
2 * twl6030-irq.c - TWL6030 irq support
4 * Copyright (C) 2005-2009 Texas Instruments, Inc.
6 * Modifications to defer interrupt handling to a kernel thread:
7 * Copyright (C) 2006 MontaVista Software, Inc.
9 * Based on tlv320aic23.c:
10 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
12 * Code cleanup and modifications to IRQ handler.
13 * by syed khasim <x0khasim@ti.com>
15 * TWL6030 specific code and IRQ handling changes by
16 * Jagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com>
17 * Balaji T K <balajitk@ti.com>
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
34 #include <linux/init.h>
35 #include <linux/export.h>
36 #include <linux/interrupt.h>
37 #include <linux/irq.h>
38 #include <linux/kthread.h>
39 #include <linux/i2c/twl.h>
40 #include <linux/platform_device.h>
41 #include <linux/suspend.h>
43 #include "twl-core.h"
46 * TWL6030 (unlike its predecessors, which had two level interrupt handling)
47 * three interrupt registers INT_STS_A, INT_STS_B and INT_STS_C.
48 * It exposes status bits saying who has raised an interrupt. There are
49 * three mask registers that corresponds to these status registers, that
50 * enables/disables these interrupts.
52 * We set up IRQs starting at a platform-specified base. An interrupt map table,
53 * specifies mapping between interrupt number and the associated module.
57 static int twl6030_interrupt_mapping[24] = {
58 PWR_INTR_OFFSET, /* Bit 0 PWRON */
59 PWR_INTR_OFFSET, /* Bit 1 RPWRON */
60 PWR_INTR_OFFSET, /* Bit 2 BAT_VLOW */
61 RTC_INTR_OFFSET, /* Bit 3 RTC_ALARM */
62 RTC_INTR_OFFSET, /* Bit 4 RTC_PERIOD */
63 HOTDIE_INTR_OFFSET, /* Bit 5 HOT_DIE */
64 SMPSLDO_INTR_OFFSET, /* Bit 6 VXXX_SHORT */
65 SMPSLDO_INTR_OFFSET, /* Bit 7 VMMC_SHORT */
67 SMPSLDO_INTR_OFFSET, /* Bit 8 VUSIM_SHORT */
68 BATDETECT_INTR_OFFSET, /* Bit 9 BAT */
69 SIMDETECT_INTR_OFFSET, /* Bit 10 SIM */
70 MMCDETECT_INTR_OFFSET, /* Bit 11 MMC */
71 RSV_INTR_OFFSET, /* Bit 12 Reserved */
72 MADC_INTR_OFFSET, /* Bit 13 GPADC_RT_EOC */
73 MADC_INTR_OFFSET, /* Bit 14 GPADC_SW_EOC */
74 GASGAUGE_INTR_OFFSET, /* Bit 15 CC_AUTOCAL */
76 USBOTG_INTR_OFFSET, /* Bit 16 ID_WKUP */
77 USBOTG_INTR_OFFSET, /* Bit 17 VBUS_WKUP */
78 USBOTG_INTR_OFFSET, /* Bit 18 ID */
79 USB_PRES_INTR_OFFSET, /* Bit 19 VBUS */
80 CHARGER_INTR_OFFSET, /* Bit 20 CHRG_CTRL */
81 CHARGERFAULT_INTR_OFFSET, /* Bit 21 EXT_CHRG */
82 CHARGERFAULT_INTR_OFFSET, /* Bit 22 INT_CHRG */
83 RSV_INTR_OFFSET, /* Bit 23 Reserved */
85 /*----------------------------------------------------------------------*/
87 static unsigned twl6030_irq_base;
88 static int twl_irq;
89 static bool twl_irq_wake_enabled;
91 static struct completion irq_event;
92 static atomic_t twl6030_wakeirqs = ATOMIC_INIT(0);
94 static int twl6030_irq_pm_notifier(struct notifier_block *notifier,
95 unsigned long pm_event, void *unused)
97 int chained_wakeups;
99 switch (pm_event) {
100 case PM_SUSPEND_PREPARE:
101 chained_wakeups = atomic_read(&twl6030_wakeirqs);
103 if (chained_wakeups && !twl_irq_wake_enabled) {
104 if (enable_irq_wake(twl_irq))
105 pr_err("twl6030 IRQ wake enable failed\n");
106 else
107 twl_irq_wake_enabled = true;
108 } else if (!chained_wakeups && twl_irq_wake_enabled) {
109 disable_irq_wake(twl_irq);
110 twl_irq_wake_enabled = false;
113 disable_irq(twl_irq);
114 break;
116 case PM_POST_SUSPEND:
117 enable_irq(twl_irq);
118 break;
120 default:
121 break;
124 return NOTIFY_DONE;
127 static struct notifier_block twl6030_irq_pm_notifier_block = {
128 .notifier_call = twl6030_irq_pm_notifier,
132 * This thread processes interrupts reported by the Primary Interrupt Handler.
134 static int twl6030_irq_thread(void *data)
136 long irq = (long)data;
137 static unsigned i2c_errors;
138 static const unsigned max_i2c_errors = 100;
139 int ret;
141 while (!kthread_should_stop()) {
142 int i;
143 union {
144 u8 bytes[4];
145 u32 int_sts;
146 } sts;
148 /* Wait for IRQ, then read PIH irq status (also blocking) */
149 wait_for_completion_interruptible(&irq_event);
151 /* read INT_STS_A, B and C in one shot using a burst read */
152 ret = twl_i2c_read(TWL_MODULE_PIH, sts.bytes,
153 REG_INT_STS_A, 3);
154 if (ret) {
155 pr_warning("twl6030: I2C error %d reading PIH ISR\n",
156 ret);
157 if (++i2c_errors >= max_i2c_errors) {
158 printk(KERN_ERR "Maximum I2C error count"
159 " exceeded. Terminating %s.\n",
160 __func__);
161 break;
163 complete(&irq_event);
164 continue;
169 sts.bytes[3] = 0; /* Only 24 bits are valid*/
172 * Since VBUS status bit is not reliable for VBUS disconnect
173 * use CHARGER VBUS detection status bit instead.
175 if (sts.bytes[2] & 0x10)
176 sts.bytes[2] |= 0x08;
178 for (i = 0; sts.int_sts; sts.int_sts >>= 1, i++) {
179 local_irq_disable();
180 if (sts.int_sts & 0x1) {
181 int module_irq = twl6030_irq_base +
182 twl6030_interrupt_mapping[i];
183 generic_handle_irq(module_irq);
186 local_irq_enable();
188 ret = twl_i2c_write(TWL_MODULE_PIH, sts.bytes,
189 REG_INT_STS_A, 3); /* clear INT_STS_A */
190 if (ret)
191 pr_warning("twl6030: I2C error in clearing PIH ISR\n");
193 enable_irq(irq);
196 return 0;
200 * handle_twl6030_int() is the desc->handle method for the twl6030 interrupt.
201 * This is a chained interrupt, so there is no desc->action method for it.
202 * Now we need to query the interrupt controller in the twl6030 to determine
203 * which module is generating the interrupt request. However, we can't do i2c
204 * transactions in interrupt context, so we must defer that work to a kernel
205 * thread. All we do here is acknowledge and mask the interrupt and wakeup
206 * the kernel thread.
208 static irqreturn_t handle_twl6030_pih(int irq, void *devid)
210 disable_irq_nosync(irq);
211 complete(devid);
212 return IRQ_HANDLED;
215 /*----------------------------------------------------------------------*/
217 static inline void activate_irq(int irq)
219 #ifdef CONFIG_ARM
220 /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
221 * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
223 set_irq_flags(irq, IRQF_VALID);
224 #else
225 /* same effect on other architectures */
226 irq_set_noprobe(irq);
227 #endif
230 int twl6030_irq_set_wake(struct irq_data *d, unsigned int on)
232 if (on)
233 atomic_inc(&twl6030_wakeirqs);
234 else
235 atomic_dec(&twl6030_wakeirqs);
237 return 0;
240 /*----------------------------------------------------------------------*/
242 static unsigned twl6030_irq_next;
244 /*----------------------------------------------------------------------*/
245 int twl6030_interrupt_unmask(u8 bit_mask, u8 offset)
247 int ret;
248 u8 unmask_value;
249 ret = twl_i2c_read_u8(TWL_MODULE_PIH, &unmask_value,
250 REG_INT_STS_A + offset);
251 unmask_value &= (~(bit_mask));
252 ret |= twl_i2c_write_u8(TWL_MODULE_PIH, unmask_value,
253 REG_INT_STS_A + offset); /* unmask INT_MSK_A/B/C */
254 return ret;
256 EXPORT_SYMBOL(twl6030_interrupt_unmask);
258 int twl6030_interrupt_mask(u8 bit_mask, u8 offset)
260 int ret;
261 u8 mask_value;
262 ret = twl_i2c_read_u8(TWL_MODULE_PIH, &mask_value,
263 REG_INT_STS_A + offset);
264 mask_value |= (bit_mask);
265 ret |= twl_i2c_write_u8(TWL_MODULE_PIH, mask_value,
266 REG_INT_STS_A + offset); /* mask INT_MSK_A/B/C */
267 return ret;
269 EXPORT_SYMBOL(twl6030_interrupt_mask);
271 int twl6030_mmc_card_detect_config(void)
273 int ret;
274 u8 reg_val = 0;
276 /* Unmasking the Card detect Interrupt line for MMC1 from Phoenix */
277 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
278 REG_INT_MSK_LINE_B);
279 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
280 REG_INT_MSK_STS_B);
282 * Initially Configuring MMC_CTRL for receiving interrupts &
283 * Card status on TWL6030 for MMC1
285 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val, TWL6030_MMCCTRL);
286 if (ret < 0) {
287 pr_err("twl6030: Failed to read MMCCTRL, error %d\n", ret);
288 return ret;
290 reg_val &= ~VMMC_AUTO_OFF;
291 reg_val |= SW_FC;
292 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val, TWL6030_MMCCTRL);
293 if (ret < 0) {
294 pr_err("twl6030: Failed to write MMCCTRL, error %d\n", ret);
295 return ret;
298 /* Configuring PullUp-PullDown register */
299 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val,
300 TWL6030_CFG_INPUT_PUPD3);
301 if (ret < 0) {
302 pr_err("twl6030: Failed to read CFG_INPUT_PUPD3, error %d\n",
303 ret);
304 return ret;
306 reg_val &= ~(MMC_PU | MMC_PD);
307 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val,
308 TWL6030_CFG_INPUT_PUPD3);
309 if (ret < 0) {
310 pr_err("twl6030: Failed to write CFG_INPUT_PUPD3, error %d\n",
311 ret);
312 return ret;
314 return 0;
316 EXPORT_SYMBOL(twl6030_mmc_card_detect_config);
318 int twl6030_mmc_card_detect(struct device *dev, int slot)
320 int ret = -EIO;
321 u8 read_reg = 0;
322 struct platform_device *pdev = to_platform_device(dev);
324 if (pdev->id) {
325 /* TWL6030 provide's Card detect support for
326 * only MMC1 controller.
328 pr_err("Unknown MMC controller %d in %s\n", pdev->id, __func__);
329 return ret;
332 * BIT0 of MMC_CTRL on TWL6030 provides card status for MMC1
333 * 0 - Card not present ,1 - Card present
335 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &read_reg,
336 TWL6030_MMCCTRL);
337 if (ret >= 0)
338 ret = read_reg & STS_MMC;
339 return ret;
341 EXPORT_SYMBOL(twl6030_mmc_card_detect);
343 int twl6030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
346 int status = 0;
347 int i;
348 struct task_struct *task;
349 int ret;
350 u8 mask[4];
352 static struct irq_chip twl6030_irq_chip;
353 mask[1] = 0xFF;
354 mask[2] = 0xFF;
355 mask[3] = 0xFF;
356 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
357 REG_INT_MSK_LINE_A, 3); /* MASK ALL INT LINES */
358 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
359 REG_INT_MSK_STS_A, 3); /* MASK ALL INT STS */
360 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
361 REG_INT_STS_A, 3); /* clear INT_STS_A,B,C */
363 twl6030_irq_base = irq_base;
365 /* install an irq handler for each of the modules;
366 * clone dummy irq_chip since PIH can't *do* anything
368 twl6030_irq_chip = dummy_irq_chip;
369 twl6030_irq_chip.name = "twl6030";
370 twl6030_irq_chip.irq_set_type = NULL;
371 twl6030_irq_chip.irq_set_wake = twl6030_irq_set_wake;
373 for (i = irq_base; i < irq_end; i++) {
374 irq_set_chip_and_handler(i, &twl6030_irq_chip,
375 handle_simple_irq);
376 irq_set_chip_data(i, (void *)irq_num);
377 activate_irq(i);
380 twl6030_irq_next = i;
381 pr_info("twl6030: %s (irq %d) chaining IRQs %d..%d\n", "PIH",
382 irq_num, irq_base, twl6030_irq_next - 1);
384 /* install an irq handler to demultiplex the TWL6030 interrupt */
385 init_completion(&irq_event);
387 status = request_irq(irq_num, handle_twl6030_pih, 0,
388 "TWL6030-PIH", &irq_event);
389 if (status < 0) {
390 pr_err("twl6030: could not claim irq%d: %d\n", irq_num, status);
391 goto fail_irq;
394 task = kthread_run(twl6030_irq_thread, (void *)irq_num, "twl6030-irq");
395 if (IS_ERR(task)) {
396 pr_err("twl6030: could not create irq %d thread!\n", irq_num);
397 status = PTR_ERR(task);
398 goto fail_kthread;
401 twl_irq = irq_num;
402 register_pm_notifier(&twl6030_irq_pm_notifier_block);
403 return status;
405 fail_kthread:
406 free_irq(irq_num, &irq_event);
408 fail_irq:
409 for (i = irq_base; i < irq_end; i++)
410 irq_set_chip_and_handler(i, NULL, NULL);
411 return status;
414 int twl6030_exit_irq(void)
416 unregister_pm_notifier(&twl6030_irq_pm_notifier_block);
418 if (twl6030_irq_base) {
419 pr_err("twl6030: can't yet clean up IRQs?\n");
420 return -ENOSYS;
422 return 0;