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power: supply: sbs-battery: Add alert callback
[linux-2.6/btrfs-unstable.git] / sound / oss / msnd_pinnacle.c
blobf34ec01d22394d75987418564aa25785e3398929
1 /*********************************************************************
2 *
3 * Turtle Beach MultiSound Sound Card Driver for Linux
4 * Linux 2.0/2.2 Version
5 *
6 * msnd_pinnacle.c / msnd_classic.c
7 *
8 * -- If MSND_CLASSIC is defined:
9 *
10 * -> driver for Turtle Beach Classic/Monterey/Tahiti
11 *
12 * -- Else
13 *
14 * -> driver for Turtle Beach Pinnacle/Fiji
15 *
16 * Copyright (C) 1998 Andrew Veliath
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 *
32 * 12-3-2000 Modified IO port validation Steve Sycamore
33 *
34 ********************************************************************/
35
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/types.h>
39 #include <linux/delay.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
42 #include <linux/mutex.h>
43 #include <linux/gfp.h>
44 #include <linux/sched/signal.h>
45
46 #include <asm/irq.h>
47 #include <asm/io.h>
48 #include "sound_config.h"
49 #include "sound_firmware.h"
50 #ifdef MSND_CLASSIC
51 # ifndef __alpha__
52 # define SLOWIO
53 # endif
54 #endif
55 #include "msnd.h"
56 #ifdef MSND_CLASSIC
57 # ifdef CONFIG_MSNDCLAS_HAVE_BOOT
58 # define HAVE_DSPCODEH
59 # endif
60 # include "msnd_classic.h"
61 # define LOGNAME "msnd_classic"
62 #else
63 # ifdef CONFIG_MSNDPIN_HAVE_BOOT
64 # define HAVE_DSPCODEH
65 # endif
66 # include "msnd_pinnacle.h"
67 # define LOGNAME "msnd_pinnacle"
68 #endif
69
70 #ifndef CONFIG_MSND_WRITE_NDELAY
71 # define CONFIG_MSND_WRITE_NDELAY 1
72 #endif
73
74 #define get_play_delay_jiffies(size) ((size) * HZ * \
75 dev.play_sample_size / 8 / \
76 dev.play_sample_rate / \
77 dev.play_channels)
78
79 #define get_rec_delay_jiffies(size) ((size) * HZ * \
80 dev.rec_sample_size / 8 / \
81 dev.rec_sample_rate / \
82 dev.rec_channels)
83
84 static DEFINE_MUTEX(msnd_pinnacle_mutex);
85 static multisound_dev_t dev;
86
87 #ifndef HAVE_DSPCODEH
88 static char *dspini, *permini;
89 static int sizeof_dspini, sizeof_permini;
90 #endif
91
92 static int dsp_full_reset(void);
93 static void dsp_write_flush(void);
94
95 static __inline__ int chk_send_dsp_cmd(multisound_dev_t *dev, register BYTE cmd)
96 {
97 if (msnd_send_dsp_cmd(dev, cmd) == 0)
98 return 0;
99 dsp_full_reset();
100 return msnd_send_dsp_cmd(dev, cmd);
101 }
102
103 static void reset_play_queue(void)
104 {
105 int n;
106 LPDAQD lpDAQ;
107
108 dev.last_playbank = -1;
109 writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DAPQ + JQS_wHead);
110 writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DAPQ + JQS_wTail);
111
112 for (n = 0, lpDAQ = dev.base + DAPQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) {
113 writew(PCTODSP_BASED((DWORD)(DAP_BUFF_SIZE * n)), lpDAQ + DAQDS_wStart);
114 writew(0, lpDAQ + DAQDS_wSize);
115 writew(1, lpDAQ + DAQDS_wFormat);
116 writew(dev.play_sample_size, lpDAQ + DAQDS_wSampleSize);
117 writew(dev.play_channels, lpDAQ + DAQDS_wChannels);
118 writew(dev.play_sample_rate, lpDAQ + DAQDS_wSampleRate);
119 writew(HIMT_PLAY_DONE * 0x100 + n, lpDAQ + DAQDS_wIntMsg);
120 writew(n, lpDAQ + DAQDS_wFlags);
121 }
122 }
123
124 static void reset_record_queue(void)
125 {
126 int n;
127 LPDAQD lpDAQ;
128 unsigned long flags;
129
130 dev.last_recbank = 2;
131 writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DARQ + JQS_wHead);
132 writew(PCTODSP_OFFSET(dev.last_recbank * DAQDS__size), dev.DARQ + JQS_wTail);
133
134 /* Critical section: bank 1 access */
135 spin_lock_irqsave(&dev.lock, flags);
136 msnd_outb(HPBLKSEL_1, dev.io + HP_BLKS);
137 memset_io(dev.base, 0, DAR_BUFF_SIZE * 3);
138 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS);
139 spin_unlock_irqrestore(&dev.lock, flags);
140
141 for (n = 0, lpDAQ = dev.base + DARQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) {
142 writew(PCTODSP_BASED((DWORD)(DAR_BUFF_SIZE * n)) + 0x4000, lpDAQ + DAQDS_wStart);
143 writew(DAR_BUFF_SIZE, lpDAQ + DAQDS_wSize);
144 writew(1, lpDAQ + DAQDS_wFormat);
145 writew(dev.rec_sample_size, lpDAQ + DAQDS_wSampleSize);
146 writew(dev.rec_channels, lpDAQ + DAQDS_wChannels);
147 writew(dev.rec_sample_rate, lpDAQ + DAQDS_wSampleRate);
148 writew(HIMT_RECORD_DONE * 0x100 + n, lpDAQ + DAQDS_wIntMsg);
149 writew(n, lpDAQ + DAQDS_wFlags);
150 }
151 }
152
153 static void reset_queues(void)
154 {
155 if (dev.mode & FMODE_WRITE) {
156 msnd_fifo_make_empty(&dev.DAPF);
157 reset_play_queue();
158 }
159 if (dev.mode & FMODE_READ) {
160 msnd_fifo_make_empty(&dev.DARF);
161 reset_record_queue();
162 }
163 }
164
165 static int dsp_set_format(struct file *file, int val)
166 {
167 int data, i;
168 LPDAQD lpDAQ, lpDARQ;
169
170 lpDAQ = dev.base + DAPQ_DATA_BUFF;
171 lpDARQ = dev.base + DARQ_DATA_BUFF;
172
173 switch (val) {
174 case AFMT_U8:
175 case AFMT_S16_LE:
176 data = val;
177 break;
178 default:
179 data = DEFSAMPLESIZE;
180 break;
181 }
182
183 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
184 if (file->f_mode & FMODE_WRITE)
185 writew(data, lpDAQ + DAQDS_wSampleSize);
186 if (file->f_mode & FMODE_READ)
187 writew(data, lpDARQ + DAQDS_wSampleSize);
188 }
189 if (file->f_mode & FMODE_WRITE)
190 dev.play_sample_size = data;
191 if (file->f_mode & FMODE_READ)
192 dev.rec_sample_size = data;
193
194 return data;
195 }
196
197 static int dsp_get_frag_size(void)
198 {
199 int size;
200 size = dev.fifosize / 4;
201 if (size > 32 * 1024)
202 size = 32 * 1024;
203 return size;
204 }
205
206 static int dsp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
207 {
208 int val, i, data, tmp;
209 LPDAQD lpDAQ, lpDARQ;
210 audio_buf_info abinfo;
211 unsigned long flags;
212 int __user *p = (int __user *)arg;
213
214 lpDAQ = dev.base + DAPQ_DATA_BUFF;
215 lpDARQ = dev.base + DARQ_DATA_BUFF;
216
217 switch (cmd) {
218 case SNDCTL_DSP_SUBDIVIDE:
219 case SNDCTL_DSP_SETFRAGMENT:
220 case SNDCTL_DSP_SETDUPLEX:
221 case SNDCTL_DSP_POST:
222 return 0;
223
224 case SNDCTL_DSP_GETIPTR:
225 case SNDCTL_DSP_GETOPTR:
226 case SNDCTL_DSP_MAPINBUF:
227 case SNDCTL_DSP_MAPOUTBUF:
228 return -EINVAL;
229
230 case SNDCTL_DSP_GETOSPACE:
231 if (!(file->f_mode & FMODE_WRITE))
232 return -EINVAL;
233 spin_lock_irqsave(&dev.lock, flags);
234 abinfo.fragsize = dsp_get_frag_size();
235 abinfo.bytes = dev.DAPF.n - dev.DAPF.len;
236 abinfo.fragstotal = dev.DAPF.n / abinfo.fragsize;
237 abinfo.fragments = abinfo.bytes / abinfo.fragsize;
238 spin_unlock_irqrestore(&dev.lock, flags);
239 return copy_to_user((void __user *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
240
241 case SNDCTL_DSP_GETISPACE:
242 if (!(file->f_mode & FMODE_READ))
243 return -EINVAL;
244 spin_lock_irqsave(&dev.lock, flags);
245 abinfo.fragsize = dsp_get_frag_size();
246 abinfo.bytes = dev.DARF.n - dev.DARF.len;
247 abinfo.fragstotal = dev.DARF.n / abinfo.fragsize;
248 abinfo.fragments = abinfo.bytes / abinfo.fragsize;
249 spin_unlock_irqrestore(&dev.lock, flags);
250 return copy_to_user((void __user *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
251
252 case SNDCTL_DSP_RESET:
253 dev.nresets = 0;
254 reset_queues();
255 return 0;
256
257 case SNDCTL_DSP_SYNC:
258 dsp_write_flush();
259 return 0;
260
261 case SNDCTL_DSP_GETBLKSIZE:
262 tmp = dsp_get_frag_size();
263 if (put_user(tmp, p))
264 return -EFAULT;
265 return 0;
266
267 case SNDCTL_DSP_GETFMTS:
268 val = AFMT_S16_LE | AFMT_U8;
269 if (put_user(val, p))
270 return -EFAULT;
271 return 0;
272
273 case SNDCTL_DSP_SETFMT:
274 if (get_user(val, p))
275 return -EFAULT;
276
277 if (file->f_mode & FMODE_WRITE)
278 data = val == AFMT_QUERY
279 ? dev.play_sample_size
280 : dsp_set_format(file, val);
281 else
282 data = val == AFMT_QUERY
283 ? dev.rec_sample_size
284 : dsp_set_format(file, val);
285
286 if (put_user(data, p))
287 return -EFAULT;
288 return 0;
289
290 case SNDCTL_DSP_NONBLOCK:
291 if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags) &&
292 file->f_mode & FMODE_WRITE)
293 dev.play_ndelay = 1;
294 if (file->f_mode & FMODE_READ)
295 dev.rec_ndelay = 1;
296 return 0;
297
298 case SNDCTL_DSP_GETCAPS:
299 val = DSP_CAP_DUPLEX | DSP_CAP_BATCH;
300 if (put_user(val, p))
301 return -EFAULT;
302 return 0;
303
304 case SNDCTL_DSP_SPEED:
305 if (get_user(val, p))
306 return -EFAULT;
307
308 if (val < 8000)
309 val = 8000;
310
311 if (val > 48000)
312 val = 48000;
313
314 data = val;
315
316 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
317 if (file->f_mode & FMODE_WRITE)
318 writew(data, lpDAQ + DAQDS_wSampleRate);
319 if (file->f_mode & FMODE_READ)
320 writew(data, lpDARQ + DAQDS_wSampleRate);
321 }
322 if (file->f_mode & FMODE_WRITE)
323 dev.play_sample_rate = data;
324 if (file->f_mode & FMODE_READ)
325 dev.rec_sample_rate = data;
326
327 if (put_user(data, p))
328 return -EFAULT;
329 return 0;
330
331 case SNDCTL_DSP_CHANNELS:
332 case SNDCTL_DSP_STEREO:
333 if (get_user(val, p))
334 return -EFAULT;
335
336 if (cmd == SNDCTL_DSP_CHANNELS) {
337 switch (val) {
338 case 1:
339 case 2:
340 data = val;
341 break;
342 default:
343 val = data = 2;
344 break;
345 }
346 } else {
347 switch (val) {
348 case 0:
349 data = 1;
350 break;
351 default:
352 val = 1;
353 case 1:
354 data = 2;
355 break;
356 }
357 }
358
359 for (i = 0; i < 3; ++i, lpDAQ += DAQDS__size, lpDARQ += DAQDS__size) {
360 if (file->f_mode & FMODE_WRITE)
361 writew(data, lpDAQ + DAQDS_wChannels);
362 if (file->f_mode & FMODE_READ)
363 writew(data, lpDARQ + DAQDS_wChannels);
364 }
365 if (file->f_mode & FMODE_WRITE)
366 dev.play_channels = data;
367 if (file->f_mode & FMODE_READ)
368 dev.rec_channels = data;
369
370 if (put_user(val, p))
371 return -EFAULT;
372 return 0;
373 }
374
375 return -EINVAL;
376 }
377
378 static int mixer_get(int d)
379 {
380 if (d > 31)
381 return -EINVAL;
382
383 switch (d) {
384 case SOUND_MIXER_VOLUME:
385 case SOUND_MIXER_PCM:
386 case SOUND_MIXER_LINE:
387 case SOUND_MIXER_IMIX:
388 case SOUND_MIXER_LINE1:
389 #ifndef MSND_CLASSIC
390 case SOUND_MIXER_MIC:
391 case SOUND_MIXER_SYNTH:
392 #endif
393 return (dev.left_levels[d] >> 8) * 100 / 0xff |
394 (((dev.right_levels[d] >> 8) * 100 / 0xff) << 8);
395 default:
396 return 0;
397 }
398 }
399
400 #define update_volm(a,b) \
401 writew((dev.left_levels[a] >> 1) * \
402 readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff, \
403 dev.SMA + SMA_##b##Left); \
404 writew((dev.right_levels[a] >> 1) * \
405 readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff, \
406 dev.SMA + SMA_##b##Right);
407
408 #define update_potm(d,s,ar) \
409 writeb((dev.left_levels[d] >> 8) * \
410 readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff, \
411 dev.SMA + SMA_##s##Left); \
412 writeb((dev.right_levels[d] >> 8) * \
413 readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff, \
414 dev.SMA + SMA_##s##Right); \
415 if (msnd_send_word(&dev, 0, 0, ar) == 0) \
416 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
417
418 #define update_pot(d,s,ar) \
419 writeb(dev.left_levels[d] >> 8, \
420 dev.SMA + SMA_##s##Left); \
421 writeb(dev.right_levels[d] >> 8, \
422 dev.SMA + SMA_##s##Right); \
423 if (msnd_send_word(&dev, 0, 0, ar) == 0) \
424 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
425
426 static int mixer_set(int d, int value)
427 {
428 int left = value & 0x000000ff;
429 int right = (value & 0x0000ff00) >> 8;
430 int bLeft, bRight;
431 int wLeft, wRight;
432 int updatemaster = 0;
433
434 if (d > 31)
435 return -EINVAL;
436
437 bLeft = left * 0xff / 100;
438 wLeft = left * 0xffff / 100;
439
440 bRight = right * 0xff / 100;
441 wRight = right * 0xffff / 100;
442
443 dev.left_levels[d] = wLeft;
444 dev.right_levels[d] = wRight;
445
446 switch (d) {
447 /* master volume unscaled controls */
448 case SOUND_MIXER_LINE: /* line pot control */
449 /* scaled by IMIX in digital mix */
450 writeb(bLeft, dev.SMA + SMA_bInPotPosLeft);
451 writeb(bRight, dev.SMA + SMA_bInPotPosRight);
452 if (msnd_send_word(&dev, 0, 0, HDEXAR_IN_SET_POTS) == 0)
453 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
454 break;
455 #ifndef MSND_CLASSIC
456 case SOUND_MIXER_MIC: /* mic pot control */
457 /* scaled by IMIX in digital mix */
458 writeb(bLeft, dev.SMA + SMA_bMicPotPosLeft);
459 writeb(bRight, dev.SMA + SMA_bMicPotPosRight);
460 if (msnd_send_word(&dev, 0, 0, HDEXAR_MIC_SET_POTS) == 0)
461 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
462 break;
463 #endif
464 case SOUND_MIXER_VOLUME: /* master volume */
465 writew(wLeft, dev.SMA + SMA_wCurrMastVolLeft);
466 writew(wRight, dev.SMA + SMA_wCurrMastVolRight);
467 /* fall through */
468
469 case SOUND_MIXER_LINE1: /* aux pot control */
470 /* scaled by master volume */
471 /* fall through */
472
473 /* digital controls */
474 case SOUND_MIXER_SYNTH: /* synth vol (dsp mix) */
475 case SOUND_MIXER_PCM: /* pcm vol (dsp mix) */
476 case SOUND_MIXER_IMIX: /* input monitor (dsp mix) */
477 /* scaled by master volume */
478 updatemaster = 1;
479 break;
480
481 default:
482 return 0;
483 }
484
485 if (updatemaster) {
486 /* update master volume scaled controls */
487 update_volm(SOUND_MIXER_PCM, wCurrPlayVol);
488 update_volm(SOUND_MIXER_IMIX, wCurrInVol);
489 #ifndef MSND_CLASSIC
490 update_volm(SOUND_MIXER_SYNTH, wCurrMHdrVol);
491 #endif
492 update_potm(SOUND_MIXER_LINE1, bAuxPotPos, HDEXAR_AUX_SET_POTS);
493 }
494
495 return mixer_get(d);
496 }
497
498 static void mixer_setup(void)
499 {
500 update_pot(SOUND_MIXER_LINE, bInPotPos, HDEXAR_IN_SET_POTS);
501 update_potm(SOUND_MIXER_LINE1, bAuxPotPos, HDEXAR_AUX_SET_POTS);
502 update_volm(SOUND_MIXER_PCM, wCurrPlayVol);
503 update_volm(SOUND_MIXER_IMIX, wCurrInVol);
504 #ifndef MSND_CLASSIC
505 update_pot(SOUND_MIXER_MIC, bMicPotPos, HDEXAR_MIC_SET_POTS);
506 update_volm(SOUND_MIXER_SYNTH, wCurrMHdrVol);
507 #endif
508 }
509
510 static unsigned long set_recsrc(unsigned long recsrc)
511 {
512 if (dev.recsrc == recsrc)
513 return dev.recsrc;
514 #ifdef HAVE_NORECSRC
515 else if (recsrc == 0)
516 dev.recsrc = 0;
517 #endif
518 else
519 dev.recsrc ^= recsrc;
520
521 #ifndef MSND_CLASSIC
522 if (dev.recsrc & SOUND_MASK_IMIX) {
523 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0)
524 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
525 }
526 else if (dev.recsrc & SOUND_MASK_SYNTH) {
527 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_SYNTH_IN) == 0)
528 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
529 }
530 else if ((dev.recsrc & SOUND_MASK_DIGITAL1) && test_bit(F_HAVEDIGITAL, &dev.flags)) {
531 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_DAT_IN) == 0)
532 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
533 }
534 else {
535 #ifdef HAVE_NORECSRC
536 /* Select no input (?) */
537 dev.recsrc = 0;
538 #else
539 dev.recsrc = SOUND_MASK_IMIX;
540 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0)
541 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ);
542 #endif
543 }
544 #endif /* MSND_CLASSIC */
545
546 return dev.recsrc;
547 }
548
549 static unsigned long force_recsrc(unsigned long recsrc)
550 {
551 dev.recsrc = 0;
552 return set_recsrc(recsrc);
553 }
554
555 #define set_mixer_info() \
556 memset(&info, 0, sizeof(info)); \
557 strlcpy(info.id, "MSNDMIXER", sizeof(info.id)); \
558 strlcpy(info.name, "MultiSound Mixer", sizeof(info.name));
559
560 static int mixer_ioctl(unsigned int cmd, unsigned long arg)
561 {
562 if (cmd == SOUND_MIXER_INFO) {
563 mixer_info info;
564 set_mixer_info();
565 info.modify_counter = dev.mixer_mod_count;
566 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
567 return -EFAULT;
568 return 0;
569 } else if (cmd == SOUND_OLD_MIXER_INFO) {
570 _old_mixer_info info;
571 set_mixer_info();
572 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
573 return -EFAULT;
574 return 0;
575 } else if (cmd == SOUND_MIXER_PRIVATE1) {
576 dev.nresets = 0;
577 dsp_full_reset();
578 return 0;
579 } else if (((cmd >> 8) & 0xff) == 'M') {
580 int val = 0;
581
582 if (_SIOC_DIR(cmd) & _SIOC_WRITE) {
583 switch (cmd & 0xff) {
584 case SOUND_MIXER_RECSRC:
585 if (get_user(val, (int __user *)arg))
586 return -EFAULT;
587 val = set_recsrc(val);
588 break;
589
590 default:
591 if (get_user(val, (int __user *)arg))
592 return -EFAULT;
593 val = mixer_set(cmd & 0xff, val);
594 break;
595 }
596 ++dev.mixer_mod_count;
597 return put_user(val, (int __user *)arg);
598 } else {
599 switch (cmd & 0xff) {
600 case SOUND_MIXER_RECSRC:
601 val = dev.recsrc;
602 break;
603
604 case SOUND_MIXER_DEVMASK:
605 case SOUND_MIXER_STEREODEVS:
606 val = SOUND_MASK_PCM |
607 SOUND_MASK_LINE |
608 SOUND_MASK_IMIX |
609 SOUND_MASK_LINE1 |
610 #ifndef MSND_CLASSIC
611 SOUND_MASK_MIC |
612 SOUND_MASK_SYNTH |
613 #endif
614 SOUND_MASK_VOLUME;
615 break;
616
617 case SOUND_MIXER_RECMASK:
618 #ifdef MSND_CLASSIC
619 val = 0;
620 #else
621 val = SOUND_MASK_IMIX |
622 SOUND_MASK_SYNTH;
623 if (test_bit(F_HAVEDIGITAL, &dev.flags))
624 val |= SOUND_MASK_DIGITAL1;
625 #endif
626 break;
627
628 case SOUND_MIXER_CAPS:
629 val = SOUND_CAP_EXCL_INPUT;
630 break;
631
632 default:
633 if ((val = mixer_get(cmd & 0xff)) < 0)
634 return -EINVAL;
635 break;
636 }
637 }
638
639 return put_user(val, (int __user *)arg);
640 }
641
642 return -EINVAL;
643 }
644
645 static long dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
646 {
647 int minor = iminor(file_inode(file));
648 int ret;
649
650 if (cmd == OSS_GETVERSION) {
651 int sound_version = SOUND_VERSION;
652 return put_user(sound_version, (int __user *)arg);
653 }
654
655 ret = -EINVAL;
656
657 mutex_lock(&msnd_pinnacle_mutex);
658 if (minor == dev.dsp_minor)
659 ret = dsp_ioctl(file, cmd, arg);
660 else if (minor == dev.mixer_minor)
661 ret = mixer_ioctl(cmd, arg);
662 mutex_unlock(&msnd_pinnacle_mutex);
663
664 return ret;
665 }
666
667 static void dsp_write_flush(void)
668 {
669 int timeout = get_play_delay_jiffies(dev.DAPF.len);
670
671 if (!(dev.mode & FMODE_WRITE) || !test_bit(F_WRITING, &dev.flags))
672 return;
673 set_bit(F_WRITEFLUSH, &dev.flags);
674 wait_event_interruptible_timeout(
675 dev.writeflush,
676 !test_bit(F_WRITEFLUSH, &dev.flags),
677 timeout);
678 clear_bit(F_WRITEFLUSH, &dev.flags);
679 if (!signal_pending(current)) {
680 __set_current_state(TASK_INTERRUPTIBLE);
681 schedule_timeout(get_play_delay_jiffies(DAP_BUFF_SIZE));
682 }
683 clear_bit(F_WRITING, &dev.flags);
684 }
685
686 static void dsp_halt(struct file *file)
687 {
688 if ((file ? file->f_mode : dev.mode) & FMODE_READ) {
689 clear_bit(F_READING, &dev.flags);
690 chk_send_dsp_cmd(&dev, HDEX_RECORD_STOP);
691 msnd_disable_irq(&dev);
692 if (file) {
693 printk(KERN_DEBUG LOGNAME ": Stopping read for %p\n", file);
694 dev.mode &= ~FMODE_READ;
695 }
696 clear_bit(F_AUDIO_READ_INUSE, &dev.flags);
697 }
698 if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) {
699 if (test_bit(F_WRITING, &dev.flags)) {
700 dsp_write_flush();
701 chk_send_dsp_cmd(&dev, HDEX_PLAY_STOP);
702 }
703 msnd_disable_irq(&dev);
704 if (file) {
705 printk(KERN_DEBUG LOGNAME ": Stopping write for %p\n", file);
706 dev.mode &= ~FMODE_WRITE;
707 }
708 clear_bit(F_AUDIO_WRITE_INUSE, &dev.flags);
709 }
710 }
711
712 static int dsp_release(struct file *file)
713 {
714 dsp_halt(file);
715 return 0;
716 }
717
718 static int dsp_open(struct file *file)
719 {
720 if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) {
721 set_bit(F_AUDIO_WRITE_INUSE, &dev.flags);
722 clear_bit(F_WRITING, &dev.flags);
723 msnd_fifo_make_empty(&dev.DAPF);
724 reset_play_queue();
725 if (file) {
726 printk(KERN_DEBUG LOGNAME ": Starting write for %p\n", file);
727 dev.mode |= FMODE_WRITE;
728 }
729 msnd_enable_irq(&dev);
730 }
731 if ((file ? file->f_mode : dev.mode) & FMODE_READ) {
732 set_bit(F_AUDIO_READ_INUSE, &dev.flags);
733 clear_bit(F_READING, &dev.flags);
734 msnd_fifo_make_empty(&dev.DARF);
735 reset_record_queue();
736 if (file) {
737 printk(KERN_DEBUG LOGNAME ": Starting read for %p\n", file);
738 dev.mode |= FMODE_READ;
739 }
740 msnd_enable_irq(&dev);
741 }
742 return 0;
743 }
744
745 static void set_default_play_audio_parameters(void)
746 {
747 dev.play_sample_size = DEFSAMPLESIZE;
748 dev.play_sample_rate = DEFSAMPLERATE;
749 dev.play_channels = DEFCHANNELS;
750 }
751
752 static void set_default_rec_audio_parameters(void)
753 {
754 dev.rec_sample_size = DEFSAMPLESIZE;
755 dev.rec_sample_rate = DEFSAMPLERATE;
756 dev.rec_channels = DEFCHANNELS;
757 }
758
759 static void set_default_audio_parameters(void)
760 {
761 set_default_play_audio_parameters();
762 set_default_rec_audio_parameters();
763 }
764
765 static int dev_open(struct inode *inode, struct file *file)
766 {
767 int minor = iminor(inode);
768 int err = 0;
769
770 mutex_lock(&msnd_pinnacle_mutex);
771 if (minor == dev.dsp_minor) {
772 if ((file->f_mode & FMODE_WRITE &&
773 test_bit(F_AUDIO_WRITE_INUSE, &dev.flags)) ||
774 (file->f_mode & FMODE_READ &&
775 test_bit(F_AUDIO_READ_INUSE, &dev.flags))) {
776 err = -EBUSY;
777 goto out;
778 }
779
780 if ((err = dsp_open(file)) >= 0) {
781 dev.nresets = 0;
782 if (file->f_mode & FMODE_WRITE) {
783 set_default_play_audio_parameters();
784 if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags))
785 dev.play_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0;
786 else
787 dev.play_ndelay = 0;
788 }
789 if (file->f_mode & FMODE_READ) {
790 set_default_rec_audio_parameters();
791 dev.rec_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0;
792 }
793 }
794 }
795 else if (minor == dev.mixer_minor) {
796 /* nothing */
797 } else
798 err = -EINVAL;
799 out:
800 mutex_unlock(&msnd_pinnacle_mutex);
801 return err;
802 }
803
804 static int dev_release(struct inode *inode, struct file *file)
805 {
806 int minor = iminor(inode);
807 int err = 0;
808
809 mutex_lock(&msnd_pinnacle_mutex);
810 if (minor == dev.dsp_minor)
811 err = dsp_release(file);
812 else if (minor == dev.mixer_minor) {
813 /* nothing */
814 } else
815 err = -EINVAL;
816 mutex_unlock(&msnd_pinnacle_mutex);
817 return err;
818 }
819
820 static __inline__ int pack_DARQ_to_DARF(register int bank)
821 {
822 register int size, timeout = 3;
823 register WORD wTmp;
824 LPDAQD DAQD;
825
826 /* Increment the tail and check for queue wrap */
827 wTmp = readw(dev.DARQ + JQS_wTail) + PCTODSP_OFFSET(DAQDS__size);
828 if (wTmp > readw(dev.DARQ + JQS_wSize))
829 wTmp = 0;
830 while (wTmp == readw(dev.DARQ + JQS_wHead) && timeout--)
831 udelay(1);
832 writew(wTmp, dev.DARQ + JQS_wTail);
833
834 /* Get our digital audio queue struct */
835 DAQD = bank * DAQDS__size + dev.base + DARQ_DATA_BUFF;
836
837 /* Get length of data */
838 size = readw(DAQD + DAQDS_wSize);
839
840 /* Read data from the head (unprotected bank 1 access okay
841 since this is only called inside an interrupt) */
842 msnd_outb(HPBLKSEL_1, dev.io + HP_BLKS);
843 msnd_fifo_write_io(
844 &dev.DARF,
845 dev.base + bank * DAR_BUFF_SIZE,
846 size);
847 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS);
848
849 return 1;
850 }
851
852 static __inline__ int pack_DAPF_to_DAPQ(register int start)
853 {
854 register WORD DAPQ_tail;
855 register int protect = start, nbanks = 0;
856 LPDAQD DAQD;
857
858 DAPQ_tail = readw(dev.DAPQ + JQS_wTail);
859 while (DAPQ_tail != readw(dev.DAPQ + JQS_wHead) || start) {
860 register int bank_num = DAPQ_tail / PCTODSP_OFFSET(DAQDS__size);
861 register int n;
862 unsigned long flags;
863
864 /* Write the data to the new tail */
865 if (protect) {
866 /* Critical section: protect fifo in non-interrupt */
867 spin_lock_irqsave(&dev.lock, flags);
868 n = msnd_fifo_read_io(
869 &dev.DAPF,
870 dev.base + bank_num * DAP_BUFF_SIZE,
871 DAP_BUFF_SIZE);
872 spin_unlock_irqrestore(&dev.lock, flags);
873 } else {
874 n = msnd_fifo_read_io(
875 &dev.DAPF,
876 dev.base + bank_num * DAP_BUFF_SIZE,
877 DAP_BUFF_SIZE);
878 }
879 if (!n)
880 break;
881
882 if (start)
883 start = 0;
884
885 /* Get our digital audio queue struct */
886 DAQD = bank_num * DAQDS__size + dev.base + DAPQ_DATA_BUFF;
887
888 /* Write size of this bank */
889 writew(n, DAQD + DAQDS_wSize);
890 ++nbanks;
891
892 /* Then advance the tail */
893 DAPQ_tail = (++bank_num % 3) * PCTODSP_OFFSET(DAQDS__size);
894 writew(DAPQ_tail, dev.DAPQ + JQS_wTail);
895 /* Tell the DSP to play the bank */
896 msnd_send_dsp_cmd(&dev, HDEX_PLAY_START);
897 }
898 return nbanks;
899 }
900
901 static int dsp_read(char __user *buf, size_t len)
902 {
903 int count = len;
904 char *page = (char *)__get_free_page(GFP_KERNEL);
905 int timeout = get_rec_delay_jiffies(DAR_BUFF_SIZE);
906
907 if (!page)
908 return -ENOMEM;
909
910 while (count > 0) {
911 int n, k;
912 unsigned long flags;
913
914 k = PAGE_SIZE;
915 if (k > count)
916 k = count;
917
918 /* Critical section: protect fifo in non-interrupt */
919 spin_lock_irqsave(&dev.lock, flags);
920 n = msnd_fifo_read(&dev.DARF, page, k);
921 spin_unlock_irqrestore(&dev.lock, flags);
922 if (copy_to_user(buf, page, n)) {
923 free_page((unsigned long)page);
924 return -EFAULT;
925 }
926 buf += n;
927 count -= n;
928
929 if (n == k && count)
930 continue;
931
932 if (!test_bit(F_READING, &dev.flags) && dev.mode & FMODE_READ) {
933 dev.last_recbank = -1;
934 if (chk_send_dsp_cmd(&dev, HDEX_RECORD_START) == 0)
935 set_bit(F_READING, &dev.flags);
936 }
937
938 if (dev.rec_ndelay) {
939 free_page((unsigned long)page);
940 return count == len ? -EAGAIN : len - count;
941 }
942
943 if (count > 0) {
944 set_bit(F_READBLOCK, &dev.flags);
945 if (wait_event_interruptible_timeout(
946 dev.readblock,
947 test_bit(F_READBLOCK, &dev.flags),
948 timeout) <= 0)
949 clear_bit(F_READING, &dev.flags);
950 if (signal_pending(current)) {
951 free_page((unsigned long)page);
952 return -EINTR;
953 }
954 }
955 }
956 free_page((unsigned long)page);
957 return len - count;
958 }
959
960 static int dsp_write(const char __user *buf, size_t len)
961 {
962 int count = len;
963 char *page = (char *)__get_free_page(GFP_KERNEL);
964 int timeout = get_play_delay_jiffies(DAP_BUFF_SIZE);
965
966 if (!page)
967 return -ENOMEM;
968
969 while (count > 0) {
970 int n, k;
971 unsigned long flags;
972
973 k = PAGE_SIZE;
974 if (k > count)
975 k = count;
976
977 if (copy_from_user(page, buf, k)) {
978 free_page((unsigned long)page);
979 return -EFAULT;
980 }
981
982 /* Critical section: protect fifo in non-interrupt */
983 spin_lock_irqsave(&dev.lock, flags);
984 n = msnd_fifo_write(&dev.DAPF, page, k);
985 spin_unlock_irqrestore(&dev.lock, flags);
986 buf += n;
987 count -= n;
988
989 if (count && n == k)
990 continue;
991
992 if (!test_bit(F_WRITING, &dev.flags) && (dev.mode & FMODE_WRITE)) {
993 dev.last_playbank = -1;
994 if (pack_DAPF_to_DAPQ(1) > 0)
995 set_bit(F_WRITING, &dev.flags);
996 }
997
998 if (dev.play_ndelay) {
999 free_page((unsigned long)page);
1000 return count == len ? -EAGAIN : len - count;
1001 }
1002
1003 if (count > 0) {
1004 set_bit(F_WRITEBLOCK, &dev.flags);
1005 wait_event_interruptible_timeout(
1006 dev.writeblock,
1007 test_bit(F_WRITEBLOCK, &dev.flags),
1008 timeout);
1009 if (signal_pending(current)) {
1010 free_page((unsigned long)page);
1011 return -EINTR;
1012 }
1013 }
1014 }
1015
1016 free_page((unsigned long)page);
1017 return len - count;
1018 }
1019
1020 static ssize_t dev_read(struct file *file, char __user *buf, size_t count, loff_t *off)
1021 {
1022 int minor = iminor(file_inode(file));
1023 if (minor == dev.dsp_minor)
1024 return dsp_read(buf, count);
1025 else
1026 return -EINVAL;
1027 }
1028
1029 static ssize_t dev_write(struct file *file, const char __user *buf, size_t count, loff_t *off)
1030 {
1031 int minor = iminor(file_inode(file));
1032 if (minor == dev.dsp_minor)
1033 return dsp_write(buf, count);
1034 else
1035 return -EINVAL;
1036 }
1037
1038 static __inline__ void eval_dsp_msg(register WORD wMessage)
1039 {
1040 switch (HIBYTE(wMessage)) {
1041 case HIMT_PLAY_DONE:
1042 if (dev.last_playbank == LOBYTE(wMessage) || !test_bit(F_WRITING, &dev.flags))
1043 break;
1044 dev.last_playbank = LOBYTE(wMessage);
1045
1046 if (pack_DAPF_to_DAPQ(0) <= 0) {
1047 if (!test_bit(F_WRITEBLOCK, &dev.flags)) {
1048 if (test_and_clear_bit(F_WRITEFLUSH, &dev.flags))
1049 wake_up_interruptible(&dev.writeflush);
1050 }
1051 clear_bit(F_WRITING, &dev.flags);
1052 }
1053
1054 if (test_and_clear_bit(F_WRITEBLOCK, &dev.flags))
1055 wake_up_interruptible(&dev.writeblock);
1056 break;
1057
1058 case HIMT_RECORD_DONE:
1059 if (dev.last_recbank == LOBYTE(wMessage))
1060 break;
1061 dev.last_recbank = LOBYTE(wMessage);
1062
1063 pack_DARQ_to_DARF(dev.last_recbank);
1064
1065 if (test_and_clear_bit(F_READBLOCK, &dev.flags))
1066 wake_up_interruptible(&dev.readblock);
1067 break;
1068
1069 case HIMT_DSP:
1070 switch (LOBYTE(wMessage)) {
1071 #ifndef MSND_CLASSIC
1072 case HIDSP_PLAY_UNDER:
1073 #endif
1074 case HIDSP_INT_PLAY_UNDER:
1075 /* printk(KERN_DEBUG LOGNAME ": Play underflow\n"); */
1076 clear_bit(F_WRITING, &dev.flags);
1077 break;
1078
1079 case HIDSP_INT_RECORD_OVER:
1080 /* printk(KERN_DEBUG LOGNAME ": Record overflow\n"); */
1081 clear_bit(F_READING, &dev.flags);
1082 break;
1083
1084 default:
1085 /* printk(KERN_DEBUG LOGNAME ": DSP message %d 0x%02x\n",
1086 LOBYTE(wMessage), LOBYTE(wMessage)); */
1087 break;
1088 }
1089 break;
1090
1091 case HIMT_MIDI_IN_UCHAR:
1092 if (dev.midi_in_interrupt)
1093 (*dev.midi_in_interrupt)(&dev);
1094 break;
1095
1096 default:
1097 /* printk(KERN_DEBUG LOGNAME ": HIMT message %d 0x%02x\n", HIBYTE(wMessage), HIBYTE(wMessage)); */
1098 break;
1099 }
1100 }
1101
1102 static irqreturn_t intr(int irq, void *dev_id)
1103 {
1104 /* Send ack to DSP */
1105 msnd_inb(dev.io + HP_RXL);
1106
1107 /* Evaluate queued DSP messages */
1108 while (readw(dev.DSPQ + JQS_wTail) != readw(dev.DSPQ + JQS_wHead)) {
1109 register WORD wTmp;
1110
1111 eval_dsp_msg(readw(dev.pwDSPQData + 2*readw(dev.DSPQ + JQS_wHead)));
1112
1113 if ((wTmp = readw(dev.DSPQ + JQS_wHead) + 1) > readw(dev.DSPQ + JQS_wSize))
1114 writew(0, dev.DSPQ + JQS_wHead);
1115 else
1116 writew(wTmp, dev.DSPQ + JQS_wHead);
1117 }
1118 return IRQ_HANDLED;
1119 }
1120
1121 static const struct file_operations dev_fileops = {
1122 .owner = THIS_MODULE,
1123 .read = dev_read,
1124 .write = dev_write,
1125 .unlocked_ioctl = dev_ioctl,
1126 .open = dev_open,
1127 .release = dev_release,
1128 .llseek = noop_llseek,
1129 };
1130
1131 static int reset_dsp(void)
1132 {
1133 int timeout = 100;
1134
1135 msnd_outb(HPDSPRESET_ON, dev.io + HP_DSPR);
1136 mdelay(1);
1137 #ifndef MSND_CLASSIC
1138 dev.info = msnd_inb(dev.io + HP_INFO);
1139 #endif
1140 msnd_outb(HPDSPRESET_OFF, dev.io + HP_DSPR);
1141 mdelay(1);
1142 while (timeout-- > 0) {
1143 if (msnd_inb(dev.io + HP_CVR) == HP_CVR_DEF)
1144 return 0;
1145 mdelay(1);
1146 }
1147 printk(KERN_ERR LOGNAME ": Cannot reset DSP\n");
1148
1149 return -EIO;
1150 }
1151
1152 static int __init probe_multisound(void)
1153 {
1154 #ifndef MSND_CLASSIC
1155 char *xv, *rev = NULL;
1156 char *pin = "Pinnacle", *fiji = "Fiji";
1157 char *pinfiji = "Pinnacle/Fiji";
1158 #endif
1159
1160 if (!request_region(dev.io, dev.numio, "probing")) {
1161 printk(KERN_ERR LOGNAME ": I/O port conflict\n");
1162 return -ENODEV;
1163 }
1164
1165 if (reset_dsp() < 0) {
1166 release_region(dev.io, dev.numio);
1167 return -ENODEV;
1168 }
1169
1170 #ifdef MSND_CLASSIC
1171 dev.name = "Classic/Tahiti/Monterey";
1172 printk(KERN_INFO LOGNAME ": %s, "
1173 #else
1174 switch (dev.info >> 4) {
1175 case 0xf: xv = "<= 1.15"; break;
1176 case 0x1: xv = "1.18/1.2"; break;
1177 case 0x2: xv = "1.3"; break;
1178 case 0x3: xv = "1.4"; break;
1179 default: xv = "unknown"; break;
1180 }
1181
1182 switch (dev.info & 0x7) {
1183 case 0x0: rev = "I"; dev.name = pin; break;
1184 case 0x1: rev = "F"; dev.name = pin; break;
1185 case 0x2: rev = "G"; dev.name = pin; break;
1186 case 0x3: rev = "H"; dev.name = pin; break;
1187 case 0x4: rev = "E"; dev.name = fiji; break;
1188 case 0x5: rev = "C"; dev.name = fiji; break;
1189 case 0x6: rev = "D"; dev.name = fiji; break;
1190 case 0x7:
1191 rev = "A-B (Fiji) or A-E (Pinnacle)";
1192 dev.name = pinfiji;
1193 break;
1194 }
1195 printk(KERN_INFO LOGNAME ": %s revision %s, Xilinx version %s, "
1196 #endif /* MSND_CLASSIC */
1197 "I/O 0x%x-0x%x, IRQ %d, memory mapped to %p-%p\n",
1198 dev.name,
1199 #ifndef MSND_CLASSIC
1200 rev, xv,
1201 #endif
1202 dev.io, dev.io + dev.numio - 1,
1203 dev.irq,
1204 dev.base, dev.base + 0x7fff);
1205
1206 release_region(dev.io, dev.numio);
1207 return 0;
1208 }
1209
1210 static int init_sma(void)
1211 {
1212 static int initted;
1213 WORD mastVolLeft, mastVolRight;
1214 unsigned long flags;
1215
1216 #ifdef MSND_CLASSIC
1217 msnd_outb(dev.memid, dev.io + HP_MEMM);
1218 #endif
1219 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS);
1220 if (initted) {
1221 mastVolLeft = readw(dev.SMA + SMA_wCurrMastVolLeft);
1222 mastVolRight = readw(dev.SMA + SMA_wCurrMastVolRight);
1223 } else
1224 mastVolLeft = mastVolRight = 0;
1225 memset_io(dev.base, 0, 0x8000);
1226
1227 /* Critical section: bank 1 access */
1228 spin_lock_irqsave(&dev.lock, flags);
1229 msnd_outb(HPBLKSEL_1, dev.io + HP_BLKS);
1230 memset_io(dev.base, 0, 0x8000);
1231 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS);
1232 spin_unlock_irqrestore(&dev.lock, flags);
1233
1234 dev.pwDSPQData = (dev.base + DSPQ_DATA_BUFF);
1235 dev.pwMODQData = (dev.base + MODQ_DATA_BUFF);
1236 dev.pwMIDQData = (dev.base + MIDQ_DATA_BUFF);
1237
1238 /* Motorola 56k shared memory base */
1239 dev.SMA = dev.base + SMA_STRUCT_START;
1240
1241 /* Digital audio play queue */
1242 dev.DAPQ = dev.base + DAPQ_OFFSET;
1243 msnd_init_queue(dev.DAPQ, DAPQ_DATA_BUFF, DAPQ_BUFF_SIZE);
1244
1245 /* Digital audio record queue */
1246 dev.DARQ = dev.base + DARQ_OFFSET;
1247 msnd_init_queue(dev.DARQ, DARQ_DATA_BUFF, DARQ_BUFF_SIZE);
1248
1249 /* MIDI out queue */
1250 dev.MODQ = dev.base + MODQ_OFFSET;
1251 msnd_init_queue(dev.MODQ, MODQ_DATA_BUFF, MODQ_BUFF_SIZE);
1252
1253 /* MIDI in queue */
1254 dev.MIDQ = dev.base + MIDQ_OFFSET;
1255 msnd_init_queue(dev.MIDQ, MIDQ_DATA_BUFF, MIDQ_BUFF_SIZE);
1256
1257 /* DSP -> host message queue */
1258 dev.DSPQ = dev.base + DSPQ_OFFSET;
1259 msnd_init_queue(dev.DSPQ, DSPQ_DATA_BUFF, DSPQ_BUFF_SIZE);
1260
1261 /* Setup some DSP values */
1262 #ifndef MSND_CLASSIC
1263 writew(1, dev.SMA + SMA_wCurrPlayFormat);
1264 writew(dev.play_sample_size, dev.SMA + SMA_wCurrPlaySampleSize);
1265 writew(dev.play_channels, dev.SMA + SMA_wCurrPlayChannels);
1266 writew(dev.play_sample_rate, dev.SMA + SMA_wCurrPlaySampleRate);
1267 #endif
1268 writew(dev.play_sample_rate, dev.SMA + SMA_wCalFreqAtoD);
1269 writew(mastVolLeft, dev.SMA + SMA_wCurrMastVolLeft);
1270 writew(mastVolRight, dev.SMA + SMA_wCurrMastVolRight);
1271 #ifndef MSND_CLASSIC
1272 writel(0x00010000, dev.SMA + SMA_dwCurrPlayPitch);
1273 writel(0x00000001, dev.SMA + SMA_dwCurrPlayRate);
1274 #endif
1275 writew(0x303, dev.SMA + SMA_wCurrInputTagBits);
1276
1277 initted = 1;
1278
1279 return 0;
1280 }
1281
1282 static int __init calibrate_adc(WORD srate)
1283 {
1284 writew(srate, dev.SMA + SMA_wCalFreqAtoD);
1285 if (dev.calibrate_signal == 0)
1286 writew(readw(dev.SMA + SMA_wCurrHostStatusFlags)
1287 | 0x0001, dev.SMA + SMA_wCurrHostStatusFlags);
1288 else
1289 writew(readw(dev.SMA + SMA_wCurrHostStatusFlags)
1290 & ~0x0001, dev.SMA + SMA_wCurrHostStatusFlags);
1291 if (msnd_send_word(&dev, 0, 0, HDEXAR_CAL_A_TO_D) == 0 &&
1292 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ) == 0) {
1293 schedule_timeout_interruptible(HZ / 3);
1294 return 0;
1295 }
1296 printk(KERN_WARNING LOGNAME ": ADC calibration failed\n");
1297
1298 return -EIO;
1299 }
1300
1301 static int upload_dsp_code(void)
1302 {
1303 int ret = 0;
1304
1305 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS);
1306 #ifndef HAVE_DSPCODEH
1307 INITCODESIZE = mod_firmware_load(INITCODEFILE, &INITCODE);
1308 if (!INITCODE) {
1309 printk(KERN_ERR LOGNAME ": Error loading " INITCODEFILE);
1310 return -EBUSY;
1311 }
1312
1313 PERMCODESIZE = mod_firmware_load(PERMCODEFILE, &PERMCODE);
1314 if (!PERMCODE) {
1315 printk(KERN_ERR LOGNAME ": Error loading " PERMCODEFILE);
1316 vfree(INITCODE);
1317 return -EBUSY;
1318 }
1319 #endif
1320 memcpy_toio(dev.base, PERMCODE, PERMCODESIZE);
1321 if (msnd_upload_host(&dev, INITCODE, INITCODESIZE) < 0) {
1322 printk(KERN_WARNING LOGNAME ": Error uploading to DSP\n");
1323 ret = -ENODEV;
1324 goto out;
1325 }
1326 #ifdef HAVE_DSPCODEH
1327 printk(KERN_INFO LOGNAME ": DSP firmware uploaded (resident)\n");
1328 #else
1329 printk(KERN_INFO LOGNAME ": DSP firmware uploaded\n");
1330 #endif
1331
1332 out:
1333 #ifndef HAVE_DSPCODEH
1334 vfree(INITCODE);
1335 vfree(PERMCODE);
1336 #endif
1337
1338 return ret;
1339 }
1340
1341 #ifdef MSND_CLASSIC
1342 static void reset_proteus(void)
1343 {
1344 msnd_outb(HPPRORESET_ON, dev.io + HP_PROR);
1345 mdelay(TIME_PRO_RESET);
1346 msnd_outb(HPPRORESET_OFF, dev.io + HP_PROR);
1347 mdelay(TIME_PRO_RESET_DONE);
1348 }
1349 #endif
1350
1351 static int initialize(void)
1352 {
1353 int err, timeout;
1354
1355 #ifdef MSND_CLASSIC
1356 msnd_outb(HPWAITSTATE_0, dev.io + HP_WAIT);
1357 msnd_outb(HPBITMODE_16, dev.io + HP_BITM);
1358
1359 reset_proteus();
1360 #endif
1361 if ((err = init_sma()) < 0) {
1362 printk(KERN_WARNING LOGNAME ": Cannot initialize SMA\n");
1363 return err;
1364 }
1365
1366 if ((err = reset_dsp()) < 0)
1367 return err;
1368
1369 if ((err = upload_dsp_code()) < 0) {
1370 printk(KERN_WARNING LOGNAME ": Cannot upload DSP code\n");
1371 return err;
1372 }
1373
1374 timeout = 200;
1375 while (readw(dev.base)) {
1376 mdelay(1);
1377 if (!timeout--) {
1378 printk(KERN_DEBUG LOGNAME ": DSP reset timeout\n");
1379 return -EIO;
1380 }
1381 }
1382
1383 mixer_setup();
1384
1385 return 0;
1386 }
1387
1388 static int dsp_full_reset(void)
1389 {
1390 int rv;
1391
1392 if (test_bit(F_RESETTING, &dev.flags) || ++dev.nresets > 10)
1393 return 0;
1394
1395 set_bit(F_RESETTING, &dev.flags);
1396 printk(KERN_INFO LOGNAME ": DSP reset\n");
1397 dsp_halt(NULL); /* Unconditionally halt */
1398 if ((rv = initialize()))
1399 printk(KERN_WARNING LOGNAME ": DSP reset failed\n");
1400 force_recsrc(dev.recsrc);
1401 dsp_open(NULL);
1402 clear_bit(F_RESETTING, &dev.flags);
1403
1404 return rv;
1405 }
1406
1407 static int __init attach_multisound(void)
1408 {
1409 int err;
1410
1411 if ((err = request_irq(dev.irq, intr, 0, dev.name, &dev)) < 0) {
1412 printk(KERN_ERR LOGNAME ": Couldn't grab IRQ %d\n", dev.irq);
1413 return err;
1414 }
1415 if (request_region(dev.io, dev.numio, dev.name) == NULL) {
1416 free_irq(dev.irq, &dev);
1417 return -EBUSY;
1418 }
1419
1420 err = dsp_full_reset();
1421 if (err < 0) {
1422 release_region(dev.io, dev.numio);
1423 free_irq(dev.irq, &dev);
1424 return err;
1425 }
1426
1427 if ((err = msnd_register(&dev)) < 0) {
1428 printk(KERN_ERR LOGNAME ": Unable to register MultiSound\n");
1429 release_region(dev.io, dev.numio);
1430 free_irq(dev.irq, &dev);
1431 return err;
1432 }
1433
1434 if ((dev.dsp_minor = register_sound_dsp(&dev_fileops, -1)) < 0) {
1435 printk(KERN_ERR LOGNAME ": Unable to register DSP operations\n");
1436 msnd_unregister(&dev);
1437 release_region(dev.io, dev.numio);
1438 free_irq(dev.irq, &dev);
1439 return dev.dsp_minor;
1440 }
1441
1442 if ((dev.mixer_minor = register_sound_mixer(&dev_fileops, -1)) < 0) {
1443 printk(KERN_ERR LOGNAME ": Unable to register mixer operations\n");
1444 unregister_sound_mixer(dev.mixer_minor);
1445 msnd_unregister(&dev);
1446 release_region(dev.io, dev.numio);
1447 free_irq(dev.irq, &dev);
1448 return dev.mixer_minor;
1449 }
1450
1451 dev.ext_midi_dev = dev.hdr_midi_dev = -1;
1452
1453 disable_irq(dev.irq);
1454 calibrate_adc(dev.play_sample_rate);
1455 #ifndef MSND_CLASSIC
1456 force_recsrc(SOUND_MASK_IMIX);
1457 #endif
1458
1459 return 0;
1460 }
1461
1462 static void __exit unload_multisound(void)
1463 {
1464 release_region(dev.io, dev.numio);
1465 free_irq(dev.irq, &dev);
1466 unregister_sound_mixer(dev.mixer_minor);
1467 unregister_sound_dsp(dev.dsp_minor);
1468 msnd_unregister(&dev);
1469 }
1470
1471 #ifndef MSND_CLASSIC
1472
1473 /* Pinnacle/Fiji Logical Device Configuration */
1474
1475 static int __init msnd_write_cfg(int cfg, int reg, int value)
1476 {
1477 msnd_outb(reg, cfg);
1478 msnd_outb(value, cfg + 1);
1479 if (value != msnd_inb(cfg + 1)) {
1480 printk(KERN_ERR LOGNAME ": msnd_write_cfg: I/O error\n");
1481 return -EIO;
1482 }
1483 return 0;
1484 }
1485
1486 static int __init msnd_write_cfg_io0(int cfg, int num, WORD io)
1487 {
1488 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1489 return -EIO;
1490 if (msnd_write_cfg(cfg, IREG_IO0_BASEHI, HIBYTE(io)))
1491 return -EIO;
1492 if (msnd_write_cfg(cfg, IREG_IO0_BASELO, LOBYTE(io)))
1493 return -EIO;
1494 return 0;
1495 }
1496
1497 static int __init msnd_write_cfg_io1(int cfg, int num, WORD io)
1498 {
1499 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1500 return -EIO;
1501 if (msnd_write_cfg(cfg, IREG_IO1_BASEHI, HIBYTE(io)))
1502 return -EIO;
1503 if (msnd_write_cfg(cfg, IREG_IO1_BASELO, LOBYTE(io)))
1504 return -EIO;
1505 return 0;
1506 }
1507
1508 static int __init msnd_write_cfg_irq(int cfg, int num, WORD irq)
1509 {
1510 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1511 return -EIO;
1512 if (msnd_write_cfg(cfg, IREG_IRQ_NUMBER, LOBYTE(irq)))
1513 return -EIO;
1514 if (msnd_write_cfg(cfg, IREG_IRQ_TYPE, IRQTYPE_EDGE))
1515 return -EIO;
1516 return 0;
1517 }
1518
1519 static int __init msnd_write_cfg_mem(int cfg, int num, int mem)
1520 {
1521 WORD wmem;
1522
1523 mem >>= 8;
1524 mem &= 0xfff;
1525 wmem = (WORD)mem;
1526 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1527 return -EIO;
1528 if (msnd_write_cfg(cfg, IREG_MEMBASEHI, HIBYTE(wmem)))
1529 return -EIO;
1530 if (msnd_write_cfg(cfg, IREG_MEMBASELO, LOBYTE(wmem)))
1531 return -EIO;
1532 if (wmem && msnd_write_cfg(cfg, IREG_MEMCONTROL, (MEMTYPE_HIADDR | MEMTYPE_16BIT)))
1533 return -EIO;
1534 return 0;
1535 }
1536
1537 static int __init msnd_activate_logical(int cfg, int num)
1538 {
1539 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1540 return -EIO;
1541 if (msnd_write_cfg(cfg, IREG_ACTIVATE, LD_ACTIVATE))
1542 return -EIO;
1543 return 0;
1544 }
1545
1546 static int __init msnd_write_cfg_logical(int cfg, int num, WORD io0, WORD io1, WORD irq, int mem)
1547 {
1548 if (msnd_write_cfg(cfg, IREG_LOGDEVICE, num))
1549 return -EIO;
1550 if (msnd_write_cfg_io0(cfg, num, io0))
1551 return -EIO;
1552 if (msnd_write_cfg_io1(cfg, num, io1))
1553 return -EIO;
1554 if (msnd_write_cfg_irq(cfg, num, irq))
1555 return -EIO;
1556 if (msnd_write_cfg_mem(cfg, num, mem))
1557 return -EIO;
1558 if (msnd_activate_logical(cfg, num))
1559 return -EIO;
1560 return 0;
1561 }
1562
1563 typedef struct msnd_pinnacle_cfg_device {
1564 WORD io0, io1, irq;
1565 int mem;
1566 } msnd_pinnacle_cfg_t[4];
1567
1568 static int __init msnd_pinnacle_cfg_devices(int cfg, int reset, msnd_pinnacle_cfg_t device)
1569 {
1570 int i;
1571
1572 /* Reset devices if told to */
1573 if (reset) {
1574 printk(KERN_INFO LOGNAME ": Resetting all devices\n");
1575 for (i = 0; i < 4; ++i)
1576 if (msnd_write_cfg_logical(cfg, i, 0, 0, 0, 0))
1577 return -EIO;
1578 }
1579
1580 /* Configure specified devices */
1581 for (i = 0; i < 4; ++i) {
1582
1583 switch (i) {
1584 case 0: /* DSP */
1585 if (!(device[i].io0 && device[i].irq && device[i].mem))
1586 continue;
1587 break;
1588 case 1: /* MPU */
1589 if (!(device[i].io0 && device[i].irq))
1590 continue;
1591 printk(KERN_INFO LOGNAME
1592 ": Configuring MPU to I/O 0x%x IRQ %d\n",
1593 device[i].io0, device[i].irq);
1594 break;
1595 case 2: /* IDE */
1596 if (!(device[i].io0 && device[i].io1 && device[i].irq))
1597 continue;
1598 printk(KERN_INFO LOGNAME
1599 ": Configuring IDE to I/O 0x%x, 0x%x IRQ %d\n",
1600 device[i].io0, device[i].io1, device[i].irq);
1601 break;
1602 case 3: /* Joystick */
1603 if (!(device[i].io0))
1604 continue;
1605 printk(KERN_INFO LOGNAME
1606 ": Configuring joystick to I/O 0x%x\n",
1607 device[i].io0);
1608 break;
1609 }
1610
1611 /* Configure the device */
1612 if (msnd_write_cfg_logical(cfg, i, device[i].io0, device[i].io1, device[i].irq, device[i].mem))
1613 return -EIO;
1614 }
1615
1616 return 0;
1617 }
1618 #endif
1619
1620 #ifdef MODULE
1621 MODULE_AUTHOR ("Andrew Veliath <andrewtv@usa.net>");
1622 MODULE_DESCRIPTION ("Turtle Beach " LONGNAME " Linux Driver");
1623 MODULE_LICENSE("GPL");
1624
1625 static int io __initdata = -1;
1626 static int irq __initdata = -1;
1627 static int mem __initdata = -1;
1628 static int write_ndelay __initdata = -1;
1629
1630 #ifndef MSND_CLASSIC
1631 /* Pinnacle/Fiji non-PnP Config Port */
1632 static int cfg __initdata = -1;
1633
1634 /* Extra Peripheral Configuration */
1635 static int reset __initdata = 0;
1636 static int mpu_io __initdata = 0;
1637 static int mpu_irq __initdata = 0;
1638 static int ide_io0 __initdata = 0;
1639 static int ide_io1 __initdata = 0;
1640 static int ide_irq __initdata = 0;
1641 static int joystick_io __initdata = 0;
1642
1643 /* If we have the digital daugherboard... */
1644 static bool digital __initdata = false;
1645 #endif
1646
1647 static int fifosize __initdata = DEFFIFOSIZE;
1648 static int calibrate_signal __initdata = 0;
1649
1650 #else /* not a module */
1651
1652 static int write_ndelay __initdata = -1;
1653
1654 #ifdef MSND_CLASSIC
1655 static int io __initdata = CONFIG_MSNDCLAS_IO;
1656 static int irq __initdata = CONFIG_MSNDCLAS_IRQ;
1657 static int mem __initdata = CONFIG_MSNDCLAS_MEM;
1658 #else /* Pinnacle/Fiji */
1659
1660 static int io __initdata = CONFIG_MSNDPIN_IO;
1661 static int irq __initdata = CONFIG_MSNDPIN_IRQ;
1662 static int mem __initdata = CONFIG_MSNDPIN_MEM;
1663
1664 /* Pinnacle/Fiji non-PnP Config Port */
1665 #ifdef CONFIG_MSNDPIN_NONPNP
1666 # ifndef CONFIG_MSNDPIN_CFG
1667 # define CONFIG_MSNDPIN_CFG 0x250
1668 # endif
1669 #else
1670 # ifdef CONFIG_MSNDPIN_CFG
1671 # undef CONFIG_MSNDPIN_CFG
1672 # endif
1673 # define CONFIG_MSNDPIN_CFG -1
1674 #endif
1675 static int cfg __initdata = CONFIG_MSNDPIN_CFG;
1676 /* If not a module, we don't need to bother with reset=1 */
1677 static int reset;
1678
1679 /* Extra Peripheral Configuration (Default: Disable) */
1680 #ifndef CONFIG_MSNDPIN_MPU_IO
1681 # define CONFIG_MSNDPIN_MPU_IO 0
1682 #endif
1683 static int mpu_io __initdata = CONFIG_MSNDPIN_MPU_IO;
1684
1685 #ifndef CONFIG_MSNDPIN_MPU_IRQ
1686 # define CONFIG_MSNDPIN_MPU_IRQ 0
1687 #endif
1688 static int mpu_irq __initdata = CONFIG_MSNDPIN_MPU_IRQ;
1689
1690 #ifndef CONFIG_MSNDPIN_IDE_IO0
1691 # define CONFIG_MSNDPIN_IDE_IO0 0
1692 #endif
1693 static int ide_io0 __initdata = CONFIG_MSNDPIN_IDE_IO0;
1694
1695 #ifndef CONFIG_MSNDPIN_IDE_IO1
1696 # define CONFIG_MSNDPIN_IDE_IO1 0
1697 #endif
1698 static int ide_io1 __initdata = CONFIG_MSNDPIN_IDE_IO1;
1699
1700 #ifndef CONFIG_MSNDPIN_IDE_IRQ
1701 # define CONFIG_MSNDPIN_IDE_IRQ 0
1702 #endif
1703 static int ide_irq __initdata = CONFIG_MSNDPIN_IDE_IRQ;
1704
1705 #ifndef CONFIG_MSNDPIN_JOYSTICK_IO
1706 # define CONFIG_MSNDPIN_JOYSTICK_IO 0
1707 #endif
1708 static int joystick_io __initdata = CONFIG_MSNDPIN_JOYSTICK_IO;
1709
1710 /* Have SPDIF (Digital) Daughterboard */
1711 #ifndef CONFIG_MSNDPIN_DIGITAL
1712 # define CONFIG_MSNDPIN_DIGITAL 0
1713 #endif
1714 static bool digital __initdata = CONFIG_MSNDPIN_DIGITAL;
1715
1716 #endif /* MSND_CLASSIC */
1717
1718 #ifndef CONFIG_MSND_FIFOSIZE
1719 # define CONFIG_MSND_FIFOSIZE DEFFIFOSIZE
1720 #endif
1721 static int fifosize __initdata = CONFIG_MSND_FIFOSIZE;
1722
1723 #ifndef CONFIG_MSND_CALSIGNAL
1724 # define CONFIG_MSND_CALSIGNAL 0
1725 #endif
1726 static int
1727 calibrate_signal __initdata = CONFIG_MSND_CALSIGNAL;
1728 #endif /* MODULE */
1729
1730 module_param (io, int, 0);
1731 module_param (irq, int, 0);
1732 module_param (mem, int, 0);
1733 module_param (write_ndelay, int, 0);
1734 module_param (fifosize, int, 0);
1735 module_param (calibrate_signal, int, 0);
1736 #ifndef MSND_CLASSIC
1737 module_param (digital, bool, 0);
1738 module_param (cfg, int, 0);
1739 module_param (reset, int, 0);
1740 module_param (mpu_io, int, 0);
1741 module_param (mpu_irq, int, 0);
1742 module_param (ide_io0, int, 0);
1743 module_param (ide_io1, int, 0);
1744 module_param (ide_irq, int, 0);
1745 module_param (joystick_io, int, 0);
1746 #endif
1747
1748 static int __init msnd_init(void)
1749 {
1750 int err;
1751 #ifndef MSND_CLASSIC
1752 static msnd_pinnacle_cfg_t pinnacle_devs;
1753 #endif /* MSND_CLASSIC */
1754
1755 printk(KERN_INFO LOGNAME ": Turtle Beach " LONGNAME " Linux Driver Version "
1756 VERSION ", Copyright (C) 1998 Andrew Veliath\n");
1757
1758 if (io == -1 || irq == -1 || mem == -1)
1759 printk(KERN_WARNING LOGNAME ": io, irq and mem must be set\n");
1760
1761 #ifdef MSND_CLASSIC
1762 if (io == -1 ||
1763 !(io == 0x290 ||
1764 io == 0x260 ||
1765 io == 0x250 ||
1766 io == 0x240 ||
1767 io == 0x230 ||
1768 io == 0x220 ||
1769 io == 0x210 ||
1770 io == 0x3e0)) {
1771 printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must be set to 0x210, 0x220, 0x230, 0x240, 0x250, 0x260, 0x290, or 0x3E0\n");
1772 return -EINVAL;
1773 }
1774 #else
1775 if (io == -1 ||
1776 io < 0x100 ||
1777 io > 0x3e0 ||
1778 (io % 0x10) != 0) {
1779 printk(KERN_ERR LOGNAME ": \"io\" - DSP I/O base must within the range 0x100 to 0x3E0 and must be evenly divisible by 0x10\n");
1780 return -EINVAL;
1781 }
1782 #endif /* MSND_CLASSIC */
1783
1784 if (irq == -1 ||
1785 !(irq == 5 ||
1786 irq == 7 ||
1787 irq == 9 ||
1788 irq == 10 ||
1789 irq == 11 ||
1790 irq == 12)) {
1791 printk(KERN_ERR LOGNAME ": \"irq\" - must be set to 5, 7, 9, 10, 11 or 12\n");
1792 return -EINVAL;
1793 }
1794
1795 if (mem == -1 ||
1796 !(mem == 0xb0000 ||
1797 mem == 0xc8000 ||
1798 mem == 0xd0000 ||
1799 mem == 0xd8000 ||
1800 mem == 0xe0000 ||
1801 mem == 0xe8000)) {
1802 printk(KERN_ERR LOGNAME ": \"mem\" - must be set to "
1803 "0xb0000, 0xc8000, 0xd0000, 0xd8000, 0xe0000 or 0xe8000\n");
1804 return -EINVAL;
1805 }
1806
1807 #ifdef MSND_CLASSIC
1808 switch (irq) {
1809 case 5: dev.irqid = HPIRQ_5; break;
1810 case 7: dev.irqid = HPIRQ_7; break;
1811 case 9: dev.irqid = HPIRQ_9; break;
1812 case 10: dev.irqid = HPIRQ_10; break;
1813 case 11: dev.irqid = HPIRQ_11; break;
1814 case 12: dev.irqid = HPIRQ_12; break;
1815 }
1816
1817 switch (mem) {
1818 case 0xb0000: dev.memid = HPMEM_B000; break;
1819 case 0xc8000: dev.memid = HPMEM_C800; break;
1820 case 0xd0000: dev.memid = HPMEM_D000; break;
1821 case 0xd8000: dev.memid = HPMEM_D800; break;
1822 case 0xe0000: dev.memid = HPMEM_E000; break;
1823 case 0xe8000: dev.memid = HPMEM_E800; break;
1824 }
1825 #else
1826 if (cfg == -1) {
1827 printk(KERN_INFO LOGNAME ": Assuming PnP mode\n");
1828 } else if (cfg != 0x250 && cfg != 0x260 && cfg != 0x270) {
1829 printk(KERN_INFO LOGNAME ": Config port must be 0x250, 0x260 or 0x270 (or unspecified for PnP mode)\n");
1830 return -EINVAL;
1831 } else {
1832 printk(KERN_INFO LOGNAME ": Non-PnP mode: configuring at port 0x%x\n", cfg);
1833
1834 /* DSP */
1835 pinnacle_devs[0].io0 = io;
1836 pinnacle_devs[0].irq = irq;
1837 pinnacle_devs[0].mem = mem;
1838
1839 /* The following are Pinnacle specific */
1840
1841 /* MPU */
1842 pinnacle_devs[1].io0 = mpu_io;
1843 pinnacle_devs[1].irq = mpu_irq;
1844
1845 /* IDE */
1846 pinnacle_devs[2].io0 = ide_io0;
1847 pinnacle_devs[2].io1 = ide_io1;
1848 pinnacle_devs[2].irq = ide_irq;
1849
1850 /* Joystick */
1851 pinnacle_devs[3].io0 = joystick_io;
1852
1853 if (!request_region(cfg, 2, "Pinnacle/Fiji Config")) {
1854 printk(KERN_ERR LOGNAME ": Config port 0x%x conflict\n", cfg);
1855 return -EIO;
1856 }
1857
1858 if (msnd_pinnacle_cfg_devices(cfg, reset, pinnacle_devs)) {
1859 printk(KERN_ERR LOGNAME ": Device configuration error\n");
1860 release_region(cfg, 2);
1861 return -EIO;
1862 }
1863 release_region(cfg, 2);
1864 }
1865 #endif /* MSND_CLASSIC */
1866
1867 if (fifosize < 16)
1868 fifosize = 16;
1869
1870 if (fifosize > 1024)
1871 fifosize = 1024;
1872
1873 set_default_audio_parameters();
1874 #ifdef MSND_CLASSIC
1875 dev.type = msndClassic;
1876 #else
1877 dev.type = msndPinnacle;
1878 #endif
1879 dev.io = io;
1880 dev.numio = DSP_NUMIO;
1881 dev.irq = irq;
1882 dev.base = ioremap(mem, 0x8000);
1883 dev.fifosize = fifosize * 1024;
1884 dev.calibrate_signal = calibrate_signal ? 1 : 0;
1885 dev.recsrc = 0;
1886 dev.dspq_data_buff = DSPQ_DATA_BUFF;
1887 dev.dspq_buff_size = DSPQ_BUFF_SIZE;
1888 if (write_ndelay == -1)
1889 write_ndelay = CONFIG_MSND_WRITE_NDELAY;
1890 if (write_ndelay)
1891 clear_bit(F_DISABLE_WRITE_NDELAY, &dev.flags);
1892 else
1893 set_bit(F_DISABLE_WRITE_NDELAY, &dev.flags);
1894 #ifndef MSND_CLASSIC
1895 if (digital)
1896 set_bit(F_HAVEDIGITAL, &dev.flags);
1897 #endif
1898 init_waitqueue_head(&dev.writeblock);
1899 init_waitqueue_head(&dev.readblock);
1900 init_waitqueue_head(&dev.writeflush);
1901 msnd_fifo_init(&dev.DAPF);
1902 msnd_fifo_init(&dev.DARF);
1903 spin_lock_init(&dev.lock);
1904 printk(KERN_INFO LOGNAME ": %u byte audio FIFOs (x2)\n", dev.fifosize);
1905 if ((err = msnd_fifo_alloc(&dev.DAPF, dev.fifosize)) < 0) {
1906 printk(KERN_ERR LOGNAME ": Couldn't allocate write FIFO\n");
1907 return err;
1908 }
1909
1910 if ((err = msnd_fifo_alloc(&dev.DARF, dev.fifosize)) < 0) {
1911 printk(KERN_ERR LOGNAME ": Couldn't allocate read FIFO\n");
1912 msnd_fifo_free(&dev.DAPF);
1913 return err;
1914 }
1915
1916 if ((err = probe_multisound()) < 0) {
1917 printk(KERN_ERR LOGNAME ": Probe failed\n");
1918 msnd_fifo_free(&dev.DAPF);
1919 msnd_fifo_free(&dev.DARF);
1920 return err;
1921 }
1922
1923 if ((err = attach_multisound()) < 0) {
1924 printk(KERN_ERR LOGNAME ": Attach failed\n");
1925 msnd_fifo_free(&dev.DAPF);
1926 msnd_fifo_free(&dev.DARF);
1927 return err;
1928 }
1929
1930 return 0;
1931 }
1932
1933 static void __exit msdn_cleanup(void)
1934 {
1935 unload_multisound();
1936 msnd_fifo_free(&dev.DAPF);
1937 msnd_fifo_free(&dev.DARF);
1938 }
1939
1940 module_init(msnd_init);
1941 module_exit(msdn_cleanup);
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