2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
5 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
7 * Much of the core SMP work is based on previous work by Thomas Radke, to
8 * whom a great many thanks are extended.
10 * Thanks to Intel for making available several different Pentium,
11 * Pentium Pro and Pentium-II/Xeon MP machines.
12 * Original development of Linux SMP code supported by Caldera.
14 * This code is released under the GNU General Public License version 2 or
18 * Felix Koop : NR_CPUS used properly
19 * Jose Renau : Handle single CPU case.
20 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
21 * Greg Wright : Fix for kernel stacks panic.
22 * Erich Boleyn : MP v1.4 and additional changes.
23 * Matthias Sattler : Changes for 2.1 kernel map.
24 * Michel Lespinasse : Changes for 2.1 kernel map.
25 * Michael Chastain : Change trampoline.S to gnu as.
26 * Alan Cox : Dumb bug: 'B' step PPro's are fine
27 * Ingo Molnar : Added APIC timers, based on code
29 * Ingo Molnar : various cleanups and rewrites
30 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
31 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
32 * Martin J. Bligh : Added support for multi-quad systems
33 * Dave Jones : Report invalid combinations of Athlon CPUs.
34 * Rusty Russell : Hacked into shape for new "hotplug" boot process. */
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/kernel.h>
41 #include <linux/sched.h>
42 #include <linux/kernel_stat.h>
43 #include <linux/bootmem.h>
44 #include <linux/notifier.h>
45 #include <linux/cpu.h>
46 #include <linux/percpu.h>
47 #include <linux/nmi.h>
49 #include <linux/delay.h>
50 #include <linux/mc146818rtc.h>
51 #include <asm/tlbflush.h>
53 #include <asm/arch_hooks.h>
56 #include <mach_apic.h>
57 #include <mach_wakecpu.h>
58 #include <smpboot_hooks.h>
62 /* Set if we find a B stepping CPU */
63 static int __devinitdata smp_b_stepping
;
65 /* Number of siblings per CPU package */
66 int smp_num_siblings
= 1;
67 EXPORT_SYMBOL(smp_num_siblings
);
69 /* Last level cache ID of each logical CPU */
70 int cpu_llc_id
[NR_CPUS
] __cpuinitdata
= {[0 ... NR_CPUS
-1] = BAD_APICID
};
72 /* representing HT siblings of each logical CPU */
73 cpumask_t cpu_sibling_map
[NR_CPUS
] __read_mostly
;
74 EXPORT_SYMBOL(cpu_sibling_map
);
76 /* representing HT and core siblings of each logical CPU */
77 cpumask_t cpu_core_map
[NR_CPUS
] __read_mostly
;
78 EXPORT_SYMBOL(cpu_core_map
);
80 /* bitmap of online cpus */
81 cpumask_t cpu_online_map __read_mostly
;
82 EXPORT_SYMBOL(cpu_online_map
);
84 cpumask_t cpu_callin_map
;
85 cpumask_t cpu_callout_map
;
86 EXPORT_SYMBOL(cpu_callout_map
);
87 cpumask_t cpu_possible_map
;
88 EXPORT_SYMBOL(cpu_possible_map
);
89 static cpumask_t smp_commenced_mask
;
91 /* Per CPU bogomips and other parameters */
92 struct cpuinfo_x86 cpu_data
[NR_CPUS
] __cacheline_aligned
;
93 EXPORT_SYMBOL(cpu_data
);
95 u8 x86_cpu_to_apicid
[NR_CPUS
] __read_mostly
=
96 { [0 ... NR_CPUS
-1] = 0xff };
97 EXPORT_SYMBOL(x86_cpu_to_apicid
);
99 u8 apicid_2_node
[MAX_APICID
];
102 * Trampoline 80x86 program as an array.
105 extern unsigned char trampoline_data
[];
106 extern unsigned char trampoline_end
[];
107 static unsigned char *trampoline_base
;
108 static int trampoline_exec
;
110 static void map_cpu_to_logical_apicid(void);
112 /* State of each CPU. */
113 DEFINE_PER_CPU(int, cpu_state
) = { 0 };
116 * Currently trivial. Write the real->protected mode
117 * bootstrap into the page concerned. The caller
118 * has made sure it's suitably aligned.
121 static unsigned long __devinit
setup_trampoline(void)
123 memcpy(trampoline_base
, trampoline_data
, trampoline_end
- trampoline_data
);
124 return virt_to_phys(trampoline_base
);
128 * We are called very early to get the low memory for the
129 * SMP bootup trampoline page.
131 void __init
smp_alloc_memory(void)
133 trampoline_base
= (void *) alloc_bootmem_low_pages(PAGE_SIZE
);
135 * Has to be in very low memory so we can execute
138 if (__pa(trampoline_base
) >= 0x9F000)
141 * Make the SMP trampoline executable:
143 trampoline_exec
= set_kernel_exec((unsigned long)trampoline_base
, 1);
147 * The bootstrap kernel entry code has set these up. Save them for
151 static void __cpuinit
smp_store_cpu_info(int id
)
153 struct cpuinfo_x86
*c
= cpu_data
+ id
;
157 identify_secondary_cpu(c
);
159 * Mask B, Pentium, but not Pentium MMX
161 if (c
->x86_vendor
== X86_VENDOR_INTEL
&&
163 c
->x86_mask
>= 1 && c
->x86_mask
<= 4 &&
166 * Remember we have B step Pentia with bugs
171 * Certain Athlons might work (for various values of 'work') in SMP
172 * but they are not certified as MP capable.
174 if ((c
->x86_vendor
== X86_VENDOR_AMD
) && (c
->x86
== 6)) {
176 if (num_possible_cpus() == 1)
179 /* Athlon 660/661 is valid. */
180 if ((c
->x86_model
==6) && ((c
->x86_mask
==0) || (c
->x86_mask
==1)))
183 /* Duron 670 is valid */
184 if ((c
->x86_model
==7) && (c
->x86_mask
==0))
188 * Athlon 662, Duron 671, and Athlon >model 7 have capability bit.
189 * It's worth noting that the A5 stepping (662) of some Athlon XP's
190 * have the MP bit set.
191 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for more.
193 if (((c
->x86_model
==6) && (c
->x86_mask
>=2)) ||
194 ((c
->x86_model
==7) && (c
->x86_mask
>=1)) ||
199 /* If we get here, it's not a certified SMP capable AMD system. */
200 add_taint(TAINT_UNSAFE_SMP
);
207 extern void calibrate_delay(void);
209 static atomic_t init_deasserted
;
211 static void __cpuinit
smp_callin(void)
214 unsigned long timeout
;
217 * If waken up by an INIT in an 82489DX configuration
218 * we may get here before an INIT-deassert IPI reaches
219 * our local APIC. We have to wait for the IPI or we'll
220 * lock up on an APIC access.
222 wait_for_init_deassert(&init_deasserted
);
225 * (This works even if the APIC is not enabled.)
227 phys_id
= GET_APIC_ID(apic_read(APIC_ID
));
228 cpuid
= smp_processor_id();
229 if (cpu_isset(cpuid
, cpu_callin_map
)) {
230 printk("huh, phys CPU#%d, CPU#%d already present??\n",
234 Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid
, phys_id
);
237 * STARTUP IPIs are fragile beasts as they might sometimes
238 * trigger some glue motherboard logic. Complete APIC bus
239 * silence for 1 second, this overestimates the time the
240 * boot CPU is spending to send the up to 2 STARTUP IPIs
241 * by a factor of two. This should be enough.
245 * Waiting 2s total for startup (udelay is not yet working)
247 timeout
= jiffies
+ 2*HZ
;
248 while (time_before(jiffies
, timeout
)) {
250 * Has the boot CPU finished it's STARTUP sequence?
252 if (cpu_isset(cpuid
, cpu_callout_map
))
257 if (!time_before(jiffies
, timeout
)) {
258 printk("BUG: CPU%d started up but did not get a callout!\n",
264 * the boot CPU has finished the init stage and is spinning
265 * on callin_map until we finish. We are free to set up this
266 * CPU, first the APIC. (this is probably redundant on most
270 Dprintk("CALLIN, before setup_local_APIC().\n");
271 smp_callin_clear_local_apic();
273 map_cpu_to_logical_apicid();
279 Dprintk("Stack at about %p\n",&cpuid
);
282 * Save our processor parameters
284 smp_store_cpu_info(cpuid
);
287 * Allow the master to continue.
289 cpu_set(cpuid
, cpu_callin_map
);
294 /* maps the cpu to the sched domain representing multi-core */
295 cpumask_t
cpu_coregroup_map(int cpu
)
297 struct cpuinfo_x86
*c
= cpu_data
+ cpu
;
299 * For perf, we return last level cache shared map.
300 * And for power savings, we return cpu_core_map
302 if (sched_mc_power_savings
|| sched_smt_power_savings
)
303 return cpu_core_map
[cpu
];
305 return c
->llc_shared_map
;
308 /* representing cpus for which sibling maps can be computed */
309 static cpumask_t cpu_sibling_setup_map
;
312 set_cpu_sibling_map(int cpu
)
315 struct cpuinfo_x86
*c
= cpu_data
;
317 cpu_set(cpu
, cpu_sibling_setup_map
);
319 if (smp_num_siblings
> 1) {
320 for_each_cpu_mask(i
, cpu_sibling_setup_map
) {
321 if (c
[cpu
].phys_proc_id
== c
[i
].phys_proc_id
&&
322 c
[cpu
].cpu_core_id
== c
[i
].cpu_core_id
) {
323 cpu_set(i
, cpu_sibling_map
[cpu
]);
324 cpu_set(cpu
, cpu_sibling_map
[i
]);
325 cpu_set(i
, cpu_core_map
[cpu
]);
326 cpu_set(cpu
, cpu_core_map
[i
]);
327 cpu_set(i
, c
[cpu
].llc_shared_map
);
328 cpu_set(cpu
, c
[i
].llc_shared_map
);
332 cpu_set(cpu
, cpu_sibling_map
[cpu
]);
335 cpu_set(cpu
, c
[cpu
].llc_shared_map
);
337 if (current_cpu_data
.x86_max_cores
== 1) {
338 cpu_core_map
[cpu
] = cpu_sibling_map
[cpu
];
339 c
[cpu
].booted_cores
= 1;
343 for_each_cpu_mask(i
, cpu_sibling_setup_map
) {
344 if (cpu_llc_id
[cpu
] != BAD_APICID
&&
345 cpu_llc_id
[cpu
] == cpu_llc_id
[i
]) {
346 cpu_set(i
, c
[cpu
].llc_shared_map
);
347 cpu_set(cpu
, c
[i
].llc_shared_map
);
349 if (c
[cpu
].phys_proc_id
== c
[i
].phys_proc_id
) {
350 cpu_set(i
, cpu_core_map
[cpu
]);
351 cpu_set(cpu
, cpu_core_map
[i
]);
353 * Does this new cpu bringup a new core?
355 if (cpus_weight(cpu_sibling_map
[cpu
]) == 1) {
357 * for each core in package, increment
358 * the booted_cores for this new cpu
360 if (first_cpu(cpu_sibling_map
[i
]) == i
)
361 c
[cpu
].booted_cores
++;
363 * increment the core count for all
364 * the other cpus in this package
368 } else if (i
!= cpu
&& !c
[cpu
].booted_cores
)
369 c
[cpu
].booted_cores
= c
[i
].booted_cores
;
375 * Activate a secondary processor.
377 static void __cpuinit
start_secondary(void *unused
)
380 * Don't put *anything* before cpu_init(), SMP booting is too
381 * fragile that we want to limit the things done here to the
382 * most necessary things.
390 while (!cpu_isset(smp_processor_id(), smp_commenced_mask
))
393 * Check TSC synchronization with the BP:
395 check_tsc_sync_target();
397 setup_secondary_clock();
398 if (nmi_watchdog
== NMI_IO_APIC
) {
399 disable_8259A_irq(0);
400 enable_NMI_through_LVT0(NULL
);
404 * low-memory mappings have been cleared, flush them from
405 * the local TLBs too.
409 /* This must be done before setting cpu_online_map */
410 set_cpu_sibling_map(raw_smp_processor_id());
414 * We need to hold call_lock, so there is no inconsistency
415 * between the time smp_call_function() determines number of
416 * IPI receipients, and the time when the determination is made
417 * for which cpus receive the IPI. Holding this
418 * lock helps us to not include this cpu in a currently in progress
419 * smp_call_function().
421 lock_ipi_call_lock();
422 cpu_set(smp_processor_id(), cpu_online_map
);
423 unlock_ipi_call_lock();
424 per_cpu(cpu_state
, smp_processor_id()) = CPU_ONLINE
;
426 /* We can take interrupts now: we're officially "up". */
434 * Everything has been set up for the secondary
435 * CPUs - they just need to reload everything
436 * from the task structure
437 * This function must not return.
439 void __devinit
initialize_secondary(void)
442 * We don't actually need to load the full TSS,
443 * basically just the stack pointer and the eip.
450 :"m" (current
->thread
.esp
),"m" (current
->thread
.eip
));
453 /* Static state in head.S used to set up a CPU */
461 /* which logical CPUs are on which nodes */
462 cpumask_t node_2_cpu_mask
[MAX_NUMNODES
] __read_mostly
=
463 { [0 ... MAX_NUMNODES
-1] = CPU_MASK_NONE
};
464 EXPORT_SYMBOL(node_2_cpu_mask
);
465 /* which node each logical CPU is on */
466 int cpu_2_node
[NR_CPUS
] __read_mostly
= { [0 ... NR_CPUS
-1] = 0 };
467 EXPORT_SYMBOL(cpu_2_node
);
469 /* set up a mapping between cpu and node. */
470 static inline void map_cpu_to_node(int cpu
, int node
)
472 printk("Mapping cpu %d to node %d\n", cpu
, node
);
473 cpu_set(cpu
, node_2_cpu_mask
[node
]);
474 cpu_2_node
[cpu
] = node
;
477 /* undo a mapping between cpu and node. */
478 static inline void unmap_cpu_to_node(int cpu
)
482 printk("Unmapping cpu %d from all nodes\n", cpu
);
483 for (node
= 0; node
< MAX_NUMNODES
; node
++)
484 cpu_clear(cpu
, node_2_cpu_mask
[node
]);
487 #else /* !CONFIG_NUMA */
489 #define map_cpu_to_node(cpu, node) ({})
490 #define unmap_cpu_to_node(cpu) ({})
492 #endif /* CONFIG_NUMA */
494 u8 cpu_2_logical_apicid
[NR_CPUS
] __read_mostly
= { [0 ... NR_CPUS
-1] = BAD_APICID
};
496 static void map_cpu_to_logical_apicid(void)
498 int cpu
= smp_processor_id();
499 int apicid
= logical_smp_processor_id();
500 int node
= apicid_to_node(apicid
);
502 if (!node_online(node
))
503 node
= first_online_node
;
505 cpu_2_logical_apicid
[cpu
] = apicid
;
506 map_cpu_to_node(cpu
, node
);
509 static void unmap_cpu_to_logical_apicid(int cpu
)
511 cpu_2_logical_apicid
[cpu
] = BAD_APICID
;
512 unmap_cpu_to_node(cpu
);
515 static inline void __inquire_remote_apic(int apicid
)
517 int i
, regs
[] = { APIC_ID
>> 4, APIC_LVR
>> 4, APIC_SPIV
>> 4 };
518 char *names
[] = { "ID", "VERSION", "SPIV" };
520 unsigned long status
;
522 printk("Inquiring remote APIC #%d...\n", apicid
);
524 for (i
= 0; i
< ARRAY_SIZE(regs
); i
++) {
525 printk("... APIC #%d %s: ", apicid
, names
[i
]);
530 status
= safe_apic_wait_icr_idle();
532 printk("a previous APIC delivery may have failed\n");
534 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(apicid
));
535 apic_write_around(APIC_ICR
, APIC_DM_REMRD
| regs
[i
]);
540 status
= apic_read(APIC_ICR
) & APIC_ICR_RR_MASK
;
541 } while (status
== APIC_ICR_RR_INPROG
&& timeout
++ < 1000);
544 case APIC_ICR_RR_VALID
:
545 status
= apic_read(APIC_RRR
);
546 printk("%lx\n", status
);
554 #ifdef WAKE_SECONDARY_VIA_NMI
556 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
557 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
558 * won't ... remember to clear down the APIC, etc later.
561 wakeup_secondary_cpu(int logical_apicid
, unsigned long start_eip
)
563 unsigned long send_status
, accept_status
= 0;
567 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(logical_apicid
));
569 /* Boot on the stack */
570 /* Kick the second */
571 apic_write_around(APIC_ICR
, APIC_DM_NMI
| APIC_DEST_LOGICAL
);
573 Dprintk("Waiting for send to finish...\n");
574 send_status
= safe_apic_wait_icr_idle();
577 * Give the other CPU some time to accept the IPI.
581 * Due to the Pentium erratum 3AP.
583 maxlvt
= lapic_get_maxlvt();
585 apic_read_around(APIC_SPIV
);
586 apic_write(APIC_ESR
, 0);
588 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
589 Dprintk("NMI sent.\n");
592 printk("APIC never delivered???\n");
594 printk("APIC delivery error (%lx).\n", accept_status
);
596 return (send_status
| accept_status
);
598 #endif /* WAKE_SECONDARY_VIA_NMI */
600 #ifdef WAKE_SECONDARY_VIA_INIT
602 wakeup_secondary_cpu(int phys_apicid
, unsigned long start_eip
)
604 unsigned long send_status
, accept_status
= 0;
605 int maxlvt
, num_starts
, j
;
608 * Be paranoid about clearing APIC errors.
610 if (APIC_INTEGRATED(apic_version
[phys_apicid
])) {
611 apic_read_around(APIC_SPIV
);
612 apic_write(APIC_ESR
, 0);
616 Dprintk("Asserting INIT.\n");
619 * Turn INIT on target chip
621 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(phys_apicid
));
626 apic_write_around(APIC_ICR
, APIC_INT_LEVELTRIG
| APIC_INT_ASSERT
629 Dprintk("Waiting for send to finish...\n");
630 send_status
= safe_apic_wait_icr_idle();
634 Dprintk("Deasserting INIT.\n");
637 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(phys_apicid
));
640 apic_write_around(APIC_ICR
, APIC_INT_LEVELTRIG
| APIC_DM_INIT
);
642 Dprintk("Waiting for send to finish...\n");
643 send_status
= safe_apic_wait_icr_idle();
645 atomic_set(&init_deasserted
, 1);
648 * Should we send STARTUP IPIs ?
650 * Determine this based on the APIC version.
651 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
653 if (APIC_INTEGRATED(apic_version
[phys_apicid
]))
659 * Paravirt / VMI wants a startup IPI hook here to set up the
660 * target processor state.
662 startup_ipi_hook(phys_apicid
, (unsigned long) start_secondary
,
663 (unsigned long) stack_start
.esp
);
666 * Run STARTUP IPI loop.
668 Dprintk("#startup loops: %d.\n", num_starts
);
670 maxlvt
= lapic_get_maxlvt();
672 for (j
= 1; j
<= num_starts
; j
++) {
673 Dprintk("Sending STARTUP #%d.\n",j
);
674 apic_read_around(APIC_SPIV
);
675 apic_write(APIC_ESR
, 0);
677 Dprintk("After apic_write.\n");
684 apic_write_around(APIC_ICR2
, SET_APIC_DEST_FIELD(phys_apicid
));
686 /* Boot on the stack */
687 /* Kick the second */
688 apic_write_around(APIC_ICR
, APIC_DM_STARTUP
689 | (start_eip
>> 12));
692 * Give the other CPU some time to accept the IPI.
696 Dprintk("Startup point 1.\n");
698 Dprintk("Waiting for send to finish...\n");
699 send_status
= safe_apic_wait_icr_idle();
702 * Give the other CPU some time to accept the IPI.
706 * Due to the Pentium erratum 3AP.
709 apic_read_around(APIC_SPIV
);
710 apic_write(APIC_ESR
, 0);
712 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
713 if (send_status
|| accept_status
)
716 Dprintk("After Startup.\n");
719 printk("APIC never delivered???\n");
721 printk("APIC delivery error (%lx).\n", accept_status
);
723 return (send_status
| accept_status
);
725 #endif /* WAKE_SECONDARY_VIA_INIT */
727 extern cpumask_t cpu_initialized
;
728 static inline int alloc_cpu_id(void)
732 cpus_complement(tmp_map
, cpu_present_map
);
733 cpu
= first_cpu(tmp_map
);
739 #ifdef CONFIG_HOTPLUG_CPU
740 static struct task_struct
* __devinitdata cpu_idle_tasks
[NR_CPUS
];
741 static inline struct task_struct
* alloc_idle_task(int cpu
)
743 struct task_struct
*idle
;
745 if ((idle
= cpu_idle_tasks
[cpu
]) != NULL
) {
746 /* initialize thread_struct. we really want to avoid destroy
749 idle
->thread
.esp
= (unsigned long)task_pt_regs(idle
);
750 init_idle(idle
, cpu
);
753 idle
= fork_idle(cpu
);
756 cpu_idle_tasks
[cpu
] = idle
;
760 #define alloc_idle_task(cpu) fork_idle(cpu)
763 static int __cpuinit
do_boot_cpu(int apicid
, int cpu
)
765 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
766 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
767 * Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
770 struct task_struct
*idle
;
771 unsigned long boot_error
;
773 unsigned long start_eip
;
774 unsigned short nmi_high
= 0, nmi_low
= 0;
777 * Save current MTRR state in case it was changed since early boot
778 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
783 * We can't use kernel_thread since we must avoid to
784 * reschedule the child.
786 idle
= alloc_idle_task(cpu
);
788 panic("failed fork for CPU %d", cpu
);
791 per_cpu(current_task
, cpu
) = idle
;
792 early_gdt_descr
.address
= (unsigned long)get_cpu_gdt_table(cpu
);
794 idle
->thread
.eip
= (unsigned long) start_secondary
;
795 /* start_eip had better be page-aligned! */
796 start_eip
= setup_trampoline();
799 alternatives_smp_switch(1);
801 /* So we see what's up */
802 printk("Booting processor %d/%d eip %lx\n", cpu
, apicid
, start_eip
);
803 /* Stack for startup_32 can be just as for start_secondary onwards */
804 stack_start
.esp
= (void *) idle
->thread
.esp
;
808 x86_cpu_to_apicid
[cpu
] = apicid
;
810 * This grunge runs the startup process for
811 * the targeted processor.
814 atomic_set(&init_deasserted
, 0);
816 Dprintk("Setting warm reset code and vector.\n");
818 store_NMI_vector(&nmi_high
, &nmi_low
);
820 smpboot_setup_warm_reset_vector(start_eip
);
823 * Starting actual IPI sequence...
825 boot_error
= wakeup_secondary_cpu(apicid
, start_eip
);
829 * allow APs to start initializing.
831 Dprintk("Before Callout %d.\n", cpu
);
832 cpu_set(cpu
, cpu_callout_map
);
833 Dprintk("After Callout %d.\n", cpu
);
836 * Wait 5s total for a response
838 for (timeout
= 0; timeout
< 50000; timeout
++) {
839 if (cpu_isset(cpu
, cpu_callin_map
))
840 break; /* It has booted */
844 if (cpu_isset(cpu
, cpu_callin_map
)) {
845 /* number CPUs logically, starting from 1 (BSP is 0) */
847 printk("CPU%d: ", cpu
);
848 print_cpu_info(&cpu_data
[cpu
]);
849 Dprintk("CPU has booted.\n");
852 if (*((volatile unsigned char *)trampoline_base
)
854 /* trampoline started but...? */
855 printk("Stuck ??\n");
857 /* trampoline code not run */
858 printk("Not responding.\n");
859 inquire_remote_apic(apicid
);
864 /* Try to put things back the way they were before ... */
865 unmap_cpu_to_logical_apicid(cpu
);
866 cpu_clear(cpu
, cpu_callout_map
); /* was set here (do_boot_cpu()) */
867 cpu_clear(cpu
, cpu_initialized
); /* was set by cpu_init() */
870 x86_cpu_to_apicid
[cpu
] = apicid
;
871 cpu_set(cpu
, cpu_present_map
);
874 /* mark "stuck" area as not stuck */
875 *((volatile unsigned long *)trampoline_base
) = 0;
880 #ifdef CONFIG_HOTPLUG_CPU
881 void cpu_exit_clear(void)
883 int cpu
= raw_smp_processor_id();
891 cpu_clear(cpu
, cpu_callout_map
);
892 cpu_clear(cpu
, cpu_callin_map
);
894 cpu_clear(cpu
, smp_commenced_mask
);
895 unmap_cpu_to_logical_apicid(cpu
);
898 struct warm_boot_cpu_info
{
899 struct completion
*complete
;
900 struct work_struct task
;
905 static void __cpuinit
do_warm_boot_cpu(struct work_struct
*work
)
907 struct warm_boot_cpu_info
*info
=
908 container_of(work
, struct warm_boot_cpu_info
, task
);
909 do_boot_cpu(info
->apicid
, info
->cpu
);
910 complete(info
->complete
);
913 static int __cpuinit
__smp_prepare_cpu(int cpu
)
915 DECLARE_COMPLETION_ONSTACK(done
);
916 struct warm_boot_cpu_info info
;
919 apicid
= x86_cpu_to_apicid
[cpu
];
920 if (apicid
== BAD_APICID
) {
925 info
.complete
= &done
;
926 info
.apicid
= apicid
;
928 INIT_WORK(&info
.task
, do_warm_boot_cpu
);
930 /* init low mem mapping */
931 clone_pgd_range(swapper_pg_dir
, swapper_pg_dir
+ USER_PGD_PTRS
,
932 min_t(unsigned long, KERNEL_PGD_PTRS
, USER_PGD_PTRS
));
934 schedule_work(&info
.task
);
935 wait_for_completion(&done
);
945 * Cycle through the processors sending APIC IPIs to boot each.
948 static int boot_cpu_logical_apicid
;
949 /* Where the IO area was mapped on multiquad, always 0 otherwise */
951 #ifdef CONFIG_X86_NUMAQ
952 EXPORT_SYMBOL(xquad_portio
);
955 static void __init
smp_boot_cpus(unsigned int max_cpus
)
957 int apicid
, cpu
, bit
, kicked
;
958 unsigned long bogosum
= 0;
961 * Setup boot CPU information
963 smp_store_cpu_info(0); /* Final full version of the data */
964 printk("CPU%d: ", 0);
965 print_cpu_info(&cpu_data
[0]);
967 boot_cpu_physical_apicid
= GET_APIC_ID(apic_read(APIC_ID
));
968 boot_cpu_logical_apicid
= logical_smp_processor_id();
969 x86_cpu_to_apicid
[0] = boot_cpu_physical_apicid
;
971 current_thread_info()->cpu
= 0;
973 set_cpu_sibling_map(0);
976 * If we couldn't find an SMP configuration at boot time,
977 * get out of here now!
979 if (!smp_found_config
&& !acpi_lapic
) {
980 printk(KERN_NOTICE
"SMP motherboard not detected.\n");
981 smpboot_clear_io_apic_irqs();
982 phys_cpu_present_map
= physid_mask_of_physid(0);
983 if (APIC_init_uniprocessor())
984 printk(KERN_NOTICE
"Local APIC not detected."
985 " Using dummy APIC emulation.\n");
986 map_cpu_to_logical_apicid();
987 cpu_set(0, cpu_sibling_map
[0]);
988 cpu_set(0, cpu_core_map
[0]);
993 * Should not be necessary because the MP table should list the boot
994 * CPU too, but we do it for the sake of robustness anyway.
995 * Makes no sense to do this check in clustered apic mode, so skip it
997 if (!check_phys_apicid_present(boot_cpu_physical_apicid
)) {
998 printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
999 boot_cpu_physical_apicid
);
1000 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
1004 * If we couldn't find a local APIC, then get out of here now!
1006 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
]) && !cpu_has_apic
) {
1007 printk(KERN_ERR
"BIOS bug, local APIC #%d not detected!...\n",
1008 boot_cpu_physical_apicid
);
1009 printk(KERN_ERR
"... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
1010 smpboot_clear_io_apic_irqs();
1011 phys_cpu_present_map
= physid_mask_of_physid(0);
1012 cpu_set(0, cpu_sibling_map
[0]);
1013 cpu_set(0, cpu_core_map
[0]);
1017 verify_local_APIC();
1020 * If SMP should be disabled, then really disable it!
1023 smp_found_config
= 0;
1024 printk(KERN_INFO
"SMP mode deactivated, forcing use of dummy APIC emulation.\n");
1025 smpboot_clear_io_apic_irqs();
1026 phys_cpu_present_map
= physid_mask_of_physid(0);
1027 cpu_set(0, cpu_sibling_map
[0]);
1028 cpu_set(0, cpu_core_map
[0]);
1034 map_cpu_to_logical_apicid();
1037 setup_portio_remap();
1040 * Scan the CPU present map and fire up the other CPUs via do_boot_cpu
1042 * In clustered apic mode, phys_cpu_present_map is a constructed thus:
1043 * bits 0-3 are quad0, 4-7 are quad1, etc. A perverse twist on the
1044 * clustered apic ID.
1046 Dprintk("CPU present map: %lx\n", physids_coerce(phys_cpu_present_map
));
1049 for (bit
= 0; kicked
< NR_CPUS
&& bit
< MAX_APICS
; bit
++) {
1050 apicid
= cpu_present_to_apicid(bit
);
1052 * Don't even attempt to start the boot CPU!
1054 if ((apicid
== boot_cpu_apicid
) || (apicid
== BAD_APICID
))
1057 if (!check_apicid_present(bit
))
1059 if (max_cpus
<= cpucount
+1)
1062 if (((cpu
= alloc_cpu_id()) <= 0) || do_boot_cpu(apicid
, cpu
))
1063 printk("CPU #%d not responding - cannot use it.\n",
1070 * Cleanup possible dangling ends...
1072 smpboot_restore_warm_reset_vector();
1075 * Allow the user to impress friends.
1077 Dprintk("Before bogomips.\n");
1078 for (cpu
= 0; cpu
< NR_CPUS
; cpu
++)
1079 if (cpu_isset(cpu
, cpu_callout_map
))
1080 bogosum
+= cpu_data
[cpu
].loops_per_jiffy
;
1082 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
1084 bogosum
/(500000/HZ
),
1085 (bogosum
/(5000/HZ
))%100);
1087 Dprintk("Before bogocount - setting activated=1.\n");
1090 printk(KERN_WARNING
"WARNING: SMP operation may be unreliable with B stepping processors.\n");
1093 * Don't taint if we are running SMP kernel on a single non-MP
1096 if (tainted
& TAINT_UNSAFE_SMP
) {
1098 printk (KERN_INFO
"WARNING: This combination of AMD processors is not suitable for SMP.\n");
1100 tainted
&= ~TAINT_UNSAFE_SMP
;
1103 Dprintk("Boot done.\n");
1106 * construct cpu_sibling_map[], so that we can tell sibling CPUs
1109 for (cpu
= 0; cpu
< NR_CPUS
; cpu
++) {
1110 cpus_clear(cpu_sibling_map
[cpu
]);
1111 cpus_clear(cpu_core_map
[cpu
]);
1114 cpu_set(0, cpu_sibling_map
[0]);
1115 cpu_set(0, cpu_core_map
[0]);
1117 smpboot_setup_io_apic();
1122 /* These are wrappers to interface to the new boot process. Someone
1123 who understands all this stuff should rewrite it properly. --RR 15/Jul/02 */
1124 void __init
native_smp_prepare_cpus(unsigned int max_cpus
)
1126 smp_commenced_mask
= cpumask_of_cpu(0);
1127 cpu_callin_map
= cpumask_of_cpu(0);
1129 smp_boot_cpus(max_cpus
);
1132 void __init
native_smp_prepare_boot_cpu(void)
1134 unsigned int cpu
= smp_processor_id();
1137 switch_to_new_gdt();
1139 cpu_set(cpu
, cpu_online_map
);
1140 cpu_set(cpu
, cpu_callout_map
);
1141 cpu_set(cpu
, cpu_present_map
);
1142 cpu_set(cpu
, cpu_possible_map
);
1143 __get_cpu_var(cpu_state
) = CPU_ONLINE
;
1146 #ifdef CONFIG_HOTPLUG_CPU
1148 remove_siblinginfo(int cpu
)
1151 struct cpuinfo_x86
*c
= cpu_data
;
1153 for_each_cpu_mask(sibling
, cpu_core_map
[cpu
]) {
1154 cpu_clear(cpu
, cpu_core_map
[sibling
]);
1156 * last thread sibling in this cpu core going down
1158 if (cpus_weight(cpu_sibling_map
[cpu
]) == 1)
1159 c
[sibling
].booted_cores
--;
1162 for_each_cpu_mask(sibling
, cpu_sibling_map
[cpu
])
1163 cpu_clear(cpu
, cpu_sibling_map
[sibling
]);
1164 cpus_clear(cpu_sibling_map
[cpu
]);
1165 cpus_clear(cpu_core_map
[cpu
]);
1166 c
[cpu
].phys_proc_id
= 0;
1167 c
[cpu
].cpu_core_id
= 0;
1168 cpu_clear(cpu
, cpu_sibling_setup_map
);
1171 int __cpu_disable(void)
1173 cpumask_t map
= cpu_online_map
;
1174 int cpu
= smp_processor_id();
1177 * Perhaps use cpufreq to drop frequency, but that could go
1178 * into generic code.
1180 * We won't take down the boot processor on i386 due to some
1181 * interrupts only being able to be serviced by the BSP.
1182 * Especially so if we're not using an IOAPIC -zwane
1186 if (nmi_watchdog
== NMI_LOCAL_APIC
)
1187 stop_apic_nmi_watchdog(NULL
);
1189 /* Allow any queued timer interrupts to get serviced */
1192 local_irq_disable();
1194 remove_siblinginfo(cpu
);
1196 cpu_clear(cpu
, map
);
1198 /* It's now safe to remove this processor from the online map */
1199 cpu_clear(cpu
, cpu_online_map
);
1203 void __cpu_die(unsigned int cpu
)
1205 /* We don't do anything here: idle task is faking death itself. */
1208 for (i
= 0; i
< 10; i
++) {
1209 /* They ack this in play_dead by setting CPU_DEAD */
1210 if (per_cpu(cpu_state
, cpu
) == CPU_DEAD
) {
1211 printk ("CPU %d is now offline\n", cpu
);
1212 if (1 == num_online_cpus())
1213 alternatives_smp_switch(0);
1218 printk(KERN_ERR
"CPU %u didn't die...\n", cpu
);
1220 #else /* ... !CONFIG_HOTPLUG_CPU */
1221 int __cpu_disable(void)
1226 void __cpu_die(unsigned int cpu
)
1228 /* We said "no" in __cpu_disable */
1231 #endif /* CONFIG_HOTPLUG_CPU */
1233 int __cpuinit
native_cpu_up(unsigned int cpu
)
1235 unsigned long flags
;
1236 #ifdef CONFIG_HOTPLUG_CPU
1240 * We do warm boot only on cpus that had booted earlier
1241 * Otherwise cold boot is all handled from smp_boot_cpus().
1242 * cpu_callin_map is set during AP kickstart process. Its reset
1243 * when a cpu is taken offline from cpu_exit_clear().
1245 if (!cpu_isset(cpu
, cpu_callin_map
))
1246 ret
= __smp_prepare_cpu(cpu
);
1252 /* In case one didn't come up */
1253 if (!cpu_isset(cpu
, cpu_callin_map
)) {
1254 printk(KERN_DEBUG
"skipping cpu%d, didn't come online\n", cpu
);
1258 per_cpu(cpu_state
, cpu
) = CPU_UP_PREPARE
;
1259 /* Unleash the CPU! */
1260 cpu_set(cpu
, smp_commenced_mask
);
1263 * Check TSC synchronization with the AP (keep irqs disabled
1266 local_irq_save(flags
);
1267 check_tsc_sync_source(cpu
);
1268 local_irq_restore(flags
);
1270 while (!cpu_isset(cpu
, cpu_online_map
)) {
1272 touch_nmi_watchdog();
1278 void __init
native_smp_cpus_done(unsigned int max_cpus
)
1280 #ifdef CONFIG_X86_IO_APIC
1281 setup_ioapic_dest();
1284 #ifndef CONFIG_HOTPLUG_CPU
1286 * Disable executability of the SMP trampoline:
1288 set_kernel_exec((unsigned long)trampoline_base
, trampoline_exec
);
1292 void __init
smp_intr_init(void)
1295 * IRQ0 must be given a fixed assignment and initialized,
1296 * because it's used before the IO-APIC is set up.
1298 set_intr_gate(FIRST_DEVICE_VECTOR
, interrupt
[0]);
1301 * The reschedule interrupt is a CPU-to-CPU reschedule-helper
1302 * IPI, driven by wakeup.
1304 set_intr_gate(RESCHEDULE_VECTOR
, reschedule_interrupt
);
1306 /* IPI for invalidation */
1307 set_intr_gate(INVALIDATE_TLB_VECTOR
, invalidate_interrupt
);
1309 /* IPI for generic function call */
1310 set_intr_gate(CALL_FUNCTION_VECTOR
, call_function_interrupt
);
1314 * If the BIOS enumerates physical processors before logical,
1315 * maxcpus=N at enumeration-time can be used to disable HT.
1317 static int __init
parse_maxcpus(char *arg
)
1319 extern unsigned int maxcpus
;
1321 maxcpus
= simple_strtoul(arg
, NULL
, 0);
1324 early_param("maxcpus", parse_maxcpus
);