2 * Driver for 8250/16550-type serial ports
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 * Copyright (C) 2001 Russell King.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/serial_8250.h>
16 struct uart_8250_port
{
17 struct uart_port port
;
18 struct timer_list timer
; /* "no irq" timer */
19 struct list_head list
; /* ports on this IRQ */
20 unsigned short capabilities
; /* port capabilities */
21 unsigned short bugs
; /* port bugs */
22 unsigned int tx_loadsz
; /* transmit fifo load size */
27 unsigned char mcr_mask
; /* mask of user bits */
28 unsigned char mcr_force
; /* mask of forced bits */
29 unsigned char cur_iotype
; /* Running I/O type */
32 * Some bits in registers are cleared on a read, so they must
33 * be saved whenever the register is read but the bits will not
34 * be immediately processed.
36 #define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS
37 unsigned char lsr_saved_flags
;
38 #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
39 unsigned char msr_saved_flags
;
41 /* 8250 specific callbacks */
42 int (*dl_read
)(struct uart_8250_port
*);
43 void (*dl_write
)(struct uart_8250_port
*, int);
46 struct old_serial_port
{
48 unsigned int baud_base
;
53 unsigned char io_type
;
54 unsigned char *iomem_base
;
55 unsigned short iomem_reg_shift
;
56 unsigned long irqflags
;
60 * This replaces serial_uart_config in include/linux/serial.h
62 struct serial8250_config
{
64 unsigned short fifo_size
;
65 unsigned short tx_loadsz
;
70 #define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
71 #define UART_CAP_EFR (1 << 9) /* UART has EFR */
72 #define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
73 #define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
74 #define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
75 #define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */
77 #define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
78 #define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
79 #define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
80 #define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
82 #define PROBE_RSA (1 << 0)
83 #define PROBE_ANY (~0)
85 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
87 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
88 #define SERIAL8250_SHARE_IRQS 1
90 #define SERIAL8250_SHARE_IRQS 0
93 static inline int serial_in(struct uart_8250_port
*up
, int offset
)
95 return up
->port
.serial_in(&up
->port
, offset
);
98 static inline void serial_out(struct uart_8250_port
*up
, int offset
, int value
)
100 up
->port
.serial_out(&up
->port
, offset
, value
);
103 void serial8250_clear_and_reinit_fifos(struct uart_8250_port
*p
);
105 static inline int serial_dl_read(struct uart_8250_port
*up
)
107 return up
->dl_read(up
);
110 static inline void serial_dl_write(struct uart_8250_port
*up
, int value
)
112 up
->dl_write(up
, value
);
115 #if defined(__alpha__) && !defined(CONFIG_PCI)
117 * Digital did something really horribly wrong with the OUT1 and OUT2
118 * lines on at least some ALPHA's. The failure mode is that if either
119 * is cleared, the machine locks up with endless interrupts.
121 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
122 #elif defined(CONFIG_SBC8560)
124 * WindRiver did something similarly broken on their SBC8560 board. The
125 * UART tristates its IRQ output while OUT2 is clear, but they pulled
126 * the interrupt line _up_ instead of down, so if we register the IRQ
127 * while the UART is in that state, we die in an IRQ storm. */
128 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2)
130 #define ALPHA_KLUDGE_MCR 0