2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
7 * Copyright (C) 2006 Qumranet, Inc.
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
20 #include "x86_emulate.h"
23 #include "segment_descriptor.h"
25 #include <linux/module.h>
26 #include <linux/kernel.h>
28 #include <linux/highmem.h>
29 #include <linux/sched.h>
30 #include <linux/moduleparam.h>
35 MODULE_AUTHOR("Qumranet");
36 MODULE_LICENSE("GPL");
38 static int bypass_guest_pf
= 1;
39 module_param(bypass_guest_pf
, bool, 0);
51 struct kvm_msr_entry
*guest_msrs
;
52 struct kvm_msr_entry
*host_msrs
;
57 int msr_offset_kernel_gs_base
;
62 u16 fs_sel
, gs_sel
, ldt_sel
;
63 int gs_ldt_reload_needed
;
65 int guest_efer_loaded
;
70 static inline struct vcpu_vmx
*to_vmx(struct kvm_vcpu
*vcpu
)
72 return container_of(vcpu
, struct vcpu_vmx
, vcpu
);
75 static int init_rmode_tss(struct kvm
*kvm
);
77 static DEFINE_PER_CPU(struct vmcs
*, vmxarea
);
78 static DEFINE_PER_CPU(struct vmcs
*, current_vmcs
);
80 static struct page
*vmx_io_bitmap_a
;
81 static struct page
*vmx_io_bitmap_b
;
83 static struct vmcs_config
{
87 u32 pin_based_exec_ctrl
;
88 u32 cpu_based_exec_ctrl
;
93 #define VMX_SEGMENT_FIELD(seg) \
94 [VCPU_SREG_##seg] = { \
95 .selector = GUEST_##seg##_SELECTOR, \
96 .base = GUEST_##seg##_BASE, \
97 .limit = GUEST_##seg##_LIMIT, \
98 .ar_bytes = GUEST_##seg##_AR_BYTES, \
101 static struct kvm_vmx_segment_field
{
106 } kvm_vmx_segment_fields
[] = {
107 VMX_SEGMENT_FIELD(CS
),
108 VMX_SEGMENT_FIELD(DS
),
109 VMX_SEGMENT_FIELD(ES
),
110 VMX_SEGMENT_FIELD(FS
),
111 VMX_SEGMENT_FIELD(GS
),
112 VMX_SEGMENT_FIELD(SS
),
113 VMX_SEGMENT_FIELD(TR
),
114 VMX_SEGMENT_FIELD(LDTR
),
118 * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
119 * away by decrementing the array size.
121 static const u32 vmx_msr_index
[] = {
123 MSR_SYSCALL_MASK
, MSR_LSTAR
, MSR_CSTAR
, MSR_KERNEL_GS_BASE
,
125 MSR_EFER
, MSR_K6_STAR
,
127 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
129 static void load_msrs(struct kvm_msr_entry
*e
, int n
)
133 for (i
= 0; i
< n
; ++i
)
134 wrmsrl(e
[i
].index
, e
[i
].data
);
137 static void save_msrs(struct kvm_msr_entry
*e
, int n
)
141 for (i
= 0; i
< n
; ++i
)
142 rdmsrl(e
[i
].index
, e
[i
].data
);
145 static inline int is_page_fault(u32 intr_info
)
147 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
148 INTR_INFO_VALID_MASK
)) ==
149 (INTR_TYPE_EXCEPTION
| PF_VECTOR
| INTR_INFO_VALID_MASK
);
152 static inline int is_no_device(u32 intr_info
)
154 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
155 INTR_INFO_VALID_MASK
)) ==
156 (INTR_TYPE_EXCEPTION
| NM_VECTOR
| INTR_INFO_VALID_MASK
);
159 static inline int is_invalid_opcode(u32 intr_info
)
161 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
162 INTR_INFO_VALID_MASK
)) ==
163 (INTR_TYPE_EXCEPTION
| UD_VECTOR
| INTR_INFO_VALID_MASK
);
166 static inline int is_external_interrupt(u32 intr_info
)
168 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VALID_MASK
))
169 == (INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
172 static inline int cpu_has_vmx_tpr_shadow(void)
174 return (vmcs_config
.cpu_based_exec_ctrl
& CPU_BASED_TPR_SHADOW
);
177 static inline int vm_need_tpr_shadow(struct kvm
*kvm
)
179 return ((cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm
)));
182 static int __find_msr_index(struct vcpu_vmx
*vmx
, u32 msr
)
186 for (i
= 0; i
< vmx
->nmsrs
; ++i
)
187 if (vmx
->guest_msrs
[i
].index
== msr
)
192 static struct kvm_msr_entry
*find_msr_entry(struct vcpu_vmx
*vmx
, u32 msr
)
196 i
= __find_msr_index(vmx
, msr
);
198 return &vmx
->guest_msrs
[i
];
202 static void vmcs_clear(struct vmcs
*vmcs
)
204 u64 phys_addr
= __pa(vmcs
);
207 asm volatile (ASM_VMX_VMCLEAR_RAX
"; setna %0"
208 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
211 printk(KERN_ERR
"kvm: vmclear fail: %p/%llx\n",
215 static void __vcpu_clear(void *arg
)
217 struct vcpu_vmx
*vmx
= arg
;
218 int cpu
= raw_smp_processor_id();
220 if (vmx
->vcpu
.cpu
== cpu
)
221 vmcs_clear(vmx
->vmcs
);
222 if (per_cpu(current_vmcs
, cpu
) == vmx
->vmcs
)
223 per_cpu(current_vmcs
, cpu
) = NULL
;
224 rdtscll(vmx
->vcpu
.host_tsc
);
227 static void vcpu_clear(struct vcpu_vmx
*vmx
)
229 if (vmx
->vcpu
.cpu
== -1)
231 smp_call_function_single(vmx
->vcpu
.cpu
, __vcpu_clear
, vmx
, 0, 1);
235 static unsigned long vmcs_readl(unsigned long field
)
239 asm volatile (ASM_VMX_VMREAD_RDX_RAX
240 : "=a"(value
) : "d"(field
) : "cc");
244 static u16
vmcs_read16(unsigned long field
)
246 return vmcs_readl(field
);
249 static u32
vmcs_read32(unsigned long field
)
251 return vmcs_readl(field
);
254 static u64
vmcs_read64(unsigned long field
)
257 return vmcs_readl(field
);
259 return vmcs_readl(field
) | ((u64
)vmcs_readl(field
+1) << 32);
263 static noinline
void vmwrite_error(unsigned long field
, unsigned long value
)
265 printk(KERN_ERR
"vmwrite error: reg %lx value %lx (err %d)\n",
266 field
, value
, vmcs_read32(VM_INSTRUCTION_ERROR
));
270 static void vmcs_writel(unsigned long field
, unsigned long value
)
274 asm volatile (ASM_VMX_VMWRITE_RAX_RDX
"; setna %0"
275 : "=q"(error
) : "a"(value
), "d"(field
) : "cc");
277 vmwrite_error(field
, value
);
280 static void vmcs_write16(unsigned long field
, u16 value
)
282 vmcs_writel(field
, value
);
285 static void vmcs_write32(unsigned long field
, u32 value
)
287 vmcs_writel(field
, value
);
290 static void vmcs_write64(unsigned long field
, u64 value
)
293 vmcs_writel(field
, value
);
295 vmcs_writel(field
, value
);
297 vmcs_writel(field
+1, value
>> 32);
301 static void vmcs_clear_bits(unsigned long field
, u32 mask
)
303 vmcs_writel(field
, vmcs_readl(field
) & ~mask
);
306 static void vmcs_set_bits(unsigned long field
, u32 mask
)
308 vmcs_writel(field
, vmcs_readl(field
) | mask
);
311 static void update_exception_bitmap(struct kvm_vcpu
*vcpu
)
315 eb
= (1u << PF_VECTOR
) | (1u << UD_VECTOR
);
316 if (!vcpu
->fpu_active
)
317 eb
|= 1u << NM_VECTOR
;
318 if (vcpu
->guest_debug
.enabled
)
320 if (vcpu
->rmode
.active
)
322 vmcs_write32(EXCEPTION_BITMAP
, eb
);
325 static void reload_tss(void)
327 #ifndef CONFIG_X86_64
330 * VT restores TR but not its size. Useless.
332 struct descriptor_table gdt
;
333 struct segment_descriptor
*descs
;
336 descs
= (void *)gdt
.base
;
337 descs
[GDT_ENTRY_TSS
].type
= 9; /* available TSS */
342 static void load_transition_efer(struct vcpu_vmx
*vmx
)
344 int efer_offset
= vmx
->msr_offset_efer
;
345 u64 host_efer
= vmx
->host_msrs
[efer_offset
].data
;
346 u64 guest_efer
= vmx
->guest_msrs
[efer_offset
].data
;
352 * NX is emulated; LMA and LME handled by hardware; SCE meaninless
355 ignore_bits
= EFER_NX
| EFER_SCE
;
357 ignore_bits
|= EFER_LMA
| EFER_LME
;
358 /* SCE is meaningful only in long mode on Intel */
359 if (guest_efer
& EFER_LMA
)
360 ignore_bits
&= ~(u64
)EFER_SCE
;
362 if ((guest_efer
& ~ignore_bits
) == (host_efer
& ~ignore_bits
))
365 vmx
->host_state
.guest_efer_loaded
= 1;
366 guest_efer
&= ~ignore_bits
;
367 guest_efer
|= host_efer
& ignore_bits
;
368 wrmsrl(MSR_EFER
, guest_efer
);
369 vmx
->vcpu
.stat
.efer_reload
++;
372 static void reload_host_efer(struct vcpu_vmx
*vmx
)
374 if (vmx
->host_state
.guest_efer_loaded
) {
375 vmx
->host_state
.guest_efer_loaded
= 0;
376 load_msrs(vmx
->host_msrs
+ vmx
->msr_offset_efer
, 1);
380 static void vmx_save_host_state(struct kvm_vcpu
*vcpu
)
382 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
384 if (vmx
->host_state
.loaded
)
387 vmx
->host_state
.loaded
= 1;
389 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
390 * allow segment selectors with cpl > 0 or ti == 1.
392 vmx
->host_state
.ldt_sel
= read_ldt();
393 vmx
->host_state
.gs_ldt_reload_needed
= vmx
->host_state
.ldt_sel
;
394 vmx
->host_state
.fs_sel
= read_fs();
395 if (!(vmx
->host_state
.fs_sel
& 7)) {
396 vmcs_write16(HOST_FS_SELECTOR
, vmx
->host_state
.fs_sel
);
397 vmx
->host_state
.fs_reload_needed
= 0;
399 vmcs_write16(HOST_FS_SELECTOR
, 0);
400 vmx
->host_state
.fs_reload_needed
= 1;
402 vmx
->host_state
.gs_sel
= read_gs();
403 if (!(vmx
->host_state
.gs_sel
& 7))
404 vmcs_write16(HOST_GS_SELECTOR
, vmx
->host_state
.gs_sel
);
406 vmcs_write16(HOST_GS_SELECTOR
, 0);
407 vmx
->host_state
.gs_ldt_reload_needed
= 1;
411 vmcs_writel(HOST_FS_BASE
, read_msr(MSR_FS_BASE
));
412 vmcs_writel(HOST_GS_BASE
, read_msr(MSR_GS_BASE
));
414 vmcs_writel(HOST_FS_BASE
, segment_base(vmx
->host_state
.fs_sel
));
415 vmcs_writel(HOST_GS_BASE
, segment_base(vmx
->host_state
.gs_sel
));
419 if (is_long_mode(&vmx
->vcpu
))
420 save_msrs(vmx
->host_msrs
+
421 vmx
->msr_offset_kernel_gs_base
, 1);
424 load_msrs(vmx
->guest_msrs
, vmx
->save_nmsrs
);
425 load_transition_efer(vmx
);
428 static void vmx_load_host_state(struct vcpu_vmx
*vmx
)
432 if (!vmx
->host_state
.loaded
)
435 vmx
->host_state
.loaded
= 0;
436 if (vmx
->host_state
.fs_reload_needed
)
437 load_fs(vmx
->host_state
.fs_sel
);
438 if (vmx
->host_state
.gs_ldt_reload_needed
) {
439 load_ldt(vmx
->host_state
.ldt_sel
);
441 * If we have to reload gs, we must take care to
442 * preserve our gs base.
444 local_irq_save(flags
);
445 load_gs(vmx
->host_state
.gs_sel
);
447 wrmsrl(MSR_GS_BASE
, vmcs_readl(HOST_GS_BASE
));
449 local_irq_restore(flags
);
452 save_msrs(vmx
->guest_msrs
, vmx
->save_nmsrs
);
453 load_msrs(vmx
->host_msrs
, vmx
->save_nmsrs
);
454 reload_host_efer(vmx
);
458 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
459 * vcpu mutex is already taken.
461 static void vmx_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
463 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
464 u64 phys_addr
= __pa(vmx
->vmcs
);
467 if (vcpu
->cpu
!= cpu
) {
469 kvm_migrate_apic_timer(vcpu
);
472 if (per_cpu(current_vmcs
, cpu
) != vmx
->vmcs
) {
475 per_cpu(current_vmcs
, cpu
) = vmx
->vmcs
;
476 asm volatile (ASM_VMX_VMPTRLD_RAX
"; setna %0"
477 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
480 printk(KERN_ERR
"kvm: vmptrld %p/%llx fail\n",
481 vmx
->vmcs
, phys_addr
);
484 if (vcpu
->cpu
!= cpu
) {
485 struct descriptor_table dt
;
486 unsigned long sysenter_esp
;
490 * Linux uses per-cpu TSS and GDT, so set these when switching
493 vmcs_writel(HOST_TR_BASE
, read_tr_base()); /* 22.2.4 */
495 vmcs_writel(HOST_GDTR_BASE
, dt
.base
); /* 22.2.4 */
497 rdmsrl(MSR_IA32_SYSENTER_ESP
, sysenter_esp
);
498 vmcs_writel(HOST_IA32_SYSENTER_ESP
, sysenter_esp
); /* 22.2.3 */
501 * Make sure the time stamp counter is monotonous.
504 delta
= vcpu
->host_tsc
- tsc_this
;
505 vmcs_write64(TSC_OFFSET
, vmcs_read64(TSC_OFFSET
) + delta
);
509 static void vmx_vcpu_put(struct kvm_vcpu
*vcpu
)
511 vmx_load_host_state(to_vmx(vcpu
));
512 kvm_put_guest_fpu(vcpu
);
515 static void vmx_fpu_activate(struct kvm_vcpu
*vcpu
)
517 if (vcpu
->fpu_active
)
519 vcpu
->fpu_active
= 1;
520 vmcs_clear_bits(GUEST_CR0
, X86_CR0_TS
);
521 if (vcpu
->cr0
& X86_CR0_TS
)
522 vmcs_set_bits(GUEST_CR0
, X86_CR0_TS
);
523 update_exception_bitmap(vcpu
);
526 static void vmx_fpu_deactivate(struct kvm_vcpu
*vcpu
)
528 if (!vcpu
->fpu_active
)
530 vcpu
->fpu_active
= 0;
531 vmcs_set_bits(GUEST_CR0
, X86_CR0_TS
);
532 update_exception_bitmap(vcpu
);
535 static void vmx_vcpu_decache(struct kvm_vcpu
*vcpu
)
537 vcpu_clear(to_vmx(vcpu
));
540 static unsigned long vmx_get_rflags(struct kvm_vcpu
*vcpu
)
542 return vmcs_readl(GUEST_RFLAGS
);
545 static void vmx_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
547 if (vcpu
->rmode
.active
)
548 rflags
|= X86_EFLAGS_IOPL
| X86_EFLAGS_VM
;
549 vmcs_writel(GUEST_RFLAGS
, rflags
);
552 static void skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
555 u32 interruptibility
;
557 rip
= vmcs_readl(GUEST_RIP
);
558 rip
+= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
559 vmcs_writel(GUEST_RIP
, rip
);
562 * We emulated an instruction, so temporary interrupt blocking
563 * should be removed, if set.
565 interruptibility
= vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
);
566 if (interruptibility
& 3)
567 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
,
568 interruptibility
& ~3);
569 vcpu
->interrupt_window_open
= 1;
572 static void vmx_inject_gp(struct kvm_vcpu
*vcpu
, unsigned error_code
)
574 printk(KERN_DEBUG
"inject_general_protection: rip 0x%lx\n",
575 vmcs_readl(GUEST_RIP
));
576 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, error_code
);
577 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
579 INTR_TYPE_EXCEPTION
|
580 INTR_INFO_DELIEVER_CODE_MASK
|
581 INTR_INFO_VALID_MASK
);
584 static void vmx_inject_ud(struct kvm_vcpu
*vcpu
)
586 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
588 INTR_TYPE_EXCEPTION
|
589 INTR_INFO_VALID_MASK
);
593 * Swap MSR entry in host/guest MSR entry array.
596 static void move_msr_up(struct vcpu_vmx
*vmx
, int from
, int to
)
598 struct kvm_msr_entry tmp
;
600 tmp
= vmx
->guest_msrs
[to
];
601 vmx
->guest_msrs
[to
] = vmx
->guest_msrs
[from
];
602 vmx
->guest_msrs
[from
] = tmp
;
603 tmp
= vmx
->host_msrs
[to
];
604 vmx
->host_msrs
[to
] = vmx
->host_msrs
[from
];
605 vmx
->host_msrs
[from
] = tmp
;
610 * Set up the vmcs to automatically save and restore system
611 * msrs. Don't touch the 64-bit msrs if the guest is in legacy
612 * mode, as fiddling with msrs is very expensive.
614 static void setup_msrs(struct vcpu_vmx
*vmx
)
620 if (is_long_mode(&vmx
->vcpu
)) {
623 index
= __find_msr_index(vmx
, MSR_SYSCALL_MASK
);
625 move_msr_up(vmx
, index
, save_nmsrs
++);
626 index
= __find_msr_index(vmx
, MSR_LSTAR
);
628 move_msr_up(vmx
, index
, save_nmsrs
++);
629 index
= __find_msr_index(vmx
, MSR_CSTAR
);
631 move_msr_up(vmx
, index
, save_nmsrs
++);
632 index
= __find_msr_index(vmx
, MSR_KERNEL_GS_BASE
);
634 move_msr_up(vmx
, index
, save_nmsrs
++);
636 * MSR_K6_STAR is only needed on long mode guests, and only
637 * if efer.sce is enabled.
639 index
= __find_msr_index(vmx
, MSR_K6_STAR
);
640 if ((index
>= 0) && (vmx
->vcpu
.shadow_efer
& EFER_SCE
))
641 move_msr_up(vmx
, index
, save_nmsrs
++);
644 vmx
->save_nmsrs
= save_nmsrs
;
647 vmx
->msr_offset_kernel_gs_base
=
648 __find_msr_index(vmx
, MSR_KERNEL_GS_BASE
);
650 vmx
->msr_offset_efer
= __find_msr_index(vmx
, MSR_EFER
);
654 * reads and returns guest's timestamp counter "register"
655 * guest_tsc = host_tsc + tsc_offset -- 21.3
657 static u64
guest_read_tsc(void)
659 u64 host_tsc
, tsc_offset
;
662 tsc_offset
= vmcs_read64(TSC_OFFSET
);
663 return host_tsc
+ tsc_offset
;
667 * writes 'guest_tsc' into guest's timestamp counter "register"
668 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
670 static void guest_write_tsc(u64 guest_tsc
)
675 vmcs_write64(TSC_OFFSET
, guest_tsc
- host_tsc
);
679 * Reads an msr value (of 'msr_index') into 'pdata'.
680 * Returns 0 on success, non-0 otherwise.
681 * Assumes vcpu_load() was already called.
683 static int vmx_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
686 struct kvm_msr_entry
*msr
;
689 printk(KERN_ERR
"BUG: get_msr called with NULL pdata\n");
696 data
= vmcs_readl(GUEST_FS_BASE
);
699 data
= vmcs_readl(GUEST_GS_BASE
);
702 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
704 case MSR_IA32_TIME_STAMP_COUNTER
:
705 data
= guest_read_tsc();
707 case MSR_IA32_SYSENTER_CS
:
708 data
= vmcs_read32(GUEST_SYSENTER_CS
);
710 case MSR_IA32_SYSENTER_EIP
:
711 data
= vmcs_readl(GUEST_SYSENTER_EIP
);
713 case MSR_IA32_SYSENTER_ESP
:
714 data
= vmcs_readl(GUEST_SYSENTER_ESP
);
717 msr
= find_msr_entry(to_vmx(vcpu
), msr_index
);
722 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
730 * Writes msr value into into the appropriate "register".
731 * Returns 0 on success, non-0 otherwise.
732 * Assumes vcpu_load() was already called.
734 static int vmx_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
736 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
737 struct kvm_msr_entry
*msr
;
743 ret
= kvm_set_msr_common(vcpu
, msr_index
, data
);
744 if (vmx
->host_state
.loaded
) {
745 reload_host_efer(vmx
);
746 load_transition_efer(vmx
);
750 vmcs_writel(GUEST_FS_BASE
, data
);
753 vmcs_writel(GUEST_GS_BASE
, data
);
756 case MSR_IA32_SYSENTER_CS
:
757 vmcs_write32(GUEST_SYSENTER_CS
, data
);
759 case MSR_IA32_SYSENTER_EIP
:
760 vmcs_writel(GUEST_SYSENTER_EIP
, data
);
762 case MSR_IA32_SYSENTER_ESP
:
763 vmcs_writel(GUEST_SYSENTER_ESP
, data
);
765 case MSR_IA32_TIME_STAMP_COUNTER
:
766 guest_write_tsc(data
);
769 msr
= find_msr_entry(vmx
, msr_index
);
772 if (vmx
->host_state
.loaded
)
773 load_msrs(vmx
->guest_msrs
, vmx
->save_nmsrs
);
776 ret
= kvm_set_msr_common(vcpu
, msr_index
, data
);
783 * Sync the rsp and rip registers into the vcpu structure. This allows
784 * registers to be accessed by indexing vcpu->regs.
786 static void vcpu_load_rsp_rip(struct kvm_vcpu
*vcpu
)
788 vcpu
->regs
[VCPU_REGS_RSP
] = vmcs_readl(GUEST_RSP
);
789 vcpu
->rip
= vmcs_readl(GUEST_RIP
);
793 * Syncs rsp and rip back into the vmcs. Should be called after possible
796 static void vcpu_put_rsp_rip(struct kvm_vcpu
*vcpu
)
798 vmcs_writel(GUEST_RSP
, vcpu
->regs
[VCPU_REGS_RSP
]);
799 vmcs_writel(GUEST_RIP
, vcpu
->rip
);
802 static int set_guest_debug(struct kvm_vcpu
*vcpu
, struct kvm_debug_guest
*dbg
)
804 unsigned long dr7
= 0x400;
807 old_singlestep
= vcpu
->guest_debug
.singlestep
;
809 vcpu
->guest_debug
.enabled
= dbg
->enabled
;
810 if (vcpu
->guest_debug
.enabled
) {
813 dr7
|= 0x200; /* exact */
814 for (i
= 0; i
< 4; ++i
) {
815 if (!dbg
->breakpoints
[i
].enabled
)
817 vcpu
->guest_debug
.bp
[i
] = dbg
->breakpoints
[i
].address
;
818 dr7
|= 2 << (i
*2); /* global enable */
819 dr7
|= 0 << (i
*4+16); /* execution breakpoint */
822 vcpu
->guest_debug
.singlestep
= dbg
->singlestep
;
824 vcpu
->guest_debug
.singlestep
= 0;
826 if (old_singlestep
&& !vcpu
->guest_debug
.singlestep
) {
829 flags
= vmcs_readl(GUEST_RFLAGS
);
830 flags
&= ~(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
831 vmcs_writel(GUEST_RFLAGS
, flags
);
834 update_exception_bitmap(vcpu
);
835 vmcs_writel(GUEST_DR7
, dr7
);
840 static int vmx_get_irq(struct kvm_vcpu
*vcpu
)
844 idtv_info_field
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
845 if (idtv_info_field
& INTR_INFO_VALID_MASK
) {
846 if (is_external_interrupt(idtv_info_field
))
847 return idtv_info_field
& VECTORING_INFO_VECTOR_MASK
;
849 printk(KERN_DEBUG
"pending exception: not handled yet\n");
854 static __init
int cpu_has_kvm_support(void)
856 unsigned long ecx
= cpuid_ecx(1);
857 return test_bit(5, &ecx
); /* CPUID.1:ECX.VMX[bit 5] -> VT */
860 static __init
int vmx_disabled_by_bios(void)
864 rdmsrl(MSR_IA32_FEATURE_CONTROL
, msr
);
865 return (msr
& (MSR_IA32_FEATURE_CONTROL_LOCKED
|
866 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED
))
867 == MSR_IA32_FEATURE_CONTROL_LOCKED
;
868 /* locked but not enabled */
871 static void hardware_enable(void *garbage
)
873 int cpu
= raw_smp_processor_id();
874 u64 phys_addr
= __pa(per_cpu(vmxarea
, cpu
));
877 rdmsrl(MSR_IA32_FEATURE_CONTROL
, old
);
878 if ((old
& (MSR_IA32_FEATURE_CONTROL_LOCKED
|
879 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED
))
880 != (MSR_IA32_FEATURE_CONTROL_LOCKED
|
881 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED
))
882 /* enable and lock */
883 wrmsrl(MSR_IA32_FEATURE_CONTROL
, old
|
884 MSR_IA32_FEATURE_CONTROL_LOCKED
|
885 MSR_IA32_FEATURE_CONTROL_VMXON_ENABLED
);
886 write_cr4(read_cr4() | X86_CR4_VMXE
); /* FIXME: not cpu hotplug safe */
887 asm volatile (ASM_VMX_VMXON_RAX
: : "a"(&phys_addr
), "m"(phys_addr
)
891 static void hardware_disable(void *garbage
)
893 asm volatile (ASM_VMX_VMXOFF
: : : "cc");
896 static __init
int adjust_vmx_controls(u32 ctl_min
, u32 ctl_opt
,
897 u32 msr
, u32
*result
)
899 u32 vmx_msr_low
, vmx_msr_high
;
900 u32 ctl
= ctl_min
| ctl_opt
;
902 rdmsr(msr
, vmx_msr_low
, vmx_msr_high
);
904 ctl
&= vmx_msr_high
; /* bit == 0 in high word ==> must be zero */
905 ctl
|= vmx_msr_low
; /* bit == 1 in low word ==> must be one */
907 /* Ensure minimum (required) set of control bits are supported. */
915 static __init
int setup_vmcs_config(struct vmcs_config
*vmcs_conf
)
917 u32 vmx_msr_low
, vmx_msr_high
;
919 u32 _pin_based_exec_control
= 0;
920 u32 _cpu_based_exec_control
= 0;
921 u32 _vmexit_control
= 0;
922 u32 _vmentry_control
= 0;
924 min
= PIN_BASED_EXT_INTR_MASK
| PIN_BASED_NMI_EXITING
;
926 if (adjust_vmx_controls(min
, opt
, MSR_IA32_VMX_PINBASED_CTLS
,
927 &_pin_based_exec_control
) < 0)
930 min
= CPU_BASED_HLT_EXITING
|
932 CPU_BASED_CR8_LOAD_EXITING
|
933 CPU_BASED_CR8_STORE_EXITING
|
935 CPU_BASED_USE_IO_BITMAPS
|
936 CPU_BASED_MOV_DR_EXITING
|
937 CPU_BASED_USE_TSC_OFFSETING
;
939 opt
= CPU_BASED_TPR_SHADOW
;
943 if (adjust_vmx_controls(min
, opt
, MSR_IA32_VMX_PROCBASED_CTLS
,
944 &_cpu_based_exec_control
) < 0)
947 if ((_cpu_based_exec_control
& CPU_BASED_TPR_SHADOW
))
948 _cpu_based_exec_control
&= ~CPU_BASED_CR8_LOAD_EXITING
&
949 ~CPU_BASED_CR8_STORE_EXITING
;
954 min
|= VM_EXIT_HOST_ADDR_SPACE_SIZE
;
957 if (adjust_vmx_controls(min
, opt
, MSR_IA32_VMX_EXIT_CTLS
,
958 &_vmexit_control
) < 0)
962 if (adjust_vmx_controls(min
, opt
, MSR_IA32_VMX_ENTRY_CTLS
,
963 &_vmentry_control
) < 0)
966 rdmsr(MSR_IA32_VMX_BASIC
, vmx_msr_low
, vmx_msr_high
);
968 /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
969 if ((vmx_msr_high
& 0x1fff) > PAGE_SIZE
)
973 /* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
974 if (vmx_msr_high
& (1u<<16))
978 /* Require Write-Back (WB) memory type for VMCS accesses. */
979 if (((vmx_msr_high
>> 18) & 15) != 6)
982 vmcs_conf
->size
= vmx_msr_high
& 0x1fff;
983 vmcs_conf
->order
= get_order(vmcs_config
.size
);
984 vmcs_conf
->revision_id
= vmx_msr_low
;
986 vmcs_conf
->pin_based_exec_ctrl
= _pin_based_exec_control
;
987 vmcs_conf
->cpu_based_exec_ctrl
= _cpu_based_exec_control
;
988 vmcs_conf
->vmexit_ctrl
= _vmexit_control
;
989 vmcs_conf
->vmentry_ctrl
= _vmentry_control
;
994 static struct vmcs
*alloc_vmcs_cpu(int cpu
)
996 int node
= cpu_to_node(cpu
);
1000 pages
= alloc_pages_node(node
, GFP_KERNEL
, vmcs_config
.order
);
1003 vmcs
= page_address(pages
);
1004 memset(vmcs
, 0, vmcs_config
.size
);
1005 vmcs
->revision_id
= vmcs_config
.revision_id
; /* vmcs revision id */
1009 static struct vmcs
*alloc_vmcs(void)
1011 return alloc_vmcs_cpu(raw_smp_processor_id());
1014 static void free_vmcs(struct vmcs
*vmcs
)
1016 free_pages((unsigned long)vmcs
, vmcs_config
.order
);
1019 static void free_kvm_area(void)
1023 for_each_online_cpu(cpu
)
1024 free_vmcs(per_cpu(vmxarea
, cpu
));
1027 static __init
int alloc_kvm_area(void)
1031 for_each_online_cpu(cpu
) {
1034 vmcs
= alloc_vmcs_cpu(cpu
);
1040 per_cpu(vmxarea
, cpu
) = vmcs
;
1045 static __init
int hardware_setup(void)
1047 if (setup_vmcs_config(&vmcs_config
) < 0)
1049 return alloc_kvm_area();
1052 static __exit
void hardware_unsetup(void)
1057 static void fix_pmode_dataseg(int seg
, struct kvm_save_segment
*save
)
1059 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1061 if (vmcs_readl(sf
->base
) == save
->base
&& (save
->base
& AR_S_MASK
)) {
1062 vmcs_write16(sf
->selector
, save
->selector
);
1063 vmcs_writel(sf
->base
, save
->base
);
1064 vmcs_write32(sf
->limit
, save
->limit
);
1065 vmcs_write32(sf
->ar_bytes
, save
->ar
);
1067 u32 dpl
= (vmcs_read16(sf
->selector
) & SELECTOR_RPL_MASK
)
1069 vmcs_write32(sf
->ar_bytes
, 0x93 | dpl
);
1073 static void enter_pmode(struct kvm_vcpu
*vcpu
)
1075 unsigned long flags
;
1077 vcpu
->rmode
.active
= 0;
1079 vmcs_writel(GUEST_TR_BASE
, vcpu
->rmode
.tr
.base
);
1080 vmcs_write32(GUEST_TR_LIMIT
, vcpu
->rmode
.tr
.limit
);
1081 vmcs_write32(GUEST_TR_AR_BYTES
, vcpu
->rmode
.tr
.ar
);
1083 flags
= vmcs_readl(GUEST_RFLAGS
);
1084 flags
&= ~(X86_EFLAGS_IOPL
| X86_EFLAGS_VM
);
1085 flags
|= (vcpu
->rmode
.save_iopl
<< IOPL_SHIFT
);
1086 vmcs_writel(GUEST_RFLAGS
, flags
);
1088 vmcs_writel(GUEST_CR4
, (vmcs_readl(GUEST_CR4
) & ~X86_CR4_VME
) |
1089 (vmcs_readl(CR4_READ_SHADOW
) & X86_CR4_VME
));
1091 update_exception_bitmap(vcpu
);
1093 fix_pmode_dataseg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
1094 fix_pmode_dataseg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
1095 fix_pmode_dataseg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
1096 fix_pmode_dataseg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
1098 vmcs_write16(GUEST_SS_SELECTOR
, 0);
1099 vmcs_write32(GUEST_SS_AR_BYTES
, 0x93);
1101 vmcs_write16(GUEST_CS_SELECTOR
,
1102 vmcs_read16(GUEST_CS_SELECTOR
) & ~SELECTOR_RPL_MASK
);
1103 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
1106 static gva_t
rmode_tss_base(struct kvm
*kvm
)
1108 if (!kvm
->tss_addr
) {
1109 gfn_t base_gfn
= kvm
->memslots
[0].base_gfn
+
1110 kvm
->memslots
[0].npages
- 3;
1111 return base_gfn
<< PAGE_SHIFT
;
1113 return kvm
->tss_addr
;
1116 static void fix_rmode_seg(int seg
, struct kvm_save_segment
*save
)
1118 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1120 save
->selector
= vmcs_read16(sf
->selector
);
1121 save
->base
= vmcs_readl(sf
->base
);
1122 save
->limit
= vmcs_read32(sf
->limit
);
1123 save
->ar
= vmcs_read32(sf
->ar_bytes
);
1124 vmcs_write16(sf
->selector
, vmcs_readl(sf
->base
) >> 4);
1125 vmcs_write32(sf
->limit
, 0xffff);
1126 vmcs_write32(sf
->ar_bytes
, 0xf3);
1129 static void enter_rmode(struct kvm_vcpu
*vcpu
)
1131 unsigned long flags
;
1133 vcpu
->rmode
.active
= 1;
1135 vcpu
->rmode
.tr
.base
= vmcs_readl(GUEST_TR_BASE
);
1136 vmcs_writel(GUEST_TR_BASE
, rmode_tss_base(vcpu
->kvm
));
1138 vcpu
->rmode
.tr
.limit
= vmcs_read32(GUEST_TR_LIMIT
);
1139 vmcs_write32(GUEST_TR_LIMIT
, RMODE_TSS_SIZE
- 1);
1141 vcpu
->rmode
.tr
.ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
1142 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
1144 flags
= vmcs_readl(GUEST_RFLAGS
);
1145 vcpu
->rmode
.save_iopl
= (flags
& X86_EFLAGS_IOPL
) >> IOPL_SHIFT
;
1147 flags
|= X86_EFLAGS_IOPL
| X86_EFLAGS_VM
;
1149 vmcs_writel(GUEST_RFLAGS
, flags
);
1150 vmcs_writel(GUEST_CR4
, vmcs_readl(GUEST_CR4
) | X86_CR4_VME
);
1151 update_exception_bitmap(vcpu
);
1153 vmcs_write16(GUEST_SS_SELECTOR
, vmcs_readl(GUEST_SS_BASE
) >> 4);
1154 vmcs_write32(GUEST_SS_LIMIT
, 0xffff);
1155 vmcs_write32(GUEST_SS_AR_BYTES
, 0xf3);
1157 vmcs_write32(GUEST_CS_AR_BYTES
, 0xf3);
1158 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
1159 if (vmcs_readl(GUEST_CS_BASE
) == 0xffff0000)
1160 vmcs_writel(GUEST_CS_BASE
, 0xf0000);
1161 vmcs_write16(GUEST_CS_SELECTOR
, vmcs_readl(GUEST_CS_BASE
) >> 4);
1163 fix_rmode_seg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
1164 fix_rmode_seg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
1165 fix_rmode_seg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
1166 fix_rmode_seg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
1168 kvm_mmu_reset_context(vcpu
);
1169 init_rmode_tss(vcpu
->kvm
);
1172 #ifdef CONFIG_X86_64
1174 static void enter_lmode(struct kvm_vcpu
*vcpu
)
1178 guest_tr_ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
1179 if ((guest_tr_ar
& AR_TYPE_MASK
) != AR_TYPE_BUSY_64_TSS
) {
1180 printk(KERN_DEBUG
"%s: tss fixup for long mode. \n",
1182 vmcs_write32(GUEST_TR_AR_BYTES
,
1183 (guest_tr_ar
& ~AR_TYPE_MASK
)
1184 | AR_TYPE_BUSY_64_TSS
);
1187 vcpu
->shadow_efer
|= EFER_LMA
;
1189 find_msr_entry(to_vmx(vcpu
), MSR_EFER
)->data
|= EFER_LMA
| EFER_LME
;
1190 vmcs_write32(VM_ENTRY_CONTROLS
,
1191 vmcs_read32(VM_ENTRY_CONTROLS
)
1192 | VM_ENTRY_IA32E_MODE
);
1195 static void exit_lmode(struct kvm_vcpu
*vcpu
)
1197 vcpu
->shadow_efer
&= ~EFER_LMA
;
1199 vmcs_write32(VM_ENTRY_CONTROLS
,
1200 vmcs_read32(VM_ENTRY_CONTROLS
)
1201 & ~VM_ENTRY_IA32E_MODE
);
1206 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu
*vcpu
)
1208 vcpu
->cr4
&= KVM_GUEST_CR4_MASK
;
1209 vcpu
->cr4
|= vmcs_readl(GUEST_CR4
) & ~KVM_GUEST_CR4_MASK
;
1212 static void vmx_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
1214 vmx_fpu_deactivate(vcpu
);
1216 if (vcpu
->rmode
.active
&& (cr0
& X86_CR0_PE
))
1219 if (!vcpu
->rmode
.active
&& !(cr0
& X86_CR0_PE
))
1222 #ifdef CONFIG_X86_64
1223 if (vcpu
->shadow_efer
& EFER_LME
) {
1224 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
))
1226 if (is_paging(vcpu
) && !(cr0
& X86_CR0_PG
))
1231 vmcs_writel(CR0_READ_SHADOW
, cr0
);
1232 vmcs_writel(GUEST_CR0
,
1233 (cr0
& ~KVM_GUEST_CR0_MASK
) | KVM_VM_CR0_ALWAYS_ON
);
1236 if (!(cr0
& X86_CR0_TS
) || !(cr0
& X86_CR0_PE
))
1237 vmx_fpu_activate(vcpu
);
1240 static void vmx_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
1242 vmcs_writel(GUEST_CR3
, cr3
);
1243 if (vcpu
->cr0
& X86_CR0_PE
)
1244 vmx_fpu_deactivate(vcpu
);
1247 static void vmx_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1249 vmcs_writel(CR4_READ_SHADOW
, cr4
);
1250 vmcs_writel(GUEST_CR4
, cr4
| (vcpu
->rmode
.active
?
1251 KVM_RMODE_VM_CR4_ALWAYS_ON
: KVM_PMODE_VM_CR4_ALWAYS_ON
));
1255 #ifdef CONFIG_X86_64
1257 static void vmx_set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1259 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
1260 struct kvm_msr_entry
*msr
= find_msr_entry(vmx
, MSR_EFER
);
1262 vcpu
->shadow_efer
= efer
;
1263 if (efer
& EFER_LMA
) {
1264 vmcs_write32(VM_ENTRY_CONTROLS
,
1265 vmcs_read32(VM_ENTRY_CONTROLS
) |
1266 VM_ENTRY_IA32E_MODE
);
1270 vmcs_write32(VM_ENTRY_CONTROLS
,
1271 vmcs_read32(VM_ENTRY_CONTROLS
) &
1272 ~VM_ENTRY_IA32E_MODE
);
1274 msr
->data
= efer
& ~EFER_LME
;
1281 static u64
vmx_get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
1283 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1285 return vmcs_readl(sf
->base
);
1288 static void vmx_get_segment(struct kvm_vcpu
*vcpu
,
1289 struct kvm_segment
*var
, int seg
)
1291 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1294 var
->base
= vmcs_readl(sf
->base
);
1295 var
->limit
= vmcs_read32(sf
->limit
);
1296 var
->selector
= vmcs_read16(sf
->selector
);
1297 ar
= vmcs_read32(sf
->ar_bytes
);
1298 if (ar
& AR_UNUSABLE_MASK
)
1300 var
->type
= ar
& 15;
1301 var
->s
= (ar
>> 4) & 1;
1302 var
->dpl
= (ar
>> 5) & 3;
1303 var
->present
= (ar
>> 7) & 1;
1304 var
->avl
= (ar
>> 12) & 1;
1305 var
->l
= (ar
>> 13) & 1;
1306 var
->db
= (ar
>> 14) & 1;
1307 var
->g
= (ar
>> 15) & 1;
1308 var
->unusable
= (ar
>> 16) & 1;
1311 static u32
vmx_segment_access_rights(struct kvm_segment
*var
)
1318 ar
= var
->type
& 15;
1319 ar
|= (var
->s
& 1) << 4;
1320 ar
|= (var
->dpl
& 3) << 5;
1321 ar
|= (var
->present
& 1) << 7;
1322 ar
|= (var
->avl
& 1) << 12;
1323 ar
|= (var
->l
& 1) << 13;
1324 ar
|= (var
->db
& 1) << 14;
1325 ar
|= (var
->g
& 1) << 15;
1327 if (ar
== 0) /* a 0 value means unusable */
1328 ar
= AR_UNUSABLE_MASK
;
1333 static void vmx_set_segment(struct kvm_vcpu
*vcpu
,
1334 struct kvm_segment
*var
, int seg
)
1336 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1339 if (vcpu
->rmode
.active
&& seg
== VCPU_SREG_TR
) {
1340 vcpu
->rmode
.tr
.selector
= var
->selector
;
1341 vcpu
->rmode
.tr
.base
= var
->base
;
1342 vcpu
->rmode
.tr
.limit
= var
->limit
;
1343 vcpu
->rmode
.tr
.ar
= vmx_segment_access_rights(var
);
1346 vmcs_writel(sf
->base
, var
->base
);
1347 vmcs_write32(sf
->limit
, var
->limit
);
1348 vmcs_write16(sf
->selector
, var
->selector
);
1349 if (vcpu
->rmode
.active
&& var
->s
) {
1351 * Hack real-mode segments into vm86 compatibility.
1353 if (var
->base
== 0xffff0000 && var
->selector
== 0xf000)
1354 vmcs_writel(sf
->base
, 0xf0000);
1357 ar
= vmx_segment_access_rights(var
);
1358 vmcs_write32(sf
->ar_bytes
, ar
);
1361 static void vmx_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
1363 u32 ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
1365 *db
= (ar
>> 14) & 1;
1366 *l
= (ar
>> 13) & 1;
1369 static void vmx_get_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1371 dt
->limit
= vmcs_read32(GUEST_IDTR_LIMIT
);
1372 dt
->base
= vmcs_readl(GUEST_IDTR_BASE
);
1375 static void vmx_set_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1377 vmcs_write32(GUEST_IDTR_LIMIT
, dt
->limit
);
1378 vmcs_writel(GUEST_IDTR_BASE
, dt
->base
);
1381 static void vmx_get_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1383 dt
->limit
= vmcs_read32(GUEST_GDTR_LIMIT
);
1384 dt
->base
= vmcs_readl(GUEST_GDTR_BASE
);
1387 static void vmx_set_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1389 vmcs_write32(GUEST_GDTR_LIMIT
, dt
->limit
);
1390 vmcs_writel(GUEST_GDTR_BASE
, dt
->base
);
1393 static int init_rmode_tss(struct kvm
*kvm
)
1395 gfn_t fn
= rmode_tss_base(kvm
) >> PAGE_SHIFT
;
1399 r
= kvm_clear_guest_page(kvm
, fn
, 0, PAGE_SIZE
);
1402 data
= TSS_BASE_SIZE
+ TSS_REDIRECTION_SIZE
;
1403 r
= kvm_write_guest_page(kvm
, fn
++, &data
, 0x66, sizeof(u16
));
1406 r
= kvm_clear_guest_page(kvm
, fn
++, 0, PAGE_SIZE
);
1409 r
= kvm_clear_guest_page(kvm
, fn
, 0, PAGE_SIZE
);
1413 r
= kvm_write_guest_page(kvm
, fn
, &data
, RMODE_TSS_SIZE
- 2 * PAGE_SIZE
- 1,
1420 static void seg_setup(int seg
)
1422 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1424 vmcs_write16(sf
->selector
, 0);
1425 vmcs_writel(sf
->base
, 0);
1426 vmcs_write32(sf
->limit
, 0xffff);
1427 vmcs_write32(sf
->ar_bytes
, 0x93);
1431 * Sets up the vmcs for emulated real mode.
1433 static int vmx_vcpu_setup(struct vcpu_vmx
*vmx
)
1435 u32 host_sysenter_cs
;
1438 struct descriptor_table dt
;
1440 unsigned long kvm_vmx_return
;
1444 vmcs_write64(IO_BITMAP_A
, page_to_phys(vmx_io_bitmap_a
));
1445 vmcs_write64(IO_BITMAP_B
, page_to_phys(vmx_io_bitmap_b
));
1447 vmcs_write64(VMCS_LINK_POINTER
, -1ull); /* 22.3.1.5 */
1450 vmcs_write32(PIN_BASED_VM_EXEC_CONTROL
,
1451 vmcs_config
.pin_based_exec_ctrl
);
1453 exec_control
= vmcs_config
.cpu_based_exec_ctrl
;
1454 if (!vm_need_tpr_shadow(vmx
->vcpu
.kvm
)) {
1455 exec_control
&= ~CPU_BASED_TPR_SHADOW
;
1456 #ifdef CONFIG_X86_64
1457 exec_control
|= CPU_BASED_CR8_STORE_EXITING
|
1458 CPU_BASED_CR8_LOAD_EXITING
;
1461 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, exec_control
);
1463 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK
, !!bypass_guest_pf
);
1464 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH
, !!bypass_guest_pf
);
1465 vmcs_write32(CR3_TARGET_COUNT
, 0); /* 22.2.1 */
1467 vmcs_writel(HOST_CR0
, read_cr0()); /* 22.2.3 */
1468 vmcs_writel(HOST_CR4
, read_cr4()); /* 22.2.3, 22.2.5 */
1469 vmcs_writel(HOST_CR3
, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1471 vmcs_write16(HOST_CS_SELECTOR
, __KERNEL_CS
); /* 22.2.4 */
1472 vmcs_write16(HOST_DS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1473 vmcs_write16(HOST_ES_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1474 vmcs_write16(HOST_FS_SELECTOR
, read_fs()); /* 22.2.4 */
1475 vmcs_write16(HOST_GS_SELECTOR
, read_gs()); /* 22.2.4 */
1476 vmcs_write16(HOST_SS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1477 #ifdef CONFIG_X86_64
1478 rdmsrl(MSR_FS_BASE
, a
);
1479 vmcs_writel(HOST_FS_BASE
, a
); /* 22.2.4 */
1480 rdmsrl(MSR_GS_BASE
, a
);
1481 vmcs_writel(HOST_GS_BASE
, a
); /* 22.2.4 */
1483 vmcs_writel(HOST_FS_BASE
, 0); /* 22.2.4 */
1484 vmcs_writel(HOST_GS_BASE
, 0); /* 22.2.4 */
1487 vmcs_write16(HOST_TR_SELECTOR
, GDT_ENTRY_TSS
*8); /* 22.2.4 */
1490 vmcs_writel(HOST_IDTR_BASE
, dt
.base
); /* 22.2.4 */
1492 asm("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return
));
1493 vmcs_writel(HOST_RIP
, kvm_vmx_return
); /* 22.2.5 */
1494 vmcs_write32(VM_EXIT_MSR_STORE_COUNT
, 0);
1495 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT
, 0);
1496 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT
, 0);
1498 rdmsr(MSR_IA32_SYSENTER_CS
, host_sysenter_cs
, junk
);
1499 vmcs_write32(HOST_IA32_SYSENTER_CS
, host_sysenter_cs
);
1500 rdmsrl(MSR_IA32_SYSENTER_ESP
, a
);
1501 vmcs_writel(HOST_IA32_SYSENTER_ESP
, a
); /* 22.2.3 */
1502 rdmsrl(MSR_IA32_SYSENTER_EIP
, a
);
1503 vmcs_writel(HOST_IA32_SYSENTER_EIP
, a
); /* 22.2.3 */
1505 for (i
= 0; i
< NR_VMX_MSR
; ++i
) {
1506 u32 index
= vmx_msr_index
[i
];
1507 u32 data_low
, data_high
;
1511 if (rdmsr_safe(index
, &data_low
, &data_high
) < 0)
1513 if (wrmsr_safe(index
, data_low
, data_high
) < 0)
1515 data
= data_low
| ((u64
)data_high
<< 32);
1516 vmx
->host_msrs
[j
].index
= index
;
1517 vmx
->host_msrs
[j
].reserved
= 0;
1518 vmx
->host_msrs
[j
].data
= data
;
1519 vmx
->guest_msrs
[j
] = vmx
->host_msrs
[j
];
1523 vmcs_write32(VM_EXIT_CONTROLS
, vmcs_config
.vmexit_ctrl
);
1525 /* 22.2.1, 20.8.1 */
1526 vmcs_write32(VM_ENTRY_CONTROLS
, vmcs_config
.vmentry_ctrl
);
1528 vmcs_writel(CR0_GUEST_HOST_MASK
, ~0UL);
1529 vmcs_writel(CR4_GUEST_HOST_MASK
, KVM_GUEST_CR4_MASK
);
1534 static int vmx_vcpu_reset(struct kvm_vcpu
*vcpu
)
1536 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
1540 if (!init_rmode_tss(vmx
->vcpu
.kvm
)) {
1545 vmx
->vcpu
.rmode
.active
= 0;
1547 vmx
->vcpu
.regs
[VCPU_REGS_RDX
] = get_rdx_init_val();
1548 set_cr8(&vmx
->vcpu
, 0);
1549 msr
= 0xfee00000 | MSR_IA32_APICBASE_ENABLE
;
1550 if (vmx
->vcpu
.vcpu_id
== 0)
1551 msr
|= MSR_IA32_APICBASE_BSP
;
1552 kvm_set_apic_base(&vmx
->vcpu
, msr
);
1554 fx_init(&vmx
->vcpu
);
1557 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1558 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
1560 if (vmx
->vcpu
.vcpu_id
== 0) {
1561 vmcs_write16(GUEST_CS_SELECTOR
, 0xf000);
1562 vmcs_writel(GUEST_CS_BASE
, 0x000f0000);
1564 vmcs_write16(GUEST_CS_SELECTOR
, vmx
->vcpu
.sipi_vector
<< 8);
1565 vmcs_writel(GUEST_CS_BASE
, vmx
->vcpu
.sipi_vector
<< 12);
1567 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
1568 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
1570 seg_setup(VCPU_SREG_DS
);
1571 seg_setup(VCPU_SREG_ES
);
1572 seg_setup(VCPU_SREG_FS
);
1573 seg_setup(VCPU_SREG_GS
);
1574 seg_setup(VCPU_SREG_SS
);
1576 vmcs_write16(GUEST_TR_SELECTOR
, 0);
1577 vmcs_writel(GUEST_TR_BASE
, 0);
1578 vmcs_write32(GUEST_TR_LIMIT
, 0xffff);
1579 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
1581 vmcs_write16(GUEST_LDTR_SELECTOR
, 0);
1582 vmcs_writel(GUEST_LDTR_BASE
, 0);
1583 vmcs_write32(GUEST_LDTR_LIMIT
, 0xffff);
1584 vmcs_write32(GUEST_LDTR_AR_BYTES
, 0x00082);
1586 vmcs_write32(GUEST_SYSENTER_CS
, 0);
1587 vmcs_writel(GUEST_SYSENTER_ESP
, 0);
1588 vmcs_writel(GUEST_SYSENTER_EIP
, 0);
1590 vmcs_writel(GUEST_RFLAGS
, 0x02);
1591 if (vmx
->vcpu
.vcpu_id
== 0)
1592 vmcs_writel(GUEST_RIP
, 0xfff0);
1594 vmcs_writel(GUEST_RIP
, 0);
1595 vmcs_writel(GUEST_RSP
, 0);
1597 /* todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0 */
1598 vmcs_writel(GUEST_DR7
, 0x400);
1600 vmcs_writel(GUEST_GDTR_BASE
, 0);
1601 vmcs_write32(GUEST_GDTR_LIMIT
, 0xffff);
1603 vmcs_writel(GUEST_IDTR_BASE
, 0);
1604 vmcs_write32(GUEST_IDTR_LIMIT
, 0xffff);
1606 vmcs_write32(GUEST_ACTIVITY_STATE
, 0);
1607 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
, 0);
1608 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS
, 0);
1612 /* Special registers */
1613 vmcs_write64(GUEST_IA32_DEBUGCTL
, 0);
1617 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
, 0); /* 22.2.1 */
1619 #ifdef CONFIG_X86_64
1620 vmcs_write64(VIRTUAL_APIC_PAGE_ADDR
, 0);
1621 if (vm_need_tpr_shadow(vmx
->vcpu
.kvm
))
1622 vmcs_write64(VIRTUAL_APIC_PAGE_ADDR
,
1623 page_to_phys(vmx
->vcpu
.apic
->regs_page
));
1624 vmcs_write32(TPR_THRESHOLD
, 0);
1627 vmx
->vcpu
.cr0
= 0x60000010;
1628 vmx_set_cr0(&vmx
->vcpu
, vmx
->vcpu
.cr0
); /* enter rmode */
1629 vmx_set_cr4(&vmx
->vcpu
, 0);
1630 #ifdef CONFIG_X86_64
1631 vmx_set_efer(&vmx
->vcpu
, 0);
1633 vmx_fpu_activate(&vmx
->vcpu
);
1634 update_exception_bitmap(&vmx
->vcpu
);
1642 static void inject_rmode_irq(struct kvm_vcpu
*vcpu
, int irq
)
1647 unsigned long flags
;
1648 unsigned long ss_base
= vmcs_readl(GUEST_SS_BASE
);
1649 u16 sp
= vmcs_readl(GUEST_RSP
);
1650 u32 ss_limit
= vmcs_read32(GUEST_SS_LIMIT
);
1652 if (sp
> ss_limit
|| sp
< 6) {
1653 vcpu_printf(vcpu
, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1655 vmcs_readl(GUEST_RSP
),
1656 vmcs_readl(GUEST_SS_BASE
),
1657 vmcs_read32(GUEST_SS_LIMIT
));
1661 if (emulator_read_std(irq
* sizeof(ent
), &ent
, sizeof(ent
), vcpu
) !=
1663 vcpu_printf(vcpu
, "%s: read guest err\n", __FUNCTION__
);
1667 flags
= vmcs_readl(GUEST_RFLAGS
);
1668 cs
= vmcs_readl(GUEST_CS_BASE
) >> 4;
1669 ip
= vmcs_readl(GUEST_RIP
);
1672 if (emulator_write_emulated(
1673 ss_base
+ sp
- 2, &flags
, 2, vcpu
) != X86EMUL_CONTINUE
||
1674 emulator_write_emulated(
1675 ss_base
+ sp
- 4, &cs
, 2, vcpu
) != X86EMUL_CONTINUE
||
1676 emulator_write_emulated(
1677 ss_base
+ sp
- 6, &ip
, 2, vcpu
) != X86EMUL_CONTINUE
) {
1678 vcpu_printf(vcpu
, "%s: write guest err\n", __FUNCTION__
);
1682 vmcs_writel(GUEST_RFLAGS
, flags
&
1683 ~(X86_EFLAGS_IF
| X86_EFLAGS_AC
| X86_EFLAGS_TF
));
1684 vmcs_write16(GUEST_CS_SELECTOR
, ent
[1]) ;
1685 vmcs_writel(GUEST_CS_BASE
, ent
[1] << 4);
1686 vmcs_writel(GUEST_RIP
, ent
[0]);
1687 vmcs_writel(GUEST_RSP
, (vmcs_readl(GUEST_RSP
) & ~0xffff) | (sp
- 6));
1690 static void vmx_inject_irq(struct kvm_vcpu
*vcpu
, int irq
)
1692 if (vcpu
->rmode
.active
) {
1693 inject_rmode_irq(vcpu
, irq
);
1696 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1697 irq
| INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
1700 static void kvm_do_inject_irq(struct kvm_vcpu
*vcpu
)
1702 int word_index
= __ffs(vcpu
->irq_summary
);
1703 int bit_index
= __ffs(vcpu
->irq_pending
[word_index
]);
1704 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
1706 clear_bit(bit_index
, &vcpu
->irq_pending
[word_index
]);
1707 if (!vcpu
->irq_pending
[word_index
])
1708 clear_bit(word_index
, &vcpu
->irq_summary
);
1709 vmx_inject_irq(vcpu
, irq
);
1713 static void do_interrupt_requests(struct kvm_vcpu
*vcpu
,
1714 struct kvm_run
*kvm_run
)
1716 u32 cpu_based_vm_exec_control
;
1718 vcpu
->interrupt_window_open
=
1719 ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) &&
1720 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0);
1722 if (vcpu
->interrupt_window_open
&&
1723 vcpu
->irq_summary
&&
1724 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD
) & INTR_INFO_VALID_MASK
))
1726 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1728 kvm_do_inject_irq(vcpu
);
1730 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
1731 if (!vcpu
->interrupt_window_open
&&
1732 (vcpu
->irq_summary
|| kvm_run
->request_interrupt_window
))
1734 * Interrupts blocked. Wait for unblock.
1736 cpu_based_vm_exec_control
|= CPU_BASED_VIRTUAL_INTR_PENDING
;
1738 cpu_based_vm_exec_control
&= ~CPU_BASED_VIRTUAL_INTR_PENDING
;
1739 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
1742 static int vmx_set_tss_addr(struct kvm
*kvm
, unsigned int addr
)
1745 struct kvm_userspace_memory_region tss_mem
= {
1747 .guest_phys_addr
= addr
,
1748 .memory_size
= PAGE_SIZE
* 3,
1752 ret
= kvm_set_memory_region(kvm
, &tss_mem
, 0);
1755 kvm
->tss_addr
= addr
;
1759 static void kvm_guest_debug_pre(struct kvm_vcpu
*vcpu
)
1761 struct kvm_guest_debug
*dbg
= &vcpu
->guest_debug
;
1763 set_debugreg(dbg
->bp
[0], 0);
1764 set_debugreg(dbg
->bp
[1], 1);
1765 set_debugreg(dbg
->bp
[2], 2);
1766 set_debugreg(dbg
->bp
[3], 3);
1768 if (dbg
->singlestep
) {
1769 unsigned long flags
;
1771 flags
= vmcs_readl(GUEST_RFLAGS
);
1772 flags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
1773 vmcs_writel(GUEST_RFLAGS
, flags
);
1777 static int handle_rmode_exception(struct kvm_vcpu
*vcpu
,
1778 int vec
, u32 err_code
)
1780 if (!vcpu
->rmode
.active
)
1784 * Instruction with address size override prefix opcode 0x67
1785 * Cause the #SS fault with 0 error code in VM86 mode.
1787 if (((vec
== GP_VECTOR
) || (vec
== SS_VECTOR
)) && err_code
== 0)
1788 if (emulate_instruction(vcpu
, NULL
, 0, 0, 0) == EMULATE_DONE
)
1793 static int handle_exception(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1795 u32 intr_info
, error_code
;
1796 unsigned long cr2
, rip
;
1798 enum emulation_result er
;
1801 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1802 intr_info
= vmcs_read32(VM_EXIT_INTR_INFO
);
1804 if ((vect_info
& VECTORING_INFO_VALID_MASK
) &&
1805 !is_page_fault(intr_info
))
1806 printk(KERN_ERR
"%s: unexpected, vectoring info 0x%x "
1807 "intr info 0x%x\n", __FUNCTION__
, vect_info
, intr_info
);
1809 if (!irqchip_in_kernel(vcpu
->kvm
) && is_external_interrupt(vect_info
)) {
1810 int irq
= vect_info
& VECTORING_INFO_VECTOR_MASK
;
1811 set_bit(irq
, vcpu
->irq_pending
);
1812 set_bit(irq
/ BITS_PER_LONG
, &vcpu
->irq_summary
);
1815 if ((intr_info
& INTR_INFO_INTR_TYPE_MASK
) == 0x200) /* nmi */
1816 return 1; /* already handled by vmx_vcpu_run() */
1818 if (is_no_device(intr_info
)) {
1819 vmx_fpu_activate(vcpu
);
1823 if (is_invalid_opcode(intr_info
)) {
1824 er
= emulate_instruction(vcpu
, kvm_run
, 0, 0, 0);
1825 if (er
!= EMULATE_DONE
)
1826 vmx_inject_ud(vcpu
);
1832 rip
= vmcs_readl(GUEST_RIP
);
1833 if (intr_info
& INTR_INFO_DELIEVER_CODE_MASK
)
1834 error_code
= vmcs_read32(VM_EXIT_INTR_ERROR_CODE
);
1835 if (is_page_fault(intr_info
)) {
1836 cr2
= vmcs_readl(EXIT_QUALIFICATION
);
1838 mutex_lock(&vcpu
->kvm
->lock
);
1839 r
= kvm_mmu_page_fault(vcpu
, cr2
, error_code
);
1841 mutex_unlock(&vcpu
->kvm
->lock
);
1845 mutex_unlock(&vcpu
->kvm
->lock
);
1849 er
= emulate_instruction(vcpu
, kvm_run
, cr2
, error_code
, 0);
1850 mutex_unlock(&vcpu
->kvm
->lock
);
1855 case EMULATE_DO_MMIO
:
1856 ++vcpu
->stat
.mmio_exits
;
1859 kvm_report_emulation_failure(vcpu
, "pagetable");
1866 if (vcpu
->rmode
.active
&&
1867 handle_rmode_exception(vcpu
, intr_info
& INTR_INFO_VECTOR_MASK
,
1869 if (vcpu
->halt_request
) {
1870 vcpu
->halt_request
= 0;
1871 return kvm_emulate_halt(vcpu
);
1876 if ((intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
)) ==
1877 (INTR_TYPE_EXCEPTION
| 1)) {
1878 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
1881 kvm_run
->exit_reason
= KVM_EXIT_EXCEPTION
;
1882 kvm_run
->ex
.exception
= intr_info
& INTR_INFO_VECTOR_MASK
;
1883 kvm_run
->ex
.error_code
= error_code
;
1887 static int handle_external_interrupt(struct kvm_vcpu
*vcpu
,
1888 struct kvm_run
*kvm_run
)
1890 ++vcpu
->stat
.irq_exits
;
1894 static int handle_triple_fault(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1896 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
1900 static int handle_io(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1902 unsigned long exit_qualification
;
1903 int size
, down
, in
, string
, rep
;
1906 ++vcpu
->stat
.io_exits
;
1907 exit_qualification
= vmcs_readl(EXIT_QUALIFICATION
);
1908 string
= (exit_qualification
& 16) != 0;
1911 if (emulate_instruction(vcpu
,
1912 kvm_run
, 0, 0, 0) == EMULATE_DO_MMIO
)
1917 size
= (exit_qualification
& 7) + 1;
1918 in
= (exit_qualification
& 8) != 0;
1919 down
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_DF
) != 0;
1920 rep
= (exit_qualification
& 32) != 0;
1921 port
= exit_qualification
>> 16;
1923 return kvm_emulate_pio(vcpu
, kvm_run
, in
, size
, port
);
1927 vmx_patch_hypercall(struct kvm_vcpu
*vcpu
, unsigned char *hypercall
)
1930 * Patch in the VMCALL instruction:
1932 hypercall
[0] = 0x0f;
1933 hypercall
[1] = 0x01;
1934 hypercall
[2] = 0xc1;
1937 static int handle_cr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1939 unsigned long exit_qualification
;
1943 exit_qualification
= vmcs_readl(EXIT_QUALIFICATION
);
1944 cr
= exit_qualification
& 15;
1945 reg
= (exit_qualification
>> 8) & 15;
1946 switch ((exit_qualification
>> 4) & 3) {
1947 case 0: /* mov to cr */
1950 vcpu_load_rsp_rip(vcpu
);
1951 set_cr0(vcpu
, vcpu
->regs
[reg
]);
1952 skip_emulated_instruction(vcpu
);
1955 vcpu_load_rsp_rip(vcpu
);
1956 set_cr3(vcpu
, vcpu
->regs
[reg
]);
1957 skip_emulated_instruction(vcpu
);
1960 vcpu_load_rsp_rip(vcpu
);
1961 set_cr4(vcpu
, vcpu
->regs
[reg
]);
1962 skip_emulated_instruction(vcpu
);
1965 vcpu_load_rsp_rip(vcpu
);
1966 set_cr8(vcpu
, vcpu
->regs
[reg
]);
1967 skip_emulated_instruction(vcpu
);
1968 kvm_run
->exit_reason
= KVM_EXIT_SET_TPR
;
1973 vcpu_load_rsp_rip(vcpu
);
1974 vmx_fpu_deactivate(vcpu
);
1975 vcpu
->cr0
&= ~X86_CR0_TS
;
1976 vmcs_writel(CR0_READ_SHADOW
, vcpu
->cr0
);
1977 vmx_fpu_activate(vcpu
);
1978 skip_emulated_instruction(vcpu
);
1980 case 1: /*mov from cr*/
1983 vcpu_load_rsp_rip(vcpu
);
1984 vcpu
->regs
[reg
] = vcpu
->cr3
;
1985 vcpu_put_rsp_rip(vcpu
);
1986 skip_emulated_instruction(vcpu
);
1989 vcpu_load_rsp_rip(vcpu
);
1990 vcpu
->regs
[reg
] = get_cr8(vcpu
);
1991 vcpu_put_rsp_rip(vcpu
);
1992 skip_emulated_instruction(vcpu
);
1997 lmsw(vcpu
, (exit_qualification
>> LMSW_SOURCE_DATA_SHIFT
) & 0x0f);
1999 skip_emulated_instruction(vcpu
);
2004 kvm_run
->exit_reason
= 0;
2005 pr_unimpl(vcpu
, "unhandled control register: op %d cr %d\n",
2006 (int)(exit_qualification
>> 4) & 3, cr
);
2010 static int handle_dr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2012 unsigned long exit_qualification
;
2017 * FIXME: this code assumes the host is debugging the guest.
2018 * need to deal with guest debugging itself too.
2020 exit_qualification
= vmcs_readl(EXIT_QUALIFICATION
);
2021 dr
= exit_qualification
& 7;
2022 reg
= (exit_qualification
>> 8) & 15;
2023 vcpu_load_rsp_rip(vcpu
);
2024 if (exit_qualification
& 16) {
2036 vcpu
->regs
[reg
] = val
;
2040 vcpu_put_rsp_rip(vcpu
);
2041 skip_emulated_instruction(vcpu
);
2045 static int handle_cpuid(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2047 kvm_emulate_cpuid(vcpu
);
2051 static int handle_rdmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2053 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
2056 if (vmx_get_msr(vcpu
, ecx
, &data
)) {
2057 vmx_inject_gp(vcpu
, 0);
2061 /* FIXME: handling of bits 32:63 of rax, rdx */
2062 vcpu
->regs
[VCPU_REGS_RAX
] = data
& -1u;
2063 vcpu
->regs
[VCPU_REGS_RDX
] = (data
>> 32) & -1u;
2064 skip_emulated_instruction(vcpu
);
2068 static int handle_wrmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2070 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
2071 u64 data
= (vcpu
->regs
[VCPU_REGS_RAX
] & -1u)
2072 | ((u64
)(vcpu
->regs
[VCPU_REGS_RDX
] & -1u) << 32);
2074 if (vmx_set_msr(vcpu
, ecx
, data
) != 0) {
2075 vmx_inject_gp(vcpu
, 0);
2079 skip_emulated_instruction(vcpu
);
2083 static int handle_tpr_below_threshold(struct kvm_vcpu
*vcpu
,
2084 struct kvm_run
*kvm_run
)
2089 static int handle_interrupt_window(struct kvm_vcpu
*vcpu
,
2090 struct kvm_run
*kvm_run
)
2092 u32 cpu_based_vm_exec_control
;
2094 /* clear pending irq */
2095 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
2096 cpu_based_vm_exec_control
&= ~CPU_BASED_VIRTUAL_INTR_PENDING
;
2097 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
2099 * If the user space waits to inject interrupts, exit as soon as
2102 if (kvm_run
->request_interrupt_window
&&
2103 !vcpu
->irq_summary
) {
2104 kvm_run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
2105 ++vcpu
->stat
.irq_window_exits
;
2111 static int handle_halt(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2113 skip_emulated_instruction(vcpu
);
2114 return kvm_emulate_halt(vcpu
);
2117 static int handle_vmcall(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2119 skip_emulated_instruction(vcpu
);
2120 kvm_emulate_hypercall(vcpu
);
2125 * The exit handlers return 1 if the exit was handled fully and guest execution
2126 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
2127 * to be done to userspace and return 0.
2129 static int (*kvm_vmx_exit_handlers
[])(struct kvm_vcpu
*vcpu
,
2130 struct kvm_run
*kvm_run
) = {
2131 [EXIT_REASON_EXCEPTION_NMI
] = handle_exception
,
2132 [EXIT_REASON_EXTERNAL_INTERRUPT
] = handle_external_interrupt
,
2133 [EXIT_REASON_TRIPLE_FAULT
] = handle_triple_fault
,
2134 [EXIT_REASON_IO_INSTRUCTION
] = handle_io
,
2135 [EXIT_REASON_CR_ACCESS
] = handle_cr
,
2136 [EXIT_REASON_DR_ACCESS
] = handle_dr
,
2137 [EXIT_REASON_CPUID
] = handle_cpuid
,
2138 [EXIT_REASON_MSR_READ
] = handle_rdmsr
,
2139 [EXIT_REASON_MSR_WRITE
] = handle_wrmsr
,
2140 [EXIT_REASON_PENDING_INTERRUPT
] = handle_interrupt_window
,
2141 [EXIT_REASON_HLT
] = handle_halt
,
2142 [EXIT_REASON_VMCALL
] = handle_vmcall
,
2143 [EXIT_REASON_TPR_BELOW_THRESHOLD
] = handle_tpr_below_threshold
2146 static const int kvm_vmx_max_exit_handlers
=
2147 ARRAY_SIZE(kvm_vmx_exit_handlers
);
2150 * The guest has exited. See if we can fix it or if we need userspace
2153 static int kvm_handle_exit(struct kvm_run
*kvm_run
, struct kvm_vcpu
*vcpu
)
2155 u32 vectoring_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
2156 u32 exit_reason
= vmcs_read32(VM_EXIT_REASON
);
2157 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
2159 if (unlikely(vmx
->fail
)) {
2160 kvm_run
->exit_reason
= KVM_EXIT_FAIL_ENTRY
;
2161 kvm_run
->fail_entry
.hardware_entry_failure_reason
2162 = vmcs_read32(VM_INSTRUCTION_ERROR
);
2166 if ((vectoring_info
& VECTORING_INFO_VALID_MASK
) &&
2167 exit_reason
!= EXIT_REASON_EXCEPTION_NMI
)
2168 printk(KERN_WARNING
"%s: unexpected, valid vectoring info and "
2169 "exit reason is 0x%x\n", __FUNCTION__
, exit_reason
);
2170 if (exit_reason
< kvm_vmx_max_exit_handlers
2171 && kvm_vmx_exit_handlers
[exit_reason
])
2172 return kvm_vmx_exit_handlers
[exit_reason
](vcpu
, kvm_run
);
2174 kvm_run
->exit_reason
= KVM_EXIT_UNKNOWN
;
2175 kvm_run
->hw
.hardware_exit_reason
= exit_reason
;
2180 static void vmx_flush_tlb(struct kvm_vcpu
*vcpu
)
2184 static void update_tpr_threshold(struct kvm_vcpu
*vcpu
)
2188 if (!vm_need_tpr_shadow(vcpu
->kvm
))
2191 if (!kvm_lapic_enabled(vcpu
) ||
2192 ((max_irr
= kvm_lapic_find_highest_irr(vcpu
)) == -1)) {
2193 vmcs_write32(TPR_THRESHOLD
, 0);
2197 tpr
= (kvm_lapic_get_cr8(vcpu
) & 0x0f) << 4;
2198 vmcs_write32(TPR_THRESHOLD
, (max_irr
> tpr
) ? tpr
>> 4 : max_irr
>> 4);
2201 static void enable_irq_window(struct kvm_vcpu
*vcpu
)
2203 u32 cpu_based_vm_exec_control
;
2205 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
2206 cpu_based_vm_exec_control
|= CPU_BASED_VIRTUAL_INTR_PENDING
;
2207 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
2210 static void vmx_intr_assist(struct kvm_vcpu
*vcpu
)
2212 u32 idtv_info_field
, intr_info_field
;
2213 int has_ext_irq
, interrupt_window_open
;
2216 update_tpr_threshold(vcpu
);
2218 has_ext_irq
= kvm_cpu_has_interrupt(vcpu
);
2219 intr_info_field
= vmcs_read32(VM_ENTRY_INTR_INFO_FIELD
);
2220 idtv_info_field
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
2221 if (intr_info_field
& INTR_INFO_VALID_MASK
) {
2222 if (idtv_info_field
& INTR_INFO_VALID_MASK
) {
2223 /* TODO: fault when IDT_Vectoring */
2224 printk(KERN_ERR
"Fault when IDT_Vectoring\n");
2227 enable_irq_window(vcpu
);
2230 if (unlikely(idtv_info_field
& INTR_INFO_VALID_MASK
)) {
2231 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
, idtv_info_field
);
2232 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN
,
2233 vmcs_read32(VM_EXIT_INSTRUCTION_LEN
));
2235 if (unlikely(idtv_info_field
& INTR_INFO_DELIEVER_CODE_MASK
))
2236 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
,
2237 vmcs_read32(IDT_VECTORING_ERROR_CODE
));
2238 if (unlikely(has_ext_irq
))
2239 enable_irq_window(vcpu
);
2244 interrupt_window_open
=
2245 ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) &&
2246 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0);
2247 if (interrupt_window_open
) {
2248 vector
= kvm_cpu_get_interrupt(vcpu
);
2249 vmx_inject_irq(vcpu
, vector
);
2250 kvm_timer_intr_post(vcpu
, vector
);
2252 enable_irq_window(vcpu
);
2255 static void vmx_vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
2257 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
2261 * Loading guest fpu may have cleared host cr0.ts
2263 vmcs_writel(HOST_CR0
, read_cr0());
2266 /* Store host registers */
2267 #ifdef CONFIG_X86_64
2268 "push %%rax; push %%rbx; push %%rdx;"
2269 "push %%rsi; push %%rdi; push %%rbp;"
2270 "push %%r8; push %%r9; push %%r10; push %%r11;"
2271 "push %%r12; push %%r13; push %%r14; push %%r15;"
2273 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
2275 "pusha; push %%ecx \n\t"
2276 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
2278 /* Check if vmlaunch of vmresume is needed */
2280 /* Load guest registers. Don't clobber flags. */
2281 #ifdef CONFIG_X86_64
2282 "mov %c[cr2](%3), %%rax \n\t"
2283 "mov %%rax, %%cr2 \n\t"
2284 "mov %c[rax](%3), %%rax \n\t"
2285 "mov %c[rbx](%3), %%rbx \n\t"
2286 "mov %c[rdx](%3), %%rdx \n\t"
2287 "mov %c[rsi](%3), %%rsi \n\t"
2288 "mov %c[rdi](%3), %%rdi \n\t"
2289 "mov %c[rbp](%3), %%rbp \n\t"
2290 "mov %c[r8](%3), %%r8 \n\t"
2291 "mov %c[r9](%3), %%r9 \n\t"
2292 "mov %c[r10](%3), %%r10 \n\t"
2293 "mov %c[r11](%3), %%r11 \n\t"
2294 "mov %c[r12](%3), %%r12 \n\t"
2295 "mov %c[r13](%3), %%r13 \n\t"
2296 "mov %c[r14](%3), %%r14 \n\t"
2297 "mov %c[r15](%3), %%r15 \n\t"
2298 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
2300 "mov %c[cr2](%3), %%eax \n\t"
2301 "mov %%eax, %%cr2 \n\t"
2302 "mov %c[rax](%3), %%eax \n\t"
2303 "mov %c[rbx](%3), %%ebx \n\t"
2304 "mov %c[rdx](%3), %%edx \n\t"
2305 "mov %c[rsi](%3), %%esi \n\t"
2306 "mov %c[rdi](%3), %%edi \n\t"
2307 "mov %c[rbp](%3), %%ebp \n\t"
2308 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
2310 /* Enter guest mode */
2311 "jne .Llaunched \n\t"
2312 ASM_VMX_VMLAUNCH
"\n\t"
2313 "jmp .Lkvm_vmx_return \n\t"
2314 ".Llaunched: " ASM_VMX_VMRESUME
"\n\t"
2315 ".Lkvm_vmx_return: "
2316 /* Save guest registers, load host registers, keep flags */
2317 #ifdef CONFIG_X86_64
2318 "xchg %3, (%%rsp) \n\t"
2319 "mov %%rax, %c[rax](%3) \n\t"
2320 "mov %%rbx, %c[rbx](%3) \n\t"
2321 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
2322 "mov %%rdx, %c[rdx](%3) \n\t"
2323 "mov %%rsi, %c[rsi](%3) \n\t"
2324 "mov %%rdi, %c[rdi](%3) \n\t"
2325 "mov %%rbp, %c[rbp](%3) \n\t"
2326 "mov %%r8, %c[r8](%3) \n\t"
2327 "mov %%r9, %c[r9](%3) \n\t"
2328 "mov %%r10, %c[r10](%3) \n\t"
2329 "mov %%r11, %c[r11](%3) \n\t"
2330 "mov %%r12, %c[r12](%3) \n\t"
2331 "mov %%r13, %c[r13](%3) \n\t"
2332 "mov %%r14, %c[r14](%3) \n\t"
2333 "mov %%r15, %c[r15](%3) \n\t"
2334 "mov %%cr2, %%rax \n\t"
2335 "mov %%rax, %c[cr2](%3) \n\t"
2336 "mov (%%rsp), %3 \n\t"
2338 "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
2339 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
2340 "pop %%rbp; pop %%rdi; pop %%rsi;"
2341 "pop %%rdx; pop %%rbx; pop %%rax \n\t"
2343 "xchg %3, (%%esp) \n\t"
2344 "mov %%eax, %c[rax](%3) \n\t"
2345 "mov %%ebx, %c[rbx](%3) \n\t"
2346 "pushl (%%esp); popl %c[rcx](%3) \n\t"
2347 "mov %%edx, %c[rdx](%3) \n\t"
2348 "mov %%esi, %c[rsi](%3) \n\t"
2349 "mov %%edi, %c[rdi](%3) \n\t"
2350 "mov %%ebp, %c[rbp](%3) \n\t"
2351 "mov %%cr2, %%eax \n\t"
2352 "mov %%eax, %c[cr2](%3) \n\t"
2353 "mov (%%esp), %3 \n\t"
2355 "pop %%ecx; popa \n\t"
2359 : "r"(vmx
->launched
), "d"((unsigned long)HOST_RSP
),
2361 [rax
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RAX
])),
2362 [rbx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBX
])),
2363 [rcx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RCX
])),
2364 [rdx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDX
])),
2365 [rsi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RSI
])),
2366 [rdi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDI
])),
2367 [rbp
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBP
])),
2368 #ifdef CONFIG_X86_64
2369 [r8
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R8
])),
2370 [r9
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R9
])),
2371 [r10
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R10
])),
2372 [r11
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R11
])),
2373 [r12
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R12
])),
2374 [r13
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R13
])),
2375 [r14
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R14
])),
2376 [r15
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R15
])),
2378 [cr2
]"i"(offsetof(struct kvm_vcpu
, cr2
))
2381 vcpu
->interrupt_window_open
=
2382 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0;
2384 asm("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS
));
2387 intr_info
= vmcs_read32(VM_EXIT_INTR_INFO
);
2389 /* We need to handle NMIs before interrupts are enabled */
2390 if ((intr_info
& INTR_INFO_INTR_TYPE_MASK
) == 0x200) /* nmi */
2394 static void vmx_inject_page_fault(struct kvm_vcpu
*vcpu
,
2398 u32 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
2400 ++vcpu
->stat
.pf_guest
;
2402 if (is_page_fault(vect_info
)) {
2403 printk(KERN_DEBUG
"inject_page_fault: "
2404 "double fault 0x%lx @ 0x%lx\n",
2405 addr
, vmcs_readl(GUEST_RIP
));
2406 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, 0);
2407 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
2409 INTR_TYPE_EXCEPTION
|
2410 INTR_INFO_DELIEVER_CODE_MASK
|
2411 INTR_INFO_VALID_MASK
);
2415 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, err_code
);
2416 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
2418 INTR_TYPE_EXCEPTION
|
2419 INTR_INFO_DELIEVER_CODE_MASK
|
2420 INTR_INFO_VALID_MASK
);
2424 static void vmx_free_vmcs(struct kvm_vcpu
*vcpu
)
2426 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
2429 on_each_cpu(__vcpu_clear
, vmx
, 0, 1);
2430 free_vmcs(vmx
->vmcs
);
2435 static void vmx_free_vcpu(struct kvm_vcpu
*vcpu
)
2437 struct vcpu_vmx
*vmx
= to_vmx(vcpu
);
2439 vmx_free_vmcs(vcpu
);
2440 kfree(vmx
->host_msrs
);
2441 kfree(vmx
->guest_msrs
);
2442 kvm_vcpu_uninit(vcpu
);
2443 kmem_cache_free(kvm_vcpu_cache
, vmx
);
2446 static struct kvm_vcpu
*vmx_create_vcpu(struct kvm
*kvm
, unsigned int id
)
2449 struct vcpu_vmx
*vmx
= kmem_cache_zalloc(kvm_vcpu_cache
, GFP_KERNEL
);
2453 return ERR_PTR(-ENOMEM
);
2455 err
= kvm_vcpu_init(&vmx
->vcpu
, kvm
, id
);
2459 vmx
->guest_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2460 if (!vmx
->guest_msrs
) {
2465 vmx
->host_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2466 if (!vmx
->host_msrs
)
2467 goto free_guest_msrs
;
2469 vmx
->vmcs
= alloc_vmcs();
2473 vmcs_clear(vmx
->vmcs
);
2476 vmx_vcpu_load(&vmx
->vcpu
, cpu
);
2477 err
= vmx_vcpu_setup(vmx
);
2478 vmx_vcpu_put(&vmx
->vcpu
);
2486 free_vmcs(vmx
->vmcs
);
2488 kfree(vmx
->host_msrs
);
2490 kfree(vmx
->guest_msrs
);
2492 kvm_vcpu_uninit(&vmx
->vcpu
);
2494 kmem_cache_free(kvm_vcpu_cache
, vmx
);
2495 return ERR_PTR(err
);
2498 static void __init
vmx_check_processor_compat(void *rtn
)
2500 struct vmcs_config vmcs_conf
;
2503 if (setup_vmcs_config(&vmcs_conf
) < 0)
2505 if (memcmp(&vmcs_config
, &vmcs_conf
, sizeof(struct vmcs_config
)) != 0) {
2506 printk(KERN_ERR
"kvm: CPU %d feature inconsistency!\n",
2507 smp_processor_id());
2512 static struct kvm_x86_ops vmx_x86_ops
= {
2513 .cpu_has_kvm_support
= cpu_has_kvm_support
,
2514 .disabled_by_bios
= vmx_disabled_by_bios
,
2515 .hardware_setup
= hardware_setup
,
2516 .hardware_unsetup
= hardware_unsetup
,
2517 .check_processor_compatibility
= vmx_check_processor_compat
,
2518 .hardware_enable
= hardware_enable
,
2519 .hardware_disable
= hardware_disable
,
2521 .vcpu_create
= vmx_create_vcpu
,
2522 .vcpu_free
= vmx_free_vcpu
,
2523 .vcpu_reset
= vmx_vcpu_reset
,
2525 .prepare_guest_switch
= vmx_save_host_state
,
2526 .vcpu_load
= vmx_vcpu_load
,
2527 .vcpu_put
= vmx_vcpu_put
,
2528 .vcpu_decache
= vmx_vcpu_decache
,
2530 .set_guest_debug
= set_guest_debug
,
2531 .guest_debug_pre
= kvm_guest_debug_pre
,
2532 .get_msr
= vmx_get_msr
,
2533 .set_msr
= vmx_set_msr
,
2534 .get_segment_base
= vmx_get_segment_base
,
2535 .get_segment
= vmx_get_segment
,
2536 .set_segment
= vmx_set_segment
,
2537 .get_cs_db_l_bits
= vmx_get_cs_db_l_bits
,
2538 .decache_cr4_guest_bits
= vmx_decache_cr4_guest_bits
,
2539 .set_cr0
= vmx_set_cr0
,
2540 .set_cr3
= vmx_set_cr3
,
2541 .set_cr4
= vmx_set_cr4
,
2542 #ifdef CONFIG_X86_64
2543 .set_efer
= vmx_set_efer
,
2545 .get_idt
= vmx_get_idt
,
2546 .set_idt
= vmx_set_idt
,
2547 .get_gdt
= vmx_get_gdt
,
2548 .set_gdt
= vmx_set_gdt
,
2549 .cache_regs
= vcpu_load_rsp_rip
,
2550 .decache_regs
= vcpu_put_rsp_rip
,
2551 .get_rflags
= vmx_get_rflags
,
2552 .set_rflags
= vmx_set_rflags
,
2554 .tlb_flush
= vmx_flush_tlb
,
2555 .inject_page_fault
= vmx_inject_page_fault
,
2557 .inject_gp
= vmx_inject_gp
,
2559 .run
= vmx_vcpu_run
,
2560 .handle_exit
= kvm_handle_exit
,
2561 .skip_emulated_instruction
= skip_emulated_instruction
,
2562 .patch_hypercall
= vmx_patch_hypercall
,
2563 .get_irq
= vmx_get_irq
,
2564 .set_irq
= vmx_inject_irq
,
2565 .inject_pending_irq
= vmx_intr_assist
,
2566 .inject_pending_vectors
= do_interrupt_requests
,
2568 .set_tss_addr
= vmx_set_tss_addr
,
2571 static int __init
vmx_init(void)
2576 vmx_io_bitmap_a
= alloc_page(GFP_KERNEL
| __GFP_HIGHMEM
);
2577 if (!vmx_io_bitmap_a
)
2580 vmx_io_bitmap_b
= alloc_page(GFP_KERNEL
| __GFP_HIGHMEM
);
2581 if (!vmx_io_bitmap_b
) {
2587 * Allow direct access to the PC debug port (it is often used for I/O
2588 * delays, but the vmexits simply slow things down).
2590 iova
= kmap(vmx_io_bitmap_a
);
2591 memset(iova
, 0xff, PAGE_SIZE
);
2592 clear_bit(0x80, iova
);
2593 kunmap(vmx_io_bitmap_a
);
2595 iova
= kmap(vmx_io_bitmap_b
);
2596 memset(iova
, 0xff, PAGE_SIZE
);
2597 kunmap(vmx_io_bitmap_b
);
2599 r
= kvm_init_x86(&vmx_x86_ops
, sizeof(struct vcpu_vmx
), THIS_MODULE
);
2603 if (bypass_guest_pf
)
2604 kvm_mmu_set_nonpresent_ptes(~0xffeull
, 0ull);
2609 __free_page(vmx_io_bitmap_b
);
2611 __free_page(vmx_io_bitmap_a
);
2615 static void __exit
vmx_exit(void)
2617 __free_page(vmx_io_bitmap_b
);
2618 __free_page(vmx_io_bitmap_a
);
2623 module_init(vmx_init
)
2624 module_exit(vmx_exit
)