arch/sparc/kernel/sun4d_irq.c

   1 /*
   2  * SS1000/SC2000 interrupt handling.
   3  *
   4  *  Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
   5  *  Heavily based on arch/sparc/kernel/irq.c.
   6  */
   7
   8 #include <linux/kernel_stat.h>
   9 #include <linux/seq_file.h>
  10
  11 #include <asm/timer.h>
  12 #include <asm/traps.h>
  13 #include <asm/irq.h>
  14 #include <asm/io.h>
  15 #include <asm/sbi.h>
  16 #include <asm/cacheflush.h>
  17 #include <asm/setup.h>
  18 #include <asm/oplib.h>
  19
  20 #include "kernel.h"
  21 #include "irq.h"
  22
  23 /* Sun4d interrupts fall roughly into two categories.  SBUS and
  24  * cpu local.  CPU local interrupts cover the timer interrupts
  25  * and whatnot, and we encode those as normal PILs between
  26  * 0 and 15.
  27  * SBUS interrupts are encodes as a combination of board, level and slot.
  28  */
  29
  30 struct sun4d_handler_data {
  31         unsigned int cpuid;    /* target cpu */
  32         unsigned int real_irq; /* interrupt level */
  33 };
  34
  35
  36 static unsigned int sun4d_encode_irq(int board, int lvl, int slot)
  37 {
  38         return (board + 1) << 5 | (lvl << 2) | slot;
  39 }
  40
  41 struct sun4d_timer_regs {
  42         u32     l10_timer_limit;
  43         u32     l10_cur_countx;
  44         u32     l10_limit_noclear;
  45         u32     ctrl;
  46         u32     l10_cur_count;
  47 };
  48
  49 static struct sun4d_timer_regs __iomem *sun4d_timers;
  50
  51 #define SUN4D_TIMER_IRQ        10
  52
  53 /* Specify which cpu handle interrupts from which board.
  54  * Index is board - value is cpu.
  55  */
  56 static unsigned char board_to_cpu[32];
  57
  58 static int pil_to_sbus[] = {
  59         0,
  60         0,
  61         1,
  62         2,
  63         0,
  64         3,
  65         0,
  66         4,
  67         0,
  68         5,
  69         0,
  70         6,
  71         0,
  72         7,
  73         0,
  74         0,
  75 };
  76
  77 /* Exported for sun4d_smp.c */
  78 DEFINE_SPINLOCK(sun4d_imsk_lock);
  79
  80 /* SBUS interrupts are encoded integers including the board number
  81  * (plus one), the SBUS level, and the SBUS slot number.  Sun4D
  82  * IRQ dispatch is done by:
  83  *
  84  * 1) Reading the BW local interrupt table in order to get the bus
  85  *    interrupt mask.
  86  *
  87  *    This table is indexed by SBUS interrupt level which can be
  88  *    derived from the PIL we got interrupted on.
  89  *
  90  * 2) For each bus showing interrupt pending from #1, read the
  91  *    SBI interrupt state register.  This will indicate which slots
  92  *    have interrupts pending for that SBUS interrupt level.
  93  *
  94  * 3) Call the genreric IRQ support.
  95  */
  96 static void sun4d_sbus_handler_irq(int sbusl)
  97 {
  98         unsigned int bus_mask;
  99         unsigned int sbino, slot;
 100         unsigned int sbil;
 101
 102         bus_mask = bw_get_intr_mask(sbusl) & 0x3ffff;
 103         bw_clear_intr_mask(sbusl, bus_mask);
 104
 105         sbil = (sbusl << 2);
 106         /* Loop for each pending SBI */
 107         for (sbino = 0; bus_mask; sbino++, bus_mask >>= 1) {
 108                 unsigned int idx, mask;
 109
 110                 if (!(bus_mask & 1))
 111                         continue;
 112                 /* XXX This seems to ACK the irq twice.  acquire_sbi()
 113                  * XXX uses swap, therefore this writes 0xf << sbil,
 114                  * XXX then later release_sbi() will write the individual
 115                  * XXX bits which were set again.
 116                  */
 117                 mask = acquire_sbi(SBI2DEVID(sbino), 0xf << sbil);
 118                 mask &= (0xf << sbil);
 119
 120                 /* Loop for each pending SBI slot */
 121                 slot = (1 << sbil);
 122                 for (idx = 0; mask != 0; idx++, slot <<= 1) {
 123                         unsigned int pil;
 124                         struct irq_bucket *p;
 125
 126                         if (!(mask & slot))
 127                                 continue;
 128
 129                         mask &= ~slot;
 130                         pil = sun4d_encode_irq(sbino, sbusl, idx);
 131
 132                         p = irq_map[pil];
 133                         while (p) {
 134                                 struct irq_bucket *next;
 135
 136                                 next = p->next;
 137                                 generic_handle_irq(p->irq);
 138                                 p = next;
 139                         }
 140                         release_sbi(SBI2DEVID(sbino), slot);
 141                 }
 142         }
 143 }
 144
 145 void sun4d_handler_irq(int pil, struct pt_regs *regs)
 146 {
 147         struct pt_regs *old_regs;
 148         /* SBUS IRQ level (1 - 7) */
 149         int sbusl = pil_to_sbus[pil];
 150
 151         /* FIXME: Is this necessary?? */
 152         cc_get_ipen();
 153
 154         cc_set_iclr(1 << pil);
 155
 156 #ifdef CONFIG_SMP
 157         /*
 158          * Check IPI data structures after IRQ has been cleared. Hard and Soft
 159          * IRQ can happen at the same time, so both cases are always handled.
 160          */
 161         if (pil == SUN4D_IPI_IRQ)
 162                 sun4d_ipi_interrupt();
 163 #endif
 164
 165         old_regs = set_irq_regs(regs);
 166         irq_enter();
 167         if (sbusl == 0) {
 168                 /* cpu interrupt */
 169                 struct irq_bucket *p;
 170
 171                 p = irq_map[pil];
 172                 while (p) {
 173                         struct irq_bucket *next;
 174
 175                         next = p->next;
 176                         generic_handle_irq(p->irq);
 177                         p = next;
 178                 }
 179         } else {
 180                 /* SBUS interrupt */
 181                 sun4d_sbus_handler_irq(sbusl);
 182         }
 183         irq_exit();
 184         set_irq_regs(old_regs);
 185 }
 186
 187
 188 static void sun4d_mask_irq(struct irq_data *data)
 189 {
 190         struct sun4d_handler_data *handler_data = data->handler_data;
 191         unsigned int real_irq;
 192 #ifdef CONFIG_SMP
 193         int cpuid = handler_data->cpuid;
 194         unsigned long flags;
 195 #endif
 196         real_irq = handler_data->real_irq;
 197 #ifdef CONFIG_SMP
 198         spin_lock_irqsave(&sun4d_imsk_lock, flags);
 199         cc_set_imsk_other(cpuid, cc_get_imsk_other(cpuid) | (1 << real_irq));
 200         spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
 201 #else
 202         cc_set_imsk(cc_get_imsk() | (1 << real_irq));
 203 #endif
 204 }
 205
 206 static void sun4d_unmask_irq(struct irq_data *data)
 207 {
 208         struct sun4d_handler_data *handler_data = data->handler_data;
 209         unsigned int real_irq;
 210 #ifdef CONFIG_SMP
 211         int cpuid = handler_data->cpuid;
 212         unsigned long flags;
 213 #endif
 214         real_irq = handler_data->real_irq;
 215
 216 #ifdef CONFIG_SMP
 217         spin_lock_irqsave(&sun4d_imsk_lock, flags);
 218         cc_set_imsk_other(cpuid, cc_get_imsk_other(cpuid) & ~(1 << real_irq));
 219         spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
 220 #else
 221         cc_set_imsk(cc_get_imsk() & ~(1 << real_irq));
 222 #endif
 223 }
 224
 225 static unsigned int sun4d_startup_irq(struct irq_data *data)
 226 {
 227         irq_link(data->irq);
 228         sun4d_unmask_irq(data);
 229         return 0;
 230 }
 231
 232 static void sun4d_shutdown_irq(struct irq_data *data)
 233 {
 234         sun4d_mask_irq(data);
 235         irq_unlink(data->irq);
 236 }
 237
 238 struct irq_chip sun4d_irq = {
 239         .name           = "sun4d",
 240         .irq_startup    = sun4d_startup_irq,
 241         .irq_shutdown   = sun4d_shutdown_irq,
 242         .irq_unmask     = sun4d_unmask_irq,
 243         .irq_mask       = sun4d_mask_irq,
 244 };
 245
 246 #ifdef CONFIG_SMP
 247 /* Setup IRQ distribution scheme. */
 248 void __init sun4d_distribute_irqs(void)
 249 {
 250         struct device_node *dp;
 251
 252         int cpuid = cpu_logical_map(1);
 253
 254         if (cpuid == -1)
 255                 cpuid = cpu_logical_map(0);
 256         for_each_node_by_name(dp, "sbi") {
 257                 int devid = of_getintprop_default(dp, "device-id", 0);
 258                 int board = of_getintprop_default(dp, "board#", 0);
 259                 board_to_cpu[board] = cpuid;
 260                 set_sbi_tid(devid, cpuid << 3);
 261         }
 262         printk(KERN_ERR "All sbus IRQs directed to CPU%d\n", cpuid);
 263 }
 264 #endif
 265
 266 static void sun4d_clear_clock_irq(void)
 267 {
 268         sbus_readl(&sun4d_timers->l10_timer_limit);
 269 }
 270
 271 static void sun4d_load_profile_irq(int cpu, unsigned int limit)
 272 {
 273         unsigned int value = limit ? timer_value(limit) : 0;
 274         bw_set_prof_limit(cpu, value);
 275 }
 276
 277 static void __init sun4d_load_profile_irqs(void)
 278 {
 279         int cpu = 0, mid;
 280
 281         while (!cpu_find_by_instance(cpu, NULL, &mid)) {
 282                 sun4d_load_profile_irq(mid >> 3, 0);
 283                 cpu++;
 284         }
 285 }
 286
 287 unsigned int _sun4d_build_device_irq(unsigned int real_irq,
 288                                      unsigned int pil,
 289                                      unsigned int board)
 290 {
 291         struct sun4d_handler_data *handler_data;
 292         unsigned int irq;
 293
 294         irq = irq_alloc(real_irq, pil);
 295         if (irq == 0) {
 296                 prom_printf("IRQ: allocate for %d %d %d failed\n",
 297                         real_irq, pil, board);
 298                 goto err_out;
 299         }
 300
 301         handler_data = irq_get_handler_data(irq);
 302         if (unlikely(handler_data))
 303                 goto err_out;
 304
 305         handler_data = kzalloc(sizeof(struct sun4d_handler_data), GFP_ATOMIC);
 306         if (unlikely(!handler_data)) {
 307                 prom_printf("IRQ: kzalloc(sun4d_handler_data) failed.\n");
 308                 prom_halt();
 309         }
 310         handler_data->cpuid    = board_to_cpu[board];
 311         handler_data->real_irq = real_irq;
 312         irq_set_chip_and_handler_name(irq, &sun4d_irq,
 313                                       handle_level_irq, "level");
 314         irq_set_handler_data(irq, handler_data);
 315
 316 err_out:
 317         return irq;
 318 }
 319
 320
 321
 322 unsigned int sun4d_build_device_irq(struct platform_device *op,
 323                                     unsigned int real_irq)
 324 {
 325         struct device_node *dp = op->dev.of_node;
 326         struct device_node *board_parent, *bus = dp->parent;
 327         char *bus_connection;
 328         const struct linux_prom_registers *regs;
 329         unsigned int pil;
 330         unsigned int irq;
 331         int board, slot;
 332         int sbusl;
 333
 334         irq = real_irq;
 335         while (bus) {
 336                 if (!strcmp(bus->name, "sbi")) {
 337                         bus_connection = "io-unit";
 338                         break;
 339                 }
 340
 341                 if (!strcmp(bus->name, "bootbus")) {
 342                         bus_connection = "cpu-unit";
 343                         break;
 344                 }
 345
 346                 bus = bus->parent;
 347         }
 348         if (!bus)
 349                 goto err_out;
 350
 351         regs = of_get_property(dp, "reg", NULL);
 352         if (!regs)
 353                 goto err_out;
 354
 355         slot = regs->which_io;
 356
 357         /*
 358          * If Bus nodes parent is not io-unit/cpu-unit or the io-unit/cpu-unit
 359          * lacks a "board#" property, something is very wrong.
 360          */
 361         if (!bus->parent || strcmp(bus->parent->name, bus_connection)) {
 362                 printk(KERN_ERR "%s: Error, parent is not %s.\n",
 363                         bus->full_name, bus_connection);
 364                 goto err_out;
 365         }
 366         board_parent = bus->parent;
 367         board = of_getintprop_default(board_parent, "board#", -1);
 368         if (board == -1) {
 369                 printk(KERN_ERR "%s: Error, lacks board# property.\n",
 370                         board_parent->full_name);
 371                 goto err_out;
 372         }
 373
 374         sbusl = pil_to_sbus[real_irq];
 375         if (sbusl)
 376                 pil = sun4d_encode_irq(board, sbusl, slot);
 377         else
 378                 pil = real_irq;
 379
 380         irq = _sun4d_build_device_irq(real_irq, pil, board);
 381 err_out:
 382         return irq;
 383 }
 384
 385 unsigned int sun4d_build_timer_irq(unsigned int board, unsigned int real_irq)
 386 {
 387         return _sun4d_build_device_irq(real_irq, real_irq, board);
 388 }
 389
 390
 391 static void __init sun4d_fixup_trap_table(void)
 392 {
 393 #ifdef CONFIG_SMP
 394         unsigned long flags;
 395         struct tt_entry *trap_table = &sparc_ttable[SP_TRAP_IRQ1 + (14 - 1)];
 396
 397         /* Adjust so that we jump directly to smp4d_ticker */
 398         lvl14_save[2] += smp4d_ticker - real_irq_entry;
 399
 400         /* For SMP we use the level 14 ticker, however the bootup code
 401          * has copied the firmware's level 14 vector into the boot cpu's
 402          * trap table, we must fix this now or we get squashed.
 403          */
 404         local_irq_save(flags);
 405         patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */
 406         trap_table->inst_one = lvl14_save[0];
 407         trap_table->inst_two = lvl14_save[1];
 408         trap_table->inst_three = lvl14_save[2];
 409         trap_table->inst_four = lvl14_save[3];
 410         local_ops->cache_all();
 411         local_irq_restore(flags);
 412 #endif
 413 }
 414
 415 static void __init sun4d_init_timers(void)
 416 {
 417         struct device_node *dp;
 418         struct resource res;
 419         unsigned int irq;
 420         const u32 *reg;
 421         int err;
 422         int board;
 423
 424         dp = of_find_node_by_name(NULL, "cpu-unit");
 425         if (!dp) {
 426                 prom_printf("sun4d_init_timers: Unable to find cpu-unit\n");
 427                 prom_halt();
 428         }
 429
 430         /* Which cpu-unit we use is arbitrary, we can view the bootbus timer
 431          * registers via any cpu's mapping.  The first 'reg' property is the
 432          * bootbus.
 433          */
 434         reg = of_get_property(dp, "reg", NULL);
 435         if (!reg) {
 436                 prom_printf("sun4d_init_timers: No reg property\n");
 437                 prom_halt();
 438         }
 439
 440         board = of_getintprop_default(dp, "board#", -1);
 441         if (board == -1) {
 442                 prom_printf("sun4d_init_timers: No board# property on cpu-unit\n");
 443                 prom_halt();
 444         }
 445
 446         of_node_put(dp);
 447
 448         res.start = reg[1];
 449         res.end = reg[2] - 1;
 450         res.flags = reg[0] & 0xff;
 451         sun4d_timers = of_ioremap(&res, BW_TIMER_LIMIT,
 452                                   sizeof(struct sun4d_timer_regs), "user timer");
 453         if (!sun4d_timers) {
 454                 prom_printf("sun4d_init_timers: Can't map timer regs\n");
 455                 prom_halt();
 456         }
 457
 458 #ifdef CONFIG_SMP
 459         sparc_config.cs_period = SBUS_CLOCK_RATE * 2;  /* 2 seconds */
 460 #else
 461         sparc_config.cs_period = SBUS_CLOCK_RATE / HZ; /* 1/HZ sec  */
 462         sparc_config.features |= FEAT_L10_CLOCKEVENT;
 463 #endif
 464         sparc_config.features |= FEAT_L10_CLOCKSOURCE;
 465         sbus_writel(timer_value(sparc_config.cs_period),
 466                     &sun4d_timers->l10_timer_limit);
 467
 468         master_l10_counter = &sun4d_timers->l10_cur_count;
 469
 470         irq = sun4d_build_timer_irq(board, SUN4D_TIMER_IRQ);
 471         err = request_irq(irq, timer_interrupt, IRQF_TIMER, "timer", NULL);
 472         if (err) {
 473                 prom_printf("sun4d_init_timers: request_irq() failed with %d\n",
 474                              err);
 475                 prom_halt();
 476         }
 477         sun4d_load_profile_irqs();
 478         sun4d_fixup_trap_table();
 479 }
 480
 481 void __init sun4d_init_sbi_irq(void)
 482 {
 483         struct device_node *dp;
 484         int target_cpu;
 485
 486         target_cpu = boot_cpu_id;
 487         for_each_node_by_name(dp, "sbi") {
 488                 int devid = of_getintprop_default(dp, "device-id", 0);
 489                 int board = of_getintprop_default(dp, "board#", 0);
 490                 unsigned int mask;
 491
 492                 set_sbi_tid(devid, target_cpu << 3);
 493                 board_to_cpu[board] = target_cpu;
 494
 495                 /* Get rid of pending irqs from PROM */
 496                 mask = acquire_sbi(devid, 0xffffffff);
 497                 if (mask) {
 498                         printk(KERN_ERR "Clearing pending IRQs %08x on SBI %d\n",
 499                                mask, board);
 500                         release_sbi(devid, mask);
 501                 }
 502         }
 503 }
 504
 505 void __init sun4d_init_IRQ(void)
 506 {
 507         local_irq_disable();
 508
 509         sparc_config.init_timers      = sun4d_init_timers;
 510         sparc_config.build_device_irq = sun4d_build_device_irq;
 511         sparc_config.clock_rate       = SBUS_CLOCK_RATE;
 512         sparc_config.clear_clock_irq  = sun4d_clear_clock_irq;
 513         sparc_config.load_profile_irq = sun4d_load_profile_irq;
 514
 515         /* Cannot enable interrupts until OBP ticker is disabled. */
 516 }