wl1251: remove wl1271_setup()
[linux-2.6/btrfs-unstable.git] / drivers / net / wireless / wl12xx / spi.h
blobe48a552b2ea95ea3dd793d5f5bc55668615b102e
1 /*
2 * This file is part of wl12xx
4 * Copyright (c) 1998-2007 Texas Instruments Incorporated
5 * Copyright (C) 2008 Nokia Corporation
7 * Contact: Kalle Valo <kalle.valo@nokia.com>
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
25 #ifndef __WL12XX_SPI_H__
26 #define __WL12XX_SPI_H__
28 #include "cmd.h"
29 #include "acx.h"
30 #include "reg.h"
32 #define HW_ACCESS_MEMORY_MAX_RANGE 0x1FFC0
34 #define HW_ACCESS_PART0_SIZE_ADDR 0x1FFC0
35 #define HW_ACCESS_PART0_START_ADDR 0x1FFC4
36 #define HW_ACCESS_PART1_SIZE_ADDR 0x1FFC8
37 #define HW_ACCESS_PART1_START_ADDR 0x1FFCC
39 #define HW_ACCESS_REGISTER_SIZE 4
41 #define HW_ACCESS_PRAM_MAX_RANGE 0x3c000
43 #define WSPI_CMD_READ 0x40000000
44 #define WSPI_CMD_WRITE 0x00000000
45 #define WSPI_CMD_FIXED 0x20000000
46 #define WSPI_CMD_BYTE_LENGTH 0x1FFE0000
47 #define WSPI_CMD_BYTE_LENGTH_OFFSET 17
48 #define WSPI_CMD_BYTE_ADDR 0x0001FFFF
50 #define WSPI_INIT_CMD_CRC_LEN 5
52 #define WSPI_INIT_CMD_START 0x00
53 #define WSPI_INIT_CMD_TX 0x40
54 /* the extra bypass bit is sampled by the TNET as '1' */
55 #define WSPI_INIT_CMD_BYPASS_BIT 0x80
56 #define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
57 #define WSPI_INIT_CMD_EN_FIXEDBUSY 0x80
58 #define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
59 #define WSPI_INIT_CMD_IOD 0x40
60 #define WSPI_INIT_CMD_IP 0x20
61 #define WSPI_INIT_CMD_CS 0x10
62 #define WSPI_INIT_CMD_WS 0x08
63 #define WSPI_INIT_CMD_WSPI 0x01
64 #define WSPI_INIT_CMD_END 0x01
66 #define WSPI_INIT_CMD_LEN 8
68 #define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
69 ((WL12XX_BUSY_WORD_LEN - 4) / sizeof(u32))
70 #define HW_ACCESS_WSPI_INIT_CMD_MASK 0
73 /* Raw target IO, address is not translated */
74 void wl12xx_spi_write(struct wl12xx *wl, int addr, void *buf,
75 size_t len, bool fixed);
76 void wl12xx_spi_read(struct wl12xx *wl, int addr, void *buf,
77 size_t len, bool fixed);
79 /* Memory target IO, address is tranlated to partition 0 */
80 void wl12xx_spi_mem_read(struct wl12xx *wl, int addr, void *buf, size_t len);
81 void wl12xx_spi_mem_write(struct wl12xx *wl, int addr, void *buf, size_t len);
82 u32 wl12xx_mem_read32(struct wl12xx *wl, int addr);
83 void wl12xx_mem_write32(struct wl12xx *wl, int addr, u32 val);
85 /* Registers IO */
86 void wl12xx_spi_reg_read(struct wl12xx *wl, int addr, void *buf, size_t len,
87 bool fixed);
88 void wl12xx_spi_reg_write(struct wl12xx *wl, int addr, void *buf, size_t len,
89 bool fixed);
90 u32 wl12xx_reg_read32(struct wl12xx *wl, int addr);
91 void wl12xx_reg_write32(struct wl12xx *wl, int addr, u32 val);
93 /* INIT and RESET words */
94 void wl12xx_spi_reset(struct wl12xx *wl);
95 void wl12xx_spi_init(struct wl12xx *wl);
96 int wl12xx_set_partition(struct wl12xx *wl,
97 u32 part_start, u32 part_size,
98 u32 reg_start, u32 reg_size);
100 static inline u32 wl12xx_read32(struct wl12xx *wl, int addr)
102 wl12xx_spi_read(wl, addr, &wl->buffer_32,
103 sizeof(wl->buffer_32), false);
105 return wl->buffer_32;
108 static inline void wl12xx_write32(struct wl12xx *wl, int addr, u32 val)
110 wl->buffer_32 = val;
111 wl12xx_spi_write(wl, addr, &wl->buffer_32,
112 sizeof(wl->buffer_32), false);
115 #endif /* __WL12XX_SPI_H__ */