drivers/crypto/amcc/crypto4xx_core.h

   1 /**
   2  * AMCC SoC PPC4xx Crypto Driver
   3  *
   4  * Copyright (c) 2008 Applied Micro Circuits Corporation.
   5  * All rights reserved. James Hsiao <jhsiao@amcc.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * This is the header file for AMCC Crypto offload Linux device driver for
  18  * use with Linux CryptoAPI.
  19
  20  */
  21
  22 #ifndef __CRYPTO4XX_CORE_H__
  23 #define __CRYPTO4XX_CORE_H__
  24
  25 #include <linux/ratelimit.h>
  26 #include <crypto/internal/hash.h>
  27 #include <crypto/internal/aead.h>
  28 #include "crypto4xx_reg_def.h"
  29 #include "crypto4xx_sa.h"
  30
  31 #define MODULE_NAME "crypto4xx"
  32
  33 #define PPC460SX_SDR0_SRST                      0x201
  34 #define PPC405EX_SDR0_SRST                      0x200
  35 #define PPC460EX_SDR0_SRST                      0x201
  36 #define PPC460EX_CE_RESET                       0x08000000
  37 #define PPC460SX_CE_RESET                       0x20000000
  38 #define PPC405EX_CE_RESET                       0x00000008
  39
  40 #define CRYPTO4XX_CRYPTO_PRIORITY               300
  41 #define PPC4XX_NUM_PD                           256
  42 #define PPC4XX_LAST_PD                          (PPC4XX_NUM_PD - 1)
  43 #define PPC4XX_NUM_GD                           1024
  44 #define PPC4XX_LAST_GD                          (PPC4XX_NUM_GD - 1)
  45 #define PPC4XX_NUM_SD                           256
  46 #define PPC4XX_LAST_SD                          (PPC4XX_NUM_SD - 1)
  47 #define PPC4XX_SD_BUFFER_SIZE                   2048
  48
  49 #define PD_ENTRY_BUSY                           BIT(1)
  50 #define PD_ENTRY_INUSE                          BIT(0)
  51 #define PD_ENTRY_FREE                           0
  52 #define ERING_WAS_FULL                          0xffffffff
  53
  54 struct crypto4xx_device;
  55
  56 union shadow_sa_buf {
  57         struct dynamic_sa_ctl sa;
  58
  59         /* alloc 256 bytes which is enough for any kind of dynamic sa */
  60         u8 buf[256];
  61 } __packed;
  62
  63 struct pd_uinfo {
  64         struct crypto4xx_device *dev;
  65         u32   state;
  66         u32 using_sd;
  67         u32 first_gd;           /* first gather discriptor
  68                                 used by this packet */
  69         u32 num_gd;             /* number of gather discriptor
  70                                 used by this packet */
  71         u32 first_sd;           /* first scatter discriptor
  72                                 used by this packet */
  73         u32 num_sd;             /* number of scatter discriptors
  74                                 used by this packet */
  75         struct dynamic_sa_ctl *sa_va;   /* shadow sa */
  76         struct sa_state_record *sr_va;  /* state record for shadow sa */
  77         u32 sr_pa;
  78         struct scatterlist *dest_va;
  79         struct crypto_async_request *async_req;         /* base crypto request
  80                                                         for this packet */
  81 };
  82
  83 struct crypto4xx_device {
  84         struct crypto4xx_core_device *core_dev;
  85         char *name;
  86         void __iomem *ce_base;
  87         void __iomem *trng_base;
  88
  89         struct ce_pd *pdr;      /* base address of packet descriptor ring */
  90         dma_addr_t pdr_pa;      /* physical address of pdr_base_register */
  91         struct ce_gd *gdr;      /* gather descriptor ring */
  92         dma_addr_t gdr_pa;      /* physical address of gdr_base_register */
  93         struct ce_sd *sdr;      /* scatter descriptor ring */
  94         dma_addr_t sdr_pa;      /* physical address of sdr_base_register */
  95         void *scatter_buffer_va;
  96         dma_addr_t scatter_buffer_pa;
  97
  98         union shadow_sa_buf *shadow_sa_pool;
  99         dma_addr_t shadow_sa_pool_pa;
 100         struct sa_state_record *shadow_sr_pool;
 101         dma_addr_t shadow_sr_pool_pa;
 102         u32 pdr_tail;
 103         u32 pdr_head;
 104         u32 gdr_tail;
 105         u32 gdr_head;
 106         u32 sdr_tail;
 107         u32 sdr_head;
 108         struct pd_uinfo *pdr_uinfo;
 109         struct list_head alg_list;      /* List of algorithm supported
 110                                         by this device */
 111         struct ratelimit_state aead_ratelimit;
 112 };
 113
 114 struct crypto4xx_core_device {
 115         struct device *device;
 116         struct platform_device *ofdev;
 117         struct crypto4xx_device *dev;
 118         struct hwrng *trng;
 119         u32 int_status;
 120         u32 irq;
 121         struct tasklet_struct tasklet;
 122         spinlock_t lock;
 123 };
 124
 125 struct crypto4xx_ctx {
 126         struct crypto4xx_device *dev;
 127         struct dynamic_sa_ctl *sa_in;
 128         struct dynamic_sa_ctl *sa_out;
 129         __le32 iv_nonce;
 130         u32 sa_len;
 131         union {
 132                 struct crypto_aead *aead;
 133         } sw_cipher;
 134 };
 135
 136 struct crypto4xx_alg_common {
 137         u32 type;
 138         union {
 139                 struct crypto_alg cipher;
 140                 struct ahash_alg hash;
 141                 struct aead_alg aead;
 142         } u;
 143 };
 144
 145 struct crypto4xx_alg {
 146         struct list_head  entry;
 147         struct crypto4xx_alg_common alg;
 148         struct crypto4xx_device *dev;
 149 };
 150
 151 int crypto4xx_alloc_sa(struct crypto4xx_ctx *ctx, u32 size);
 152 void crypto4xx_free_sa(struct crypto4xx_ctx *ctx);
 153 void crypto4xx_free_ctx(struct crypto4xx_ctx *ctx);
 154 int crypto4xx_build_pd(struct crypto_async_request *req,
 155                        struct crypto4xx_ctx *ctx,
 156                        struct scatterlist *src,
 157                        struct scatterlist *dst,
 158                        const unsigned int datalen,
 159                        const __le32 *iv, const u32 iv_len,
 160                        const struct dynamic_sa_ctl *sa,
 161                        const unsigned int sa_len,
 162                        const unsigned int assoclen);
 163 int crypto4xx_setkey_aes_cbc(struct crypto_ablkcipher *cipher,
 164                              const u8 *key, unsigned int keylen);
 165 int crypto4xx_setkey_aes_cfb(struct crypto_ablkcipher *cipher,
 166                              const u8 *key, unsigned int keylen);
 167 int crypto4xx_setkey_aes_ecb(struct crypto_ablkcipher *cipher,
 168                              const u8 *key, unsigned int keylen);
 169 int crypto4xx_setkey_aes_ofb(struct crypto_ablkcipher *cipher,
 170                              const u8 *key, unsigned int keylen);
 171 int crypto4xx_setkey_rfc3686(struct crypto_ablkcipher *cipher,
 172                              const u8 *key, unsigned int keylen);
 173 int crypto4xx_encrypt(struct ablkcipher_request *req);
 174 int crypto4xx_decrypt(struct ablkcipher_request *req);
 175 int crypto4xx_rfc3686_encrypt(struct ablkcipher_request *req);
 176 int crypto4xx_rfc3686_decrypt(struct ablkcipher_request *req);
 177 int crypto4xx_sha1_alg_init(struct crypto_tfm *tfm);
 178 int crypto4xx_hash_digest(struct ahash_request *req);
 179 int crypto4xx_hash_final(struct ahash_request *req);
 180 int crypto4xx_hash_update(struct ahash_request *req);
 181 int crypto4xx_hash_init(struct ahash_request *req);
 182
 183 /**
 184  * Note: Only use this function to copy items that is word aligned.
 185  */
 186 static inline void crypto4xx_memcpy_swab32(u32 *dst, const void *buf,
 187                                            size_t len)
 188 {
 189         for (; len >= 4; buf += 4, len -= 4)
 190                 *dst++ = __swab32p((u32 *) buf);
 191
 192         if (len) {
 193                 const u8 *tmp = (u8 *)buf;
 194
 195                 switch (len) {
 196                 case 3:
 197                         *dst = (tmp[2] << 16) |
 198                                (tmp[1] << 8) |
 199                                tmp[0];
 200                         break;
 201                 case 2:
 202                         *dst = (tmp[1] << 8) |
 203                                tmp[0];
 204                         break;
 205                 case 1:
 206                         *dst = tmp[0];
 207                         break;
 208                 default:
 209                         break;
 210                 }
 211         }
 212 }
 213
 214 static inline void crypto4xx_memcpy_from_le32(u32 *dst, const void *buf,
 215                                               size_t len)
 216 {
 217         crypto4xx_memcpy_swab32(dst, buf, len);
 218 }
 219
 220 static inline void crypto4xx_memcpy_to_le32(__le32 *dst, const void *buf,
 221                                             size_t len)
 222 {
 223         crypto4xx_memcpy_swab32((u32 *)dst, buf, len);
 224 }
 225
 226 int crypto4xx_setauthsize_aead(struct crypto_aead *ciper,
 227                                unsigned int authsize);
 228 int crypto4xx_setkey_aes_ccm(struct crypto_aead *cipher,
 229                              const u8 *key, unsigned int keylen);
 230 int crypto4xx_encrypt_aes_ccm(struct aead_request *req);
 231 int crypto4xx_decrypt_aes_ccm(struct aead_request *req);
 232 int crypto4xx_setkey_aes_gcm(struct crypto_aead *cipher,
 233                              const u8 *key, unsigned int keylen);
 234 int crypto4xx_encrypt_aes_gcm(struct aead_request *req);
 235 int crypto4xx_decrypt_aes_gcm(struct aead_request *req);
 236
 237 #endif