nvme: Fixes u64 division which breaks i386 builds
[linux-2.6/btrfs-unstable.git] / drivers / block / nvme-core.c
blob666e994fd622ce33403cff239ea251ded13e29c5
1 /*
2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
15 #include <linux/nvme.h>
16 #include <linux/bitops.h>
17 #include <linux/blkdev.h>
18 #include <linux/blk-mq.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
21 #include <linux/errno.h>
22 #include <linux/fs.h>
23 #include <linux/genhd.h>
24 #include <linux/hdreg.h>
25 #include <linux/idr.h>
26 #include <linux/init.h>
27 #include <linux/interrupt.h>
28 #include <linux/io.h>
29 #include <linux/kdev_t.h>
30 #include <linux/kthread.h>
31 #include <linux/kernel.h>
32 #include <linux/list_sort.h>
33 #include <linux/mm.h>
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/pci.h>
37 #include <linux/poison.h>
38 #include <linux/ptrace.h>
39 #include <linux/sched.h>
40 #include <linux/slab.h>
41 #include <linux/t10-pi.h>
42 #include <linux/types.h>
43 #include <scsi/sg.h>
44 #include <asm-generic/io-64-nonatomic-lo-hi.h>
46 #define NVME_MINORS (1U << MINORBITS)
47 #define NVME_Q_DEPTH 1024
48 #define NVME_AQ_DEPTH 256
49 #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
50 #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
51 #define ADMIN_TIMEOUT (admin_timeout * HZ)
52 #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
54 static unsigned char admin_timeout = 60;
55 module_param(admin_timeout, byte, 0644);
56 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
58 unsigned char nvme_io_timeout = 30;
59 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
60 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
62 static unsigned char shutdown_timeout = 5;
63 module_param(shutdown_timeout, byte, 0644);
64 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
66 static int nvme_major;
67 module_param(nvme_major, int, 0);
69 static int nvme_char_major;
70 module_param(nvme_char_major, int, 0);
72 static int use_threaded_interrupts;
73 module_param(use_threaded_interrupts, int, 0);
75 static bool use_cmb_sqes = true;
76 module_param(use_cmb_sqes, bool, 0644);
77 MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes");
79 static DEFINE_SPINLOCK(dev_list_lock);
80 static LIST_HEAD(dev_list);
81 static struct task_struct *nvme_thread;
82 static struct workqueue_struct *nvme_workq;
83 static wait_queue_head_t nvme_kthread_wait;
85 static struct class *nvme_class;
87 static void nvme_reset_failed_dev(struct work_struct *ws);
88 static int nvme_reset(struct nvme_dev *dev);
89 static int nvme_process_cq(struct nvme_queue *nvmeq);
91 struct async_cmd_info {
92 struct kthread_work work;
93 struct kthread_worker *worker;
94 struct request *req;
95 u32 result;
96 int status;
97 void *ctx;
101 * An NVM Express queue. Each device has at least two (one for admin
102 * commands and one for I/O commands).
104 struct nvme_queue {
105 struct device *q_dmadev;
106 struct nvme_dev *dev;
107 char irqname[24]; /* nvme4294967295-65535\0 */
108 spinlock_t q_lock;
109 struct nvme_command *sq_cmds;
110 struct nvme_command __iomem *sq_cmds_io;
111 volatile struct nvme_completion *cqes;
112 struct blk_mq_tags **tags;
113 dma_addr_t sq_dma_addr;
114 dma_addr_t cq_dma_addr;
115 u32 __iomem *q_db;
116 u16 q_depth;
117 s16 cq_vector;
118 u16 sq_head;
119 u16 sq_tail;
120 u16 cq_head;
121 u16 qid;
122 u8 cq_phase;
123 u8 cqe_seen;
124 struct async_cmd_info cmdinfo;
128 * Check we didin't inadvertently grow the command struct
130 static inline void _nvme_check_size(void)
132 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
133 BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
134 BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
135 BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
136 BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
137 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
138 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
139 BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
140 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
141 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
142 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
143 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
146 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
147 struct nvme_completion *);
149 struct nvme_cmd_info {
150 nvme_completion_fn fn;
151 void *ctx;
152 int aborted;
153 struct nvme_queue *nvmeq;
154 struct nvme_iod iod[0];
158 * Max size of iod being embedded in the request payload
160 #define NVME_INT_PAGES 2
161 #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->page_size)
162 #define NVME_INT_MASK 0x01
165 * Will slightly overestimate the number of pages needed. This is OK
166 * as it only leads to a small amount of wasted memory for the lifetime of
167 * the I/O.
169 static int nvme_npages(unsigned size, struct nvme_dev *dev)
171 unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
172 return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
175 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
177 unsigned int ret = sizeof(struct nvme_cmd_info);
179 ret += sizeof(struct nvme_iod);
180 ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
181 ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
183 return ret;
186 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
187 unsigned int hctx_idx)
189 struct nvme_dev *dev = data;
190 struct nvme_queue *nvmeq = dev->queues[0];
192 WARN_ON(hctx_idx != 0);
193 WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
194 WARN_ON(nvmeq->tags);
196 hctx->driver_data = nvmeq;
197 nvmeq->tags = &dev->admin_tagset.tags[0];
198 return 0;
201 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
203 struct nvme_queue *nvmeq = hctx->driver_data;
205 nvmeq->tags = NULL;
208 static int nvme_admin_init_request(void *data, struct request *req,
209 unsigned int hctx_idx, unsigned int rq_idx,
210 unsigned int numa_node)
212 struct nvme_dev *dev = data;
213 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
214 struct nvme_queue *nvmeq = dev->queues[0];
216 BUG_ON(!nvmeq);
217 cmd->nvmeq = nvmeq;
218 return 0;
221 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
222 unsigned int hctx_idx)
224 struct nvme_dev *dev = data;
225 struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
227 if (!nvmeq->tags)
228 nvmeq->tags = &dev->tagset.tags[hctx_idx];
230 WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
231 hctx->driver_data = nvmeq;
232 return 0;
235 static int nvme_init_request(void *data, struct request *req,
236 unsigned int hctx_idx, unsigned int rq_idx,
237 unsigned int numa_node)
239 struct nvme_dev *dev = data;
240 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
241 struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
243 BUG_ON(!nvmeq);
244 cmd->nvmeq = nvmeq;
245 return 0;
248 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
249 nvme_completion_fn handler)
251 cmd->fn = handler;
252 cmd->ctx = ctx;
253 cmd->aborted = 0;
254 blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
257 static void *iod_get_private(struct nvme_iod *iod)
259 return (void *) (iod->private & ~0x1UL);
263 * If bit 0 is set, the iod is embedded in the request payload.
265 static bool iod_should_kfree(struct nvme_iod *iod)
267 return (iod->private & NVME_INT_MASK) == 0;
270 /* Special values must be less than 0x1000 */
271 #define CMD_CTX_BASE ((void *)POISON_POINTER_DELTA)
272 #define CMD_CTX_CANCELLED (0x30C + CMD_CTX_BASE)
273 #define CMD_CTX_COMPLETED (0x310 + CMD_CTX_BASE)
274 #define CMD_CTX_INVALID (0x314 + CMD_CTX_BASE)
276 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
277 struct nvme_completion *cqe)
279 if (ctx == CMD_CTX_CANCELLED)
280 return;
281 if (ctx == CMD_CTX_COMPLETED) {
282 dev_warn(nvmeq->q_dmadev,
283 "completed id %d twice on queue %d\n",
284 cqe->command_id, le16_to_cpup(&cqe->sq_id));
285 return;
287 if (ctx == CMD_CTX_INVALID) {
288 dev_warn(nvmeq->q_dmadev,
289 "invalid id %d completed on queue %d\n",
290 cqe->command_id, le16_to_cpup(&cqe->sq_id));
291 return;
293 dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
296 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
298 void *ctx;
300 if (fn)
301 *fn = cmd->fn;
302 ctx = cmd->ctx;
303 cmd->fn = special_completion;
304 cmd->ctx = CMD_CTX_CANCELLED;
305 return ctx;
308 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
309 struct nvme_completion *cqe)
311 u32 result = le32_to_cpup(&cqe->result);
312 u16 status = le16_to_cpup(&cqe->status) >> 1;
314 if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
315 ++nvmeq->dev->event_limit;
316 if (status != NVME_SC_SUCCESS)
317 return;
319 switch (result & 0xff07) {
320 case NVME_AER_NOTICE_NS_CHANGED:
321 dev_info(nvmeq->q_dmadev, "rescanning\n");
322 schedule_work(&nvmeq->dev->scan_work);
323 default:
324 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
328 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
329 struct nvme_completion *cqe)
331 struct request *req = ctx;
333 u16 status = le16_to_cpup(&cqe->status) >> 1;
334 u32 result = le32_to_cpup(&cqe->result);
336 blk_mq_free_request(req);
338 dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
339 ++nvmeq->dev->abort_limit;
342 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
343 struct nvme_completion *cqe)
345 struct async_cmd_info *cmdinfo = ctx;
346 cmdinfo->result = le32_to_cpup(&cqe->result);
347 cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
348 queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
349 blk_mq_free_request(cmdinfo->req);
352 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
353 unsigned int tag)
355 struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
357 return blk_mq_rq_to_pdu(req);
361 * Called with local interrupts disabled and the q_lock held. May not sleep.
363 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
364 nvme_completion_fn *fn)
366 struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
367 void *ctx;
368 if (tag >= nvmeq->q_depth) {
369 *fn = special_completion;
370 return CMD_CTX_INVALID;
372 if (fn)
373 *fn = cmd->fn;
374 ctx = cmd->ctx;
375 cmd->fn = special_completion;
376 cmd->ctx = CMD_CTX_COMPLETED;
377 return ctx;
381 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
382 * @nvmeq: The queue to use
383 * @cmd: The command to send
385 * Safe to use from interrupt context
387 static int __nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
389 u16 tail = nvmeq->sq_tail;
391 if (nvmeq->sq_cmds_io)
392 memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd));
393 else
394 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
396 if (++tail == nvmeq->q_depth)
397 tail = 0;
398 writel(tail, nvmeq->q_db);
399 nvmeq->sq_tail = tail;
401 return 0;
404 static int nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
406 unsigned long flags;
407 int ret;
408 spin_lock_irqsave(&nvmeq->q_lock, flags);
409 ret = __nvme_submit_cmd(nvmeq, cmd);
410 spin_unlock_irqrestore(&nvmeq->q_lock, flags);
411 return ret;
414 static __le64 **iod_list(struct nvme_iod *iod)
416 return ((void *)iod) + iod->offset;
419 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
420 unsigned nseg, unsigned long private)
422 iod->private = private;
423 iod->offset = offsetof(struct nvme_iod, sg[nseg]);
424 iod->npages = -1;
425 iod->length = nbytes;
426 iod->nents = 0;
429 static struct nvme_iod *
430 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
431 unsigned long priv, gfp_t gfp)
433 struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
434 sizeof(__le64 *) * nvme_npages(bytes, dev) +
435 sizeof(struct scatterlist) * nseg, gfp);
437 if (iod)
438 iod_init(iod, bytes, nseg, priv);
440 return iod;
443 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
444 gfp_t gfp)
446 unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
447 sizeof(struct nvme_dsm_range);
448 struct nvme_iod *iod;
450 if (rq->nr_phys_segments <= NVME_INT_PAGES &&
451 size <= NVME_INT_BYTES(dev)) {
452 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
454 iod = cmd->iod;
455 iod_init(iod, size, rq->nr_phys_segments,
456 (unsigned long) rq | NVME_INT_MASK);
457 return iod;
460 return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
461 (unsigned long) rq, gfp);
464 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
466 const int last_prp = dev->page_size / 8 - 1;
467 int i;
468 __le64 **list = iod_list(iod);
469 dma_addr_t prp_dma = iod->first_dma;
471 if (iod->npages == 0)
472 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
473 for (i = 0; i < iod->npages; i++) {
474 __le64 *prp_list = list[i];
475 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
476 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
477 prp_dma = next_prp_dma;
480 if (iod_should_kfree(iod))
481 kfree(iod);
484 static int nvme_error_status(u16 status)
486 switch (status & 0x7ff) {
487 case NVME_SC_SUCCESS:
488 return 0;
489 case NVME_SC_CAP_EXCEEDED:
490 return -ENOSPC;
491 default:
492 return -EIO;
496 #ifdef CONFIG_BLK_DEV_INTEGRITY
497 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
499 if (be32_to_cpu(pi->ref_tag) == v)
500 pi->ref_tag = cpu_to_be32(p);
503 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
505 if (be32_to_cpu(pi->ref_tag) == p)
506 pi->ref_tag = cpu_to_be32(v);
510 * nvme_dif_remap - remaps ref tags to bip seed and physical lba
512 * The virtual start sector is the one that was originally submitted by the
513 * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
514 * start sector may be different. Remap protection information to match the
515 * physical LBA on writes, and back to the original seed on reads.
517 * Type 0 and 3 do not have a ref tag, so no remapping required.
519 static void nvme_dif_remap(struct request *req,
520 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
522 struct nvme_ns *ns = req->rq_disk->private_data;
523 struct bio_integrity_payload *bip;
524 struct t10_pi_tuple *pi;
525 void *p, *pmap;
526 u32 i, nlb, ts, phys, virt;
528 if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
529 return;
531 bip = bio_integrity(req->bio);
532 if (!bip)
533 return;
535 pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
537 p = pmap;
538 virt = bip_get_seed(bip);
539 phys = nvme_block_nr(ns, blk_rq_pos(req));
540 nlb = (blk_rq_bytes(req) >> ns->lba_shift);
541 ts = ns->disk->integrity->tuple_size;
543 for (i = 0; i < nlb; i++, virt++, phys++) {
544 pi = (struct t10_pi_tuple *)p;
545 dif_swap(phys, virt, pi);
546 p += ts;
548 kunmap_atomic(pmap);
551 static int nvme_noop_verify(struct blk_integrity_iter *iter)
553 return 0;
556 static int nvme_noop_generate(struct blk_integrity_iter *iter)
558 return 0;
561 struct blk_integrity nvme_meta_noop = {
562 .name = "NVME_META_NOOP",
563 .generate_fn = nvme_noop_generate,
564 .verify_fn = nvme_noop_verify,
567 static void nvme_init_integrity(struct nvme_ns *ns)
569 struct blk_integrity integrity;
571 switch (ns->pi_type) {
572 case NVME_NS_DPS_PI_TYPE3:
573 integrity = t10_pi_type3_crc;
574 break;
575 case NVME_NS_DPS_PI_TYPE1:
576 case NVME_NS_DPS_PI_TYPE2:
577 integrity = t10_pi_type1_crc;
578 break;
579 default:
580 integrity = nvme_meta_noop;
581 break;
583 integrity.tuple_size = ns->ms;
584 blk_integrity_register(ns->disk, &integrity);
585 blk_queue_max_integrity_segments(ns->queue, 1);
587 #else /* CONFIG_BLK_DEV_INTEGRITY */
588 static void nvme_dif_remap(struct request *req,
589 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
592 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
595 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
598 static void nvme_init_integrity(struct nvme_ns *ns)
601 #endif
603 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
604 struct nvme_completion *cqe)
606 struct nvme_iod *iod = ctx;
607 struct request *req = iod_get_private(iod);
608 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
610 u16 status = le16_to_cpup(&cqe->status) >> 1;
612 if (unlikely(status)) {
613 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
614 && (jiffies - req->start_time) < req->timeout) {
615 unsigned long flags;
617 blk_mq_requeue_request(req);
618 spin_lock_irqsave(req->q->queue_lock, flags);
619 if (!blk_queue_stopped(req->q))
620 blk_mq_kick_requeue_list(req->q);
621 spin_unlock_irqrestore(req->q->queue_lock, flags);
622 return;
624 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
625 if (cmd_rq->ctx == CMD_CTX_CANCELLED)
626 req->errors = -EINTR;
627 else
628 req->errors = status;
629 } else {
630 req->errors = nvme_error_status(status);
632 } else
633 req->errors = 0;
634 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
635 u32 result = le32_to_cpup(&cqe->result);
636 req->special = (void *)(uintptr_t)result;
639 if (cmd_rq->aborted)
640 dev_warn(nvmeq->dev->dev,
641 "completing aborted command with status:%04x\n",
642 status);
644 if (iod->nents) {
645 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
646 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
647 if (blk_integrity_rq(req)) {
648 if (!rq_data_dir(req))
649 nvme_dif_remap(req, nvme_dif_complete);
650 dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
651 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
654 nvme_free_iod(nvmeq->dev, iod);
656 blk_mq_complete_request(req);
659 /* length is in bytes. gfp flags indicates whether we may sleep. */
660 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
661 int total_len, gfp_t gfp)
663 struct dma_pool *pool;
664 int length = total_len;
665 struct scatterlist *sg = iod->sg;
666 int dma_len = sg_dma_len(sg);
667 u64 dma_addr = sg_dma_address(sg);
668 u32 page_size = dev->page_size;
669 int offset = dma_addr & (page_size - 1);
670 __le64 *prp_list;
671 __le64 **list = iod_list(iod);
672 dma_addr_t prp_dma;
673 int nprps, i;
675 length -= (page_size - offset);
676 if (length <= 0)
677 return total_len;
679 dma_len -= (page_size - offset);
680 if (dma_len) {
681 dma_addr += (page_size - offset);
682 } else {
683 sg = sg_next(sg);
684 dma_addr = sg_dma_address(sg);
685 dma_len = sg_dma_len(sg);
688 if (length <= page_size) {
689 iod->first_dma = dma_addr;
690 return total_len;
693 nprps = DIV_ROUND_UP(length, page_size);
694 if (nprps <= (256 / 8)) {
695 pool = dev->prp_small_pool;
696 iod->npages = 0;
697 } else {
698 pool = dev->prp_page_pool;
699 iod->npages = 1;
702 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
703 if (!prp_list) {
704 iod->first_dma = dma_addr;
705 iod->npages = -1;
706 return (total_len - length) + page_size;
708 list[0] = prp_list;
709 iod->first_dma = prp_dma;
710 i = 0;
711 for (;;) {
712 if (i == page_size >> 3) {
713 __le64 *old_prp_list = prp_list;
714 prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
715 if (!prp_list)
716 return total_len - length;
717 list[iod->npages++] = prp_list;
718 prp_list[0] = old_prp_list[i - 1];
719 old_prp_list[i - 1] = cpu_to_le64(prp_dma);
720 i = 1;
722 prp_list[i++] = cpu_to_le64(dma_addr);
723 dma_len -= page_size;
724 dma_addr += page_size;
725 length -= page_size;
726 if (length <= 0)
727 break;
728 if (dma_len > 0)
729 continue;
730 BUG_ON(dma_len < 0);
731 sg = sg_next(sg);
732 dma_addr = sg_dma_address(sg);
733 dma_len = sg_dma_len(sg);
736 return total_len;
739 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
740 struct nvme_iod *iod)
742 struct nvme_command cmnd;
744 memcpy(&cmnd, req->cmd, sizeof(cmnd));
745 cmnd.rw.command_id = req->tag;
746 if (req->nr_phys_segments) {
747 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
748 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
751 __nvme_submit_cmd(nvmeq, &cmnd);
755 * We reuse the small pool to allocate the 16-byte range here as it is not
756 * worth having a special pool for these or additional cases to handle freeing
757 * the iod.
759 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
760 struct request *req, struct nvme_iod *iod)
762 struct nvme_dsm_range *range =
763 (struct nvme_dsm_range *)iod_list(iod)[0];
764 struct nvme_command cmnd;
766 range->cattr = cpu_to_le32(0);
767 range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
768 range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
770 memset(&cmnd, 0, sizeof(cmnd));
771 cmnd.dsm.opcode = nvme_cmd_dsm;
772 cmnd.dsm.command_id = req->tag;
773 cmnd.dsm.nsid = cpu_to_le32(ns->ns_id);
774 cmnd.dsm.prp1 = cpu_to_le64(iod->first_dma);
775 cmnd.dsm.nr = 0;
776 cmnd.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
778 __nvme_submit_cmd(nvmeq, &cmnd);
781 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
782 int cmdid)
784 struct nvme_command cmnd;
786 memset(&cmnd, 0, sizeof(cmnd));
787 cmnd.common.opcode = nvme_cmd_flush;
788 cmnd.common.command_id = cmdid;
789 cmnd.common.nsid = cpu_to_le32(ns->ns_id);
791 __nvme_submit_cmd(nvmeq, &cmnd);
794 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
795 struct nvme_ns *ns)
797 struct request *req = iod_get_private(iod);
798 struct nvme_command cmnd;
799 u16 control = 0;
800 u32 dsmgmt = 0;
802 if (req->cmd_flags & REQ_FUA)
803 control |= NVME_RW_FUA;
804 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
805 control |= NVME_RW_LR;
807 if (req->cmd_flags & REQ_RAHEAD)
808 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
810 memset(&cmnd, 0, sizeof(cmnd));
811 cmnd.rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
812 cmnd.rw.command_id = req->tag;
813 cmnd.rw.nsid = cpu_to_le32(ns->ns_id);
814 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
815 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
816 cmnd.rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
817 cmnd.rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
819 if (blk_integrity_rq(req)) {
820 cmnd.rw.metadata = cpu_to_le64(sg_dma_address(iod->meta_sg));
821 switch (ns->pi_type) {
822 case NVME_NS_DPS_PI_TYPE3:
823 control |= NVME_RW_PRINFO_PRCHK_GUARD;
824 break;
825 case NVME_NS_DPS_PI_TYPE1:
826 case NVME_NS_DPS_PI_TYPE2:
827 control |= NVME_RW_PRINFO_PRCHK_GUARD |
828 NVME_RW_PRINFO_PRCHK_REF;
829 cmnd.rw.reftag = cpu_to_le32(
830 nvme_block_nr(ns, blk_rq_pos(req)));
831 break;
833 } else if (ns->ms)
834 control |= NVME_RW_PRINFO_PRACT;
836 cmnd.rw.control = cpu_to_le16(control);
837 cmnd.rw.dsmgmt = cpu_to_le32(dsmgmt);
839 __nvme_submit_cmd(nvmeq, &cmnd);
841 return 0;
845 * NOTE: ns is NULL when called on the admin queue.
847 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
848 const struct blk_mq_queue_data *bd)
850 struct nvme_ns *ns = hctx->queue->queuedata;
851 struct nvme_queue *nvmeq = hctx->driver_data;
852 struct nvme_dev *dev = nvmeq->dev;
853 struct request *req = bd->rq;
854 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
855 struct nvme_iod *iod;
856 enum dma_data_direction dma_dir;
859 * If formated with metadata, require the block layer provide a buffer
860 * unless this namespace is formated such that the metadata can be
861 * stripped/generated by the controller with PRACT=1.
863 if (ns && ns->ms && !blk_integrity_rq(req)) {
864 if (!(ns->pi_type && ns->ms == 8) &&
865 req->cmd_type != REQ_TYPE_DRV_PRIV) {
866 req->errors = -EFAULT;
867 blk_mq_complete_request(req);
868 return BLK_MQ_RQ_QUEUE_OK;
872 iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
873 if (!iod)
874 return BLK_MQ_RQ_QUEUE_BUSY;
876 if (req->cmd_flags & REQ_DISCARD) {
877 void *range;
879 * We reuse the small pool to allocate the 16-byte range here
880 * as it is not worth having a special pool for these or
881 * additional cases to handle freeing the iod.
883 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
884 &iod->first_dma);
885 if (!range)
886 goto retry_cmd;
887 iod_list(iod)[0] = (__le64 *)range;
888 iod->npages = 0;
889 } else if (req->nr_phys_segments) {
890 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
892 sg_init_table(iod->sg, req->nr_phys_segments);
893 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
894 if (!iod->nents)
895 goto error_cmd;
897 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
898 goto retry_cmd;
900 if (blk_rq_bytes(req) !=
901 nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
902 dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
903 goto retry_cmd;
905 if (blk_integrity_rq(req)) {
906 if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
907 goto error_cmd;
909 sg_init_table(iod->meta_sg, 1);
910 if (blk_rq_map_integrity_sg(
911 req->q, req->bio, iod->meta_sg) != 1)
912 goto error_cmd;
914 if (rq_data_dir(req))
915 nvme_dif_remap(req, nvme_dif_prep);
917 if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
918 goto error_cmd;
922 nvme_set_info(cmd, iod, req_completion);
923 spin_lock_irq(&nvmeq->q_lock);
924 if (req->cmd_type == REQ_TYPE_DRV_PRIV)
925 nvme_submit_priv(nvmeq, req, iod);
926 else if (req->cmd_flags & REQ_DISCARD)
927 nvme_submit_discard(nvmeq, ns, req, iod);
928 else if (req->cmd_flags & REQ_FLUSH)
929 nvme_submit_flush(nvmeq, ns, req->tag);
930 else
931 nvme_submit_iod(nvmeq, iod, ns);
933 nvme_process_cq(nvmeq);
934 spin_unlock_irq(&nvmeq->q_lock);
935 return BLK_MQ_RQ_QUEUE_OK;
937 error_cmd:
938 nvme_free_iod(dev, iod);
939 return BLK_MQ_RQ_QUEUE_ERROR;
940 retry_cmd:
941 nvme_free_iod(dev, iod);
942 return BLK_MQ_RQ_QUEUE_BUSY;
945 static int nvme_process_cq(struct nvme_queue *nvmeq)
947 u16 head, phase;
949 head = nvmeq->cq_head;
950 phase = nvmeq->cq_phase;
952 for (;;) {
953 void *ctx;
954 nvme_completion_fn fn;
955 struct nvme_completion cqe = nvmeq->cqes[head];
956 if ((le16_to_cpu(cqe.status) & 1) != phase)
957 break;
958 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
959 if (++head == nvmeq->q_depth) {
960 head = 0;
961 phase = !phase;
963 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
964 fn(nvmeq, ctx, &cqe);
967 /* If the controller ignores the cq head doorbell and continuously
968 * writes to the queue, it is theoretically possible to wrap around
969 * the queue twice and mistakenly return IRQ_NONE. Linux only
970 * requires that 0.1% of your interrupts are handled, so this isn't
971 * a big problem.
973 if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
974 return 0;
976 writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
977 nvmeq->cq_head = head;
978 nvmeq->cq_phase = phase;
980 nvmeq->cqe_seen = 1;
981 return 1;
984 static irqreturn_t nvme_irq(int irq, void *data)
986 irqreturn_t result;
987 struct nvme_queue *nvmeq = data;
988 spin_lock(&nvmeq->q_lock);
989 nvme_process_cq(nvmeq);
990 result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
991 nvmeq->cqe_seen = 0;
992 spin_unlock(&nvmeq->q_lock);
993 return result;
996 static irqreturn_t nvme_irq_check(int irq, void *data)
998 struct nvme_queue *nvmeq = data;
999 struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
1000 if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
1001 return IRQ_NONE;
1002 return IRQ_WAKE_THREAD;
1006 * Returns 0 on success. If the result is negative, it's a Linux error code;
1007 * if the result is positive, it's an NVM Express status code
1009 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1010 void *buffer, void __user *ubuffer, unsigned bufflen,
1011 u32 *result, unsigned timeout)
1013 bool write = cmd->common.opcode & 1;
1014 struct bio *bio = NULL;
1015 struct request *req;
1016 int ret;
1018 req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1019 if (IS_ERR(req))
1020 return PTR_ERR(req);
1022 req->cmd_type = REQ_TYPE_DRV_PRIV;
1023 req->cmd_flags |= REQ_FAILFAST_DRIVER;
1024 req->__data_len = 0;
1025 req->__sector = (sector_t) -1;
1026 req->bio = req->biotail = NULL;
1028 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1030 req->cmd = (unsigned char *)cmd;
1031 req->cmd_len = sizeof(struct nvme_command);
1032 req->special = (void *)0;
1034 if (buffer && bufflen) {
1035 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1036 if (ret)
1037 goto out;
1038 } else if (ubuffer && bufflen) {
1039 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1040 if (ret)
1041 goto out;
1042 bio = req->bio;
1045 blk_execute_rq(req->q, NULL, req, 0);
1046 if (bio)
1047 blk_rq_unmap_user(bio);
1048 if (result)
1049 *result = (u32)(uintptr_t)req->special;
1050 ret = req->errors;
1051 out:
1052 blk_mq_free_request(req);
1053 return ret;
1056 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1057 void *buffer, unsigned bufflen)
1059 return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1062 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1064 struct nvme_queue *nvmeq = dev->queues[0];
1065 struct nvme_command c;
1066 struct nvme_cmd_info *cmd_info;
1067 struct request *req;
1069 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1070 if (IS_ERR(req))
1071 return PTR_ERR(req);
1073 req->cmd_flags |= REQ_NO_TIMEOUT;
1074 cmd_info = blk_mq_rq_to_pdu(req);
1075 nvme_set_info(cmd_info, NULL, async_req_completion);
1077 memset(&c, 0, sizeof(c));
1078 c.common.opcode = nvme_admin_async_event;
1079 c.common.command_id = req->tag;
1081 blk_mq_free_request(req);
1082 return __nvme_submit_cmd(nvmeq, &c);
1085 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1086 struct nvme_command *cmd,
1087 struct async_cmd_info *cmdinfo, unsigned timeout)
1089 struct nvme_queue *nvmeq = dev->queues[0];
1090 struct request *req;
1091 struct nvme_cmd_info *cmd_rq;
1093 req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1094 if (IS_ERR(req))
1095 return PTR_ERR(req);
1097 req->timeout = timeout;
1098 cmd_rq = blk_mq_rq_to_pdu(req);
1099 cmdinfo->req = req;
1100 nvme_set_info(cmd_rq, cmdinfo, async_completion);
1101 cmdinfo->status = -EINTR;
1103 cmd->common.command_id = req->tag;
1105 return nvme_submit_cmd(nvmeq, cmd);
1108 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1110 struct nvme_command c;
1112 memset(&c, 0, sizeof(c));
1113 c.delete_queue.opcode = opcode;
1114 c.delete_queue.qid = cpu_to_le16(id);
1116 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1119 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1120 struct nvme_queue *nvmeq)
1122 struct nvme_command c;
1123 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1126 * Note: we (ab)use the fact the the prp fields survive if no data
1127 * is attached to the request.
1129 memset(&c, 0, sizeof(c));
1130 c.create_cq.opcode = nvme_admin_create_cq;
1131 c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1132 c.create_cq.cqid = cpu_to_le16(qid);
1133 c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1134 c.create_cq.cq_flags = cpu_to_le16(flags);
1135 c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1137 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1140 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1141 struct nvme_queue *nvmeq)
1143 struct nvme_command c;
1144 int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1147 * Note: we (ab)use the fact the the prp fields survive if no data
1148 * is attached to the request.
1150 memset(&c, 0, sizeof(c));
1151 c.create_sq.opcode = nvme_admin_create_sq;
1152 c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1153 c.create_sq.sqid = cpu_to_le16(qid);
1154 c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1155 c.create_sq.sq_flags = cpu_to_le16(flags);
1156 c.create_sq.cqid = cpu_to_le16(qid);
1158 return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1161 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1163 return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1166 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1168 return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1171 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1173 struct nvme_command c = { };
1174 int error;
1176 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1177 c.identify.opcode = nvme_admin_identify;
1178 c.identify.cns = cpu_to_le32(1);
1180 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1181 if (!*id)
1182 return -ENOMEM;
1184 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1185 sizeof(struct nvme_id_ctrl));
1186 if (error)
1187 kfree(*id);
1188 return error;
1191 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1192 struct nvme_id_ns **id)
1194 struct nvme_command c = { };
1195 int error;
1197 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1198 c.identify.opcode = nvme_admin_identify,
1199 c.identify.nsid = cpu_to_le32(nsid),
1201 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1202 if (!*id)
1203 return -ENOMEM;
1205 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1206 sizeof(struct nvme_id_ns));
1207 if (error)
1208 kfree(*id);
1209 return error;
1212 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1213 dma_addr_t dma_addr, u32 *result)
1215 struct nvme_command c;
1217 memset(&c, 0, sizeof(c));
1218 c.features.opcode = nvme_admin_get_features;
1219 c.features.nsid = cpu_to_le32(nsid);
1220 c.features.prp1 = cpu_to_le64(dma_addr);
1221 c.features.fid = cpu_to_le32(fid);
1223 return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1224 result, 0);
1227 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1228 dma_addr_t dma_addr, u32 *result)
1230 struct nvme_command c;
1232 memset(&c, 0, sizeof(c));
1233 c.features.opcode = nvme_admin_set_features;
1234 c.features.prp1 = cpu_to_le64(dma_addr);
1235 c.features.fid = cpu_to_le32(fid);
1236 c.features.dword11 = cpu_to_le32(dword11);
1238 return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1239 result, 0);
1242 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1244 struct nvme_command c = { };
1245 int error;
1247 c.common.opcode = nvme_admin_get_log_page,
1248 c.common.nsid = cpu_to_le32(0xFFFFFFFF),
1249 c.common.cdw10[0] = cpu_to_le32(
1250 (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1251 NVME_LOG_SMART),
1253 *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1254 if (!*log)
1255 return -ENOMEM;
1257 error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1258 sizeof(struct nvme_smart_log));
1259 if (error)
1260 kfree(*log);
1261 return error;
1265 * nvme_abort_req - Attempt aborting a request
1267 * Schedule controller reset if the command was already aborted once before and
1268 * still hasn't been returned to the driver, or if this is the admin queue.
1270 static void nvme_abort_req(struct request *req)
1272 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1273 struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1274 struct nvme_dev *dev = nvmeq->dev;
1275 struct request *abort_req;
1276 struct nvme_cmd_info *abort_cmd;
1277 struct nvme_command cmd;
1279 if (!nvmeq->qid || cmd_rq->aborted) {
1280 unsigned long flags;
1282 spin_lock_irqsave(&dev_list_lock, flags);
1283 if (work_busy(&dev->reset_work))
1284 goto out;
1285 list_del_init(&dev->node);
1286 dev_warn(dev->dev, "I/O %d QID %d timeout, reset controller\n",
1287 req->tag, nvmeq->qid);
1288 dev->reset_workfn = nvme_reset_failed_dev;
1289 queue_work(nvme_workq, &dev->reset_work);
1290 out:
1291 spin_unlock_irqrestore(&dev_list_lock, flags);
1292 return;
1295 if (!dev->abort_limit)
1296 return;
1298 abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1299 false);
1300 if (IS_ERR(abort_req))
1301 return;
1303 abort_cmd = blk_mq_rq_to_pdu(abort_req);
1304 nvme_set_info(abort_cmd, abort_req, abort_completion);
1306 memset(&cmd, 0, sizeof(cmd));
1307 cmd.abort.opcode = nvme_admin_abort_cmd;
1308 cmd.abort.cid = req->tag;
1309 cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1310 cmd.abort.command_id = abort_req->tag;
1312 --dev->abort_limit;
1313 cmd_rq->aborted = 1;
1315 dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1316 nvmeq->qid);
1317 if (nvme_submit_cmd(dev->queues[0], &cmd) < 0) {
1318 dev_warn(nvmeq->q_dmadev,
1319 "Could not abort I/O %d QID %d",
1320 req->tag, nvmeq->qid);
1321 blk_mq_free_request(abort_req);
1325 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1327 struct nvme_queue *nvmeq = data;
1328 void *ctx;
1329 nvme_completion_fn fn;
1330 struct nvme_cmd_info *cmd;
1331 struct nvme_completion cqe;
1333 if (!blk_mq_request_started(req))
1334 return;
1336 cmd = blk_mq_rq_to_pdu(req);
1338 if (cmd->ctx == CMD_CTX_CANCELLED)
1339 return;
1341 if (blk_queue_dying(req->q))
1342 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1343 else
1344 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1347 dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1348 req->tag, nvmeq->qid);
1349 ctx = cancel_cmd_info(cmd, &fn);
1350 fn(nvmeq, ctx, &cqe);
1353 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1355 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1356 struct nvme_queue *nvmeq = cmd->nvmeq;
1358 dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1359 nvmeq->qid);
1360 spin_lock_irq(&nvmeq->q_lock);
1361 nvme_abort_req(req);
1362 spin_unlock_irq(&nvmeq->q_lock);
1365 * The aborted req will be completed on receiving the abort req.
1366 * We enable the timer again. If hit twice, it'll cause a device reset,
1367 * as the device then is in a faulty state.
1369 return BLK_EH_RESET_TIMER;
1372 static void nvme_free_queue(struct nvme_queue *nvmeq)
1374 dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1375 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1376 if (nvmeq->sq_cmds)
1377 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1378 nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1379 kfree(nvmeq);
1382 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1384 int i;
1386 for (i = dev->queue_count - 1; i >= lowest; i--) {
1387 struct nvme_queue *nvmeq = dev->queues[i];
1388 dev->queue_count--;
1389 dev->queues[i] = NULL;
1390 nvme_free_queue(nvmeq);
1395 * nvme_suspend_queue - put queue into suspended state
1396 * @nvmeq - queue to suspend
1398 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1400 int vector;
1402 spin_lock_irq(&nvmeq->q_lock);
1403 if (nvmeq->cq_vector == -1) {
1404 spin_unlock_irq(&nvmeq->q_lock);
1405 return 1;
1407 vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1408 nvmeq->dev->online_queues--;
1409 nvmeq->cq_vector = -1;
1410 spin_unlock_irq(&nvmeq->q_lock);
1412 if (!nvmeq->qid && nvmeq->dev->admin_q)
1413 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1415 irq_set_affinity_hint(vector, NULL);
1416 free_irq(vector, nvmeq);
1418 return 0;
1421 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1423 spin_lock_irq(&nvmeq->q_lock);
1424 if (nvmeq->tags && *nvmeq->tags)
1425 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1426 spin_unlock_irq(&nvmeq->q_lock);
1429 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1431 struct nvme_queue *nvmeq = dev->queues[qid];
1433 if (!nvmeq)
1434 return;
1435 if (nvme_suspend_queue(nvmeq))
1436 return;
1438 /* Don't tell the adapter to delete the admin queue.
1439 * Don't tell a removed adapter to delete IO queues. */
1440 if (qid && readl(&dev->bar->csts) != -1) {
1441 adapter_delete_sq(dev, qid);
1442 adapter_delete_cq(dev, qid);
1445 spin_lock_irq(&nvmeq->q_lock);
1446 nvme_process_cq(nvmeq);
1447 spin_unlock_irq(&nvmeq->q_lock);
1450 static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
1451 int entry_size)
1453 int q_depth = dev->q_depth;
1454 unsigned q_size_aligned = roundup(q_depth * entry_size, dev->page_size);
1456 if (q_size_aligned * nr_io_queues > dev->cmb_size) {
1457 u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues);
1458 mem_per_q = round_down(mem_per_q, dev->page_size);
1459 q_depth = div_u64(mem_per_q, entry_size);
1462 * Ensure the reduced q_depth is above some threshold where it
1463 * would be better to map queues in system memory with the
1464 * original depth
1466 if (q_depth < 64)
1467 return -ENOMEM;
1470 return q_depth;
1473 static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1474 int qid, int depth)
1476 if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) {
1477 unsigned offset = (qid - 1) *
1478 roundup(SQ_SIZE(depth), dev->page_size);
1479 nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset;
1480 nvmeq->sq_cmds_io = dev->cmb + offset;
1481 } else {
1482 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1483 &nvmeq->sq_dma_addr, GFP_KERNEL);
1484 if (!nvmeq->sq_cmds)
1485 return -ENOMEM;
1488 return 0;
1491 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1492 int depth)
1494 struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1495 if (!nvmeq)
1496 return NULL;
1498 nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1499 &nvmeq->cq_dma_addr, GFP_KERNEL);
1500 if (!nvmeq->cqes)
1501 goto free_nvmeq;
1503 if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
1504 goto free_cqdma;
1506 nvmeq->q_dmadev = dev->dev;
1507 nvmeq->dev = dev;
1508 snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1509 dev->instance, qid);
1510 spin_lock_init(&nvmeq->q_lock);
1511 nvmeq->cq_head = 0;
1512 nvmeq->cq_phase = 1;
1513 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1514 nvmeq->q_depth = depth;
1515 nvmeq->qid = qid;
1516 nvmeq->cq_vector = -1;
1517 dev->queues[qid] = nvmeq;
1519 /* make sure queue descriptor is set before queue count, for kthread */
1520 mb();
1521 dev->queue_count++;
1523 return nvmeq;
1525 free_cqdma:
1526 dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1527 nvmeq->cq_dma_addr);
1528 free_nvmeq:
1529 kfree(nvmeq);
1530 return NULL;
1533 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1534 const char *name)
1536 if (use_threaded_interrupts)
1537 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1538 nvme_irq_check, nvme_irq, IRQF_SHARED,
1539 name, nvmeq);
1540 return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1541 IRQF_SHARED, name, nvmeq);
1544 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1546 struct nvme_dev *dev = nvmeq->dev;
1548 spin_lock_irq(&nvmeq->q_lock);
1549 nvmeq->sq_tail = 0;
1550 nvmeq->cq_head = 0;
1551 nvmeq->cq_phase = 1;
1552 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1553 memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1554 dev->online_queues++;
1555 spin_unlock_irq(&nvmeq->q_lock);
1558 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1560 struct nvme_dev *dev = nvmeq->dev;
1561 int result;
1563 nvmeq->cq_vector = qid - 1;
1564 result = adapter_alloc_cq(dev, qid, nvmeq);
1565 if (result < 0)
1566 return result;
1568 result = adapter_alloc_sq(dev, qid, nvmeq);
1569 if (result < 0)
1570 goto release_cq;
1572 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1573 if (result < 0)
1574 goto release_sq;
1576 nvme_init_queue(nvmeq, qid);
1577 return result;
1579 release_sq:
1580 adapter_delete_sq(dev, qid);
1581 release_cq:
1582 adapter_delete_cq(dev, qid);
1583 return result;
1586 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1588 unsigned long timeout;
1589 u32 bit = enabled ? NVME_CSTS_RDY : 0;
1591 timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1593 while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1594 msleep(100);
1595 if (fatal_signal_pending(current))
1596 return -EINTR;
1597 if (time_after(jiffies, timeout)) {
1598 dev_err(dev->dev,
1599 "Device not ready; aborting %s\n", enabled ?
1600 "initialisation" : "reset");
1601 return -ENODEV;
1605 return 0;
1609 * If the device has been passed off to us in an enabled state, just clear
1610 * the enabled bit. The spec says we should set the 'shutdown notification
1611 * bits', but doing so may cause the device to complete commands to the
1612 * admin queue ... and we don't know what memory that might be pointing at!
1614 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1616 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1617 dev->ctrl_config &= ~NVME_CC_ENABLE;
1618 writel(dev->ctrl_config, &dev->bar->cc);
1620 return nvme_wait_ready(dev, cap, false);
1623 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1625 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1626 dev->ctrl_config |= NVME_CC_ENABLE;
1627 writel(dev->ctrl_config, &dev->bar->cc);
1629 return nvme_wait_ready(dev, cap, true);
1632 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1634 unsigned long timeout;
1636 dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1637 dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1639 writel(dev->ctrl_config, &dev->bar->cc);
1641 timeout = SHUTDOWN_TIMEOUT + jiffies;
1642 while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1643 NVME_CSTS_SHST_CMPLT) {
1644 msleep(100);
1645 if (fatal_signal_pending(current))
1646 return -EINTR;
1647 if (time_after(jiffies, timeout)) {
1648 dev_err(dev->dev,
1649 "Device shutdown incomplete; abort shutdown\n");
1650 return -ENODEV;
1654 return 0;
1657 static struct blk_mq_ops nvme_mq_admin_ops = {
1658 .queue_rq = nvme_queue_rq,
1659 .map_queue = blk_mq_map_queue,
1660 .init_hctx = nvme_admin_init_hctx,
1661 .exit_hctx = nvme_admin_exit_hctx,
1662 .init_request = nvme_admin_init_request,
1663 .timeout = nvme_timeout,
1666 static struct blk_mq_ops nvme_mq_ops = {
1667 .queue_rq = nvme_queue_rq,
1668 .map_queue = blk_mq_map_queue,
1669 .init_hctx = nvme_init_hctx,
1670 .init_request = nvme_init_request,
1671 .timeout = nvme_timeout,
1674 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1676 if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1677 blk_cleanup_queue(dev->admin_q);
1678 blk_mq_free_tag_set(&dev->admin_tagset);
1682 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1684 if (!dev->admin_q) {
1685 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1686 dev->admin_tagset.nr_hw_queues = 1;
1687 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1688 dev->admin_tagset.reserved_tags = 1;
1689 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1690 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1691 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1692 dev->admin_tagset.driver_data = dev;
1694 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1695 return -ENOMEM;
1697 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1698 if (IS_ERR(dev->admin_q)) {
1699 blk_mq_free_tag_set(&dev->admin_tagset);
1700 return -ENOMEM;
1702 if (!blk_get_queue(dev->admin_q)) {
1703 nvme_dev_remove_admin(dev);
1704 dev->admin_q = NULL;
1705 return -ENODEV;
1707 } else
1708 blk_mq_unfreeze_queue(dev->admin_q);
1710 return 0;
1713 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1715 int result;
1716 u32 aqa;
1717 u64 cap = readq(&dev->bar->cap);
1718 struct nvme_queue *nvmeq;
1719 unsigned page_shift = PAGE_SHIFT;
1720 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1721 unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1723 if (page_shift < dev_page_min) {
1724 dev_err(dev->dev,
1725 "Minimum device page size (%u) too large for "
1726 "host (%u)\n", 1 << dev_page_min,
1727 1 << page_shift);
1728 return -ENODEV;
1730 if (page_shift > dev_page_max) {
1731 dev_info(dev->dev,
1732 "Device maximum page size (%u) smaller than "
1733 "host (%u); enabling work-around\n",
1734 1 << dev_page_max, 1 << page_shift);
1735 page_shift = dev_page_max;
1738 result = nvme_disable_ctrl(dev, cap);
1739 if (result < 0)
1740 return result;
1742 nvmeq = dev->queues[0];
1743 if (!nvmeq) {
1744 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1745 if (!nvmeq)
1746 return -ENOMEM;
1749 aqa = nvmeq->q_depth - 1;
1750 aqa |= aqa << 16;
1752 dev->page_size = 1 << page_shift;
1754 dev->ctrl_config = NVME_CC_CSS_NVM;
1755 dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1756 dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1757 dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1759 writel(aqa, &dev->bar->aqa);
1760 writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1761 writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1763 result = nvme_enable_ctrl(dev, cap);
1764 if (result)
1765 goto free_nvmeq;
1767 nvmeq->cq_vector = 0;
1768 result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1769 if (result) {
1770 nvmeq->cq_vector = -1;
1771 goto free_nvmeq;
1774 return result;
1776 free_nvmeq:
1777 nvme_free_queues(dev, 0);
1778 return result;
1781 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1783 struct nvme_dev *dev = ns->dev;
1784 struct nvme_user_io io;
1785 struct nvme_command c;
1786 unsigned length, meta_len;
1787 int status, write;
1788 dma_addr_t meta_dma = 0;
1789 void *meta = NULL;
1790 void __user *metadata;
1792 if (copy_from_user(&io, uio, sizeof(io)))
1793 return -EFAULT;
1795 switch (io.opcode) {
1796 case nvme_cmd_write:
1797 case nvme_cmd_read:
1798 case nvme_cmd_compare:
1799 break;
1800 default:
1801 return -EINVAL;
1804 length = (io.nblocks + 1) << ns->lba_shift;
1805 meta_len = (io.nblocks + 1) * ns->ms;
1806 metadata = (void __user *)(unsigned long)io.metadata;
1807 write = io.opcode & 1;
1809 if (ns->ext) {
1810 length += meta_len;
1811 meta_len = 0;
1813 if (meta_len) {
1814 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1815 return -EINVAL;
1817 meta = dma_alloc_coherent(dev->dev, meta_len,
1818 &meta_dma, GFP_KERNEL);
1820 if (!meta) {
1821 status = -ENOMEM;
1822 goto unmap;
1824 if (write) {
1825 if (copy_from_user(meta, metadata, meta_len)) {
1826 status = -EFAULT;
1827 goto unmap;
1832 memset(&c, 0, sizeof(c));
1833 c.rw.opcode = io.opcode;
1834 c.rw.flags = io.flags;
1835 c.rw.nsid = cpu_to_le32(ns->ns_id);
1836 c.rw.slba = cpu_to_le64(io.slba);
1837 c.rw.length = cpu_to_le16(io.nblocks);
1838 c.rw.control = cpu_to_le16(io.control);
1839 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1840 c.rw.reftag = cpu_to_le32(io.reftag);
1841 c.rw.apptag = cpu_to_le16(io.apptag);
1842 c.rw.appmask = cpu_to_le16(io.appmask);
1843 c.rw.metadata = cpu_to_le64(meta_dma);
1845 status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1846 (void __user *)io.addr, length, NULL, 0);
1847 unmap:
1848 if (meta) {
1849 if (status == NVME_SC_SUCCESS && !write) {
1850 if (copy_to_user(metadata, meta, meta_len))
1851 status = -EFAULT;
1853 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1855 return status;
1858 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1859 struct nvme_passthru_cmd __user *ucmd)
1861 struct nvme_passthru_cmd cmd;
1862 struct nvme_command c;
1863 unsigned timeout = 0;
1864 int status;
1866 if (!capable(CAP_SYS_ADMIN))
1867 return -EACCES;
1868 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1869 return -EFAULT;
1871 memset(&c, 0, sizeof(c));
1872 c.common.opcode = cmd.opcode;
1873 c.common.flags = cmd.flags;
1874 c.common.nsid = cpu_to_le32(cmd.nsid);
1875 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1876 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1877 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1878 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1879 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1880 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1881 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1882 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1884 if (cmd.timeout_ms)
1885 timeout = msecs_to_jiffies(cmd.timeout_ms);
1887 status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1888 NULL, (void __user *)cmd.addr, cmd.data_len,
1889 &cmd.result, timeout);
1890 if (status >= 0) {
1891 if (put_user(cmd.result, &ucmd->result))
1892 return -EFAULT;
1895 return status;
1898 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1899 unsigned long arg)
1901 struct nvme_ns *ns = bdev->bd_disk->private_data;
1903 switch (cmd) {
1904 case NVME_IOCTL_ID:
1905 force_successful_syscall_return();
1906 return ns->ns_id;
1907 case NVME_IOCTL_ADMIN_CMD:
1908 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1909 case NVME_IOCTL_IO_CMD:
1910 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1911 case NVME_IOCTL_SUBMIT_IO:
1912 return nvme_submit_io(ns, (void __user *)arg);
1913 case SG_GET_VERSION_NUM:
1914 return nvme_sg_get_version_num((void __user *)arg);
1915 case SG_IO:
1916 return nvme_sg_io(ns, (void __user *)arg);
1917 default:
1918 return -ENOTTY;
1922 #ifdef CONFIG_COMPAT
1923 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1924 unsigned int cmd, unsigned long arg)
1926 switch (cmd) {
1927 case SG_IO:
1928 return -ENOIOCTLCMD;
1930 return nvme_ioctl(bdev, mode, cmd, arg);
1932 #else
1933 #define nvme_compat_ioctl NULL
1934 #endif
1936 static int nvme_open(struct block_device *bdev, fmode_t mode)
1938 int ret = 0;
1939 struct nvme_ns *ns;
1941 spin_lock(&dev_list_lock);
1942 ns = bdev->bd_disk->private_data;
1943 if (!ns)
1944 ret = -ENXIO;
1945 else if (!kref_get_unless_zero(&ns->dev->kref))
1946 ret = -ENXIO;
1947 spin_unlock(&dev_list_lock);
1949 return ret;
1952 static void nvme_free_dev(struct kref *kref);
1954 static void nvme_release(struct gendisk *disk, fmode_t mode)
1956 struct nvme_ns *ns = disk->private_data;
1957 struct nvme_dev *dev = ns->dev;
1959 kref_put(&dev->kref, nvme_free_dev);
1962 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1964 /* some standard values */
1965 geo->heads = 1 << 6;
1966 geo->sectors = 1 << 5;
1967 geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1968 return 0;
1971 static void nvme_config_discard(struct nvme_ns *ns)
1973 u32 logical_block_size = queue_logical_block_size(ns->queue);
1974 ns->queue->limits.discard_zeroes_data = 0;
1975 ns->queue->limits.discard_alignment = logical_block_size;
1976 ns->queue->limits.discard_granularity = logical_block_size;
1977 blk_queue_max_discard_sectors(ns->queue, 0xffffffff);
1978 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1981 static int nvme_revalidate_disk(struct gendisk *disk)
1983 struct nvme_ns *ns = disk->private_data;
1984 struct nvme_dev *dev = ns->dev;
1985 struct nvme_id_ns *id;
1986 u8 lbaf, pi_type;
1987 u16 old_ms;
1988 unsigned short bs;
1990 if (nvme_identify_ns(dev, ns->ns_id, &id)) {
1991 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
1992 dev->instance, ns->ns_id);
1993 return -ENODEV;
1995 if (id->ncap == 0) {
1996 kfree(id);
1997 return -ENODEV;
2000 old_ms = ns->ms;
2001 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2002 ns->lba_shift = id->lbaf[lbaf].ds;
2003 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2004 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
2007 * If identify namespace failed, use default 512 byte block size so
2008 * block layer can use before failing read/write for 0 capacity.
2010 if (ns->lba_shift == 0)
2011 ns->lba_shift = 9;
2012 bs = 1 << ns->lba_shift;
2014 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2015 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2016 id->dps & NVME_NS_DPS_PI_MASK : 0;
2018 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2019 ns->ms != old_ms ||
2020 bs != queue_logical_block_size(disk->queue) ||
2021 (ns->ms && ns->ext)))
2022 blk_integrity_unregister(disk);
2024 ns->pi_type = pi_type;
2025 blk_queue_logical_block_size(ns->queue, bs);
2027 if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
2028 !ns->ext)
2029 nvme_init_integrity(ns);
2031 if (ns->ms && !blk_get_integrity(disk))
2032 set_capacity(disk, 0);
2033 else
2034 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2036 if (dev->oncs & NVME_CTRL_ONCS_DSM)
2037 nvme_config_discard(ns);
2039 kfree(id);
2040 return 0;
2043 static const struct block_device_operations nvme_fops = {
2044 .owner = THIS_MODULE,
2045 .ioctl = nvme_ioctl,
2046 .compat_ioctl = nvme_compat_ioctl,
2047 .open = nvme_open,
2048 .release = nvme_release,
2049 .getgeo = nvme_getgeo,
2050 .revalidate_disk= nvme_revalidate_disk,
2053 static int nvme_kthread(void *data)
2055 struct nvme_dev *dev, *next;
2057 while (!kthread_should_stop()) {
2058 set_current_state(TASK_INTERRUPTIBLE);
2059 spin_lock(&dev_list_lock);
2060 list_for_each_entry_safe(dev, next, &dev_list, node) {
2061 int i;
2062 if (readl(&dev->bar->csts) & NVME_CSTS_CFS) {
2063 if (work_busy(&dev->reset_work))
2064 continue;
2065 list_del_init(&dev->node);
2066 dev_warn(dev->dev,
2067 "Failed status: %x, reset controller\n",
2068 readl(&dev->bar->csts));
2069 dev->reset_workfn = nvme_reset_failed_dev;
2070 queue_work(nvme_workq, &dev->reset_work);
2071 continue;
2073 for (i = 0; i < dev->queue_count; i++) {
2074 struct nvme_queue *nvmeq = dev->queues[i];
2075 if (!nvmeq)
2076 continue;
2077 spin_lock_irq(&nvmeq->q_lock);
2078 nvme_process_cq(nvmeq);
2080 while ((i == 0) && (dev->event_limit > 0)) {
2081 if (nvme_submit_async_admin_req(dev))
2082 break;
2083 dev->event_limit--;
2085 spin_unlock_irq(&nvmeq->q_lock);
2088 spin_unlock(&dev_list_lock);
2089 schedule_timeout(round_jiffies_relative(HZ));
2091 return 0;
2094 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2096 struct nvme_ns *ns;
2097 struct gendisk *disk;
2098 int node = dev_to_node(dev->dev);
2100 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2101 if (!ns)
2102 return;
2104 ns->queue = blk_mq_init_queue(&dev->tagset);
2105 if (IS_ERR(ns->queue))
2106 goto out_free_ns;
2107 queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2108 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2109 queue_flag_set_unlocked(QUEUE_FLAG_SG_GAPS, ns->queue);
2110 ns->dev = dev;
2111 ns->queue->queuedata = ns;
2113 disk = alloc_disk_node(0, node);
2114 if (!disk)
2115 goto out_free_queue;
2117 ns->ns_id = nsid;
2118 ns->disk = disk;
2119 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2120 list_add_tail(&ns->list, &dev->namespaces);
2122 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2123 if (dev->max_hw_sectors)
2124 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2125 if (dev->stripe_size)
2126 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2127 if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2128 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2130 disk->major = nvme_major;
2131 disk->first_minor = 0;
2132 disk->fops = &nvme_fops;
2133 disk->private_data = ns;
2134 disk->queue = ns->queue;
2135 disk->driverfs_dev = dev->device;
2136 disk->flags = GENHD_FL_EXT_DEVT;
2137 sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2140 * Initialize capacity to 0 until we establish the namespace format and
2141 * setup integrity extentions if necessary. The revalidate_disk after
2142 * add_disk allows the driver to register with integrity if the format
2143 * requires it.
2145 set_capacity(disk, 0);
2146 if (nvme_revalidate_disk(ns->disk))
2147 goto out_free_disk;
2149 add_disk(ns->disk);
2150 if (ns->ms) {
2151 struct block_device *bd = bdget_disk(ns->disk, 0);
2152 if (!bd)
2153 return;
2154 if (blkdev_get(bd, FMODE_READ, NULL)) {
2155 bdput(bd);
2156 return;
2158 blkdev_reread_part(bd);
2159 blkdev_put(bd, FMODE_READ);
2161 return;
2162 out_free_disk:
2163 kfree(disk);
2164 list_del(&ns->list);
2165 out_free_queue:
2166 blk_cleanup_queue(ns->queue);
2167 out_free_ns:
2168 kfree(ns);
2171 static void nvme_create_io_queues(struct nvme_dev *dev)
2173 unsigned i;
2175 for (i = dev->queue_count; i <= dev->max_qid; i++)
2176 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2177 break;
2179 for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2180 if (nvme_create_queue(dev->queues[i], i))
2181 break;
2184 static int set_queue_count(struct nvme_dev *dev, int count)
2186 int status;
2187 u32 result;
2188 u32 q_count = (count - 1) | ((count - 1) << 16);
2190 status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2191 &result);
2192 if (status < 0)
2193 return status;
2194 if (status > 0) {
2195 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2196 return 0;
2198 return min(result & 0xffff, result >> 16) + 1;
2201 static void __iomem *nvme_map_cmb(struct nvme_dev *dev)
2203 u64 szu, size, offset;
2204 u32 cmbloc;
2205 resource_size_t bar_size;
2206 struct pci_dev *pdev = to_pci_dev(dev->dev);
2207 void __iomem *cmb;
2208 dma_addr_t dma_addr;
2210 if (!use_cmb_sqes)
2211 return NULL;
2213 dev->cmbsz = readl(&dev->bar->cmbsz);
2214 if (!(NVME_CMB_SZ(dev->cmbsz)))
2215 return NULL;
2217 cmbloc = readl(&dev->bar->cmbloc);
2219 szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz));
2220 size = szu * NVME_CMB_SZ(dev->cmbsz);
2221 offset = szu * NVME_CMB_OFST(cmbloc);
2222 bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc));
2224 if (offset > bar_size)
2225 return NULL;
2228 * Controllers may support a CMB size larger than their BAR,
2229 * for example, due to being behind a bridge. Reduce the CMB to
2230 * the reported size of the BAR
2232 if (size > bar_size - offset)
2233 size = bar_size - offset;
2235 dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset;
2236 cmb = ioremap_wc(dma_addr, size);
2237 if (!cmb)
2238 return NULL;
2240 dev->cmb_dma_addr = dma_addr;
2241 dev->cmb_size = size;
2242 return cmb;
2245 static inline void nvme_release_cmb(struct nvme_dev *dev)
2247 if (dev->cmb) {
2248 iounmap(dev->cmb);
2249 dev->cmb = NULL;
2253 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2255 return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2258 static int nvme_setup_io_queues(struct nvme_dev *dev)
2260 struct nvme_queue *adminq = dev->queues[0];
2261 struct pci_dev *pdev = to_pci_dev(dev->dev);
2262 int result, i, vecs, nr_io_queues, size;
2264 nr_io_queues = num_possible_cpus();
2265 result = set_queue_count(dev, nr_io_queues);
2266 if (result <= 0)
2267 return result;
2268 if (result < nr_io_queues)
2269 nr_io_queues = result;
2271 if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) {
2272 result = nvme_cmb_qdepth(dev, nr_io_queues,
2273 sizeof(struct nvme_command));
2274 if (result > 0)
2275 dev->q_depth = result;
2276 else
2277 nvme_release_cmb(dev);
2280 size = db_bar_size(dev, nr_io_queues);
2281 if (size > 8192) {
2282 iounmap(dev->bar);
2283 do {
2284 dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2285 if (dev->bar)
2286 break;
2287 if (!--nr_io_queues)
2288 return -ENOMEM;
2289 size = db_bar_size(dev, nr_io_queues);
2290 } while (1);
2291 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2292 adminq->q_db = dev->dbs;
2295 /* Deregister the admin queue's interrupt */
2296 free_irq(dev->entry[0].vector, adminq);
2299 * If we enable msix early due to not intx, disable it again before
2300 * setting up the full range we need.
2302 if (!pdev->irq)
2303 pci_disable_msix(pdev);
2305 for (i = 0; i < nr_io_queues; i++)
2306 dev->entry[i].entry = i;
2307 vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2308 if (vecs < 0) {
2309 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2310 if (vecs < 0) {
2311 vecs = 1;
2312 } else {
2313 for (i = 0; i < vecs; i++)
2314 dev->entry[i].vector = i + pdev->irq;
2319 * Should investigate if there's a performance win from allocating
2320 * more queues than interrupt vectors; it might allow the submission
2321 * path to scale better, even if the receive path is limited by the
2322 * number of interrupts.
2324 nr_io_queues = vecs;
2325 dev->max_qid = nr_io_queues;
2327 result = queue_request_irq(dev, adminq, adminq->irqname);
2328 if (result) {
2329 adminq->cq_vector = -1;
2330 goto free_queues;
2333 /* Free previously allocated queues that are no longer usable */
2334 nvme_free_queues(dev, nr_io_queues + 1);
2335 nvme_create_io_queues(dev);
2337 return 0;
2339 free_queues:
2340 nvme_free_queues(dev, 1);
2341 return result;
2344 static void nvme_free_namespace(struct nvme_ns *ns)
2346 list_del(&ns->list);
2348 spin_lock(&dev_list_lock);
2349 ns->disk->private_data = NULL;
2350 spin_unlock(&dev_list_lock);
2352 put_disk(ns->disk);
2353 kfree(ns);
2356 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2358 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2359 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2361 return nsa->ns_id - nsb->ns_id;
2364 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2366 struct nvme_ns *ns;
2368 list_for_each_entry(ns, &dev->namespaces, list) {
2369 if (ns->ns_id == nsid)
2370 return ns;
2371 if (ns->ns_id > nsid)
2372 break;
2374 return NULL;
2377 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2379 return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2380 dev->online_queues < 2);
2383 static void nvme_ns_remove(struct nvme_ns *ns)
2385 bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2387 if (kill)
2388 blk_set_queue_dying(ns->queue);
2389 if (ns->disk->flags & GENHD_FL_UP) {
2390 if (blk_get_integrity(ns->disk))
2391 blk_integrity_unregister(ns->disk);
2392 del_gendisk(ns->disk);
2394 if (kill || !blk_queue_dying(ns->queue)) {
2395 blk_mq_abort_requeue_list(ns->queue);
2396 blk_cleanup_queue(ns->queue);
2400 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2402 struct nvme_ns *ns, *next;
2403 unsigned i;
2405 for (i = 1; i <= nn; i++) {
2406 ns = nvme_find_ns(dev, i);
2407 if (ns) {
2408 if (revalidate_disk(ns->disk)) {
2409 nvme_ns_remove(ns);
2410 nvme_free_namespace(ns);
2412 } else
2413 nvme_alloc_ns(dev, i);
2415 list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2416 if (ns->ns_id > nn) {
2417 nvme_ns_remove(ns);
2418 nvme_free_namespace(ns);
2421 list_sort(NULL, &dev->namespaces, ns_cmp);
2424 static void nvme_dev_scan(struct work_struct *work)
2426 struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2427 struct nvme_id_ctrl *ctrl;
2429 if (!dev->tagset.tags)
2430 return;
2431 if (nvme_identify_ctrl(dev, &ctrl))
2432 return;
2433 nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2434 kfree(ctrl);
2438 * Return: error value if an error occurred setting up the queues or calling
2439 * Identify Device. 0 if these succeeded, even if adding some of the
2440 * namespaces failed. At the moment, these failures are silent. TBD which
2441 * failures should be reported.
2443 static int nvme_dev_add(struct nvme_dev *dev)
2445 struct pci_dev *pdev = to_pci_dev(dev->dev);
2446 int res;
2447 unsigned nn;
2448 struct nvme_id_ctrl *ctrl;
2449 int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2451 res = nvme_identify_ctrl(dev, &ctrl);
2452 if (res) {
2453 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2454 return -EIO;
2457 nn = le32_to_cpup(&ctrl->nn);
2458 dev->oncs = le16_to_cpup(&ctrl->oncs);
2459 dev->abort_limit = ctrl->acl + 1;
2460 dev->vwc = ctrl->vwc;
2461 memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2462 memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2463 memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2464 if (ctrl->mdts)
2465 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2466 if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2467 (pdev->device == 0x0953) && ctrl->vs[3]) {
2468 unsigned int max_hw_sectors;
2470 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2471 max_hw_sectors = dev->stripe_size >> (shift - 9);
2472 if (dev->max_hw_sectors) {
2473 dev->max_hw_sectors = min(max_hw_sectors,
2474 dev->max_hw_sectors);
2475 } else
2476 dev->max_hw_sectors = max_hw_sectors;
2478 kfree(ctrl);
2480 if (!dev->tagset.tags) {
2481 dev->tagset.ops = &nvme_mq_ops;
2482 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2483 dev->tagset.timeout = NVME_IO_TIMEOUT;
2484 dev->tagset.numa_node = dev_to_node(dev->dev);
2485 dev->tagset.queue_depth =
2486 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2487 dev->tagset.cmd_size = nvme_cmd_size(dev);
2488 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2489 dev->tagset.driver_data = dev;
2491 if (blk_mq_alloc_tag_set(&dev->tagset))
2492 return 0;
2494 schedule_work(&dev->scan_work);
2495 return 0;
2498 static int nvme_dev_map(struct nvme_dev *dev)
2500 u64 cap;
2501 int bars, result = -ENOMEM;
2502 struct pci_dev *pdev = to_pci_dev(dev->dev);
2504 if (pci_enable_device_mem(pdev))
2505 return result;
2507 dev->entry[0].vector = pdev->irq;
2508 pci_set_master(pdev);
2509 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2510 if (!bars)
2511 goto disable_pci;
2513 if (pci_request_selected_regions(pdev, bars, "nvme"))
2514 goto disable_pci;
2516 if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2517 dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2518 goto disable;
2520 dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2521 if (!dev->bar)
2522 goto disable;
2524 if (readl(&dev->bar->csts) == -1) {
2525 result = -ENODEV;
2526 goto unmap;
2530 * Some devices don't advertse INTx interrupts, pre-enable a single
2531 * MSIX vec for setup. We'll adjust this later.
2533 if (!pdev->irq) {
2534 result = pci_enable_msix(pdev, dev->entry, 1);
2535 if (result < 0)
2536 goto unmap;
2539 cap = readq(&dev->bar->cap);
2540 dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2541 dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2542 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2543 if (readl(&dev->bar->vs) >= NVME_VS(1, 2))
2544 dev->cmb = nvme_map_cmb(dev);
2546 return 0;
2548 unmap:
2549 iounmap(dev->bar);
2550 dev->bar = NULL;
2551 disable:
2552 pci_release_regions(pdev);
2553 disable_pci:
2554 pci_disable_device(pdev);
2555 return result;
2558 static void nvme_dev_unmap(struct nvme_dev *dev)
2560 struct pci_dev *pdev = to_pci_dev(dev->dev);
2562 if (pdev->msi_enabled)
2563 pci_disable_msi(pdev);
2564 else if (pdev->msix_enabled)
2565 pci_disable_msix(pdev);
2567 if (dev->bar) {
2568 iounmap(dev->bar);
2569 dev->bar = NULL;
2570 pci_release_regions(pdev);
2573 if (pci_is_enabled(pdev))
2574 pci_disable_device(pdev);
2577 struct nvme_delq_ctx {
2578 struct task_struct *waiter;
2579 struct kthread_worker *worker;
2580 atomic_t refcount;
2583 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2585 dq->waiter = current;
2586 mb();
2588 for (;;) {
2589 set_current_state(TASK_KILLABLE);
2590 if (!atomic_read(&dq->refcount))
2591 break;
2592 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2593 fatal_signal_pending(current)) {
2595 * Disable the controller first since we can't trust it
2596 * at this point, but leave the admin queue enabled
2597 * until all queue deletion requests are flushed.
2598 * FIXME: This may take a while if there are more h/w
2599 * queues than admin tags.
2601 set_current_state(TASK_RUNNING);
2602 nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2603 nvme_clear_queue(dev->queues[0]);
2604 flush_kthread_worker(dq->worker);
2605 nvme_disable_queue(dev, 0);
2606 return;
2609 set_current_state(TASK_RUNNING);
2612 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2614 atomic_dec(&dq->refcount);
2615 if (dq->waiter)
2616 wake_up_process(dq->waiter);
2619 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2621 atomic_inc(&dq->refcount);
2622 return dq;
2625 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2627 struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2628 nvme_put_dq(dq);
2631 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2632 kthread_work_func_t fn)
2634 struct nvme_command c;
2636 memset(&c, 0, sizeof(c));
2637 c.delete_queue.opcode = opcode;
2638 c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2640 init_kthread_work(&nvmeq->cmdinfo.work, fn);
2641 return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2642 ADMIN_TIMEOUT);
2645 static void nvme_del_cq_work_handler(struct kthread_work *work)
2647 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2648 cmdinfo.work);
2649 nvme_del_queue_end(nvmeq);
2652 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2654 return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2655 nvme_del_cq_work_handler);
2658 static void nvme_del_sq_work_handler(struct kthread_work *work)
2660 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2661 cmdinfo.work);
2662 int status = nvmeq->cmdinfo.status;
2664 if (!status)
2665 status = nvme_delete_cq(nvmeq);
2666 if (status)
2667 nvme_del_queue_end(nvmeq);
2670 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2672 return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2673 nvme_del_sq_work_handler);
2676 static void nvme_del_queue_start(struct kthread_work *work)
2678 struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2679 cmdinfo.work);
2680 if (nvme_delete_sq(nvmeq))
2681 nvme_del_queue_end(nvmeq);
2684 static void nvme_disable_io_queues(struct nvme_dev *dev)
2686 int i;
2687 DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2688 struct nvme_delq_ctx dq;
2689 struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2690 &worker, "nvme%d", dev->instance);
2692 if (IS_ERR(kworker_task)) {
2693 dev_err(dev->dev,
2694 "Failed to create queue del task\n");
2695 for (i = dev->queue_count - 1; i > 0; i--)
2696 nvme_disable_queue(dev, i);
2697 return;
2700 dq.waiter = NULL;
2701 atomic_set(&dq.refcount, 0);
2702 dq.worker = &worker;
2703 for (i = dev->queue_count - 1; i > 0; i--) {
2704 struct nvme_queue *nvmeq = dev->queues[i];
2706 if (nvme_suspend_queue(nvmeq))
2707 continue;
2708 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2709 nvmeq->cmdinfo.worker = dq.worker;
2710 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2711 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2713 nvme_wait_dq(&dq, dev);
2714 kthread_stop(kworker_task);
2718 * Remove the node from the device list and check
2719 * for whether or not we need to stop the nvme_thread.
2721 static void nvme_dev_list_remove(struct nvme_dev *dev)
2723 struct task_struct *tmp = NULL;
2725 spin_lock(&dev_list_lock);
2726 list_del_init(&dev->node);
2727 if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2728 tmp = nvme_thread;
2729 nvme_thread = NULL;
2731 spin_unlock(&dev_list_lock);
2733 if (tmp)
2734 kthread_stop(tmp);
2737 static void nvme_freeze_queues(struct nvme_dev *dev)
2739 struct nvme_ns *ns;
2741 list_for_each_entry(ns, &dev->namespaces, list) {
2742 blk_mq_freeze_queue_start(ns->queue);
2744 spin_lock_irq(ns->queue->queue_lock);
2745 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2746 spin_unlock_irq(ns->queue->queue_lock);
2748 blk_mq_cancel_requeue_work(ns->queue);
2749 blk_mq_stop_hw_queues(ns->queue);
2753 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2755 struct nvme_ns *ns;
2757 list_for_each_entry(ns, &dev->namespaces, list) {
2758 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2759 blk_mq_unfreeze_queue(ns->queue);
2760 blk_mq_start_stopped_hw_queues(ns->queue, true);
2761 blk_mq_kick_requeue_list(ns->queue);
2765 static void nvme_dev_shutdown(struct nvme_dev *dev)
2767 int i;
2768 u32 csts = -1;
2770 nvme_dev_list_remove(dev);
2772 if (dev->bar) {
2773 nvme_freeze_queues(dev);
2774 csts = readl(&dev->bar->csts);
2776 if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2777 for (i = dev->queue_count - 1; i >= 0; i--) {
2778 struct nvme_queue *nvmeq = dev->queues[i];
2779 nvme_suspend_queue(nvmeq);
2781 } else {
2782 nvme_disable_io_queues(dev);
2783 nvme_shutdown_ctrl(dev);
2784 nvme_disable_queue(dev, 0);
2786 nvme_dev_unmap(dev);
2788 for (i = dev->queue_count - 1; i >= 0; i--)
2789 nvme_clear_queue(dev->queues[i]);
2792 static void nvme_dev_remove(struct nvme_dev *dev)
2794 struct nvme_ns *ns;
2796 list_for_each_entry(ns, &dev->namespaces, list)
2797 nvme_ns_remove(ns);
2800 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2802 dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2803 PAGE_SIZE, PAGE_SIZE, 0);
2804 if (!dev->prp_page_pool)
2805 return -ENOMEM;
2807 /* Optimisation for I/Os between 4k and 128k */
2808 dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2809 256, 256, 0);
2810 if (!dev->prp_small_pool) {
2811 dma_pool_destroy(dev->prp_page_pool);
2812 return -ENOMEM;
2814 return 0;
2817 static void nvme_release_prp_pools(struct nvme_dev *dev)
2819 dma_pool_destroy(dev->prp_page_pool);
2820 dma_pool_destroy(dev->prp_small_pool);
2823 static DEFINE_IDA(nvme_instance_ida);
2825 static int nvme_set_instance(struct nvme_dev *dev)
2827 int instance, error;
2829 do {
2830 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2831 return -ENODEV;
2833 spin_lock(&dev_list_lock);
2834 error = ida_get_new(&nvme_instance_ida, &instance);
2835 spin_unlock(&dev_list_lock);
2836 } while (error == -EAGAIN);
2838 if (error)
2839 return -ENODEV;
2841 dev->instance = instance;
2842 return 0;
2845 static void nvme_release_instance(struct nvme_dev *dev)
2847 spin_lock(&dev_list_lock);
2848 ida_remove(&nvme_instance_ida, dev->instance);
2849 spin_unlock(&dev_list_lock);
2852 static void nvme_free_namespaces(struct nvme_dev *dev)
2854 struct nvme_ns *ns, *next;
2856 list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2857 nvme_free_namespace(ns);
2860 static void nvme_free_dev(struct kref *kref)
2862 struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2864 put_device(dev->dev);
2865 put_device(dev->device);
2866 nvme_free_namespaces(dev);
2867 nvme_release_instance(dev);
2868 if (dev->tagset.tags)
2869 blk_mq_free_tag_set(&dev->tagset);
2870 if (dev->admin_q)
2871 blk_put_queue(dev->admin_q);
2872 kfree(dev->queues);
2873 kfree(dev->entry);
2874 kfree(dev);
2877 static int nvme_dev_open(struct inode *inode, struct file *f)
2879 struct nvme_dev *dev;
2880 int instance = iminor(inode);
2881 int ret = -ENODEV;
2883 spin_lock(&dev_list_lock);
2884 list_for_each_entry(dev, &dev_list, node) {
2885 if (dev->instance == instance) {
2886 if (!dev->admin_q) {
2887 ret = -EWOULDBLOCK;
2888 break;
2890 if (!kref_get_unless_zero(&dev->kref))
2891 break;
2892 f->private_data = dev;
2893 ret = 0;
2894 break;
2897 spin_unlock(&dev_list_lock);
2899 return ret;
2902 static int nvme_dev_release(struct inode *inode, struct file *f)
2904 struct nvme_dev *dev = f->private_data;
2905 kref_put(&dev->kref, nvme_free_dev);
2906 return 0;
2909 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2911 struct nvme_dev *dev = f->private_data;
2912 struct nvme_ns *ns;
2914 switch (cmd) {
2915 case NVME_IOCTL_ADMIN_CMD:
2916 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2917 case NVME_IOCTL_IO_CMD:
2918 if (list_empty(&dev->namespaces))
2919 return -ENOTTY;
2920 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2921 return nvme_user_cmd(dev, ns, (void __user *)arg);
2922 case NVME_IOCTL_RESET:
2923 dev_warn(dev->dev, "resetting controller\n");
2924 return nvme_reset(dev);
2925 default:
2926 return -ENOTTY;
2930 static const struct file_operations nvme_dev_fops = {
2931 .owner = THIS_MODULE,
2932 .open = nvme_dev_open,
2933 .release = nvme_dev_release,
2934 .unlocked_ioctl = nvme_dev_ioctl,
2935 .compat_ioctl = nvme_dev_ioctl,
2938 static void nvme_set_irq_hints(struct nvme_dev *dev)
2940 struct nvme_queue *nvmeq;
2941 int i;
2943 for (i = 0; i < dev->online_queues; i++) {
2944 nvmeq = dev->queues[i];
2946 if (!nvmeq->tags || !(*nvmeq->tags))
2947 continue;
2949 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2950 blk_mq_tags_cpumask(*nvmeq->tags));
2954 static int nvme_dev_start(struct nvme_dev *dev)
2956 int result;
2957 bool start_thread = false;
2959 result = nvme_dev_map(dev);
2960 if (result)
2961 return result;
2963 result = nvme_configure_admin_queue(dev);
2964 if (result)
2965 goto unmap;
2967 spin_lock(&dev_list_lock);
2968 if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2969 start_thread = true;
2970 nvme_thread = NULL;
2972 list_add(&dev->node, &dev_list);
2973 spin_unlock(&dev_list_lock);
2975 if (start_thread) {
2976 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2977 wake_up_all(&nvme_kthread_wait);
2978 } else
2979 wait_event_killable(nvme_kthread_wait, nvme_thread);
2981 if (IS_ERR_OR_NULL(nvme_thread)) {
2982 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2983 goto disable;
2986 nvme_init_queue(dev->queues[0], 0);
2987 result = nvme_alloc_admin_tags(dev);
2988 if (result)
2989 goto disable;
2991 result = nvme_setup_io_queues(dev);
2992 if (result)
2993 goto free_tags;
2995 nvme_set_irq_hints(dev);
2997 dev->event_limit = 1;
2998 return result;
3000 free_tags:
3001 nvme_dev_remove_admin(dev);
3002 blk_put_queue(dev->admin_q);
3003 dev->admin_q = NULL;
3004 dev->queues[0]->tags = NULL;
3005 disable:
3006 nvme_disable_queue(dev, 0);
3007 nvme_dev_list_remove(dev);
3008 unmap:
3009 nvme_dev_unmap(dev);
3010 return result;
3013 static int nvme_remove_dead_ctrl(void *arg)
3015 struct nvme_dev *dev = (struct nvme_dev *)arg;
3016 struct pci_dev *pdev = to_pci_dev(dev->dev);
3018 if (pci_get_drvdata(pdev))
3019 pci_stop_and_remove_bus_device_locked(pdev);
3020 kref_put(&dev->kref, nvme_free_dev);
3021 return 0;
3024 static void nvme_remove_disks(struct work_struct *ws)
3026 struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3028 nvme_free_queues(dev, 1);
3029 nvme_dev_remove(dev);
3032 static int nvme_dev_resume(struct nvme_dev *dev)
3034 int ret;
3036 ret = nvme_dev_start(dev);
3037 if (ret)
3038 return ret;
3039 if (dev->online_queues < 2) {
3040 spin_lock(&dev_list_lock);
3041 dev->reset_workfn = nvme_remove_disks;
3042 queue_work(nvme_workq, &dev->reset_work);
3043 spin_unlock(&dev_list_lock);
3044 } else {
3045 nvme_unfreeze_queues(dev);
3046 nvme_dev_add(dev);
3047 nvme_set_irq_hints(dev);
3049 return 0;
3052 static void nvme_dead_ctrl(struct nvme_dev *dev)
3054 dev_warn(dev->dev, "Device failed to resume\n");
3055 kref_get(&dev->kref);
3056 if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
3057 dev->instance))) {
3058 dev_err(dev->dev,
3059 "Failed to start controller remove task\n");
3060 kref_put(&dev->kref, nvme_free_dev);
3064 static void nvme_dev_reset(struct nvme_dev *dev)
3066 bool in_probe = work_busy(&dev->probe_work);
3068 nvme_dev_shutdown(dev);
3070 /* Synchronize with device probe so that work will see failure status
3071 * and exit gracefully without trying to schedule another reset */
3072 flush_work(&dev->probe_work);
3074 /* Fail this device if reset occured during probe to avoid
3075 * infinite initialization loops. */
3076 if (in_probe) {
3077 nvme_dead_ctrl(dev);
3078 return;
3080 /* Schedule device resume asynchronously so the reset work is available
3081 * to cleanup errors that may occur during reinitialization */
3082 schedule_work(&dev->probe_work);
3085 static void nvme_reset_failed_dev(struct work_struct *ws)
3087 struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3088 nvme_dev_reset(dev);
3091 static void nvme_reset_workfn(struct work_struct *work)
3093 struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work);
3094 dev->reset_workfn(work);
3097 static int nvme_reset(struct nvme_dev *dev)
3099 int ret = -EBUSY;
3101 if (!dev->admin_q || blk_queue_dying(dev->admin_q))
3102 return -ENODEV;
3104 spin_lock(&dev_list_lock);
3105 if (!work_pending(&dev->reset_work)) {
3106 dev->reset_workfn = nvme_reset_failed_dev;
3107 queue_work(nvme_workq, &dev->reset_work);
3108 ret = 0;
3110 spin_unlock(&dev_list_lock);
3112 if (!ret) {
3113 flush_work(&dev->reset_work);
3114 flush_work(&dev->probe_work);
3115 return 0;
3118 return ret;
3121 static ssize_t nvme_sysfs_reset(struct device *dev,
3122 struct device_attribute *attr, const char *buf,
3123 size_t count)
3125 struct nvme_dev *ndev = dev_get_drvdata(dev);
3126 int ret;
3128 ret = nvme_reset(ndev);
3129 if (ret < 0)
3130 return ret;
3132 return count;
3134 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
3136 static void nvme_async_probe(struct work_struct *work);
3137 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3139 int node, result = -ENOMEM;
3140 struct nvme_dev *dev;
3142 node = dev_to_node(&pdev->dev);
3143 if (node == NUMA_NO_NODE)
3144 set_dev_node(&pdev->dev, 0);
3146 dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
3147 if (!dev)
3148 return -ENOMEM;
3149 dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
3150 GFP_KERNEL, node);
3151 if (!dev->entry)
3152 goto free;
3153 dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3154 GFP_KERNEL, node);
3155 if (!dev->queues)
3156 goto free;
3158 INIT_LIST_HEAD(&dev->namespaces);
3159 dev->reset_workfn = nvme_reset_failed_dev;
3160 INIT_WORK(&dev->reset_work, nvme_reset_workfn);
3161 dev->dev = get_device(&pdev->dev);
3162 pci_set_drvdata(pdev, dev);
3163 result = nvme_set_instance(dev);
3164 if (result)
3165 goto put_pci;
3167 result = nvme_setup_prp_pools(dev);
3168 if (result)
3169 goto release;
3171 kref_init(&dev->kref);
3172 dev->device = device_create(nvme_class, &pdev->dev,
3173 MKDEV(nvme_char_major, dev->instance),
3174 dev, "nvme%d", dev->instance);
3175 if (IS_ERR(dev->device)) {
3176 result = PTR_ERR(dev->device);
3177 goto release_pools;
3179 get_device(dev->device);
3180 dev_set_drvdata(dev->device, dev);
3182 result = device_create_file(dev->device, &dev_attr_reset_controller);
3183 if (result)
3184 goto put_dev;
3186 INIT_LIST_HEAD(&dev->node);
3187 INIT_WORK(&dev->scan_work, nvme_dev_scan);
3188 INIT_WORK(&dev->probe_work, nvme_async_probe);
3189 schedule_work(&dev->probe_work);
3190 return 0;
3192 put_dev:
3193 device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3194 put_device(dev->device);
3195 release_pools:
3196 nvme_release_prp_pools(dev);
3197 release:
3198 nvme_release_instance(dev);
3199 put_pci:
3200 put_device(dev->dev);
3201 free:
3202 kfree(dev->queues);
3203 kfree(dev->entry);
3204 kfree(dev);
3205 return result;
3208 static void nvme_async_probe(struct work_struct *work)
3210 struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
3212 if (nvme_dev_resume(dev) && !work_busy(&dev->reset_work))
3213 nvme_dead_ctrl(dev);
3216 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3218 struct nvme_dev *dev = pci_get_drvdata(pdev);
3220 if (prepare)
3221 nvme_dev_shutdown(dev);
3222 else
3223 nvme_dev_resume(dev);
3226 static void nvme_shutdown(struct pci_dev *pdev)
3228 struct nvme_dev *dev = pci_get_drvdata(pdev);
3229 nvme_dev_shutdown(dev);
3232 static void nvme_remove(struct pci_dev *pdev)
3234 struct nvme_dev *dev = pci_get_drvdata(pdev);
3236 spin_lock(&dev_list_lock);
3237 list_del_init(&dev->node);
3238 spin_unlock(&dev_list_lock);
3240 pci_set_drvdata(pdev, NULL);
3241 flush_work(&dev->probe_work);
3242 flush_work(&dev->reset_work);
3243 flush_work(&dev->scan_work);
3244 device_remove_file(dev->device, &dev_attr_reset_controller);
3245 nvme_dev_remove(dev);
3246 nvme_dev_shutdown(dev);
3247 nvme_dev_remove_admin(dev);
3248 device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3249 nvme_free_queues(dev, 0);
3250 nvme_release_cmb(dev);
3251 nvme_release_prp_pools(dev);
3252 kref_put(&dev->kref, nvme_free_dev);
3255 /* These functions are yet to be implemented */
3256 #define nvme_error_detected NULL
3257 #define nvme_dump_registers NULL
3258 #define nvme_link_reset NULL
3259 #define nvme_slot_reset NULL
3260 #define nvme_error_resume NULL
3262 #ifdef CONFIG_PM_SLEEP
3263 static int nvme_suspend(struct device *dev)
3265 struct pci_dev *pdev = to_pci_dev(dev);
3266 struct nvme_dev *ndev = pci_get_drvdata(pdev);
3268 nvme_dev_shutdown(ndev);
3269 return 0;
3272 static int nvme_resume(struct device *dev)
3274 struct pci_dev *pdev = to_pci_dev(dev);
3275 struct nvme_dev *ndev = pci_get_drvdata(pdev);
3277 if (nvme_dev_resume(ndev) && !work_busy(&ndev->reset_work)) {
3278 ndev->reset_workfn = nvme_reset_failed_dev;
3279 queue_work(nvme_workq, &ndev->reset_work);
3281 return 0;
3283 #endif
3285 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3287 static const struct pci_error_handlers nvme_err_handler = {
3288 .error_detected = nvme_error_detected,
3289 .mmio_enabled = nvme_dump_registers,
3290 .link_reset = nvme_link_reset,
3291 .slot_reset = nvme_slot_reset,
3292 .resume = nvme_error_resume,
3293 .reset_notify = nvme_reset_notify,
3296 /* Move to pci_ids.h later */
3297 #define PCI_CLASS_STORAGE_EXPRESS 0x010802
3299 static const struct pci_device_id nvme_id_table[] = {
3300 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3301 { 0, }
3303 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3305 static struct pci_driver nvme_driver = {
3306 .name = "nvme",
3307 .id_table = nvme_id_table,
3308 .probe = nvme_probe,
3309 .remove = nvme_remove,
3310 .shutdown = nvme_shutdown,
3311 .driver = {
3312 .pm = &nvme_dev_pm_ops,
3314 .err_handler = &nvme_err_handler,
3317 static int __init nvme_init(void)
3319 int result;
3321 init_waitqueue_head(&nvme_kthread_wait);
3323 nvme_workq = create_singlethread_workqueue("nvme");
3324 if (!nvme_workq)
3325 return -ENOMEM;
3327 result = register_blkdev(nvme_major, "nvme");
3328 if (result < 0)
3329 goto kill_workq;
3330 else if (result > 0)
3331 nvme_major = result;
3333 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3334 &nvme_dev_fops);
3335 if (result < 0)
3336 goto unregister_blkdev;
3337 else if (result > 0)
3338 nvme_char_major = result;
3340 nvme_class = class_create(THIS_MODULE, "nvme");
3341 if (IS_ERR(nvme_class)) {
3342 result = PTR_ERR(nvme_class);
3343 goto unregister_chrdev;
3346 result = pci_register_driver(&nvme_driver);
3347 if (result)
3348 goto destroy_class;
3349 return 0;
3351 destroy_class:
3352 class_destroy(nvme_class);
3353 unregister_chrdev:
3354 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3355 unregister_blkdev:
3356 unregister_blkdev(nvme_major, "nvme");
3357 kill_workq:
3358 destroy_workqueue(nvme_workq);
3359 return result;
3362 static void __exit nvme_exit(void)
3364 pci_unregister_driver(&nvme_driver);
3365 unregister_blkdev(nvme_major, "nvme");
3366 destroy_workqueue(nvme_workq);
3367 class_destroy(nvme_class);
3368 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3369 BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3370 _nvme_check_size();
3373 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3374 MODULE_LICENSE("GPL");
3375 MODULE_VERSION("1.0");
3376 module_init(nvme_init);
3377 module_exit(nvme_exit);