drivers/pinctrl/sh-pfc/sh_pfc.h

   1 /*
   2  * SuperH Pin Function Controller Support
   3  *
   4  * Copyright (c) 2008 Magnus Damm
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file "COPYING" in the main directory of this archive
   8  * for more details.
   9  */
  10
  11 #ifndef __SH_PFC_H
  12 #define __SH_PFC_H
  13
  14 #include <linux/stringify.h>
  15 #include <asm-generic/gpio.h>
  16
  17 typedef unsigned short pinmux_enum_t;
  18 typedef unsigned short pinmux_flag_t;
  19
  20 enum {
  21         PINMUX_TYPE_NONE,
  22
  23         PINMUX_TYPE_FUNCTION,
  24         PINMUX_TYPE_GPIO,
  25         PINMUX_TYPE_OUTPUT,
  26         PINMUX_TYPE_INPUT,
  27         PINMUX_TYPE_INPUT_PULLUP,
  28         PINMUX_TYPE_INPUT_PULLDOWN,
  29
  30         PINMUX_FLAG_TYPE,       /* must be last */
  31 };
  32
  33 #define PINMUX_FLAG_DBIT_SHIFT      5
  34 #define PINMUX_FLAG_DBIT            (0x1f << PINMUX_FLAG_DBIT_SHIFT)
  35 #define PINMUX_FLAG_DREG_SHIFT      10
  36 #define PINMUX_FLAG_DREG            (0x3f << PINMUX_FLAG_DREG_SHIFT)
  37
  38 struct pinmux_gpio {
  39         pinmux_enum_t enum_id;
  40         pinmux_flag_t flags;
  41         const char *name;
  42 };
  43
  44 #define PINMUX_GPIO(gpio, data_or_mark) \
  45         [gpio] = { .name = __stringify(gpio), .enum_id = data_or_mark, .flags = PINMUX_TYPE_NONE }
  46
  47 #define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
  48
  49 struct pinmux_cfg_reg {
  50         unsigned long reg, reg_width, field_width;
  51         unsigned long *cnt;
  52         pinmux_enum_t *enum_ids;
  53         unsigned long *var_field_width;
  54 };
  55
  56 #define PINMUX_CFG_REG(name, r, r_width, f_width) \
  57         .reg = r, .reg_width = r_width, .field_width = f_width,         \
  58         .cnt = (unsigned long [r_width / f_width]) {}, \
  59         .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)])
  60
  61 #define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
  62         .reg = r, .reg_width = r_width, \
  63         .cnt = (unsigned long [r_width]) {}, \
  64         .var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \
  65         .enum_ids = (pinmux_enum_t [])
  66
  67 struct pinmux_data_reg {
  68         unsigned long reg, reg_width, reg_shadow;
  69         pinmux_enum_t *enum_ids;
  70         void __iomem *mapped_reg;
  71 };
  72
  73 #define PINMUX_DATA_REG(name, r, r_width) \
  74         .reg = r, .reg_width = r_width, \
  75         .enum_ids = (pinmux_enum_t [r_width]) \
  76
  77 struct pinmux_irq {
  78         int irq;
  79         pinmux_enum_t *enum_ids;
  80 };
  81
  82 #define PINMUX_IRQ(irq_nr, ids...)                         \
  83         { .irq = irq_nr, .enum_ids = (pinmux_enum_t []) { ids, 0 } }    \
  84
  85 struct pinmux_range {
  86         pinmux_enum_t begin;
  87         pinmux_enum_t end;
  88         pinmux_enum_t force;
  89 };
  90
  91 struct sh_pfc_soc_info {
  92         char *name;
  93         pinmux_enum_t reserved_id;
  94         struct pinmux_range data;
  95         struct pinmux_range input;
  96         struct pinmux_range input_pd;
  97         struct pinmux_range input_pu;
  98         struct pinmux_range output;
  99         struct pinmux_range mark;
 100         struct pinmux_range function;
 101
 102         unsigned first_gpio, last_gpio;
 103
 104         struct pinmux_gpio *gpios;
 105         struct pinmux_cfg_reg *cfg_regs;
 106         struct pinmux_data_reg *data_regs;
 107
 108         pinmux_enum_t *gpio_data;
 109         unsigned int gpio_data_size;
 110
 111         struct pinmux_irq *gpio_irq;
 112         unsigned int gpio_irq_size;
 113
 114         unsigned long unlock_reg;
 115 };
 116
 117 enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
 118
 119 /* helper macro for port */
 120 #define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
 121
 122 #define PORT_10(fn, pfx, sfx) \
 123         PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx),       \
 124         PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx),       \
 125         PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx),       \
 126         PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx),       \
 127         PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
 128
 129 #define PORT_90(fn, pfx, sfx) \
 130         PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx),     \
 131         PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx),     \
 132         PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx),     \
 133         PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx),     \
 134         PORT_10(fn, pfx##9, sfx)
 135
 136 #define _PORT_ALL(pfx, sfx) pfx##_##sfx
 137 #define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
 138 #define PORT_ALL(str)   CPU_ALL_PORT(_PORT_ALL, PORT, str)
 139 #define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused)
 140 #define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
 141
 142 /* helper macro for pinmux_enum_t */
 143 #define PORT_DATA_I(nr) \
 144         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
 145
 146 #define PORT_DATA_I_PD(nr)      \
 147         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
 148                     PORT##nr##_IN, PORT##nr##_IN_PD)
 149
 150 #define PORT_DATA_I_PU(nr)      \
 151         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,    \
 152                     PORT##nr##_IN, PORT##nr##_IN_PU)
 153
 154 #define PORT_DATA_I_PU_PD(nr)   \
 155         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0,                    \
 156                     PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
 157
 158 #define PORT_DATA_O(nr)         \
 159         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
 160
 161 #define PORT_DATA_IO(nr)        \
 162         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,    \
 163                     PORT##nr##_IN)
 164
 165 #define PORT_DATA_IO_PD(nr)     \
 166         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,    \
 167                     PORT##nr##_IN, PORT##nr##_IN_PD)
 168
 169 #define PORT_DATA_IO_PU(nr)     \
 170         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,    \
 171                     PORT##nr##_IN, PORT##nr##_IN_PU)
 172
 173 #define PORT_DATA_IO_PU_PD(nr)  \
 174         PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT,    \
 175                     PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
 176
 177 /* helper macro for top 4 bits in PORTnCR */
 178 #define _PCRH(in, in_pd, in_pu, out)    \
 179         0, (out), (in), 0,              \
 180         0, 0, 0, 0,                     \
 181         0, 0, (in_pd), 0,               \
 182         0, 0, (in_pu), 0
 183
 184 #define PORTCR(nr, reg)                                                 \
 185         {                                                               \
 186                 PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) {             \
 187                         _PCRH(PORT##nr##_IN, PORT##nr##_IN_PD,          \
 188                               PORT##nr##_IN_PU, PORT##nr##_OUT),        \
 189                                 PORT##nr##_FN0, PORT##nr##_FN1,         \
 190                                 PORT##nr##_FN2, PORT##nr##_FN3,         \
 191                                 PORT##nr##_FN4, PORT##nr##_FN5,         \
 192                                 PORT##nr##_FN6, PORT##nr##_FN7 }        \
 193         }
 194
 195 #endif /* __SH_PFC_H */