drivers/i2c/busses/i2c-designware-pcidrv.c

   1 /*
   2  * Synopsys DesignWare I2C adapter driver (master only).
   3  *
   4  * Based on the TI DAVINCI I2C adapter driver.
   5  *
   6  * Copyright (C) 2006 Texas Instruments.
   7  * Copyright (C) 2007 MontaVista Software Inc.
   8  * Copyright (C) 2009 Provigent Ltd.
   9  * Copyright (C) 2011 Intel corporation.
  10  *
  11  * ----------------------------------------------------------------------------
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License as published by
  15  * the Free Software Foundation; either version 2 of the License, or
  16  * (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26  * ----------------------------------------------------------------------------
  27  *
  28  */
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/delay.h>
  33 #include <linux/i2c.h>
  34 #include <linux/errno.h>
  35 #include <linux/sched.h>
  36 #include <linux/err.h>
  37 #include <linux/interrupt.h>
  38 #include <linux/io.h>
  39 #include <linux/slab.h>
  40 #include <linux/pci.h>
  41 #include <linux/pm_runtime.h>
  42 #include "i2c-designware-core.h"
  43
  44 #define DRIVER_NAME "i2c-designware-pci"
  45
  46 enum dw_pci_ctl_id_t {
  47         moorestown_0,
  48         moorestown_1,
  49         moorestown_2,
  50
  51         medfield_0,
  52         medfield_1,
  53         medfield_2,
  54         medfield_3,
  55         medfield_4,
  56         medfield_5,
  57 };
  58
  59 struct dw_pci_controller {
  60         u32 bus_num;
  61         u32 bus_cfg;
  62         u32 tx_fifo_depth;
  63         u32 rx_fifo_depth;
  64         u32 clk_khz;
  65 };
  66
  67 #define INTEL_MID_STD_CFG  (DW_IC_CON_MASTER |                  \
  68                                 DW_IC_CON_SLAVE_DISABLE |       \
  69                                 DW_IC_CON_RESTART_EN)
  70
  71 static struct  dw_pci_controller  dw_pci_controllers[] = {
  72         [moorestown_0] = {
  73                 .bus_num     = 0,
  74                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  75                 .tx_fifo_depth = 32,
  76                 .rx_fifo_depth = 32,
  77                 .clk_khz      = 25000,
  78         },
  79         [moorestown_1] = {
  80                 .bus_num     = 1,
  81                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  82                 .tx_fifo_depth = 32,
  83                 .rx_fifo_depth = 32,
  84                 .clk_khz      = 25000,
  85         },
  86         [moorestown_2] = {
  87                 .bus_num     = 2,
  88                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  89                 .tx_fifo_depth = 32,
  90                 .rx_fifo_depth = 32,
  91                 .clk_khz      = 25000,
  92         },
  93         [medfield_0] = {
  94                 .bus_num     = 0,
  95                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
  96                 .tx_fifo_depth = 32,
  97                 .rx_fifo_depth = 32,
  98                 .clk_khz      = 25000,
  99         },
 100         [medfield_1] = {
 101                 .bus_num     = 1,
 102                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
 103                 .tx_fifo_depth = 32,
 104                 .rx_fifo_depth = 32,
 105                 .clk_khz      = 25000,
 106         },
 107         [medfield_2] = {
 108                 .bus_num     = 2,
 109                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
 110                 .tx_fifo_depth = 32,
 111                 .rx_fifo_depth = 32,
 112                 .clk_khz      = 25000,
 113         },
 114         [medfield_3] = {
 115                 .bus_num     = 3,
 116                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD,
 117                 .tx_fifo_depth = 32,
 118                 .rx_fifo_depth = 32,
 119                 .clk_khz      = 25000,
 120         },
 121         [medfield_4] = {
 122                 .bus_num     = 4,
 123                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
 124                 .tx_fifo_depth = 32,
 125                 .rx_fifo_depth = 32,
 126                 .clk_khz      = 25000,
 127         },
 128         [medfield_5] = {
 129                 .bus_num     = 5,
 130                 .bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
 131                 .tx_fifo_depth = 32,
 132                 .rx_fifo_depth = 32,
 133                 .clk_khz      = 25000,
 134         },
 135 };
 136 static struct i2c_algorithm i2c_dw_algo = {
 137         .master_xfer    = i2c_dw_xfer,
 138         .functionality  = i2c_dw_func,
 139 };
 140
 141 #ifdef CONFIG_PM
 142 static int i2c_dw_pci_suspend(struct device *dev)
 143 {
 144         struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
 145
 146         i2c_dw_disable(pci_get_drvdata(pdev));
 147         return 0;
 148 }
 149
 150 static int i2c_dw_pci_resume(struct device *dev)
 151 {
 152         struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
 153
 154         return i2c_dw_init(pci_get_drvdata(pdev));
 155 }
 156 #endif
 157
 158 static UNIVERSAL_DEV_PM_OPS(i2c_dw_pm_ops, i2c_dw_pci_suspend,
 159                             i2c_dw_pci_resume, NULL);
 160
 161 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
 162 {
 163         return dev->controller->clk_khz;
 164 }
 165
 166 static int i2c_dw_pci_probe(struct pci_dev *pdev,
 167                             const struct pci_device_id *id)
 168 {
 169         struct dw_i2c_dev *dev;
 170         struct i2c_adapter *adap;
 171         int r;
 172         struct  dw_pci_controller *controller;
 173
 174         if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers)) {
 175                 dev_err(&pdev->dev, "%s: invalid driver data %ld\n", __func__,
 176                         id->driver_data);
 177                 return -EINVAL;
 178         }
 179
 180         controller = &dw_pci_controllers[id->driver_data];
 181
 182         r = pcim_enable_device(pdev);
 183         if (r) {
 184                 dev_err(&pdev->dev, "Failed to enable I2C PCI device (%d)\n",
 185                         r);
 186                 return r;
 187         }
 188
 189         r = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev));
 190         if (r) {
 191                 dev_err(&pdev->dev, "I/O memory remapping failed\n");
 192                 return r;
 193         }
 194
 195         dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
 196         if (!dev)
 197                 return -ENOMEM;
 198
 199         init_completion(&dev->cmd_complete);
 200         mutex_init(&dev->lock);
 201         dev->clk = NULL;
 202         dev->controller = controller;
 203         dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
 204         dev->base = pcim_iomap_table(pdev)[0];
 205         dev->dev = &pdev->dev;
 206         dev->functionality =
 207                 I2C_FUNC_I2C |
 208                 I2C_FUNC_SMBUS_BYTE |
 209                 I2C_FUNC_SMBUS_BYTE_DATA |
 210                 I2C_FUNC_SMBUS_WORD_DATA |
 211                 I2C_FUNC_SMBUS_I2C_BLOCK;
 212         dev->master_cfg =  controller->bus_cfg;
 213
 214         pci_set_drvdata(pdev, dev);
 215
 216         dev->tx_fifo_depth = controller->tx_fifo_depth;
 217         dev->rx_fifo_depth = controller->rx_fifo_depth;
 218         r = i2c_dw_init(dev);
 219         if (r)
 220                 return r;
 221
 222         adap = &dev->adapter;
 223         i2c_set_adapdata(adap, dev);
 224         adap->owner = THIS_MODULE;
 225         adap->class = 0;
 226         adap->algo = &i2c_dw_algo;
 227         adap->dev.parent = &pdev->dev;
 228         adap->nr = controller->bus_num;
 229         snprintf(adap->name, sizeof(adap->name), "i2c-designware-pci-%d",
 230                 adap->nr);
 231
 232         r = devm_request_irq(&pdev->dev, pdev->irq, i2c_dw_isr, IRQF_SHARED,
 233                         adap->name, dev);
 234         if (r) {
 235                 dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq);
 236                 return r;
 237         }
 238
 239         i2c_dw_disable_int(dev);
 240         i2c_dw_clear_int(dev);
 241         r = i2c_add_numbered_adapter(adap);
 242         if (r) {
 243                 dev_err(&pdev->dev, "failure adding adapter\n");
 244                 return r;
 245         }
 246
 247         pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
 248         pm_runtime_use_autosuspend(&pdev->dev);
 249         pm_runtime_put_autosuspend(&pdev->dev);
 250         pm_runtime_allow(&pdev->dev);
 251
 252         return 0;
 253 }
 254
 255 static void i2c_dw_pci_remove(struct pci_dev *pdev)
 256 {
 257         struct dw_i2c_dev *dev = pci_get_drvdata(pdev);
 258
 259         i2c_dw_disable(dev);
 260         pm_runtime_forbid(&pdev->dev);
 261         pm_runtime_get_noresume(&pdev->dev);
 262
 263         i2c_del_adapter(&dev->adapter);
 264 }
 265
 266 /* work with hotplug and coldplug */
 267 MODULE_ALIAS("i2c_designware-pci");
 268
 269 static DEFINE_PCI_DEVICE_TABLE(i2_designware_pci_ids) = {
 270         /* Moorestown */
 271         { PCI_VDEVICE(INTEL, 0x0802), moorestown_0 },
 272         { PCI_VDEVICE(INTEL, 0x0803), moorestown_1 },
 273         { PCI_VDEVICE(INTEL, 0x0804), moorestown_2 },
 274         /* Medfield */
 275         { PCI_VDEVICE(INTEL, 0x0817), medfield_3,},
 276         { PCI_VDEVICE(INTEL, 0x0818), medfield_4 },
 277         { PCI_VDEVICE(INTEL, 0x0819), medfield_5 },
 278         { PCI_VDEVICE(INTEL, 0x082C), medfield_0 },
 279         { PCI_VDEVICE(INTEL, 0x082D), medfield_1 },
 280         { PCI_VDEVICE(INTEL, 0x082E), medfield_2 },
 281         { 0,}
 282 };
 283 MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);
 284
 285 static struct pci_driver dw_i2c_driver = {
 286         .name           = DRIVER_NAME,
 287         .id_table       = i2_designware_pci_ids,
 288         .probe          = i2c_dw_pci_probe,
 289         .remove         = i2c_dw_pci_remove,
 290         .driver         = {
 291                 .pm     = &i2c_dw_pm_ops,
 292         },
 293 };
 294
 295 module_pci_driver(dw_i2c_driver);
 296
 297 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
 298 MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter");
 299 MODULE_LICENSE("GPL");