ARM: cpu hotplug: remove majority of cache flushing from platforms
[linux-2.6/btrfs-unstable.git] / arch / arm / mach-shmobile / smp-sh73a0.c
blob2f1ef1bc805d981785f59bc0dbc0f15a8bb24a74
1 /*
2 * SMP support for R-Mobile / SH-Mobile - sh73a0 portion
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2010 Takashi Yoshii
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/smp.h>
23 #include <linux/spinlock.h>
24 #include <linux/io.h>
25 #include <linux/delay.h>
26 #include <linux/irqchip/arm-gic.h>
27 #include <mach/common.h>
28 #include <asm/cacheflush.h>
29 #include <asm/smp_plat.h>
30 #include <mach/sh73a0.h>
31 #include <asm/smp_scu.h>
32 #include <asm/smp_twd.h>
34 #define WUPCR IOMEM(0xe6151010)
35 #define SRESCR IOMEM(0xe6151018)
36 #define PSTR IOMEM(0xe6151040)
37 #define SBAR IOMEM(0xe6180020)
38 #define APARMBAREA IOMEM(0xe6f10020)
40 #define PSTR_SHUTDOWN_MODE 3
42 static void __iomem *scu_base_addr(void)
44 return (void __iomem *)0xf0000000;
47 #ifdef CONFIG_HAVE_ARM_TWD
48 static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
49 void __init sh73a0_register_twd(void)
51 twd_local_timer_register(&twd_local_timer);
53 #endif
55 static unsigned int __init sh73a0_get_core_count(void)
57 void __iomem *scu_base = scu_base_addr();
59 return scu_get_core_count(scu_base);
62 static void __cpuinit sh73a0_secondary_init(unsigned int cpu)
64 gic_secondary_init(0);
67 static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
69 cpu = cpu_logical_map(cpu);
71 if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3)
72 __raw_writel(1 << cpu, WUPCR); /* wake up */
73 else
74 __raw_writel(1 << cpu, SRESCR); /* reset */
76 return 0;
79 static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
81 scu_enable(scu_base_addr());
83 /* Map the reset vector (in headsmp-sh73a0.S) */
84 __raw_writel(0, APARMBAREA); /* 4k */
85 __raw_writel(__pa(sh73a0_secondary_vector), SBAR);
87 /* enable cache coherency on booting CPU */
88 scu_power_mode(scu_base_addr(), SCU_PM_NORMAL);
91 static void __init sh73a0_smp_init_cpus(void)
93 unsigned int ncores = sh73a0_get_core_count();
95 shmobile_smp_init_cpus(ncores);
98 #ifdef CONFIG_HOTPLUG_CPU
99 static int sh73a0_cpu_kill(unsigned int cpu)
102 int k;
103 u32 pstr;
106 * wait until the power status register confirms the shutdown of the
107 * offline target
109 for (k = 0; k < 1000; k++) {
110 pstr = (__raw_readl(PSTR) >> (4 * cpu)) & 3;
111 if (pstr == PSTR_SHUTDOWN_MODE)
112 return 1;
114 mdelay(1);
117 return 0;
120 static void sh73a0_cpu_die(unsigned int cpu)
122 /* Set power off mode. This takes the CPU out of the MP cluster */
123 scu_power_mode(scu_base_addr(), SCU_PM_POWEROFF);
125 /* Enter shutdown mode */
126 cpu_do_idle();
128 #endif /* CONFIG_HOTPLUG_CPU */
130 struct smp_operations sh73a0_smp_ops __initdata = {
131 .smp_init_cpus = sh73a0_smp_init_cpus,
132 .smp_prepare_cpus = sh73a0_smp_prepare_cpus,
133 .smp_secondary_init = sh73a0_secondary_init,
134 .smp_boot_secondary = sh73a0_boot_secondary,
135 #ifdef CONFIG_HOTPLUG_CPU
136 .cpu_kill = sh73a0_cpu_kill,
137 .cpu_die = sh73a0_cpu_die,
138 .cpu_disable = shmobile_cpu_disable_any,
139 #endif