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[IRDA]: stir4200, switching to the kthread API
[linux-2.6/btrfs-unstable.git] / drivers / serial / amba-pl010.c
blob1631414000a2c738bd38f10beb05e81f47ead172
1 /*
2 * linux/drivers/char/amba.c
3 *
4 * Driver for AMBA serial ports
5 *
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 *
8 * Copyright 1999 ARM Limited
9 * Copyright (C) 2000 Deep Blue Solutions Ltd.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 * $Id: amba.c,v 1.41 2002/07/28 10:03:27 rmk Exp $
26 *
27 * This is a generic driver for ARM AMBA-type serial ports. They
28 * have a lot of 16550-like features, but are not register compatible.
29 * Note that although they do have CTS, DCD and DSR inputs, they do
30 * not have an RI input, nor do they have DTR or RTS outputs. If
31 * required, these have to be supplied via some other means (eg, GPIO)
32 * and hooked into this driver.
33 */
34 #include <linux/config.h>
35
36 #if defined(CONFIG_SERIAL_AMBA_PL010_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
37 #define SUPPORT_SYSRQ
38 #endif
39
40 #include <linux/module.h>
41 #include <linux/ioport.h>
42 #include <linux/init.h>
43 #include <linux/console.h>
44 #include <linux/sysrq.h>
45 #include <linux/device.h>
46 #include <linux/tty.h>
47 #include <linux/tty_flip.h>
48 #include <linux/serial_core.h>
49 #include <linux/serial.h>
50 #include <linux/amba/bus.h>
51 #include <linux/amba/serial.h>
52
53 #include <asm/io.h>
54
55 #define UART_NR 2
56
57 #define SERIAL_AMBA_MAJOR 204
58 #define SERIAL_AMBA_MINOR 16
59 #define SERIAL_AMBA_NR UART_NR
60
61 #define AMBA_ISR_PASS_LIMIT 256
62
63 #define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)
64 #define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)
65
66 #define UART_DUMMY_RSR_RX 256
67 #define UART_PORT_SIZE 64
68
69 /*
70 * We wrap our port structure around the generic uart_port.
71 */
72 struct uart_amba_port {
73 struct uart_port port;
74 struct amba_device *dev;
75 struct amba_pl010_data *data;
76 unsigned int old_status;
77 };
78
79 static void pl010_stop_tx(struct uart_port *port)
80 {
81 unsigned int cr;
82
83 cr = readb(port->membase + UART010_CR);
84 cr &= ~UART010_CR_TIE;
85 writel(cr, port->membase + UART010_CR);
86 }
87
88 static void pl010_start_tx(struct uart_port *port)
89 {
90 unsigned int cr;
91
92 cr = readb(port->membase + UART010_CR);
93 cr |= UART010_CR_TIE;
94 writel(cr, port->membase + UART010_CR);
95 }
96
97 static void pl010_stop_rx(struct uart_port *port)
98 {
99 unsigned int cr;
100
101 cr = readb(port->membase + UART010_CR);
102 cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
103 writel(cr, port->membase + UART010_CR);
104 }
105
106 static void pl010_enable_ms(struct uart_port *port)
107 {
108 unsigned int cr;
109
110 cr = readb(port->membase + UART010_CR);
111 cr |= UART010_CR_MSIE;
112 writel(cr, port->membase + UART010_CR);
113 }
114
115 static void
116 #ifdef SUPPORT_SYSRQ
117 pl010_rx_chars(struct uart_port *port, struct pt_regs *regs)
118 #else
119 pl010_rx_chars(struct uart_port *port)
120 #endif
121 {
122 struct tty_struct *tty = port->info->tty;
123 unsigned int status, ch, flag, rsr, max_count = 256;
124
125 status = readb(port->membase + UART01x_FR);
126 while (UART_RX_DATA(status) && max_count--) {
127 ch = readb(port->membase + UART01x_DR);
128 flag = TTY_NORMAL;
129
130 port->icount.rx++;
131
132 /*
133 * Note that the error handling code is
134 * out of the main execution path
135 */
136 rsr = readb(port->membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
137 if (unlikely(rsr & UART01x_RSR_ANY)) {
138 if (rsr & UART01x_RSR_BE) {
139 rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
140 port->icount.brk++;
141 if (uart_handle_break(port))
142 goto ignore_char;
143 } else if (rsr & UART01x_RSR_PE)
144 port->icount.parity++;
145 else if (rsr & UART01x_RSR_FE)
146 port->icount.frame++;
147 if (rsr & UART01x_RSR_OE)
148 port->icount.overrun++;
149
150 rsr &= port->read_status_mask;
151
152 if (rsr & UART01x_RSR_BE)
153 flag = TTY_BREAK;
154 else if (rsr & UART01x_RSR_PE)
155 flag = TTY_PARITY;
156 else if (rsr & UART01x_RSR_FE)
157 flag = TTY_FRAME;
158 }
159
160 if (uart_handle_sysrq_char(port, ch, regs))
161 goto ignore_char;
162
163 uart_insert_char(port, rsr, UART01x_RSR_OE, ch, flag);
164
165 ignore_char:
166 status = readb(port->membase + UART01x_FR);
167 }
168 tty_flip_buffer_push(tty);
169 return;
170 }
171
172 static void pl010_tx_chars(struct uart_port *port)
173 {
174 struct circ_buf *xmit = &port->info->xmit;
175 int count;
176
177 if (port->x_char) {
178 writel(port->x_char, port->membase + UART01x_DR);
179 port->icount.tx++;
180 port->x_char = 0;
181 return;
182 }
183 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
184 pl010_stop_tx(port);
185 return;
186 }
187
188 count = port->fifosize >> 1;
189 do {
190 writel(xmit->buf[xmit->tail], port->membase + UART01x_DR);
191 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
192 port->icount.tx++;
193 if (uart_circ_empty(xmit))
194 break;
195 } while (--count > 0);
196
197 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
198 uart_write_wakeup(port);
199
200 if (uart_circ_empty(xmit))
201 pl010_stop_tx(port);
202 }
203
204 static void pl010_modem_status(struct uart_port *port)
205 {
206 struct uart_amba_port *uap = (struct uart_amba_port *)port;
207 unsigned int status, delta;
208
209 writel(0, uap->port.membase + UART010_ICR);
210
211 status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
212
213 delta = status ^ uap->old_status;
214 uap->old_status = status;
215
216 if (!delta)
217 return;
218
219 if (delta & UART01x_FR_DCD)
220 uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD);
221
222 if (delta & UART01x_FR_DSR)
223 uap->port.icount.dsr++;
224
225 if (delta & UART01x_FR_CTS)
226 uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
227
228 wake_up_interruptible(&uap->port.info->delta_msr_wait);
229 }
230
231 static irqreturn_t pl010_int(int irq, void *dev_id, struct pt_regs *regs)
232 {
233 struct uart_port *port = dev_id;
234 unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
235 int handled = 0;
236
237 spin_lock(&port->lock);
238
239 status = readb(port->membase + UART010_IIR);
240 if (status) {
241 do {
242 if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
243 #ifdef SUPPORT_SYSRQ
244 pl010_rx_chars(port, regs);
245 #else
246 pl010_rx_chars(port);
247 #endif
248 if (status & UART010_IIR_MIS)
249 pl010_modem_status(port);
250 if (status & UART010_IIR_TIS)
251 pl010_tx_chars(port);
252
253 if (pass_counter-- == 0)
254 break;
255
256 status = readb(port->membase + UART010_IIR);
257 } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
258 UART010_IIR_TIS));
259 handled = 1;
260 }
261
262 spin_unlock(&port->lock);
263
264 return IRQ_RETVAL(handled);
265 }
266
267 static unsigned int pl010_tx_empty(struct uart_port *port)
268 {
269 return readb(port->membase + UART01x_FR) & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
270 }
271
272 static unsigned int pl010_get_mctrl(struct uart_port *port)
273 {
274 unsigned int result = 0;
275 unsigned int status;
276
277 status = readb(port->membase + UART01x_FR);
278 if (status & UART01x_FR_DCD)
279 result |= TIOCM_CAR;
280 if (status & UART01x_FR_DSR)
281 result |= TIOCM_DSR;
282 if (status & UART01x_FR_CTS)
283 result |= TIOCM_CTS;
284
285 return result;
286 }
287
288 static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
289 {
290 struct uart_amba_port *uap = (struct uart_amba_port *)port;
291
292 if (uap->data)
293 uap->data->set_mctrl(uap->dev, uap->port.membase, mctrl);
294 }
295
296 static void pl010_break_ctl(struct uart_port *port, int break_state)
297 {
298 unsigned long flags;
299 unsigned int lcr_h;
300
301 spin_lock_irqsave(&port->lock, flags);
302 lcr_h = readb(port->membase + UART010_LCRH);
303 if (break_state == -1)
304 lcr_h |= UART01x_LCRH_BRK;
305 else
306 lcr_h &= ~UART01x_LCRH_BRK;
307 writel(lcr_h, port->membase + UART010_LCRH);
308 spin_unlock_irqrestore(&port->lock, flags);
309 }
310
311 static int pl010_startup(struct uart_port *port)
312 {
313 struct uart_amba_port *uap = (struct uart_amba_port *)port;
314 int retval;
315
316 /*
317 * Allocate the IRQ
318 */
319 retval = request_irq(port->irq, pl010_int, 0, "uart-pl010", port);
320 if (retval)
321 return retval;
322
323 /*
324 * initialise the old status of the modem signals
325 */
326 uap->old_status = readb(port->membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
327
328 /*
329 * Finally, enable interrupts
330 */
331 writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
332 port->membase + UART010_CR);
333
334 return 0;
335 }
336
337 static void pl010_shutdown(struct uart_port *port)
338 {
339 /*
340 * Free the interrupt
341 */
342 free_irq(port->irq, port);
343
344 /*
345 * disable all interrupts, disable the port
346 */
347 writel(0, port->membase + UART010_CR);
348
349 /* disable break condition and fifos */
350 writel(readb(port->membase + UART010_LCRH) &
351 ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
352 port->membase + UART010_LCRH);
353 }
354
355 static void
356 pl010_set_termios(struct uart_port *port, struct termios *termios,
357 struct termios *old)
358 {
359 unsigned int lcr_h, old_cr;
360 unsigned long flags;
361 unsigned int baud, quot;
362
363 /*
364 * Ask the core to calculate the divisor for us.
365 */
366 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
367 quot = uart_get_divisor(port, baud);
368
369 switch (termios->c_cflag & CSIZE) {
370 case CS5:
371 lcr_h = UART01x_LCRH_WLEN_5;
372 break;
373 case CS6:
374 lcr_h = UART01x_LCRH_WLEN_6;
375 break;
376 case CS7:
377 lcr_h = UART01x_LCRH_WLEN_7;
378 break;
379 default: // CS8
380 lcr_h = UART01x_LCRH_WLEN_8;
381 break;
382 }
383 if (termios->c_cflag & CSTOPB)
384 lcr_h |= UART01x_LCRH_STP2;
385 if (termios->c_cflag & PARENB) {
386 lcr_h |= UART01x_LCRH_PEN;
387 if (!(termios->c_cflag & PARODD))
388 lcr_h |= UART01x_LCRH_EPS;
389 }
390 if (port->fifosize > 1)
391 lcr_h |= UART01x_LCRH_FEN;
392
393 spin_lock_irqsave(&port->lock, flags);
394
395 /*
396 * Update the per-port timeout.
397 */
398 uart_update_timeout(port, termios->c_cflag, baud);
399
400 port->read_status_mask = UART01x_RSR_OE;
401 if (termios->c_iflag & INPCK)
402 port->read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
403 if (termios->c_iflag & (BRKINT | PARMRK))
404 port->read_status_mask |= UART01x_RSR_BE;
405
406 /*
407 * Characters to ignore
408 */
409 port->ignore_status_mask = 0;
410 if (termios->c_iflag & IGNPAR)
411 port->ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
412 if (termios->c_iflag & IGNBRK) {
413 port->ignore_status_mask |= UART01x_RSR_BE;
414 /*
415 * If we're ignoring parity and break indicators,
416 * ignore overruns too (for real raw support).
417 */
418 if (termios->c_iflag & IGNPAR)
419 port->ignore_status_mask |= UART01x_RSR_OE;
420 }
421
422 /*
423 * Ignore all characters if CREAD is not set.
424 */
425 if ((termios->c_cflag & CREAD) == 0)
426 port->ignore_status_mask |= UART_DUMMY_RSR_RX;
427
428 /* first, disable everything */
429 old_cr = readb(port->membase + UART010_CR) & ~UART010_CR_MSIE;
430
431 if (UART_ENABLE_MS(port, termios->c_cflag))
432 old_cr |= UART010_CR_MSIE;
433
434 writel(0, port->membase + UART010_CR);
435
436 /* Set baud rate */
437 quot -= 1;
438 writel((quot & 0xf00) >> 8, port->membase + UART010_LCRM);
439 writel(quot & 0xff, port->membase + UART010_LCRL);
440
441 /*
442 * ----------v----------v----------v----------v-----
443 * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
444 * ----------^----------^----------^----------^-----
445 */
446 writel(lcr_h, port->membase + UART010_LCRH);
447 writel(old_cr, port->membase + UART010_CR);
448
449 spin_unlock_irqrestore(&port->lock, flags);
450 }
451
452 static const char *pl010_type(struct uart_port *port)
453 {
454 return port->type == PORT_AMBA ? "AMBA" : NULL;
455 }
456
457 /*
458 * Release the memory region(s) being used by 'port'
459 */
460 static void pl010_release_port(struct uart_port *port)
461 {
462 release_mem_region(port->mapbase, UART_PORT_SIZE);
463 }
464
465 /*
466 * Request the memory region(s) being used by 'port'
467 */
468 static int pl010_request_port(struct uart_port *port)
469 {
470 return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010")
471 != NULL ? 0 : -EBUSY;
472 }
473
474 /*
475 * Configure/autoconfigure the port.
476 */
477 static void pl010_config_port(struct uart_port *port, int flags)
478 {
479 if (flags & UART_CONFIG_TYPE) {
480 port->type = PORT_AMBA;
481 pl010_request_port(port);
482 }
483 }
484
485 /*
486 * verify the new serial_struct (for TIOCSSERIAL).
487 */
488 static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser)
489 {
490 int ret = 0;
491 if (ser->type != PORT_UNKNOWN && ser->type != PORT_AMBA)
492 ret = -EINVAL;
493 if (ser->irq < 0 || ser->irq >= NR_IRQS)
494 ret = -EINVAL;
495 if (ser->baud_base < 9600)
496 ret = -EINVAL;
497 return ret;
498 }
499
500 static struct uart_ops amba_pl010_pops = {
501 .tx_empty = pl010_tx_empty,
502 .set_mctrl = pl010_set_mctrl,
503 .get_mctrl = pl010_get_mctrl,
504 .stop_tx = pl010_stop_tx,
505 .start_tx = pl010_start_tx,
506 .stop_rx = pl010_stop_rx,
507 .enable_ms = pl010_enable_ms,
508 .break_ctl = pl010_break_ctl,
509 .startup = pl010_startup,
510 .shutdown = pl010_shutdown,
511 .set_termios = pl010_set_termios,
512 .type = pl010_type,
513 .release_port = pl010_release_port,
514 .request_port = pl010_request_port,
515 .config_port = pl010_config_port,
516 .verify_port = pl010_verify_port,
517 };
518
519 static struct uart_amba_port *amba_ports[UART_NR];
520
521 #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
522
523 static void pl010_console_putchar(struct uart_port *port, int ch)
524 {
525 unsigned int status;
526
527 do {
528 status = readb(port->membase + UART01x_FR);
529 barrier();
530 } while (!UART_TX_READY(status));
531 writel(ch, port->membase + UART01x_DR);
532 }
533
534 static void
535 pl010_console_write(struct console *co, const char *s, unsigned int count)
536 {
537 struct uart_port *port = &amba_ports[co->index]->port;
538 unsigned int status, old_cr;
539
540 /*
541 * First save the CR then disable the interrupts
542 */
543 old_cr = readb(port->membase + UART010_CR);
544 writel(UART01x_CR_UARTEN, port->membase + UART010_CR);
545
546 uart_console_write(port, s, count, pl010_console_putchar);
547
548 /*
549 * Finally, wait for transmitter to become empty
550 * and restore the TCR
551 */
552 do {
553 status = readb(port->membase + UART01x_FR);
554 barrier();
555 } while (status & UART01x_FR_BUSY);
556 writel(old_cr, port->membase + UART010_CR);
557 }
558
559 static void __init
560 pl010_console_get_options(struct uart_port *port, int *baud,
561 int *parity, int *bits)
562 {
563 if (readb(port->membase + UART010_CR) & UART01x_CR_UARTEN) {
564 unsigned int lcr_h, quot;
565 lcr_h = readb(port->membase + UART010_LCRH);
566
567 *parity = 'n';
568 if (lcr_h & UART01x_LCRH_PEN) {
569 if (lcr_h & UART01x_LCRH_EPS)
570 *parity = 'e';
571 else
572 *parity = 'o';
573 }
574
575 if ((lcr_h & 0x60) == UART01x_LCRH_WLEN_7)
576 *bits = 7;
577 else
578 *bits = 8;
579
580 quot = readb(port->membase + UART010_LCRL) | readb(port->membase + UART010_LCRM) << 8;
581 *baud = port->uartclk / (16 * (quot + 1));
582 }
583 }
584
585 static int __init pl010_console_setup(struct console *co, char *options)
586 {
587 struct uart_port *port;
588 int baud = 38400;
589 int bits = 8;
590 int parity = 'n';
591 int flow = 'n';
592
593 /*
594 * Check whether an invalid uart number has been specified, and
595 * if so, search for the first available port that does have
596 * console support.
597 */
598 if (co->index >= UART_NR)
599 co->index = 0;
600 port = &amba_ports[co->index]->port;
601
602 if (options)
603 uart_parse_options(options, &baud, &parity, &bits, &flow);
604 else
605 pl010_console_get_options(port, &baud, &parity, &bits);
606
607 return uart_set_options(port, co, baud, parity, bits, flow);
608 }
609
610 static struct uart_driver amba_reg;
611 static struct console amba_console = {
612 .name = "ttyAM",
613 .write = pl010_console_write,
614 .device = uart_console_device,
615 .setup = pl010_console_setup,
616 .flags = CON_PRINTBUFFER,
617 .index = -1,
618 .data = &amba_reg,
619 };
620
621 #define AMBA_CONSOLE &amba_console
622 #else
623 #define AMBA_CONSOLE NULL
624 #endif
625
626 static struct uart_driver amba_reg = {
627 .owner = THIS_MODULE,
628 .driver_name = "ttyAM",
629 .dev_name = "ttyAM",
630 .major = SERIAL_AMBA_MAJOR,
631 .minor = SERIAL_AMBA_MINOR,
632 .nr = UART_NR,
633 .cons = AMBA_CONSOLE,
634 };
635
636 static int pl010_probe(struct amba_device *dev, void *id)
637 {
638 struct uart_amba_port *port;
639 void __iomem *base;
640 int i, ret;
641
642 for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
643 if (amba_ports[i] == NULL)
644 break;
645
646 if (i == ARRAY_SIZE(amba_ports)) {
647 ret = -EBUSY;
648 goto out;
649 }
650
651 port = kzalloc(sizeof(struct uart_amba_port), GFP_KERNEL);
652 if (!port) {
653 ret = -ENOMEM;
654 goto out;
655 }
656
657 base = ioremap(dev->res.start, PAGE_SIZE);
658 if (!base) {
659 ret = -ENOMEM;
660 goto free;
661 }
662
663 port->port.dev = &dev->dev;
664 port->port.mapbase = dev->res.start;
665 port->port.membase = base;
666 port->port.iotype = UPIO_MEM;
667 port->port.irq = dev->irq[0];
668 port->port.uartclk = 14745600;
669 port->port.fifosize = 16;
670 port->port.ops = &amba_pl010_pops;
671 port->port.flags = UPF_BOOT_AUTOCONF;
672 port->port.line = i;
673 port->dev = dev;
674 port->data = dev->dev.platform_data;
675
676 amba_ports[i] = port;
677
678 amba_set_drvdata(dev, port);
679 ret = uart_add_one_port(&amba_reg, &port->port);
680 if (ret) {
681 amba_set_drvdata(dev, NULL);
682 amba_ports[i] = NULL;
683 iounmap(base);
684 free:
685 kfree(port);
686 }
687
688 out:
689 return ret;
690 }
691
692 static int pl010_remove(struct amba_device *dev)
693 {
694 struct uart_amba_port *port = amba_get_drvdata(dev);
695 int i;
696
697 amba_set_drvdata(dev, NULL);
698
699 uart_remove_one_port(&amba_reg, &port->port);
700
701 for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
702 if (amba_ports[i] == port)
703 amba_ports[i] = NULL;
704
705 iounmap(port->port.membase);
706 kfree(port);
707
708 return 0;
709 }
710
711 static int pl010_suspend(struct amba_device *dev, pm_message_t state)
712 {
713 struct uart_amba_port *uap = amba_get_drvdata(dev);
714
715 if (uap)
716 uart_suspend_port(&amba_reg, &uap->port);
717
718 return 0;
719 }
720
721 static int pl010_resume(struct amba_device *dev)
722 {
723 struct uart_amba_port *uap = amba_get_drvdata(dev);
724
725 if (uap)
726 uart_resume_port(&amba_reg, &uap->port);
727
728 return 0;
729 }
730
731 static struct amba_id pl010_ids[] __initdata = {
732 {
733 .id = 0x00041010,
734 .mask = 0x000fffff,
735 },
736 { 0, 0 },
737 };
738
739 static struct amba_driver pl010_driver = {
740 .drv = {
741 .name = "uart-pl010",
742 },
743 .id_table = pl010_ids,
744 .probe = pl010_probe,
745 .remove = pl010_remove,
746 .suspend = pl010_suspend,
747 .resume = pl010_resume,
748 };
749
750 static int __init pl010_init(void)
751 {
752 int ret;
753
754 printk(KERN_INFO "Serial: AMBA driver $Revision: 1.41 $\n");
755
756 ret = uart_register_driver(&amba_reg);
757 if (ret == 0) {
758 ret = amba_driver_register(&pl010_driver);
759 if (ret)
760 uart_unregister_driver(&amba_reg);
761 }
762 return ret;
763 }
764
765 static void __exit pl010_exit(void)
766 {
767 amba_driver_unregister(&pl010_driver);
768 uart_unregister_driver(&amba_reg);
769 }
770
771 module_init(pl010_init);
772 module_exit(pl010_exit);
773
774 MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
775 MODULE_DESCRIPTION("ARM AMBA serial port driver $Revision: 1.41 $");
776 MODULE_LICENSE("GPL");
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