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[media] coda: add compressed flag to format enumeration output
[linux-2.6/btrfs-unstable.git] / drivers / media / platform / coda.c
blob53539c1d99a4380748ca57ddbef721610ba80ac9
1 /*
2 * Coda multi-standard codec IP
3 *
4 * Copyright (C) 2012 Vista Silicon S.L.
5 * Javier Martin, <javier.martin@vista-silicon.com>
6 * Xavier Duret
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14 #include <linux/clk.h>
15 #include <linux/delay.h>
16 #include <linux/firmware.h>
17 #include <linux/genalloc.h>
18 #include <linux/interrupt.h>
19 #include <linux/io.h>
20 #include <linux/irq.h>
21 #include <linux/kfifo.h>
22 #include <linux/module.h>
23 #include <linux/of_device.h>
24 #include <linux/platform_device.h>
25 #include <linux/slab.h>
26 #include <linux/videodev2.h>
27 #include <linux/of.h>
28 #include <linux/platform_data/coda.h>
29
30 #include <media/v4l2-ctrls.h>
31 #include <media/v4l2-device.h>
32 #include <media/v4l2-event.h>
33 #include <media/v4l2-ioctl.h>
34 #include <media/v4l2-mem2mem.h>
35 #include <media/videobuf2-core.h>
36 #include <media/videobuf2-dma-contig.h>
37
38 #include "coda.h"
39
40 #define CODA_NAME "coda"
41
42 #define CODADX6_MAX_INSTANCES 4
43
44 #define CODA_FMO_BUF_SIZE 32
45 #define CODADX6_WORK_BUF_SIZE (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
46 #define CODA7_WORK_BUF_SIZE (128 * 1024)
47 #define CODA7_TEMP_BUF_SIZE (304 * 1024)
48 #define CODA_PARA_BUF_SIZE (10 * 1024)
49 #define CODA_ISRAM_SIZE (2048 * 2)
50 #define CODADX6_IRAM_SIZE 0xb000
51 #define CODA7_IRAM_SIZE 0x14000
52
53 #define CODA7_PS_BUF_SIZE 0x28000
54
55 #define CODA_MAX_FRAMEBUFFERS 8
56
57 #define MAX_W 8192
58 #define MAX_H 8192
59 #define CODA_MAX_FRAME_SIZE 0x100000
60 #define FMO_SLICE_SAVE_BUF_SIZE (32)
61 #define CODA_DEFAULT_GAMMA 4096
62
63 #define MIN_W 176
64 #define MIN_H 144
65
66 #define S_ALIGN 1 /* multiple of 2 */
67 #define W_ALIGN 1 /* multiple of 2 */
68 #define H_ALIGN 1 /* multiple of 2 */
69
70 #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
71
72 static int coda_debug;
73 module_param(coda_debug, int, 0644);
74 MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
75
76 enum {
77 V4L2_M2M_SRC = 0,
78 V4L2_M2M_DST = 1,
79 };
80
81 enum coda_inst_type {
82 CODA_INST_ENCODER,
83 CODA_INST_DECODER,
84 };
85
86 enum coda_product {
87 CODA_DX6 = 0xf001,
88 CODA_7541 = 0xf012,
89 };
90
91 struct coda_fmt {
92 char *name;
93 u32 fourcc;
94 };
95
96 struct coda_codec {
97 u32 mode;
98 u32 src_fourcc;
99 u32 dst_fourcc;
100 u32 max_w;
101 u32 max_h;
102 };
103
104 struct coda_devtype {
105 char *firmware;
106 enum coda_product product;
107 struct coda_codec *codecs;
108 unsigned int num_codecs;
109 size_t workbuf_size;
110 };
111
112 /* Per-queue, driver-specific private data */
113 struct coda_q_data {
114 unsigned int width;
115 unsigned int height;
116 unsigned int sizeimage;
117 unsigned int fourcc;
118 };
119
120 struct coda_aux_buf {
121 void *vaddr;
122 dma_addr_t paddr;
123 u32 size;
124 };
125
126 struct coda_dev {
127 struct v4l2_device v4l2_dev;
128 struct video_device vfd;
129 struct platform_device *plat_dev;
130 const struct coda_devtype *devtype;
131
132 void __iomem *regs_base;
133 struct clk *clk_per;
134 struct clk *clk_ahb;
135
136 struct coda_aux_buf codebuf;
137 struct coda_aux_buf tempbuf;
138 struct coda_aux_buf workbuf;
139 struct gen_pool *iram_pool;
140 long unsigned int iram_vaddr;
141 long unsigned int iram_paddr;
142 unsigned long iram_size;
143
144 spinlock_t irqlock;
145 struct mutex dev_mutex;
146 struct mutex coda_mutex;
147 struct v4l2_m2m_dev *m2m_dev;
148 struct vb2_alloc_ctx *alloc_ctx;
149 struct list_head instances;
150 unsigned long instance_mask;
151 struct delayed_work timeout;
152 };
153
154 struct coda_params {
155 u8 rot_mode;
156 u8 h264_intra_qp;
157 u8 h264_inter_qp;
158 u8 mpeg4_intra_qp;
159 u8 mpeg4_inter_qp;
160 u8 gop_size;
161 int codec_mode;
162 int codec_mode_aux;
163 enum v4l2_mpeg_video_multi_slice_mode slice_mode;
164 u32 framerate;
165 u16 bitrate;
166 u32 slice_max_bits;
167 u32 slice_max_mb;
168 };
169
170 struct coda_iram_info {
171 u32 axi_sram_use;
172 phys_addr_t buf_bit_use;
173 phys_addr_t buf_ip_ac_dc_use;
174 phys_addr_t buf_dbk_y_use;
175 phys_addr_t buf_dbk_c_use;
176 phys_addr_t buf_ovl_use;
177 phys_addr_t buf_btp_use;
178 phys_addr_t search_ram_paddr;
179 int search_ram_size;
180 };
181
182 struct coda_ctx {
183 struct coda_dev *dev;
184 struct mutex buffer_mutex;
185 struct list_head list;
186 struct work_struct skip_run;
187 int aborting;
188 int initialized;
189 int streamon_out;
190 int streamon_cap;
191 u32 isequence;
192 u32 qsequence;
193 u32 osequence;
194 struct coda_q_data q_data[2];
195 enum coda_inst_type inst_type;
196 struct coda_codec *codec;
197 enum v4l2_colorspace colorspace;
198 struct coda_params params;
199 struct v4l2_m2m_ctx *m2m_ctx;
200 struct v4l2_ctrl_handler ctrls;
201 struct v4l2_fh fh;
202 int gopcounter;
203 int runcounter;
204 char vpu_header[3][64];
205 int vpu_header_size[3];
206 struct kfifo bitstream_fifo;
207 struct mutex bitstream_mutex;
208 struct coda_aux_buf bitstream;
209 bool prescan_failed;
210 struct coda_aux_buf parabuf;
211 struct coda_aux_buf psbuf;
212 struct coda_aux_buf slicebuf;
213 struct coda_aux_buf internal_frames[CODA_MAX_FRAMEBUFFERS];
214 struct coda_aux_buf workbuf;
215 int num_internal_frames;
216 int idx;
217 int reg_idx;
218 struct coda_iram_info iram_info;
219 u32 bit_stream_param;
220 u32 frm_dis_flg;
221 int display_idx;
222 };
223
224 static const u8 coda_filler_nal[14] = { 0x00, 0x00, 0x00, 0x01, 0x0c, 0xff,
225 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 };
226 static const u8 coda_filler_size[8] = { 0, 7, 14, 13, 12, 11, 10, 9 };
227
228 static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
229 {
230 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
231 "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
232 writel(data, dev->regs_base + reg);
233 }
234
235 static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
236 {
237 u32 data;
238 data = readl(dev->regs_base + reg);
239 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
240 "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
241 return data;
242 }
243
244 static inline unsigned long coda_isbusy(struct coda_dev *dev)
245 {
246 return coda_read(dev, CODA_REG_BIT_BUSY);
247 }
248
249 static inline int coda_is_initialized(struct coda_dev *dev)
250 {
251 return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
252 }
253
254 static int coda_wait_timeout(struct coda_dev *dev)
255 {
256 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
257
258 while (coda_isbusy(dev)) {
259 if (time_after(jiffies, timeout))
260 return -ETIMEDOUT;
261 }
262 return 0;
263 }
264
265 static void coda_command_async(struct coda_ctx *ctx, int cmd)
266 {
267 struct coda_dev *dev = ctx->dev;
268
269 if (dev->devtype->product == CODA_7541) {
270 /* Restore context related registers to CODA */
271 coda_write(dev, ctx->bit_stream_param,
272 CODA_REG_BIT_BIT_STREAM_PARAM);
273 coda_write(dev, ctx->frm_dis_flg,
274 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
275 coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
276 }
277
278 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
279
280 coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
281 coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
282 coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
283
284 coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
285 }
286
287 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
288 {
289 struct coda_dev *dev = ctx->dev;
290
291 coda_command_async(ctx, cmd);
292 return coda_wait_timeout(dev);
293 }
294
295 static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
296 enum v4l2_buf_type type)
297 {
298 switch (type) {
299 case V4L2_BUF_TYPE_VIDEO_OUTPUT:
300 return &(ctx->q_data[V4L2_M2M_SRC]);
301 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
302 return &(ctx->q_data[V4L2_M2M_DST]);
303 default:
304 BUG();
305 }
306 return NULL;
307 }
308
309 /*
310 * Array of all formats supported by any version of Coda:
311 */
312 static struct coda_fmt coda_formats[] = {
313 {
314 .name = "YUV 4:2:0 Planar, YCbCr",
315 .fourcc = V4L2_PIX_FMT_YUV420,
316 },
317 {
318 .name = "YUV 4:2:0 Planar, YCrCb",
319 .fourcc = V4L2_PIX_FMT_YVU420,
320 },
321 {
322 .name = "H264 Encoded Stream",
323 .fourcc = V4L2_PIX_FMT_H264,
324 },
325 {
326 .name = "MPEG4 Encoded Stream",
327 .fourcc = V4L2_PIX_FMT_MPEG4,
328 },
329 };
330
331 #define CODA_CODEC(mode, src_fourcc, dst_fourcc, max_w, max_h) \
332 { mode, src_fourcc, dst_fourcc, max_w, max_h }
333
334 /*
335 * Arrays of codecs supported by each given version of Coda:
336 * i.MX27 -> codadx6
337 * i.MX5x -> coda7
338 * i.MX6 -> coda960
339 * Use V4L2_PIX_FMT_YUV420 as placeholder for all supported YUV 4:2:0 variants
340 */
341 static struct coda_codec codadx6_codecs[] = {
342 CODA_CODEC(CODADX6_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264, 720, 576),
343 CODA_CODEC(CODADX6_MODE_ENCODE_MP4, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 720, 576),
344 };
345
346 static struct coda_codec coda7_codecs[] = {
347 CODA_CODEC(CODA7_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264, 1280, 720),
348 CODA_CODEC(CODA7_MODE_ENCODE_MP4, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 1280, 720),
349 CODA_CODEC(CODA7_MODE_DECODE_H264, V4L2_PIX_FMT_H264, V4L2_PIX_FMT_YUV420, 1920, 1080),
350 CODA_CODEC(CODA7_MODE_DECODE_MP4, V4L2_PIX_FMT_MPEG4, V4L2_PIX_FMT_YUV420, 1920, 1080),
351 };
352
353 static bool coda_format_is_yuv(u32 fourcc)
354 {
355 switch (fourcc) {
356 case V4L2_PIX_FMT_YUV420:
357 case V4L2_PIX_FMT_YVU420:
358 return true;
359 default:
360 return false;
361 }
362 }
363
364 /*
365 * Normalize all supported YUV 4:2:0 formats to the value used in the codec
366 * tables.
367 */
368 static u32 coda_format_normalize_yuv(u32 fourcc)
369 {
370 return coda_format_is_yuv(fourcc) ? V4L2_PIX_FMT_YUV420 : fourcc;
371 }
372
373 static struct coda_codec *coda_find_codec(struct coda_dev *dev, int src_fourcc,
374 int dst_fourcc)
375 {
376 struct coda_codec *codecs = dev->devtype->codecs;
377 int num_codecs = dev->devtype->num_codecs;
378 int k;
379
380 src_fourcc = coda_format_normalize_yuv(src_fourcc);
381 dst_fourcc = coda_format_normalize_yuv(dst_fourcc);
382 if (src_fourcc == dst_fourcc)
383 return NULL;
384
385 for (k = 0; k < num_codecs; k++) {
386 if (codecs[k].src_fourcc == src_fourcc &&
387 codecs[k].dst_fourcc == dst_fourcc)
388 break;
389 }
390
391 if (k == num_codecs)
392 return NULL;
393
394 return &codecs[k];
395 }
396
397 /*
398 * V4L2 ioctl() operations.
399 */
400 static int vidioc_querycap(struct file *file, void *priv,
401 struct v4l2_capability *cap)
402 {
403 strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
404 strlcpy(cap->card, CODA_NAME, sizeof(cap->card));
405 strlcpy(cap->bus_info, "platform:" CODA_NAME, sizeof(cap->bus_info));
406 /*
407 * This is only a mem-to-mem video device. The capture and output
408 * device capability flags are left only for backward compatibility
409 * and are scheduled for removal.
410 */
411 cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
412 V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
413 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
414
415 return 0;
416 }
417
418 static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
419 enum v4l2_buf_type type, int src_fourcc)
420 {
421 struct coda_ctx *ctx = fh_to_ctx(priv);
422 struct coda_codec *codecs = ctx->dev->devtype->codecs;
423 struct coda_fmt *formats = coda_formats;
424 struct coda_fmt *fmt;
425 int num_codecs = ctx->dev->devtype->num_codecs;
426 int num_formats = ARRAY_SIZE(coda_formats);
427 int i, k, num = 0;
428
429 for (i = 0; i < num_formats; i++) {
430 /* Both uncompressed formats are always supported */
431 if (coda_format_is_yuv(formats[i].fourcc) &&
432 !coda_format_is_yuv(src_fourcc)) {
433 if (num == f->index)
434 break;
435 ++num;
436 continue;
437 }
438 /* Compressed formats may be supported, check the codec list */
439 for (k = 0; k < num_codecs; k++) {
440 /* if src_fourcc is set, only consider matching codecs */
441 if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
442 formats[i].fourcc == codecs[k].dst_fourcc &&
443 (!src_fourcc || src_fourcc == codecs[k].src_fourcc))
444 break;
445 if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT &&
446 formats[i].fourcc == codecs[k].src_fourcc)
447 break;
448 }
449 if (k < num_codecs) {
450 if (num == f->index)
451 break;
452 ++num;
453 }
454 }
455
456 if (i < num_formats) {
457 fmt = &formats[i];
458 strlcpy(f->description, fmt->name, sizeof(f->description));
459 f->pixelformat = fmt->fourcc;
460 if (!coda_format_is_yuv(fmt->fourcc))
461 f->flags |= V4L2_FMT_FLAG_COMPRESSED;
462 return 0;
463 }
464
465 /* Format not found */
466 return -EINVAL;
467 }
468
469 static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
470 struct v4l2_fmtdesc *f)
471 {
472 struct coda_ctx *ctx = fh_to_ctx(priv);
473 struct vb2_queue *src_vq;
474 struct coda_q_data *q_data_src;
475
476 /* If the source format is already fixed, only list matching formats */
477 src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
478 if (vb2_is_streaming(src_vq)) {
479 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
480
481 return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_CAPTURE,
482 q_data_src->fourcc);
483 }
484
485 return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_CAPTURE, 0);
486 }
487
488 static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
489 struct v4l2_fmtdesc *f)
490 {
491 return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_OUTPUT, 0);
492 }
493
494 static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
495 {
496 struct vb2_queue *vq;
497 struct coda_q_data *q_data;
498 struct coda_ctx *ctx = fh_to_ctx(priv);
499
500 vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
501 if (!vq)
502 return -EINVAL;
503
504 q_data = get_q_data(ctx, f->type);
505
506 f->fmt.pix.field = V4L2_FIELD_NONE;
507 f->fmt.pix.pixelformat = q_data->fourcc;
508 f->fmt.pix.width = q_data->width;
509 f->fmt.pix.height = q_data->height;
510 if (coda_format_is_yuv(f->fmt.pix.pixelformat))
511 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
512 else /* encoded formats h.264/mpeg4 */
513 f->fmt.pix.bytesperline = 0;
514
515 f->fmt.pix.sizeimage = q_data->sizeimage;
516 f->fmt.pix.colorspace = ctx->colorspace;
517
518 return 0;
519 }
520
521 static int vidioc_try_fmt(struct coda_codec *codec, struct v4l2_format *f)
522 {
523 unsigned int max_w, max_h;
524 enum v4l2_field field;
525
526 field = f->fmt.pix.field;
527 if (field == V4L2_FIELD_ANY)
528 field = V4L2_FIELD_NONE;
529 else if (V4L2_FIELD_NONE != field)
530 return -EINVAL;
531
532 /* V4L2 specification suggests the driver corrects the format struct
533 * if any of the dimensions is unsupported */
534 f->fmt.pix.field = field;
535
536 if (codec) {
537 max_w = codec->max_w;
538 max_h = codec->max_h;
539 } else {
540 max_w = MAX_W;
541 max_h = MAX_H;
542 }
543 v4l_bound_align_image(&f->fmt.pix.width, MIN_W, max_w,
544 W_ALIGN, &f->fmt.pix.height,
545 MIN_H, max_h, H_ALIGN, S_ALIGN);
546
547 if (coda_format_is_yuv(f->fmt.pix.pixelformat)) {
548 /* Frame stride must be multiple of 8 */
549 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 8);
550 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
551 f->fmt.pix.height * 3 / 2;
552 } else { /*encoded formats h.264/mpeg4 */
553 f->fmt.pix.bytesperline = 0;
554 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
555 }
556
557 return 0;
558 }
559
560 static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
561 struct v4l2_format *f)
562 {
563 struct coda_ctx *ctx = fh_to_ctx(priv);
564 struct coda_codec *codec;
565 struct vb2_queue *src_vq;
566 int ret;
567
568 /*
569 * If the source format is already fixed, try to find a codec that
570 * converts to the given destination format
571 */
572 src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
573 if (vb2_is_streaming(src_vq)) {
574 struct coda_q_data *q_data_src;
575
576 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
577 codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
578 f->fmt.pix.pixelformat);
579 if (!codec)
580 return -EINVAL;
581 } else {
582 /* Otherwise determine codec by encoded format, if possible */
583 codec = coda_find_codec(ctx->dev, V4L2_PIX_FMT_YUV420,
584 f->fmt.pix.pixelformat);
585 }
586
587 f->fmt.pix.colorspace = ctx->colorspace;
588
589 ret = vidioc_try_fmt(codec, f);
590 if (ret < 0)
591 return ret;
592
593 /* The h.264 decoder only returns complete 16x16 macroblocks */
594 if (codec && codec->src_fourcc == V4L2_PIX_FMT_H264) {
595 f->fmt.pix.width = round_up(f->fmt.pix.width, 16);
596 f->fmt.pix.height = round_up(f->fmt.pix.height, 16);
597 f->fmt.pix.bytesperline = f->fmt.pix.width;
598 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
599 f->fmt.pix.height * 3 / 2;
600 }
601
602 return 0;
603 }
604
605 static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
606 struct v4l2_format *f)
607 {
608 struct coda_ctx *ctx = fh_to_ctx(priv);
609 struct coda_codec *codec;
610
611 /* Determine codec by encoded format, returns NULL if raw or invalid */
612 codec = coda_find_codec(ctx->dev, f->fmt.pix.pixelformat,
613 V4L2_PIX_FMT_YUV420);
614
615 if (!f->fmt.pix.colorspace)
616 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
617
618 return vidioc_try_fmt(codec, f);
619 }
620
621 static int vidioc_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
622 {
623 struct coda_q_data *q_data;
624 struct vb2_queue *vq;
625
626 vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
627 if (!vq)
628 return -EINVAL;
629
630 q_data = get_q_data(ctx, f->type);
631 if (!q_data)
632 return -EINVAL;
633
634 if (vb2_is_busy(vq)) {
635 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
636 return -EBUSY;
637 }
638
639 q_data->fourcc = f->fmt.pix.pixelformat;
640 q_data->width = f->fmt.pix.width;
641 q_data->height = f->fmt.pix.height;
642 q_data->sizeimage = f->fmt.pix.sizeimage;
643
644 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
645 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
646 f->type, q_data->width, q_data->height, q_data->fourcc);
647
648 return 0;
649 }
650
651 static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
652 struct v4l2_format *f)
653 {
654 struct coda_ctx *ctx = fh_to_ctx(priv);
655 int ret;
656
657 ret = vidioc_try_fmt_vid_cap(file, priv, f);
658 if (ret)
659 return ret;
660
661 return vidioc_s_fmt(ctx, f);
662 }
663
664 static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
665 struct v4l2_format *f)
666 {
667 struct coda_ctx *ctx = fh_to_ctx(priv);
668 int ret;
669
670 ret = vidioc_try_fmt_vid_out(file, priv, f);
671 if (ret)
672 return ret;
673
674 ret = vidioc_s_fmt(ctx, f);
675 if (ret)
676 ctx->colorspace = f->fmt.pix.colorspace;
677
678 return ret;
679 }
680
681 static int vidioc_reqbufs(struct file *file, void *priv,
682 struct v4l2_requestbuffers *reqbufs)
683 {
684 struct coda_ctx *ctx = fh_to_ctx(priv);
685
686 return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
687 }
688
689 static int vidioc_querybuf(struct file *file, void *priv,
690 struct v4l2_buffer *buf)
691 {
692 struct coda_ctx *ctx = fh_to_ctx(priv);
693
694 return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
695 }
696
697 static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
698 {
699 struct coda_ctx *ctx = fh_to_ctx(priv);
700
701 return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
702 }
703
704 static int vidioc_expbuf(struct file *file, void *priv,
705 struct v4l2_exportbuffer *eb)
706 {
707 struct coda_ctx *ctx = fh_to_ctx(priv);
708
709 return v4l2_m2m_expbuf(file, ctx->m2m_ctx, eb);
710 }
711
712 static bool coda_buf_is_end_of_stream(struct coda_ctx *ctx,
713 struct v4l2_buffer *buf)
714 {
715 struct vb2_queue *src_vq;
716
717 src_vq = v4l2_m2m_get_vq(ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
718
719 return ((ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) &&
720 (buf->sequence == (ctx->qsequence - 1)));
721 }
722
723 static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
724 {
725 struct coda_ctx *ctx = fh_to_ctx(priv);
726 int ret;
727
728 ret = v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
729
730 /* If this is the last capture buffer, emit an end-of-stream event */
731 if (buf->type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
732 coda_buf_is_end_of_stream(ctx, buf)) {
733 const struct v4l2_event eos_event = {
734 .type = V4L2_EVENT_EOS
735 };
736
737 v4l2_event_queue_fh(&ctx->fh, &eos_event);
738 }
739
740 return ret;
741 }
742
743 static int vidioc_create_bufs(struct file *file, void *priv,
744 struct v4l2_create_buffers *create)
745 {
746 struct coda_ctx *ctx = fh_to_ctx(priv);
747
748 return v4l2_m2m_create_bufs(file, ctx->m2m_ctx, create);
749 }
750
751 static int vidioc_streamon(struct file *file, void *priv,
752 enum v4l2_buf_type type)
753 {
754 struct coda_ctx *ctx = fh_to_ctx(priv);
755
756 return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
757 }
758
759 static int vidioc_streamoff(struct file *file, void *priv,
760 enum v4l2_buf_type type)
761 {
762 struct coda_ctx *ctx = fh_to_ctx(priv);
763 int ret;
764
765 /*
766 * This indirectly calls __vb2_queue_cancel, which dequeues all buffers.
767 * We therefore have to lock it against running hardware in this context,
768 * which still needs the buffers.
769 */
770 mutex_lock(&ctx->buffer_mutex);
771 ret = v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
772 mutex_unlock(&ctx->buffer_mutex);
773
774 return ret;
775 }
776
777 static int vidioc_decoder_cmd(struct file *file, void *fh,
778 struct v4l2_decoder_cmd *dc)
779 {
780 struct coda_ctx *ctx = fh_to_ctx(fh);
781
782 if (dc->cmd != V4L2_DEC_CMD_STOP)
783 return -EINVAL;
784
785 if ((dc->flags & V4L2_DEC_CMD_STOP_TO_BLACK) ||
786 (dc->flags & V4L2_DEC_CMD_STOP_IMMEDIATELY))
787 return -EINVAL;
788
789 if (dc->stop.pts != 0)
790 return -EINVAL;
791
792 if (ctx->inst_type != CODA_INST_DECODER)
793 return -EINVAL;
794
795 /* Set the strem-end flag on this context */
796 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
797
798 return 0;
799 }
800
801 static int vidioc_subscribe_event(struct v4l2_fh *fh,
802 const struct v4l2_event_subscription *sub)
803 {
804 switch (sub->type) {
805 case V4L2_EVENT_EOS:
806 return v4l2_event_subscribe(fh, sub, 0, NULL);
807 default:
808 return v4l2_ctrl_subscribe_event(fh, sub);
809 }
810 }
811
812 static const struct v4l2_ioctl_ops coda_ioctl_ops = {
813 .vidioc_querycap = vidioc_querycap,
814
815 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
816 .vidioc_g_fmt_vid_cap = vidioc_g_fmt,
817 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
818 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
819
820 .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
821 .vidioc_g_fmt_vid_out = vidioc_g_fmt,
822 .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
823 .vidioc_s_fmt_vid_out = vidioc_s_fmt_vid_out,
824
825 .vidioc_reqbufs = vidioc_reqbufs,
826 .vidioc_querybuf = vidioc_querybuf,
827
828 .vidioc_qbuf = vidioc_qbuf,
829 .vidioc_expbuf = vidioc_expbuf,
830 .vidioc_dqbuf = vidioc_dqbuf,
831 .vidioc_create_bufs = vidioc_create_bufs,
832
833 .vidioc_streamon = vidioc_streamon,
834 .vidioc_streamoff = vidioc_streamoff,
835
836 .vidioc_decoder_cmd = vidioc_decoder_cmd,
837
838 .vidioc_subscribe_event = vidioc_subscribe_event,
839 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
840 };
841
842 static int coda_start_decoding(struct coda_ctx *ctx);
843
844 static void coda_skip_run(struct work_struct *work)
845 {
846 struct coda_ctx *ctx = container_of(work, struct coda_ctx, skip_run);
847
848 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
849 }
850
851 static inline int coda_get_bitstream_payload(struct coda_ctx *ctx)
852 {
853 return kfifo_len(&ctx->bitstream_fifo);
854 }
855
856 static void coda_kfifo_sync_from_device(struct coda_ctx *ctx)
857 {
858 struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
859 struct coda_dev *dev = ctx->dev;
860 u32 rd_ptr;
861
862 rd_ptr = coda_read(dev, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
863 kfifo->out = (kfifo->in & ~kfifo->mask) |
864 (rd_ptr - ctx->bitstream.paddr);
865 if (kfifo->out > kfifo->in)
866 kfifo->out -= kfifo->mask + 1;
867 }
868
869 static void coda_kfifo_sync_to_device_full(struct coda_ctx *ctx)
870 {
871 struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
872 struct coda_dev *dev = ctx->dev;
873 u32 rd_ptr, wr_ptr;
874
875 rd_ptr = ctx->bitstream.paddr + (kfifo->out & kfifo->mask);
876 coda_write(dev, rd_ptr, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
877 wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
878 coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
879 }
880
881 static void coda_kfifo_sync_to_device_write(struct coda_ctx *ctx)
882 {
883 struct __kfifo *kfifo = &ctx->bitstream_fifo.kfifo;
884 struct coda_dev *dev = ctx->dev;
885 u32 wr_ptr;
886
887 wr_ptr = ctx->bitstream.paddr + (kfifo->in & kfifo->mask);
888 coda_write(dev, wr_ptr, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
889 }
890
891 static int coda_bitstream_queue(struct coda_ctx *ctx, struct vb2_buffer *src_buf)
892 {
893 u32 src_size = vb2_get_plane_payload(src_buf, 0);
894 u32 n;
895
896 n = kfifo_in(&ctx->bitstream_fifo, vb2_plane_vaddr(src_buf, 0), src_size);
897 if (n < src_size)
898 return -ENOSPC;
899
900 dma_sync_single_for_device(&ctx->dev->plat_dev->dev, ctx->bitstream.paddr,
901 ctx->bitstream.size, DMA_TO_DEVICE);
902
903 ctx->qsequence++;
904
905 return 0;
906 }
907
908 static bool coda_bitstream_try_queue(struct coda_ctx *ctx,
909 struct vb2_buffer *src_buf)
910 {
911 int ret;
912
913 if (coda_get_bitstream_payload(ctx) +
914 vb2_get_plane_payload(src_buf, 0) + 512 >= ctx->bitstream.size)
915 return false;
916
917 if (vb2_plane_vaddr(src_buf, 0) == NULL) {
918 v4l2_err(&ctx->dev->v4l2_dev, "trying to queue empty buffer\n");
919 return true;
920 }
921
922 ret = coda_bitstream_queue(ctx, src_buf);
923 if (ret < 0) {
924 v4l2_err(&ctx->dev->v4l2_dev, "bitstream buffer overflow\n");
925 return false;
926 }
927 /* Sync read pointer to device */
928 if (ctx == v4l2_m2m_get_curr_priv(ctx->dev->m2m_dev))
929 coda_kfifo_sync_to_device_write(ctx);
930
931 ctx->prescan_failed = false;
932
933 return true;
934 }
935
936 static void coda_fill_bitstream(struct coda_ctx *ctx)
937 {
938 struct vb2_buffer *src_buf;
939
940 while (v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) > 0) {
941 src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
942
943 if (coda_bitstream_try_queue(ctx, src_buf)) {
944 src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
945 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
946 } else {
947 break;
948 }
949 }
950 }
951
952 /*
953 * Mem-to-mem operations.
954 */
955 static int coda_prepare_decode(struct coda_ctx *ctx)
956 {
957 struct vb2_buffer *dst_buf;
958 struct coda_dev *dev = ctx->dev;
959 struct coda_q_data *q_data_dst;
960 u32 stridey, height;
961 u32 picture_y, picture_cb, picture_cr;
962
963 dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
964 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
965
966 if (ctx->params.rot_mode & CODA_ROT_90) {
967 stridey = q_data_dst->height;
968 height = q_data_dst->width;
969 } else {
970 stridey = q_data_dst->width;
971 height = q_data_dst->height;
972 }
973
974 /* Try to copy source buffer contents into the bitstream ringbuffer */
975 mutex_lock(&ctx->bitstream_mutex);
976 coda_fill_bitstream(ctx);
977 mutex_unlock(&ctx->bitstream_mutex);
978
979 if (coda_get_bitstream_payload(ctx) < 512 &&
980 (!(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
981 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
982 "bitstream payload: %d, skipping\n",
983 coda_get_bitstream_payload(ctx));
984 schedule_work(&ctx->skip_run);
985 return -EAGAIN;
986 }
987
988 /* Run coda_start_decoding (again) if not yet initialized */
989 if (!ctx->initialized) {
990 int ret = coda_start_decoding(ctx);
991 if (ret < 0) {
992 v4l2_err(&dev->v4l2_dev, "failed to start decoding\n");
993 schedule_work(&ctx->skip_run);
994 return -EAGAIN;
995 } else {
996 ctx->initialized = 1;
997 }
998 }
999
1000 /* Set rotator output */
1001 picture_y = vb2_dma_contig_plane_dma_addr(dst_buf, 0);
1002 if (q_data_dst->fourcc == V4L2_PIX_FMT_YVU420) {
1003 /* Switch Cr and Cb for YVU420 format */
1004 picture_cr = picture_y + stridey * height;
1005 picture_cb = picture_cr + stridey / 2 * height / 2;
1006 } else {
1007 picture_cb = picture_y + stridey * height;
1008 picture_cr = picture_cb + stridey / 2 * height / 2;
1009 }
1010 coda_write(dev, picture_y, CODA_CMD_DEC_PIC_ROT_ADDR_Y);
1011 coda_write(dev, picture_cb, CODA_CMD_DEC_PIC_ROT_ADDR_CB);
1012 coda_write(dev, picture_cr, CODA_CMD_DEC_PIC_ROT_ADDR_CR);
1013 coda_write(dev, stridey, CODA_CMD_DEC_PIC_ROT_STRIDE);
1014 coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode,
1015 CODA_CMD_DEC_PIC_ROT_MODE);
1016
1017 switch (dev->devtype->product) {
1018 case CODA_DX6:
1019 /* TBD */
1020 case CODA_7541:
1021 coda_write(dev, CODA_PRE_SCAN_EN, CODA_CMD_DEC_PIC_OPTION);
1022 break;
1023 }
1024
1025 coda_write(dev, 0, CODA_CMD_DEC_PIC_SKIP_NUM);
1026
1027 coda_write(dev, 0, CODA_CMD_DEC_PIC_BB_START);
1028 coda_write(dev, 0, CODA_CMD_DEC_PIC_START_BYTE);
1029
1030 return 0;
1031 }
1032
1033 static void coda_prepare_encode(struct coda_ctx *ctx)
1034 {
1035 struct coda_q_data *q_data_src, *q_data_dst;
1036 struct vb2_buffer *src_buf, *dst_buf;
1037 struct coda_dev *dev = ctx->dev;
1038 int force_ipicture;
1039 int quant_param = 0;
1040 u32 picture_y, picture_cb, picture_cr;
1041 u32 pic_stream_buffer_addr, pic_stream_buffer_size;
1042 u32 dst_fourcc;
1043
1044 src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
1045 dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1046 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1047 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1048 dst_fourcc = q_data_dst->fourcc;
1049
1050 src_buf->v4l2_buf.sequence = ctx->osequence;
1051 dst_buf->v4l2_buf.sequence = ctx->osequence;
1052 ctx->osequence++;
1053
1054 /*
1055 * Workaround coda firmware BUG that only marks the first
1056 * frame as IDR. This is a problem for some decoders that can't
1057 * recover when a frame is lost.
1058 */
1059 if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
1060 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1061 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1062 } else {
1063 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1064 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1065 }
1066
1067 /*
1068 * Copy headers at the beginning of the first frame for H.264 only.
1069 * In MPEG4 they are already copied by the coda.
1070 */
1071 if (src_buf->v4l2_buf.sequence == 0) {
1072 pic_stream_buffer_addr =
1073 vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
1074 ctx->vpu_header_size[0] +
1075 ctx->vpu_header_size[1] +
1076 ctx->vpu_header_size[2];
1077 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
1078 ctx->vpu_header_size[0] -
1079 ctx->vpu_header_size[1] -
1080 ctx->vpu_header_size[2];
1081 memcpy(vb2_plane_vaddr(dst_buf, 0),
1082 &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
1083 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
1084 &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
1085 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
1086 ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
1087 ctx->vpu_header_size[2]);
1088 } else {
1089 pic_stream_buffer_addr =
1090 vb2_dma_contig_plane_dma_addr(dst_buf, 0);
1091 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
1092 }
1093
1094 if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1095 force_ipicture = 1;
1096 switch (dst_fourcc) {
1097 case V4L2_PIX_FMT_H264:
1098 quant_param = ctx->params.h264_intra_qp;
1099 break;
1100 case V4L2_PIX_FMT_MPEG4:
1101 quant_param = ctx->params.mpeg4_intra_qp;
1102 break;
1103 default:
1104 v4l2_warn(&ctx->dev->v4l2_dev,
1105 "cannot set intra qp, fmt not supported\n");
1106 break;
1107 }
1108 } else {
1109 force_ipicture = 0;
1110 switch (dst_fourcc) {
1111 case V4L2_PIX_FMT_H264:
1112 quant_param = ctx->params.h264_inter_qp;
1113 break;
1114 case V4L2_PIX_FMT_MPEG4:
1115 quant_param = ctx->params.mpeg4_inter_qp;
1116 break;
1117 default:
1118 v4l2_warn(&ctx->dev->v4l2_dev,
1119 "cannot set inter qp, fmt not supported\n");
1120 break;
1121 }
1122 }
1123
1124 /* submit */
1125 coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
1126 coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
1127
1128
1129 picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
1130 switch (q_data_src->fourcc) {
1131 case V4L2_PIX_FMT_YVU420:
1132 /* Switch Cb and Cr for YVU420 format */
1133 picture_cr = picture_y + q_data_src->width * q_data_src->height;
1134 picture_cb = picture_cr + q_data_src->width / 2 *
1135 q_data_src->height / 2;
1136 break;
1137 case V4L2_PIX_FMT_YUV420:
1138 default:
1139 picture_cb = picture_y + q_data_src->width * q_data_src->height;
1140 picture_cr = picture_cb + q_data_src->width / 2 *
1141 q_data_src->height / 2;
1142 break;
1143 }
1144
1145 coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
1146 coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
1147 coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
1148 coda_write(dev, force_ipicture << 1 & 0x2,
1149 CODA_CMD_ENC_PIC_OPTION);
1150
1151 coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
1152 coda_write(dev, pic_stream_buffer_size / 1024,
1153 CODA_CMD_ENC_PIC_BB_SIZE);
1154 }
1155
1156 static void coda_device_run(void *m2m_priv)
1157 {
1158 struct coda_ctx *ctx = m2m_priv;
1159 struct coda_dev *dev = ctx->dev;
1160 int ret;
1161
1162 mutex_lock(&ctx->buffer_mutex);
1163
1164 /*
1165 * If streamoff dequeued all buffers before we could get the lock,
1166 * just bail out immediately.
1167 */
1168 if ((!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) &&
1169 ctx->inst_type != CODA_INST_DECODER) ||
1170 !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
1171 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1172 "%d: device_run without buffers\n", ctx->idx);
1173 mutex_unlock(&ctx->buffer_mutex);
1174 schedule_work(&ctx->skip_run);
1175 return;
1176 }
1177
1178 mutex_lock(&dev->coda_mutex);
1179
1180 if (ctx->inst_type == CODA_INST_DECODER) {
1181 ret = coda_prepare_decode(ctx);
1182 if (ret < 0) {
1183 mutex_unlock(&dev->coda_mutex);
1184 mutex_unlock(&ctx->buffer_mutex);
1185 /* job_finish scheduled by prepare_decode */
1186 return;
1187 }
1188 } else {
1189 coda_prepare_encode(ctx);
1190 }
1191
1192 if (dev->devtype->product != CODA_DX6)
1193 coda_write(dev, ctx->iram_info.axi_sram_use,
1194 CODA7_REG_BIT_AXI_SRAM_USE);
1195
1196 /* 1 second timeout in case CODA locks up */
1197 schedule_delayed_work(&dev->timeout, HZ);
1198
1199 if (ctx->inst_type == CODA_INST_DECODER)
1200 coda_kfifo_sync_to_device_full(ctx);
1201 coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
1202 }
1203
1204 static int coda_job_ready(void *m2m_priv)
1205 {
1206 struct coda_ctx *ctx = m2m_priv;
1207
1208 /*
1209 * For both 'P' and 'key' frame cases 1 picture
1210 * and 1 frame are needed. In the decoder case,
1211 * the compressed frame can be in the bitstream.
1212 */
1213 if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) &&
1214 ctx->inst_type != CODA_INST_DECODER) {
1215 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1216 "not ready: not enough video buffers.\n");
1217 return 0;
1218 }
1219
1220 if (!v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
1221 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1222 "not ready: not enough video capture buffers.\n");
1223 return 0;
1224 }
1225
1226 if (ctx->prescan_failed ||
1227 ((ctx->inst_type == CODA_INST_DECODER) &&
1228 (coda_get_bitstream_payload(ctx) < 512) &&
1229 !(ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG))) {
1230 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1231 "%d: not ready: not enough bitstream data.\n",
1232 ctx->idx);
1233 return 0;
1234 }
1235
1236 if (ctx->aborting) {
1237 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1238 "not ready: aborting\n");
1239 return 0;
1240 }
1241
1242 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1243 "job ready\n");
1244 return 1;
1245 }
1246
1247 static void coda_job_abort(void *priv)
1248 {
1249 struct coda_ctx *ctx = priv;
1250
1251 ctx->aborting = 1;
1252
1253 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1254 "Aborting task\n");
1255 }
1256
1257 static void coda_lock(void *m2m_priv)
1258 {
1259 struct coda_ctx *ctx = m2m_priv;
1260 struct coda_dev *pcdev = ctx->dev;
1261 mutex_lock(&pcdev->dev_mutex);
1262 }
1263
1264 static void coda_unlock(void *m2m_priv)
1265 {
1266 struct coda_ctx *ctx = m2m_priv;
1267 struct coda_dev *pcdev = ctx->dev;
1268 mutex_unlock(&pcdev->dev_mutex);
1269 }
1270
1271 static struct v4l2_m2m_ops coda_m2m_ops = {
1272 .device_run = coda_device_run,
1273 .job_ready = coda_job_ready,
1274 .job_abort = coda_job_abort,
1275 .lock = coda_lock,
1276 .unlock = coda_unlock,
1277 };
1278
1279 static void set_default_params(struct coda_ctx *ctx)
1280 {
1281 int max_w;
1282 int max_h;
1283
1284 ctx->codec = &ctx->dev->devtype->codecs[0];
1285 max_w = ctx->codec->max_w;
1286 max_h = ctx->codec->max_h;
1287
1288 ctx->params.codec_mode = CODA_MODE_INVALID;
1289 ctx->colorspace = V4L2_COLORSPACE_REC709;
1290 ctx->params.framerate = 30;
1291 ctx->aborting = 0;
1292
1293 /* Default formats for output and input queues */
1294 ctx->q_data[V4L2_M2M_SRC].fourcc = ctx->codec->src_fourcc;
1295 ctx->q_data[V4L2_M2M_DST].fourcc = ctx->codec->dst_fourcc;
1296 ctx->q_data[V4L2_M2M_SRC].width = max_w;
1297 ctx->q_data[V4L2_M2M_SRC].height = max_h;
1298 ctx->q_data[V4L2_M2M_SRC].sizeimage = (max_w * max_h * 3) / 2;
1299 ctx->q_data[V4L2_M2M_DST].width = max_w;
1300 ctx->q_data[V4L2_M2M_DST].height = max_h;
1301 ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
1302 }
1303
1304 /*
1305 * Queue operations
1306 */
1307 static int coda_queue_setup(struct vb2_queue *vq,
1308 const struct v4l2_format *fmt,
1309 unsigned int *nbuffers, unsigned int *nplanes,
1310 unsigned int sizes[], void *alloc_ctxs[])
1311 {
1312 struct coda_ctx *ctx = vb2_get_drv_priv(vq);
1313 struct coda_q_data *q_data;
1314 unsigned int size;
1315
1316 q_data = get_q_data(ctx, vq->type);
1317 size = q_data->sizeimage;
1318
1319 *nplanes = 1;
1320 sizes[0] = size;
1321
1322 alloc_ctxs[0] = ctx->dev->alloc_ctx;
1323
1324 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1325 "get %d buffer(s) of size %d each.\n", *nbuffers, size);
1326
1327 return 0;
1328 }
1329
1330 static int coda_buf_prepare(struct vb2_buffer *vb)
1331 {
1332 struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
1333 struct coda_q_data *q_data;
1334
1335 q_data = get_q_data(ctx, vb->vb2_queue->type);
1336
1337 if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
1338 v4l2_warn(&ctx->dev->v4l2_dev,
1339 "%s data will not fit into plane (%lu < %lu)\n",
1340 __func__, vb2_plane_size(vb, 0),
1341 (long)q_data->sizeimage);
1342 return -EINVAL;
1343 }
1344
1345 return 0;
1346 }
1347
1348 static void coda_buf_queue(struct vb2_buffer *vb)
1349 {
1350 struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
1351 struct coda_q_data *q_data;
1352
1353 q_data = get_q_data(ctx, vb->vb2_queue->type);
1354
1355 /*
1356 * In the decoder case, immediately try to copy the buffer into the
1357 * bitstream ringbuffer and mark it as ready to be dequeued.
1358 */
1359 if (q_data->fourcc == V4L2_PIX_FMT_H264 &&
1360 vb->vb2_queue->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1361 /*
1362 * For backwards compatiblity, queuing an empty buffer marks
1363 * the stream end
1364 */
1365 if (vb2_get_plane_payload(vb, 0) == 0)
1366 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
1367 mutex_lock(&ctx->bitstream_mutex);
1368 v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
1369 coda_fill_bitstream(ctx);
1370 mutex_unlock(&ctx->bitstream_mutex);
1371 } else {
1372 v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
1373 }
1374 }
1375
1376 static void coda_wait_prepare(struct vb2_queue *q)
1377 {
1378 struct coda_ctx *ctx = vb2_get_drv_priv(q);
1379 coda_unlock(ctx);
1380 }
1381
1382 static void coda_wait_finish(struct vb2_queue *q)
1383 {
1384 struct coda_ctx *ctx = vb2_get_drv_priv(q);
1385 coda_lock(ctx);
1386 }
1387
1388 static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
1389 {
1390 struct coda_dev *dev = ctx->dev;
1391 u32 *p = ctx->parabuf.vaddr;
1392
1393 if (dev->devtype->product == CODA_DX6)
1394 p[index] = value;
1395 else
1396 p[index ^ 1] = value;
1397 }
1398
1399 static int coda_alloc_aux_buf(struct coda_dev *dev,
1400 struct coda_aux_buf *buf, size_t size)
1401 {
1402 buf->vaddr = dma_alloc_coherent(&dev->plat_dev->dev, size, &buf->paddr,
1403 GFP_KERNEL);
1404 if (!buf->vaddr)
1405 return -ENOMEM;
1406
1407 buf->size = size;
1408
1409 return 0;
1410 }
1411
1412 static inline int coda_alloc_context_buf(struct coda_ctx *ctx,
1413 struct coda_aux_buf *buf, size_t size)
1414 {
1415 return coda_alloc_aux_buf(ctx->dev, buf, size);
1416 }
1417
1418 static void coda_free_aux_buf(struct coda_dev *dev,
1419 struct coda_aux_buf *buf)
1420 {
1421 if (buf->vaddr) {
1422 dma_free_coherent(&dev->plat_dev->dev, buf->size,
1423 buf->vaddr, buf->paddr);
1424 buf->vaddr = NULL;
1425 buf->size = 0;
1426 }
1427 }
1428
1429 static void coda_free_framebuffers(struct coda_ctx *ctx)
1430 {
1431 int i;
1432
1433 for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
1434 coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]);
1435 }
1436
1437 static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
1438 {
1439 struct coda_dev *dev = ctx->dev;
1440 int height = q_data->height;
1441 dma_addr_t paddr;
1442 int ysize;
1443 int ret;
1444 int i;
1445
1446 if (ctx->codec && ctx->codec->src_fourcc == V4L2_PIX_FMT_H264)
1447 height = round_up(height, 16);
1448 ysize = round_up(q_data->width, 8) * height;
1449
1450 /* Allocate frame buffers */
1451 for (i = 0; i < ctx->num_internal_frames; i++) {
1452 size_t size;
1453
1454 size = q_data->sizeimage;
1455 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
1456 dev->devtype->product != CODA_DX6)
1457 ctx->internal_frames[i].size += ysize/4;
1458 ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i], size);
1459 if (ret < 0) {
1460 coda_free_framebuffers(ctx);
1461 return ret;
1462 }
1463 }
1464
1465 /* Register frame buffers in the parameter buffer */
1466 for (i = 0; i < ctx->num_internal_frames; i++) {
1467 paddr = ctx->internal_frames[i].paddr;
1468 coda_parabuf_write(ctx, i * 3 + 0, paddr); /* Y */
1469 coda_parabuf_write(ctx, i * 3 + 1, paddr + ysize); /* Cb */
1470 coda_parabuf_write(ctx, i * 3 + 2, paddr + ysize + ysize/4); /* Cr */
1471
1472 /* mvcol buffer for h.264 */
1473 if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
1474 dev->devtype->product != CODA_DX6)
1475 coda_parabuf_write(ctx, 96 + i,
1476 ctx->internal_frames[i].paddr +
1477 ysize + ysize/4 + ysize/4);
1478 }
1479
1480 /* mvcol buffer for mpeg4 */
1481 if ((dev->devtype->product != CODA_DX6) &&
1482 (ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4))
1483 coda_parabuf_write(ctx, 97, ctx->internal_frames[i].paddr +
1484 ysize + ysize/4 + ysize/4);
1485
1486 return 0;
1487 }
1488
1489 static int coda_h264_padding(int size, char *p)
1490 {
1491 int nal_size;
1492 int diff;
1493
1494 diff = size - (size & ~0x7);
1495 if (diff == 0)
1496 return 0;
1497
1498 nal_size = coda_filler_size[diff];
1499 memcpy(p, coda_filler_nal, nal_size);
1500
1501 /* Add rbsp stop bit and trailing at the end */
1502 *(p + nal_size - 1) = 0x80;
1503
1504 return nal_size;
1505 }
1506
1507 static void coda_setup_iram(struct coda_ctx *ctx)
1508 {
1509 struct coda_iram_info *iram_info = &ctx->iram_info;
1510 struct coda_dev *dev = ctx->dev;
1511 int ipacdc_size;
1512 int bitram_size;
1513 int dbk_size;
1514 int ovl_size;
1515 int mb_width;
1516 int me_size;
1517 int size;
1518
1519 memset(iram_info, 0, sizeof(*iram_info));
1520 size = dev->iram_size;
1521
1522 if (dev->devtype->product == CODA_DX6)
1523 return;
1524
1525 if (ctx->inst_type == CODA_INST_ENCODER) {
1526 struct coda_q_data *q_data_src;
1527
1528 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1529 mb_width = DIV_ROUND_UP(q_data_src->width, 16);
1530
1531 /* Prioritize in case IRAM is too small for everything */
1532 me_size = round_up(round_up(q_data_src->width, 16) * 36 + 2048,
1533 1024);
1534 iram_info->search_ram_size = me_size;
1535 if (size >= iram_info->search_ram_size) {
1536 if (dev->devtype->product == CODA_7541)
1537 iram_info->axi_sram_use |= CODA7_USE_HOST_ME_ENABLE;
1538 iram_info->search_ram_paddr = dev->iram_paddr;
1539 size -= iram_info->search_ram_size;
1540 } else {
1541 pr_err("IRAM is smaller than the search ram size\n");
1542 goto out;
1543 }
1544
1545 /* Only H.264BP and H.263P3 are considered */
1546 dbk_size = round_up(128 * mb_width, 1024);
1547 if (size >= dbk_size) {
1548 iram_info->axi_sram_use |= CODA7_USE_HOST_DBK_ENABLE;
1549 iram_info->buf_dbk_y_use = dev->iram_paddr +
1550 iram_info->search_ram_size;
1551 iram_info->buf_dbk_c_use = iram_info->buf_dbk_y_use +
1552 dbk_size / 2;
1553 size -= dbk_size;
1554 } else {
1555 goto out;
1556 }
1557
1558 bitram_size = round_up(128 * mb_width, 1024);
1559 if (size >= bitram_size) {
1560 iram_info->axi_sram_use |= CODA7_USE_HOST_BIT_ENABLE;
1561 iram_info->buf_bit_use = iram_info->buf_dbk_c_use +
1562 dbk_size / 2;
1563 size -= bitram_size;
1564 } else {
1565 goto out;
1566 }
1567
1568 ipacdc_size = round_up(128 * mb_width, 1024);
1569 if (size >= ipacdc_size) {
1570 iram_info->axi_sram_use |= CODA7_USE_HOST_IP_ENABLE;
1571 iram_info->buf_ip_ac_dc_use = iram_info->buf_bit_use +
1572 bitram_size;
1573 size -= ipacdc_size;
1574 }
1575
1576 /* OVL and BTP disabled for encoder */
1577 } else if (ctx->inst_type == CODA_INST_DECODER) {
1578 struct coda_q_data *q_data_dst;
1579 int mb_height;
1580
1581 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1582 mb_width = DIV_ROUND_UP(q_data_dst->width, 16);
1583 mb_height = DIV_ROUND_UP(q_data_dst->height, 16);
1584
1585 dbk_size = round_up(256 * mb_width, 1024);
1586 if (size >= dbk_size) {
1587 iram_info->axi_sram_use |= CODA7_USE_HOST_DBK_ENABLE;
1588 iram_info->buf_dbk_y_use = dev->iram_paddr;
1589 iram_info->buf_dbk_c_use = dev->iram_paddr +
1590 dbk_size / 2;
1591 size -= dbk_size;
1592 } else {
1593 goto out;
1594 }
1595
1596 bitram_size = round_up(128 * mb_width, 1024);
1597 if (size >= bitram_size) {
1598 iram_info->axi_sram_use |= CODA7_USE_HOST_BIT_ENABLE;
1599 iram_info->buf_bit_use = iram_info->buf_dbk_c_use +
1600 dbk_size / 2;
1601 size -= bitram_size;
1602 } else {
1603 goto out;
1604 }
1605
1606 ipacdc_size = round_up(128 * mb_width, 1024);
1607 if (size >= ipacdc_size) {
1608 iram_info->axi_sram_use |= CODA7_USE_HOST_IP_ENABLE;
1609 iram_info->buf_ip_ac_dc_use = iram_info->buf_bit_use +
1610 bitram_size;
1611 size -= ipacdc_size;
1612 } else {
1613 goto out;
1614 }
1615
1616 ovl_size = round_up(80 * mb_width, 1024);
1617 }
1618
1619 out:
1620 switch (dev->devtype->product) {
1621 case CODA_DX6:
1622 break;
1623 case CODA_7541:
1624 /* i.MX53 uses secondary AXI for IRAM access */
1625 if (iram_info->axi_sram_use & CODA7_USE_HOST_BIT_ENABLE)
1626 iram_info->axi_sram_use |= CODA7_USE_BIT_ENABLE;
1627 if (iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE)
1628 iram_info->axi_sram_use |= CODA7_USE_IP_ENABLE;
1629 if (iram_info->axi_sram_use & CODA7_USE_HOST_DBK_ENABLE)
1630 iram_info->axi_sram_use |= CODA7_USE_DBK_ENABLE;
1631 if (iram_info->axi_sram_use & CODA7_USE_HOST_OVL_ENABLE)
1632 iram_info->axi_sram_use |= CODA7_USE_OVL_ENABLE;
1633 if (iram_info->axi_sram_use & CODA7_USE_HOST_ME_ENABLE)
1634 iram_info->axi_sram_use |= CODA7_USE_ME_ENABLE;
1635 }
1636
1637 if (!(iram_info->axi_sram_use & CODA7_USE_HOST_IP_ENABLE))
1638 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1639 "IRAM smaller than needed\n");
1640
1641 if (dev->devtype->product == CODA_7541) {
1642 /* TODO - Enabling these causes picture errors on CODA7541 */
1643 if (ctx->inst_type == CODA_INST_DECODER) {
1644 /* fw 1.4.50 */
1645 iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
1646 CODA7_USE_IP_ENABLE);
1647 } else {
1648 /* fw 13.4.29 */
1649 iram_info->axi_sram_use &= ~(CODA7_USE_HOST_IP_ENABLE |
1650 CODA7_USE_HOST_DBK_ENABLE |
1651 CODA7_USE_IP_ENABLE |
1652 CODA7_USE_DBK_ENABLE);
1653 }
1654 }
1655 }
1656
1657 static void coda_free_context_buffers(struct coda_ctx *ctx)
1658 {
1659 struct coda_dev *dev = ctx->dev;
1660
1661 coda_free_aux_buf(dev, &ctx->slicebuf);
1662 coda_free_aux_buf(dev, &ctx->psbuf);
1663 if (dev->devtype->product != CODA_DX6)
1664 coda_free_aux_buf(dev, &ctx->workbuf);
1665 }
1666
1667 static int coda_alloc_context_buffers(struct coda_ctx *ctx,
1668 struct coda_q_data *q_data)
1669 {
1670 struct coda_dev *dev = ctx->dev;
1671 size_t size;
1672 int ret;
1673
1674 switch (dev->devtype->product) {
1675 case CODA_7541:
1676 size = CODA7_WORK_BUF_SIZE;
1677 break;
1678 default:
1679 return 0;
1680 }
1681
1682 if (ctx->psbuf.vaddr) {
1683 v4l2_err(&dev->v4l2_dev, "psmembuf still allocated\n");
1684 return -EBUSY;
1685 }
1686 if (ctx->slicebuf.vaddr) {
1687 v4l2_err(&dev->v4l2_dev, "slicebuf still allocated\n");
1688 return -EBUSY;
1689 }
1690 if (ctx->workbuf.vaddr) {
1691 v4l2_err(&dev->v4l2_dev, "context buffer still allocated\n");
1692 ret = -EBUSY;
1693 return -ENOMEM;
1694 }
1695
1696 if (q_data->fourcc == V4L2_PIX_FMT_H264) {
1697 /* worst case slice size */
1698 size = (DIV_ROUND_UP(q_data->width, 16) *
1699 DIV_ROUND_UP(q_data->height, 16)) * 3200 / 8 + 512;
1700 ret = coda_alloc_context_buf(ctx, &ctx->slicebuf, size);
1701 if (ret < 0) {
1702 v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte slice buffer",
1703 ctx->slicebuf.size);
1704 return ret;
1705 }
1706 }
1707
1708 if (dev->devtype->product == CODA_7541) {
1709 ret = coda_alloc_context_buf(ctx, &ctx->psbuf, CODA7_PS_BUF_SIZE);
1710 if (ret < 0) {
1711 v4l2_err(&dev->v4l2_dev, "failed to allocate psmem buffer");
1712 goto err;
1713 }
1714 }
1715
1716 ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size);
1717 if (ret < 0) {
1718 v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte context buffer",
1719 ctx->workbuf.size);
1720 goto err;
1721 }
1722
1723 return 0;
1724
1725 err:
1726 coda_free_context_buffers(ctx);
1727 return ret;
1728 }
1729
1730 static int coda_start_decoding(struct coda_ctx *ctx)
1731 {
1732 struct coda_q_data *q_data_src, *q_data_dst;
1733 u32 bitstream_buf, bitstream_size;
1734 struct coda_dev *dev = ctx->dev;
1735 int width, height;
1736 u32 src_fourcc;
1737 u32 val;
1738 int ret;
1739
1740 /* Start decoding */
1741 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1742 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1743 bitstream_buf = ctx->bitstream.paddr;
1744 bitstream_size = ctx->bitstream.size;
1745 src_fourcc = q_data_src->fourcc;
1746
1747 coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1748
1749 /* Update coda bitstream read and write pointers from kfifo */
1750 coda_kfifo_sync_to_device_full(ctx);
1751
1752 ctx->display_idx = -1;
1753 ctx->frm_dis_flg = 0;
1754 coda_write(dev, 0, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
1755
1756 coda_write(dev, CODA_BIT_DEC_SEQ_INIT_ESCAPE,
1757 CODA_REG_BIT_BIT_STREAM_PARAM);
1758
1759 coda_write(dev, bitstream_buf, CODA_CMD_DEC_SEQ_BB_START);
1760 coda_write(dev, bitstream_size / 1024, CODA_CMD_DEC_SEQ_BB_SIZE);
1761 val = 0;
1762 if (dev->devtype->product == CODA_7541)
1763 val |= CODA_REORDER_ENABLE;
1764 coda_write(dev, val, CODA_CMD_DEC_SEQ_OPTION);
1765
1766 ctx->params.codec_mode = ctx->codec->mode;
1767 ctx->params.codec_mode_aux = 0;
1768 if (src_fourcc == V4L2_PIX_FMT_H264) {
1769 if (dev->devtype->product == CODA_7541) {
1770 coda_write(dev, ctx->psbuf.paddr,
1771 CODA_CMD_DEC_SEQ_PS_BB_START);
1772 coda_write(dev, (CODA7_PS_BUF_SIZE / 1024),
1773 CODA_CMD_DEC_SEQ_PS_BB_SIZE);
1774 }
1775 }
1776
1777 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1778 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1779 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1780 return -ETIMEDOUT;
1781 }
1782
1783 /* Update kfifo out pointer from coda bitstream read pointer */
1784 coda_kfifo_sync_from_device(ctx);
1785
1786 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
1787
1788 if (coda_read(dev, CODA_RET_DEC_SEQ_SUCCESS) == 0) {
1789 v4l2_err(&dev->v4l2_dev,
1790 "CODA_COMMAND_SEQ_INIT failed, error code = %d\n",
1791 coda_read(dev, CODA_RET_DEC_SEQ_ERR_REASON));
1792 return -EAGAIN;
1793 }
1794
1795 val = coda_read(dev, CODA_RET_DEC_SEQ_SRC_SIZE);
1796 if (dev->devtype->product == CODA_DX6) {
1797 width = (val >> CODADX6_PICWIDTH_OFFSET) & CODADX6_PICWIDTH_MASK;
1798 height = val & CODADX6_PICHEIGHT_MASK;
1799 } else {
1800 width = (val >> CODA7_PICWIDTH_OFFSET) & CODA7_PICWIDTH_MASK;
1801 height = val & CODA7_PICHEIGHT_MASK;
1802 }
1803
1804 if (width > q_data_dst->width || height > q_data_dst->height) {
1805 v4l2_err(&dev->v4l2_dev, "stream is %dx%d, not %dx%d\n",
1806 width, height, q_data_dst->width, q_data_dst->height);
1807 return -EINVAL;
1808 }
1809
1810 width = round_up(width, 16);
1811 height = round_up(height, 16);
1812
1813 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "%s instance %d now: %dx%d\n",
1814 __func__, ctx->idx, width, height);
1815
1816 ctx->num_internal_frames = coda_read(dev, CODA_RET_DEC_SEQ_FRAME_NEED) + 1;
1817 if (ctx->num_internal_frames > CODA_MAX_FRAMEBUFFERS) {
1818 v4l2_err(&dev->v4l2_dev,
1819 "not enough framebuffers to decode (%d < %d)\n",
1820 CODA_MAX_FRAMEBUFFERS, ctx->num_internal_frames);
1821 return -EINVAL;
1822 }
1823
1824 ret = coda_alloc_framebuffers(ctx, q_data_dst, src_fourcc);
1825 if (ret < 0)
1826 return ret;
1827
1828 /* Tell the decoder how many frame buffers we allocated. */
1829 coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1830 coda_write(dev, width, CODA_CMD_SET_FRAME_BUF_STRIDE);
1831
1832 if (dev->devtype->product != CODA_DX6) {
1833 /* Set secondary AXI IRAM */
1834 coda_setup_iram(ctx);
1835
1836 coda_write(dev, ctx->iram_info.buf_bit_use,
1837 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1838 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
1839 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1840 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
1841 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1842 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
1843 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1844 coda_write(dev, ctx->iram_info.buf_ovl_use,
1845 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1846 }
1847
1848 if (src_fourcc == V4L2_PIX_FMT_H264) {
1849 coda_write(dev, ctx->slicebuf.paddr,
1850 CODA_CMD_SET_FRAME_SLICE_BB_START);
1851 coda_write(dev, ctx->slicebuf.size / 1024,
1852 CODA_CMD_SET_FRAME_SLICE_BB_SIZE);
1853 }
1854
1855 if (dev->devtype->product == CODA_7541) {
1856 int max_mb_x = 1920 / 16;
1857 int max_mb_y = 1088 / 16;
1858 int max_mb_num = max_mb_x * max_mb_y;
1859 coda_write(dev, max_mb_num << 16 | max_mb_x << 8 | max_mb_y,
1860 CODA7_CMD_SET_FRAME_MAX_DEC_SIZE);
1861 }
1862
1863 if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1864 v4l2_err(&ctx->dev->v4l2_dev,
1865 "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1866 return -ETIMEDOUT;
1867 }
1868
1869 return 0;
1870 }
1871
1872 static int coda_encode_header(struct coda_ctx *ctx, struct vb2_buffer *buf,
1873 int header_code, u8 *header, int *size)
1874 {
1875 struct coda_dev *dev = ctx->dev;
1876 int ret;
1877
1878 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0),
1879 CODA_CMD_ENC_HEADER_BB_START);
1880 coda_write(dev, vb2_plane_size(buf, 0), CODA_CMD_ENC_HEADER_BB_SIZE);
1881 coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
1882 ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
1883 if (ret < 0) {
1884 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1885 return ret;
1886 }
1887 *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
1888 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1889 memcpy(header, vb2_plane_vaddr(buf, 0), *size);
1890
1891 return 0;
1892 }
1893
1894 static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
1895 {
1896 struct coda_ctx *ctx = vb2_get_drv_priv(q);
1897 struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
1898 u32 bitstream_buf, bitstream_size;
1899 struct coda_dev *dev = ctx->dev;
1900 struct coda_q_data *q_data_src, *q_data_dst;
1901 struct vb2_buffer *buf;
1902 u32 dst_fourcc;
1903 u32 value;
1904 int ret = 0;
1905
1906 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1907 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1908 if (q_data_src->fourcc == V4L2_PIX_FMT_H264) {
1909 if (coda_get_bitstream_payload(ctx) < 512)
1910 return -EINVAL;
1911 } else {
1912 if (count < 1)
1913 return -EINVAL;
1914 }
1915
1916 ctx->streamon_out = 1;
1917
1918 if (coda_format_is_yuv(q_data_src->fourcc))
1919 ctx->inst_type = CODA_INST_ENCODER;
1920 else
1921 ctx->inst_type = CODA_INST_DECODER;
1922 } else {
1923 if (count < 1)
1924 return -EINVAL;
1925
1926 ctx->streamon_cap = 1;
1927 }
1928
1929 /* Don't start the coda unless both queues are on */
1930 if (!(ctx->streamon_out & ctx->streamon_cap))
1931 return 0;
1932
1933 /* Allow decoder device_run with no new buffers queued */
1934 if (ctx->inst_type == CODA_INST_DECODER)
1935 v4l2_m2m_set_src_buffered(ctx->m2m_ctx, true);
1936
1937 ctx->gopcounter = ctx->params.gop_size - 1;
1938 buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1939 bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
1940 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1941 bitstream_size = q_data_dst->sizeimage;
1942 dst_fourcc = q_data_dst->fourcc;
1943
1944 ctx->codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
1945 q_data_dst->fourcc);
1946 if (!ctx->codec) {
1947 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
1948 return -EINVAL;
1949 }
1950
1951 /* Allocate per-instance buffers */
1952 ret = coda_alloc_context_buffers(ctx, q_data_src);
1953 if (ret < 0)
1954 return ret;
1955
1956 if (ctx->inst_type == CODA_INST_DECODER) {
1957 mutex_lock(&dev->coda_mutex);
1958 ret = coda_start_decoding(ctx);
1959 mutex_unlock(&dev->coda_mutex);
1960 if (ret == -EAGAIN) {
1961 return 0;
1962 } else if (ret < 0) {
1963 return ret;
1964 } else {
1965 ctx->initialized = 1;
1966 return 0;
1967 }
1968 }
1969
1970 if (!coda_is_initialized(dev)) {
1971 v4l2_err(v4l2_dev, "coda is not initialized.\n");
1972 return -EFAULT;
1973 }
1974
1975 mutex_lock(&dev->coda_mutex);
1976
1977 coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1978 coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
1979 coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
1980 switch (dev->devtype->product) {
1981 case CODA_DX6:
1982 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
1983 CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1984 break;
1985 default:
1986 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
1987 CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1988 }
1989
1990 if (dev->devtype->product == CODA_DX6) {
1991 /* Configure the coda */
1992 coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
1993 }
1994
1995 /* Could set rotation here if needed */
1996 switch (dev->devtype->product) {
1997 case CODA_DX6:
1998 value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
1999 value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
2000 break;
2001 default:
2002 value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
2003 value |= (q_data_src->height & CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
2004 }
2005 coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
2006 coda_write(dev, ctx->params.framerate,
2007 CODA_CMD_ENC_SEQ_SRC_F_RATE);
2008
2009 ctx->params.codec_mode = ctx->codec->mode;
2010 switch (dst_fourcc) {
2011 case V4L2_PIX_FMT_MPEG4:
2012 coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
2013 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
2014 break;
2015 case V4L2_PIX_FMT_H264:
2016 coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
2017 coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
2018 break;
2019 default:
2020 v4l2_err(v4l2_dev,
2021 "dst format (0x%08x) invalid.\n", dst_fourcc);
2022 ret = -EINVAL;
2023 goto out;
2024 }
2025
2026 switch (ctx->params.slice_mode) {
2027 case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
2028 value = 0;
2029 break;
2030 case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
2031 value = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
2032 value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
2033 value |= 1 & CODA_SLICING_MODE_MASK;
2034 break;
2035 case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
2036 value = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
2037 value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
2038 value |= 1 & CODA_SLICING_MODE_MASK;
2039 break;
2040 }
2041 coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
2042 value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
2043 coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
2044
2045 if (ctx->params.bitrate) {
2046 /* Rate control enabled */
2047 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
2048 value |= 1 & CODA_RATECONTROL_ENABLE_MASK;
2049 } else {
2050 value = 0;
2051 }
2052 coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
2053
2054 coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
2055 coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
2056
2057 coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
2058 coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
2059
2060 /* set default gamma */
2061 value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
2062 coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
2063
2064 if (CODA_DEFAULT_GAMMA > 0) {
2065 if (dev->devtype->product == CODA_DX6)
2066 value = 1 << CODADX6_OPTION_GAMMA_OFFSET;
2067 else
2068 value = 1 << CODA7_OPTION_GAMMA_OFFSET;
2069 } else {
2070 value = 0;
2071 }
2072 coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
2073
2074 coda_setup_iram(ctx);
2075
2076 if (dst_fourcc == V4L2_PIX_FMT_H264) {
2077 value = (FMO_SLICE_SAVE_BUF_SIZE << 7);
2078 value |= (0 & CODA_FMOPARAM_TYPE_MASK) << CODA_FMOPARAM_TYPE_OFFSET;
2079 value |= 0 & CODA_FMOPARAM_SLICENUM_MASK;
2080 if (dev->devtype->product == CODA_DX6) {
2081 coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
2082 } else {
2083 coda_write(dev, ctx->iram_info.search_ram_paddr,
2084 CODA7_CMD_ENC_SEQ_SEARCH_BASE);
2085 coda_write(dev, ctx->iram_info.search_ram_size,
2086 CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
2087 }
2088 }
2089
2090 ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
2091 if (ret < 0) {
2092 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
2093 goto out;
2094 }
2095
2096 if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
2097 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
2098 ret = -EFAULT;
2099 goto out;
2100 }
2101
2102 ctx->num_internal_frames = 2;
2103 ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
2104 if (ret < 0) {
2105 v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
2106 goto out;
2107 }
2108
2109 coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
2110 coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
2111 if (dev->devtype->product == CODA_7541)
2112 coda_write(dev, round_up(q_data_src->width, 8),
2113 CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
2114 if (dev->devtype->product != CODA_DX6) {
2115 coda_write(dev, ctx->iram_info.buf_bit_use,
2116 CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
2117 coda_write(dev, ctx->iram_info.buf_ip_ac_dc_use,
2118 CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
2119 coda_write(dev, ctx->iram_info.buf_dbk_y_use,
2120 CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
2121 coda_write(dev, ctx->iram_info.buf_dbk_c_use,
2122 CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
2123 coda_write(dev, ctx->iram_info.buf_ovl_use,
2124 CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
2125 }
2126 ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
2127 if (ret < 0) {
2128 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
2129 goto out;
2130 }
2131
2132 /* Save stream headers */
2133 buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
2134 switch (dst_fourcc) {
2135 case V4L2_PIX_FMT_H264:
2136 /*
2137 * Get SPS in the first frame and copy it to an
2138 * intermediate buffer.
2139 */
2140 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
2141 &ctx->vpu_header[0][0],
2142 &ctx->vpu_header_size[0]);
2143 if (ret < 0)
2144 goto out;
2145
2146 /*
2147 * Get PPS in the first frame and copy it to an
2148 * intermediate buffer.
2149 */
2150 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
2151 &ctx->vpu_header[1][0],
2152 &ctx->vpu_header_size[1]);
2153 if (ret < 0)
2154 goto out;
2155
2156 /*
2157 * Length of H.264 headers is variable and thus it might not be
2158 * aligned for the coda to append the encoded frame. In that is
2159 * the case a filler NAL must be added to header 2.
2160 */
2161 ctx->vpu_header_size[2] = coda_h264_padding(
2162 (ctx->vpu_header_size[0] +
2163 ctx->vpu_header_size[1]),
2164 ctx->vpu_header[2]);
2165 break;
2166 case V4L2_PIX_FMT_MPEG4:
2167 /*
2168 * Get VOS in the first frame and copy it to an
2169 * intermediate buffer
2170 */
2171 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
2172 &ctx->vpu_header[0][0],
2173 &ctx->vpu_header_size[0]);
2174 if (ret < 0)
2175 goto out;
2176
2177 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
2178 &ctx->vpu_header[1][0],
2179 &ctx->vpu_header_size[1]);
2180 if (ret < 0)
2181 goto out;
2182
2183 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
2184 &ctx->vpu_header[2][0],
2185 &ctx->vpu_header_size[2]);
2186 if (ret < 0)
2187 goto out;
2188 break;
2189 default:
2190 /* No more formats need to save headers at the moment */
2191 break;
2192 }
2193
2194 out:
2195 mutex_unlock(&dev->coda_mutex);
2196 return ret;
2197 }
2198
2199 static int coda_stop_streaming(struct vb2_queue *q)
2200 {
2201 struct coda_ctx *ctx = vb2_get_drv_priv(q);
2202 struct coda_dev *dev = ctx->dev;
2203
2204 if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
2205 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2206 "%s: output\n", __func__);
2207 ctx->streamon_out = 0;
2208
2209 ctx->bit_stream_param |= CODA_BIT_STREAM_END_FLAG;
2210
2211 ctx->isequence = 0;
2212 } else {
2213 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2214 "%s: capture\n", __func__);
2215 ctx->streamon_cap = 0;
2216
2217 ctx->osequence = 0;
2218 }
2219
2220 if (!ctx->streamon_out && !ctx->streamon_cap) {
2221 kfifo_init(&ctx->bitstream_fifo,
2222 ctx->bitstream.vaddr, ctx->bitstream.size);
2223 ctx->runcounter = 0;
2224 }
2225
2226 return 0;
2227 }
2228
2229 static struct vb2_ops coda_qops = {
2230 .queue_setup = coda_queue_setup,
2231 .buf_prepare = coda_buf_prepare,
2232 .buf_queue = coda_buf_queue,
2233 .wait_prepare = coda_wait_prepare,
2234 .wait_finish = coda_wait_finish,
2235 .start_streaming = coda_start_streaming,
2236 .stop_streaming = coda_stop_streaming,
2237 };
2238
2239 static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
2240 {
2241 struct coda_ctx *ctx =
2242 container_of(ctrl->handler, struct coda_ctx, ctrls);
2243
2244 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2245 "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
2246
2247 switch (ctrl->id) {
2248 case V4L2_CID_HFLIP:
2249 if (ctrl->val)
2250 ctx->params.rot_mode |= CODA_MIR_HOR;
2251 else
2252 ctx->params.rot_mode &= ~CODA_MIR_HOR;
2253 break;
2254 case V4L2_CID_VFLIP:
2255 if (ctrl->val)
2256 ctx->params.rot_mode |= CODA_MIR_VER;
2257 else
2258 ctx->params.rot_mode &= ~CODA_MIR_VER;
2259 break;
2260 case V4L2_CID_MPEG_VIDEO_BITRATE:
2261 ctx->params.bitrate = ctrl->val / 1000;
2262 break;
2263 case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
2264 ctx->params.gop_size = ctrl->val;
2265 break;
2266 case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
2267 ctx->params.h264_intra_qp = ctrl->val;
2268 break;
2269 case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
2270 ctx->params.h264_inter_qp = ctrl->val;
2271 break;
2272 case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
2273 ctx->params.mpeg4_intra_qp = ctrl->val;
2274 break;
2275 case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
2276 ctx->params.mpeg4_inter_qp = ctrl->val;
2277 break;
2278 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
2279 ctx->params.slice_mode = ctrl->val;
2280 break;
2281 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
2282 ctx->params.slice_max_mb = ctrl->val;
2283 break;
2284 case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
2285 ctx->params.slice_max_bits = ctrl->val * 8;
2286 break;
2287 case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
2288 break;
2289 default:
2290 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2291 "Invalid control, id=%d, val=%d\n",
2292 ctrl->id, ctrl->val);
2293 return -EINVAL;
2294 }
2295
2296 return 0;
2297 }
2298
2299 static struct v4l2_ctrl_ops coda_ctrl_ops = {
2300 .s_ctrl = coda_s_ctrl,
2301 };
2302
2303 static int coda_ctrls_setup(struct coda_ctx *ctx)
2304 {
2305 v4l2_ctrl_handler_init(&ctx->ctrls, 9);
2306
2307 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2308 V4L2_CID_HFLIP, 0, 1, 1, 0);
2309 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2310 V4L2_CID_VFLIP, 0, 1, 1, 0);
2311 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2312 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
2313 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2314 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
2315 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2316 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
2317 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2318 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
2319 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2320 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
2321 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2322 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
2323 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
2324 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
2325 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, 0x0,
2326 V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE);
2327 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2328 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
2329 v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
2330 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, 1, 0x3fffffff, 1, 500);
2331 v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
2332 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
2333 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
2334 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
2335 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
2336
2337 if (ctx->ctrls.error) {
2338 v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
2339 ctx->ctrls.error);
2340 return -EINVAL;
2341 }
2342
2343 return v4l2_ctrl_handler_setup(&ctx->ctrls);
2344 }
2345
2346 static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
2347 struct vb2_queue *dst_vq)
2348 {
2349 struct coda_ctx *ctx = priv;
2350 int ret;
2351
2352 src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
2353 src_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
2354 src_vq->drv_priv = ctx;
2355 src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
2356 src_vq->ops = &coda_qops;
2357 src_vq->mem_ops = &vb2_dma_contig_memops;
2358 src_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
2359
2360 ret = vb2_queue_init(src_vq);
2361 if (ret)
2362 return ret;
2363
2364 dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2365 dst_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
2366 dst_vq->drv_priv = ctx;
2367 dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
2368 dst_vq->ops = &coda_qops;
2369 dst_vq->mem_ops = &vb2_dma_contig_memops;
2370 dst_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
2371
2372 return vb2_queue_init(dst_vq);
2373 }
2374
2375 static int coda_next_free_instance(struct coda_dev *dev)
2376 {
2377 int idx = ffz(dev->instance_mask);
2378
2379 if ((idx < 0) ||
2380 (dev->devtype->product == CODA_DX6 && idx > CODADX6_MAX_INSTANCES))
2381 return -EBUSY;
2382
2383 return idx;
2384 }
2385
2386 static int coda_open(struct file *file)
2387 {
2388 struct coda_dev *dev = video_drvdata(file);
2389 struct coda_ctx *ctx = NULL;
2390 int ret;
2391 int idx;
2392
2393 ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
2394 if (!ctx)
2395 return -ENOMEM;
2396
2397 idx = coda_next_free_instance(dev);
2398 if (idx < 0) {
2399 ret = idx;
2400 goto err_coda_max;
2401 }
2402 set_bit(idx, &dev->instance_mask);
2403
2404 INIT_WORK(&ctx->skip_run, coda_skip_run);
2405 v4l2_fh_init(&ctx->fh, video_devdata(file));
2406 file->private_data = &ctx->fh;
2407 v4l2_fh_add(&ctx->fh);
2408 ctx->dev = dev;
2409 ctx->idx = idx;
2410 switch (dev->devtype->product) {
2411 case CODA_7541:
2412 ctx->reg_idx = 0;
2413 break;
2414 default:
2415 ctx->reg_idx = idx;
2416 }
2417
2418 ret = clk_prepare_enable(dev->clk_per);
2419 if (ret)
2420 goto err_clk_per;
2421
2422 ret = clk_prepare_enable(dev->clk_ahb);
2423 if (ret)
2424 goto err_clk_ahb;
2425
2426 set_default_params(ctx);
2427 ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
2428 &coda_queue_init);
2429 if (IS_ERR(ctx->m2m_ctx)) {
2430 ret = PTR_ERR(ctx->m2m_ctx);
2431
2432 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
2433 __func__, ret);
2434 goto err_ctx_init;
2435 }
2436 ret = coda_ctrls_setup(ctx);
2437 if (ret) {
2438 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
2439 goto err_ctrls_setup;
2440 }
2441
2442 ctx->fh.ctrl_handler = &ctx->ctrls;
2443
2444 ret = coda_alloc_context_buf(ctx, &ctx->parabuf, CODA_PARA_BUF_SIZE);
2445 if (ret < 0) {
2446 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
2447 goto err_dma_alloc;
2448 }
2449
2450 ctx->bitstream.size = CODA_MAX_FRAME_SIZE;
2451 ctx->bitstream.vaddr = dma_alloc_writecombine(&dev->plat_dev->dev,
2452 ctx->bitstream.size, &ctx->bitstream.paddr, GFP_KERNEL);
2453 if (!ctx->bitstream.vaddr) {
2454 v4l2_err(&dev->v4l2_dev, "failed to allocate bitstream ringbuffer");
2455 ret = -ENOMEM;
2456 goto err_dma_writecombine;
2457 }
2458 kfifo_init(&ctx->bitstream_fifo,
2459 ctx->bitstream.vaddr, ctx->bitstream.size);
2460 mutex_init(&ctx->bitstream_mutex);
2461 mutex_init(&ctx->buffer_mutex);
2462
2463 coda_lock(ctx);
2464 list_add(&ctx->list, &dev->instances);
2465 coda_unlock(ctx);
2466
2467 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
2468 ctx->idx, ctx);
2469
2470 return 0;
2471
2472 err_dma_writecombine:
2473 coda_free_context_buffers(ctx);
2474 if (ctx->dev->devtype->product == CODA_DX6)
2475 coda_free_aux_buf(dev, &ctx->workbuf);
2476 coda_free_aux_buf(dev, &ctx->parabuf);
2477 err_dma_alloc:
2478 v4l2_ctrl_handler_free(&ctx->ctrls);
2479 err_ctrls_setup:
2480 v4l2_m2m_ctx_release(ctx->m2m_ctx);
2481 err_ctx_init:
2482 clk_disable_unprepare(dev->clk_ahb);
2483 err_clk_ahb:
2484 clk_disable_unprepare(dev->clk_per);
2485 err_clk_per:
2486 v4l2_fh_del(&ctx->fh);
2487 v4l2_fh_exit(&ctx->fh);
2488 clear_bit(ctx->idx, &dev->instance_mask);
2489 err_coda_max:
2490 kfree(ctx);
2491 return ret;
2492 }
2493
2494 static int coda_release(struct file *file)
2495 {
2496 struct coda_dev *dev = video_drvdata(file);
2497 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
2498
2499 v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
2500 ctx);
2501
2502 /* If this instance is running, call .job_abort and wait for it to end */
2503 v4l2_m2m_ctx_release(ctx->m2m_ctx);
2504
2505 /* In case the instance was not running, we still need to call SEQ_END */
2506 mutex_lock(&dev->coda_mutex);
2507 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2508 "%s: sent command 'SEQ_END' to coda\n", __func__);
2509 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
2510 v4l2_err(&dev->v4l2_dev,
2511 "CODA_COMMAND_SEQ_END failed\n");
2512 mutex_unlock(&dev->coda_mutex);
2513 return -ETIMEDOUT;
2514 }
2515 mutex_unlock(&dev->coda_mutex);
2516
2517 coda_free_framebuffers(ctx);
2518
2519 coda_lock(ctx);
2520 list_del(&ctx->list);
2521 coda_unlock(ctx);
2522
2523 dma_free_writecombine(&dev->plat_dev->dev, ctx->bitstream.size,
2524 ctx->bitstream.vaddr, ctx->bitstream.paddr);
2525 coda_free_context_buffers(ctx);
2526 if (ctx->dev->devtype->product == CODA_DX6)
2527 coda_free_aux_buf(dev, &ctx->workbuf);
2528
2529 coda_free_aux_buf(dev, &ctx->parabuf);
2530 v4l2_ctrl_handler_free(&ctx->ctrls);
2531 clk_disable_unprepare(dev->clk_ahb);
2532 clk_disable_unprepare(dev->clk_per);
2533 v4l2_fh_del(&ctx->fh);
2534 v4l2_fh_exit(&ctx->fh);
2535 clear_bit(ctx->idx, &dev->instance_mask);
2536 kfree(ctx);
2537
2538 return 0;
2539 }
2540
2541 static unsigned int coda_poll(struct file *file,
2542 struct poll_table_struct *wait)
2543 {
2544 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
2545 int ret;
2546
2547 coda_lock(ctx);
2548 ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
2549 coda_unlock(ctx);
2550 return ret;
2551 }
2552
2553 static int coda_mmap(struct file *file, struct vm_area_struct *vma)
2554 {
2555 struct coda_ctx *ctx = fh_to_ctx(file->private_data);
2556
2557 return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
2558 }
2559
2560 static const struct v4l2_file_operations coda_fops = {
2561 .owner = THIS_MODULE,
2562 .open = coda_open,
2563 .release = coda_release,
2564 .poll = coda_poll,
2565 .unlocked_ioctl = video_ioctl2,
2566 .mmap = coda_mmap,
2567 };
2568
2569 static void coda_finish_decode(struct coda_ctx *ctx)
2570 {
2571 struct coda_dev *dev = ctx->dev;
2572 struct coda_q_data *q_data_src;
2573 struct coda_q_data *q_data_dst;
2574 struct vb2_buffer *dst_buf;
2575 int width, height;
2576 int decoded_idx;
2577 int display_idx;
2578 u32 src_fourcc;
2579 int success;
2580 u32 val;
2581
2582 dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
2583
2584 /* Update kfifo out pointer from coda bitstream read pointer */
2585 coda_kfifo_sync_from_device(ctx);
2586
2587 /*
2588 * in stream-end mode, the read pointer can overshoot the write pointer
2589 * by up to 512 bytes
2590 */
2591 if (ctx->bit_stream_param & CODA_BIT_STREAM_END_FLAG) {
2592 if (coda_get_bitstream_payload(ctx) >= 0x100000 - 512)
2593 kfifo_init(&ctx->bitstream_fifo,
2594 ctx->bitstream.vaddr, ctx->bitstream.size);
2595 }
2596
2597 q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2598 src_fourcc = q_data_src->fourcc;
2599
2600 val = coda_read(dev, CODA_RET_DEC_PIC_SUCCESS);
2601 if (val != 1)
2602 pr_err("DEC_PIC_SUCCESS = %d\n", val);
2603
2604 success = val & 0x1;
2605 if (!success)
2606 v4l2_err(&dev->v4l2_dev, "decode failed\n");
2607
2608 if (src_fourcc == V4L2_PIX_FMT_H264) {
2609 if (val & (1 << 3))
2610 v4l2_err(&dev->v4l2_dev,
2611 "insufficient PS buffer space (%d bytes)\n",
2612 ctx->psbuf.size);
2613 if (val & (1 << 2))
2614 v4l2_err(&dev->v4l2_dev,
2615 "insufficient slice buffer space (%d bytes)\n",
2616 ctx->slicebuf.size);
2617 }
2618
2619 val = coda_read(dev, CODA_RET_DEC_PIC_SIZE);
2620 width = (val >> 16) & 0xffff;
2621 height = val & 0xffff;
2622
2623 q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2624
2625 val = coda_read(dev, CODA_RET_DEC_PIC_TYPE);
2626 if ((val & 0x7) == 0) {
2627 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
2628 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
2629 } else {
2630 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
2631 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
2632 }
2633
2634 val = coda_read(dev, CODA_RET_DEC_PIC_ERR_MB);
2635 if (val > 0)
2636 v4l2_err(&dev->v4l2_dev,
2637 "errors in %d macroblocks\n", val);
2638
2639 if (dev->devtype->product == CODA_7541) {
2640 val = coda_read(dev, CODA_RET_DEC_PIC_OPTION);
2641 if (val == 0) {
2642 /* not enough bitstream data */
2643 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2644 "prescan failed: %d\n", val);
2645 ctx->prescan_failed = true;
2646 return;
2647 }
2648 }
2649
2650 ctx->frm_dis_flg = coda_read(dev, CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
2651
2652 /*
2653 * The previous display frame was copied out by the rotator,
2654 * now it can be overwritten again
2655 */
2656 if (ctx->display_idx >= 0 &&
2657 ctx->display_idx < ctx->num_internal_frames) {
2658 ctx->frm_dis_flg &= ~(1 << ctx->display_idx);
2659 coda_write(dev, ctx->frm_dis_flg,
2660 CODA_REG_BIT_FRM_DIS_FLG(ctx->reg_idx));
2661 }
2662
2663 /*
2664 * The index of the last decoded frame, not necessarily in
2665 * display order, and the index of the next display frame.
2666 * The latter could have been decoded in a previous run.
2667 */
2668 decoded_idx = coda_read(dev, CODA_RET_DEC_PIC_CUR_IDX);
2669 display_idx = coda_read(dev, CODA_RET_DEC_PIC_FRAME_IDX);
2670
2671 if (decoded_idx == -1) {
2672 /* no frame was decoded, but we might have a display frame */
2673 if (display_idx < 0 && ctx->display_idx < 0)
2674 ctx->prescan_failed = true;
2675 } else if (decoded_idx == -2) {
2676 /* no frame was decoded, we still return the remaining buffers */
2677 } else if (decoded_idx < 0 || decoded_idx >= ctx->num_internal_frames) {
2678 v4l2_err(&dev->v4l2_dev,
2679 "decoded frame index out of range: %d\n", decoded_idx);
2680 }
2681
2682 if (display_idx == -1) {
2683 /*
2684 * no more frames to be decoded, but there could still
2685 * be rotator output to dequeue
2686 */
2687 ctx->prescan_failed = true;
2688 } else if (display_idx == -3) {
2689 /* possibly prescan failure */
2690 } else if (display_idx < 0 || display_idx >= ctx->num_internal_frames) {
2691 v4l2_err(&dev->v4l2_dev,
2692 "presentation frame index out of range: %d\n",
2693 display_idx);
2694 }
2695
2696 /* If a frame was copied out, return it */
2697 if (ctx->display_idx >= 0 &&
2698 ctx->display_idx < ctx->num_internal_frames) {
2699 dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
2700 dst_buf->v4l2_buf.sequence = ctx->osequence++;
2701
2702 vb2_set_plane_payload(dst_buf, 0, width * height * 3 / 2);
2703
2704 v4l2_m2m_buf_done(dst_buf, success ? VB2_BUF_STATE_DONE :
2705 VB2_BUF_STATE_ERROR);
2706
2707 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2708 "job finished: decoding frame (%d) (%s)\n",
2709 dst_buf->v4l2_buf.sequence,
2710 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
2711 "KEYFRAME" : "PFRAME");
2712 } else {
2713 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2714 "job finished: no frame decoded\n");
2715 }
2716
2717 /* The rotator will copy the current display frame next time */
2718 ctx->display_idx = display_idx;
2719 }
2720
2721 static void coda_finish_encode(struct coda_ctx *ctx)
2722 {
2723 struct vb2_buffer *src_buf, *dst_buf;
2724 struct coda_dev *dev = ctx->dev;
2725 u32 wr_ptr, start_ptr;
2726
2727 src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
2728 dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
2729
2730 /* Get results from the coda */
2731 coda_read(dev, CODA_RET_ENC_PIC_TYPE);
2732 start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
2733 wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
2734
2735 /* Calculate bytesused field */
2736 if (dst_buf->v4l2_buf.sequence == 0) {
2737 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr +
2738 ctx->vpu_header_size[0] +
2739 ctx->vpu_header_size[1] +
2740 ctx->vpu_header_size[2]);
2741 } else {
2742 vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr);
2743 }
2744
2745 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
2746 wr_ptr - start_ptr);
2747
2748 coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
2749 coda_read(dev, CODA_RET_ENC_PIC_FLAG);
2750
2751 if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
2752 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
2753 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
2754 } else {
2755 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
2756 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
2757 }
2758
2759 dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp;
2760 dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode;
2761
2762 v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
2763 v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
2764
2765 ctx->gopcounter--;
2766 if (ctx->gopcounter < 0)
2767 ctx->gopcounter = ctx->params.gop_size - 1;
2768
2769 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2770 "job finished: encoding frame (%d) (%s)\n",
2771 dst_buf->v4l2_buf.sequence,
2772 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
2773 "KEYFRAME" : "PFRAME");
2774 }
2775
2776 static irqreturn_t coda_irq_handler(int irq, void *data)
2777 {
2778 struct coda_dev *dev = data;
2779 struct coda_ctx *ctx;
2780
2781 cancel_delayed_work(&dev->timeout);
2782
2783 /* read status register to attend the IRQ */
2784 coda_read(dev, CODA_REG_BIT_INT_STATUS);
2785 coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
2786 CODA_REG_BIT_INT_CLEAR);
2787
2788 ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
2789 if (ctx == NULL) {
2790 v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
2791 mutex_unlock(&dev->coda_mutex);
2792 return IRQ_HANDLED;
2793 }
2794
2795 if (ctx->aborting) {
2796 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2797 "task has been aborted\n");
2798 goto out;
2799 }
2800
2801 if (coda_isbusy(ctx->dev)) {
2802 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
2803 "coda is still busy!!!!\n");
2804 return IRQ_NONE;
2805 }
2806
2807 if (ctx->inst_type == CODA_INST_DECODER)
2808 coda_finish_decode(ctx);
2809 else
2810 coda_finish_encode(ctx);
2811
2812 out:
2813 if (ctx->aborting || (!ctx->streamon_cap && !ctx->streamon_out)) {
2814 v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
2815 "%s: sent command 'SEQ_END' to coda\n", __func__);
2816 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
2817 v4l2_err(&dev->v4l2_dev,
2818 "CODA_COMMAND_SEQ_END failed\n");
2819 }
2820
2821 kfifo_init(&ctx->bitstream_fifo,
2822 ctx->bitstream.vaddr, ctx->bitstream.size);
2823
2824 coda_free_framebuffers(ctx);
2825 coda_free_context_buffers(ctx);
2826 }
2827
2828 mutex_unlock(&dev->coda_mutex);
2829 mutex_unlock(&ctx->buffer_mutex);
2830
2831 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
2832
2833 return IRQ_HANDLED;
2834 }
2835
2836 static void coda_timeout(struct work_struct *work)
2837 {
2838 struct coda_ctx *ctx;
2839 struct coda_dev *dev = container_of(to_delayed_work(work),
2840 struct coda_dev, timeout);
2841
2842 dev_err(&dev->plat_dev->dev, "CODA PIC_RUN timeout, stopping all streams\n");
2843
2844 mutex_lock(&dev->dev_mutex);
2845 list_for_each_entry(ctx, &dev->instances, list) {
2846 if (mutex_is_locked(&ctx->buffer_mutex))
2847 mutex_unlock(&ctx->buffer_mutex);
2848 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
2849 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
2850 }
2851 mutex_unlock(&dev->dev_mutex);
2852
2853 mutex_unlock(&dev->coda_mutex);
2854 ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
2855 v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
2856 }
2857
2858 static u32 coda_supported_firmwares[] = {
2859 CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
2860 CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
2861 };
2862
2863 static bool coda_firmware_supported(u32 vernum)
2864 {
2865 int i;
2866
2867 for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
2868 if (vernum == coda_supported_firmwares[i])
2869 return true;
2870 return false;
2871 }
2872
2873 static char *coda_product_name(int product)
2874 {
2875 static char buf[9];
2876
2877 switch (product) {
2878 case CODA_DX6:
2879 return "CodaDx6";
2880 case CODA_7541:
2881 return "CODA7541";
2882 default:
2883 snprintf(buf, sizeof(buf), "(0x%04x)", product);
2884 return buf;
2885 }
2886 }
2887
2888 static int coda_hw_init(struct coda_dev *dev)
2889 {
2890 u16 product, major, minor, release;
2891 u32 data;
2892 u16 *p;
2893 int i, ret;
2894
2895 ret = clk_prepare_enable(dev->clk_per);
2896 if (ret)
2897 return ret;
2898
2899 ret = clk_prepare_enable(dev->clk_ahb);
2900 if (ret)
2901 goto err_clk_ahb;
2902
2903 /*
2904 * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
2905 * The 16-bit chars in the code buffer are in memory access
2906 * order, re-sort them to CODA order for register download.
2907 * Data in this SRAM survives a reboot.
2908 */
2909 p = (u16 *)dev->codebuf.vaddr;
2910 if (dev->devtype->product == CODA_DX6) {
2911 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
2912 data = CODA_DOWN_ADDRESS_SET(i) |
2913 CODA_DOWN_DATA_SET(p[i ^ 1]);
2914 coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
2915 }
2916 } else {
2917 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
2918 data = CODA_DOWN_ADDRESS_SET(i) |
2919 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
2920 3 - (i % 4)]);
2921 coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
2922 }
2923 }
2924
2925 /* Clear registers */
2926 for (i = 0; i < 64; i++)
2927 coda_write(dev, 0, CODA_REG_BIT_CODE_BUF_ADDR + i * 4);
2928
2929 /* Tell the BIT where to find everything it needs */
2930 if (dev->devtype->product == CODA_7541) {
2931 coda_write(dev, dev->tempbuf.paddr,
2932 CODA_REG_BIT_TEMP_BUF_ADDR);
2933 coda_write(dev, 0, CODA_REG_BIT_BIT_STREAM_PARAM);
2934 } else {
2935 coda_write(dev, dev->workbuf.paddr,
2936 CODA_REG_BIT_WORK_BUF_ADDR);
2937 }
2938 coda_write(dev, dev->codebuf.paddr,
2939 CODA_REG_BIT_CODE_BUF_ADDR);
2940 coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
2941
2942 /* Set default values */
2943 switch (dev->devtype->product) {
2944 case CODA_DX6:
2945 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
2946 break;
2947 default:
2948 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
2949 }
2950 coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
2951
2952 if (dev->devtype->product != CODA_DX6)
2953 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
2954
2955 coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
2956 CODA_REG_BIT_INT_ENABLE);
2957
2958 /* Reset VPU and start processor */
2959 data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
2960 data |= CODA_REG_RESET_ENABLE;
2961 coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
2962 udelay(10);
2963 data &= ~CODA_REG_RESET_ENABLE;
2964 coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
2965 coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
2966
2967 /* Load firmware */
2968 coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
2969 coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
2970 coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
2971 coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
2972 coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
2973 if (coda_wait_timeout(dev)) {
2974 clk_disable_unprepare(dev->clk_per);
2975 clk_disable_unprepare(dev->clk_ahb);
2976 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
2977 return -EIO;
2978 }
2979
2980 /* Check we are compatible with the loaded firmware */
2981 data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
2982 product = CODA_FIRMWARE_PRODUCT(data);
2983 major = CODA_FIRMWARE_MAJOR(data);
2984 minor = CODA_FIRMWARE_MINOR(data);
2985 release = CODA_FIRMWARE_RELEASE(data);
2986
2987 clk_disable_unprepare(dev->clk_per);
2988 clk_disable_unprepare(dev->clk_ahb);
2989
2990 if (product != dev->devtype->product) {
2991 v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
2992 " Version: %u.%u.%u\n",
2993 coda_product_name(dev->devtype->product),
2994 coda_product_name(product), major, minor, release);
2995 return -EINVAL;
2996 }
2997
2998 v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
2999 coda_product_name(product));
3000
3001 if (coda_firmware_supported(data)) {
3002 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
3003 major, minor, release);
3004 } else {
3005 v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
3006 "%u.%u.%u\n", major, minor, release);
3007 }
3008
3009 return 0;
3010
3011 err_clk_ahb:
3012 clk_disable_unprepare(dev->clk_per);
3013 return ret;
3014 }
3015
3016 static void coda_fw_callback(const struct firmware *fw, void *context)
3017 {
3018 struct coda_dev *dev = context;
3019 struct platform_device *pdev = dev->plat_dev;
3020 int ret;
3021
3022 if (!fw) {
3023 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
3024 return;
3025 }
3026
3027 /* allocate auxiliary per-device code buffer for the BIT processor */
3028 ret = coda_alloc_aux_buf(dev, &dev->codebuf, fw->size);
3029 if (ret < 0) {
3030 dev_err(&pdev->dev, "failed to allocate code buffer\n");
3031 return;
3032 }
3033
3034 /* Copy the whole firmware image to the code buffer */
3035 memcpy(dev->codebuf.vaddr, fw->data, fw->size);
3036 release_firmware(fw);
3037
3038 ret = coda_hw_init(dev);
3039 if (ret) {
3040 v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
3041 return;
3042 }
3043
3044 dev->vfd.fops = &coda_fops,
3045 dev->vfd.ioctl_ops = &coda_ioctl_ops;
3046 dev->vfd.release = video_device_release_empty,
3047 dev->vfd.lock = &dev->dev_mutex;
3048 dev->vfd.v4l2_dev = &dev->v4l2_dev;
3049 dev->vfd.vfl_dir = VFL_DIR_M2M;
3050 snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
3051 video_set_drvdata(&dev->vfd, dev);
3052
3053 dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
3054 if (IS_ERR(dev->alloc_ctx)) {
3055 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
3056 return;
3057 }
3058
3059 dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
3060 if (IS_ERR(dev->m2m_dev)) {
3061 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
3062 goto rel_ctx;
3063 }
3064
3065 ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
3066 if (ret) {
3067 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
3068 goto rel_m2m;
3069 }
3070 v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
3071 dev->vfd.num);
3072
3073 return;
3074
3075 rel_m2m:
3076 v4l2_m2m_release(dev->m2m_dev);
3077 rel_ctx:
3078 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
3079 }
3080
3081 static int coda_firmware_request(struct coda_dev *dev)
3082 {
3083 char *fw = dev->devtype->firmware;
3084
3085 dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
3086 coda_product_name(dev->devtype->product));
3087
3088 return request_firmware_nowait(THIS_MODULE, true,
3089 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
3090 }
3091
3092 enum coda_platform {
3093 CODA_IMX27,
3094 CODA_IMX53,
3095 };
3096
3097 static const struct coda_devtype coda_devdata[] = {
3098 [CODA_IMX27] = {
3099 .firmware = "v4l-codadx6-imx27.bin",
3100 .product = CODA_DX6,
3101 .codecs = codadx6_codecs,
3102 .num_codecs = ARRAY_SIZE(codadx6_codecs),
3103 },
3104 [CODA_IMX53] = {
3105 .firmware = "v4l-coda7541-imx53.bin",
3106 .product = CODA_7541,
3107 .codecs = coda7_codecs,
3108 .num_codecs = ARRAY_SIZE(coda7_codecs),
3109 },
3110 };
3111
3112 static struct platform_device_id coda_platform_ids[] = {
3113 { .name = "coda-imx27", .driver_data = CODA_IMX27 },
3114 { .name = "coda-imx53", .driver_data = CODA_IMX53 },
3115 { /* sentinel */ }
3116 };
3117 MODULE_DEVICE_TABLE(platform, coda_platform_ids);
3118
3119 #ifdef CONFIG_OF
3120 static const struct of_device_id coda_dt_ids[] = {
3121 { .compatible = "fsl,imx27-vpu", .data = &coda_devdata[CODA_IMX27] },
3122 { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
3123 { /* sentinel */ }
3124 };
3125 MODULE_DEVICE_TABLE(of, coda_dt_ids);
3126 #endif
3127
3128 static int coda_probe(struct platform_device *pdev)
3129 {
3130 const struct of_device_id *of_id =
3131 of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
3132 const struct platform_device_id *pdev_id;
3133 struct coda_platform_data *pdata = pdev->dev.platform_data;
3134 struct device_node *np = pdev->dev.of_node;
3135 struct gen_pool *pool;
3136 struct coda_dev *dev;
3137 struct resource *res;
3138 int ret, irq;
3139
3140 dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
3141 if (!dev) {
3142 dev_err(&pdev->dev, "Not enough memory for %s\n",
3143 CODA_NAME);
3144 return -ENOMEM;
3145 }
3146
3147 spin_lock_init(&dev->irqlock);
3148 INIT_LIST_HEAD(&dev->instances);
3149 INIT_DELAYED_WORK(&dev->timeout, coda_timeout);
3150
3151 dev->plat_dev = pdev;
3152 dev->clk_per = devm_clk_get(&pdev->dev, "per");
3153 if (IS_ERR(dev->clk_per)) {
3154 dev_err(&pdev->dev, "Could not get per clock\n");
3155 return PTR_ERR(dev->clk_per);
3156 }
3157
3158 dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
3159 if (IS_ERR(dev->clk_ahb)) {
3160 dev_err(&pdev->dev, "Could not get ahb clock\n");
3161 return PTR_ERR(dev->clk_ahb);
3162 }
3163
3164 /* Get memory for physical registers */
3165 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3166 dev->regs_base = devm_ioremap_resource(&pdev->dev, res);
3167 if (IS_ERR(dev->regs_base))
3168 return PTR_ERR(dev->regs_base);
3169
3170 /* IRQ */
3171 irq = platform_get_irq(pdev, 0);
3172 if (irq < 0) {
3173 dev_err(&pdev->dev, "failed to get irq resource\n");
3174 return -ENOENT;
3175 }
3176
3177 if (devm_request_threaded_irq(&pdev->dev, irq, NULL, coda_irq_handler,
3178 IRQF_ONESHOT, CODA_NAME, dev) < 0) {
3179 dev_err(&pdev->dev, "failed to request irq\n");
3180 return -ENOENT;
3181 }
3182
3183 /* Get IRAM pool from device tree or platform data */
3184 pool = of_get_named_gen_pool(np, "iram", 0);
3185 if (!pool && pdata)
3186 pool = dev_get_gen_pool(pdata->iram_dev);
3187 if (!pool) {
3188 dev_err(&pdev->dev, "iram pool not available\n");
3189 return -ENOMEM;
3190 }
3191 dev->iram_pool = pool;
3192
3193 ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
3194 if (ret)
3195 return ret;
3196
3197 mutex_init(&dev->dev_mutex);
3198 mutex_init(&dev->coda_mutex);
3199
3200 pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
3201
3202 if (of_id) {
3203 dev->devtype = of_id->data;
3204 } else if (pdev_id) {
3205 dev->devtype = &coda_devdata[pdev_id->driver_data];
3206 } else {
3207 v4l2_device_unregister(&dev->v4l2_dev);
3208 return -EINVAL;
3209 }
3210
3211 /* allocate auxiliary per-device buffers for the BIT processor */
3212 switch (dev->devtype->product) {
3213 case CODA_DX6:
3214 ret = coda_alloc_aux_buf(dev, &dev->workbuf,
3215 CODADX6_WORK_BUF_SIZE);
3216 if (ret < 0) {
3217 dev_err(&pdev->dev, "failed to allocate work buffer\n");
3218 v4l2_device_unregister(&dev->v4l2_dev);
3219 return ret;
3220 }
3221 break;
3222 case CODA_7541:
3223 dev->tempbuf.size = CODA7_TEMP_BUF_SIZE;
3224 break;
3225 }
3226 if (dev->tempbuf.size) {
3227 ret = coda_alloc_aux_buf(dev, &dev->tempbuf,
3228 dev->tempbuf.size);
3229 if (ret < 0) {
3230 dev_err(&pdev->dev, "failed to allocate temp buffer\n");
3231 v4l2_device_unregister(&dev->v4l2_dev);
3232 return ret;
3233 }
3234 }
3235
3236 switch (dev->devtype->product) {
3237 case CODA_DX6:
3238 dev->iram_size = CODADX6_IRAM_SIZE;
3239 break;
3240 case CODA_7541:
3241 dev->iram_size = CODA7_IRAM_SIZE;
3242 break;
3243 }
3244 dev->iram_vaddr = gen_pool_alloc(dev->iram_pool, dev->iram_size);
3245 if (!dev->iram_vaddr) {
3246 dev_err(&pdev->dev, "unable to alloc iram\n");
3247 return -ENOMEM;
3248 }
3249 dev->iram_paddr = gen_pool_virt_to_phys(dev->iram_pool,
3250 dev->iram_vaddr);
3251
3252 platform_set_drvdata(pdev, dev);
3253
3254 return coda_firmware_request(dev);
3255 }
3256
3257 static int coda_remove(struct platform_device *pdev)
3258 {
3259 struct coda_dev *dev = platform_get_drvdata(pdev);
3260
3261 video_unregister_device(&dev->vfd);
3262 if (dev->m2m_dev)
3263 v4l2_m2m_release(dev->m2m_dev);
3264 if (dev->alloc_ctx)
3265 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
3266 v4l2_device_unregister(&dev->v4l2_dev);
3267 if (dev->iram_vaddr)
3268 gen_pool_free(dev->iram_pool, dev->iram_vaddr, dev->iram_size);
3269 coda_free_aux_buf(dev, &dev->codebuf);
3270 coda_free_aux_buf(dev, &dev->tempbuf);
3271 coda_free_aux_buf(dev, &dev->workbuf);
3272 return 0;
3273 }
3274
3275 static struct platform_driver coda_driver = {
3276 .probe = coda_probe,
3277 .remove = coda_remove,
3278 .driver = {
3279 .name = CODA_NAME,
3280 .owner = THIS_MODULE,
3281 .of_match_table = of_match_ptr(coda_dt_ids),
3282 },
3283 .id_table = coda_platform_ids,
3284 };
3285
3286 module_platform_driver(coda_driver);
3287
3288 MODULE_LICENSE("GPL");
3289 MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
3290 MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");
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