arch/sh/kernel/cpu/sh3/setup-sh7720.c

   1 /*
   2  * SH7720 Setup
   3  *
   4  *  Copyright (C) 2007  Markus Brunner, Mark Jonas
   5  *  Copyright (C) 2009  Paul Mundt
   6  *
   7  *  Based on arch/sh/kernel/cpu/sh4/setup-sh7750.c:
   8  *
   9  *  Copyright (C) 2006  Paul Mundt
  10  *  Copyright (C) 2006  Jamie Lenehan
  11  *
  12  * This file is subject to the terms and conditions of the GNU General Public
  13  * License.  See the file "COPYING" in the main directory of this archive
  14  * for more details.
  15  */
  16 #include <linux/platform_device.h>
  17 #include <linux/init.h>
  18 #include <linux/serial.h>
  19 #include <linux/io.h>
  20 #include <linux/serial_sci.h>
  21 #include <linux/sh_timer.h>
  22 #include <asm/rtc.h>
  23
  24 static struct resource rtc_resources[] = {
  25         [0] = {
  26                 .start  = 0xa413fec0,
  27                 .end    = 0xa413fec0 + 0x28 - 1,
  28                 .flags  = IORESOURCE_IO,
  29         },
  30         [1] = {
  31                 /* Shared Period/Carry/Alarm IRQ */
  32                 .start  = 20,
  33                 .flags  = IORESOURCE_IRQ,
  34         },
  35 };
  36
  37 static struct sh_rtc_platform_info rtc_info = {
  38         .capabilities   = RTC_CAP_4_DIGIT_YEAR,
  39 };
  40
  41 static struct platform_device rtc_device = {
  42         .name           = "sh-rtc",
  43         .id             = -1,
  44         .num_resources  = ARRAY_SIZE(rtc_resources),
  45         .resource       = rtc_resources,
  46         .dev            = {
  47                 .platform_data = &rtc_info,
  48         },
  49 };
  50
  51 static struct plat_sci_port sci_platform_data[] = {
  52         {
  53                 .mapbase        = 0xa4430000,
  54                 .flags          = UPF_BOOT_AUTOCONF,
  55                 .type           = PORT_SCIF,
  56                 .irqs           = { 80, 80, 80, 80 },
  57         }, {
  58                 .mapbase        = 0xa4438000,
  59                 .flags          = UPF_BOOT_AUTOCONF,
  60                 .type           = PORT_SCIF,
  61                 .irqs           = { 81, 81, 81, 81 },
  62         }, {
  63
  64                 .flags = 0,
  65         }
  66 };
  67
  68 static struct platform_device sci_device = {
  69         .name           = "sh-sci",
  70         .id             = -1,
  71         .dev            = {
  72                 .platform_data  = sci_platform_data,
  73         },
  74 };
  75
  76 static struct resource usb_ohci_resources[] = {
  77         [0] = {
  78                 .start  = 0xA4428000,
  79                 .end    = 0xA44280FF,
  80                 .flags  = IORESOURCE_MEM,
  81         },
  82         [1] = {
  83                 .start  = 67,
  84                 .end    = 67,
  85                 .flags  = IORESOURCE_IRQ,
  86         },
  87 };
  88
  89 static u64 usb_ohci_dma_mask = 0xffffffffUL;
  90 static struct platform_device usb_ohci_device = {
  91         .name           = "sh_ohci",
  92         .id             = -1,
  93         .dev = {
  94                 .dma_mask               = &usb_ohci_dma_mask,
  95                 .coherent_dma_mask      = 0xffffffff,
  96         },
  97         .num_resources  = ARRAY_SIZE(usb_ohci_resources),
  98         .resource       = usb_ohci_resources,
  99 };
 100
 101 static struct resource usbf_resources[] = {
 102         [0] = {
 103                 .name   = "sh_udc",
 104                 .start  = 0xA4420000,
 105                 .end    = 0xA44200FF,
 106                 .flags  = IORESOURCE_MEM,
 107         },
 108         [1] = {
 109                 .name   = "sh_udc",
 110                 .start  = 65,
 111                 .end    = 65,
 112                 .flags  = IORESOURCE_IRQ,
 113         },
 114 };
 115
 116 static struct platform_device usbf_device = {
 117         .name           = "sh_udc",
 118         .id             = -1,
 119         .dev = {
 120                 .dma_mask               = NULL,
 121                 .coherent_dma_mask      = 0xffffffff,
 122         },
 123         .num_resources  = ARRAY_SIZE(usbf_resources),
 124         .resource       = usbf_resources,
 125 };
 126
 127 static struct sh_timer_config cmt0_platform_data = {
 128         .name = "CMT0",
 129         .channel_offset = 0x10,
 130         .timer_bit = 0,
 131         .clk = "peripheral_clk",
 132         .clockevent_rating = 125,
 133         .clocksource_rating = 125,
 134 };
 135
 136 static struct resource cmt0_resources[] = {
 137         [0] = {
 138                 .name   = "CMT0",
 139                 .start  = 0x044a0010,
 140                 .end    = 0x044a001b,
 141                 .flags  = IORESOURCE_MEM,
 142         },
 143         [1] = {
 144                 .start  = 104,
 145                 .flags  = IORESOURCE_IRQ,
 146         },
 147 };
 148
 149 static struct platform_device cmt0_device = {
 150         .name           = "sh_cmt",
 151         .id             = 0,
 152         .dev = {
 153                 .platform_data  = &cmt0_platform_data,
 154         },
 155         .resource       = cmt0_resources,
 156         .num_resources  = ARRAY_SIZE(cmt0_resources),
 157 };
 158
 159 static struct sh_timer_config cmt1_platform_data = {
 160         .name = "CMT1",
 161         .channel_offset = 0x20,
 162         .timer_bit = 1,
 163         .clk = "peripheral_clk",
 164 };
 165
 166 static struct resource cmt1_resources[] = {
 167         [0] = {
 168                 .name   = "CMT1",
 169                 .start  = 0x044a0020,
 170                 .end    = 0x044a002b,
 171                 .flags  = IORESOURCE_MEM,
 172         },
 173         [1] = {
 174                 .start  = 104,
 175                 .flags  = IORESOURCE_IRQ,
 176         },
 177 };
 178
 179 static struct platform_device cmt1_device = {
 180         .name           = "sh_cmt",
 181         .id             = 1,
 182         .dev = {
 183                 .platform_data  = &cmt1_platform_data,
 184         },
 185         .resource       = cmt1_resources,
 186         .num_resources  = ARRAY_SIZE(cmt1_resources),
 187 };
 188
 189 static struct sh_timer_config cmt2_platform_data = {
 190         .name = "CMT2",
 191         .channel_offset = 0x30,
 192         .timer_bit = 2,
 193         .clk = "peripheral_clk",
 194 };
 195
 196 static struct resource cmt2_resources[] = {
 197         [0] = {
 198                 .name   = "CMT2",
 199                 .start  = 0x044a0030,
 200                 .end    = 0x044a003b,
 201                 .flags  = IORESOURCE_MEM,
 202         },
 203         [1] = {
 204                 .start  = 104,
 205                 .flags  = IORESOURCE_IRQ,
 206         },
 207 };
 208
 209 static struct platform_device cmt2_device = {
 210         .name           = "sh_cmt",
 211         .id             = 2,
 212         .dev = {
 213                 .platform_data  = &cmt2_platform_data,
 214         },
 215         .resource       = cmt2_resources,
 216         .num_resources  = ARRAY_SIZE(cmt2_resources),
 217 };
 218
 219 static struct sh_timer_config cmt3_platform_data = {
 220         .name = "CMT3",
 221         .channel_offset = 0x40,
 222         .timer_bit = 3,
 223         .clk = "peripheral_clk",
 224 };
 225
 226 static struct resource cmt3_resources[] = {
 227         [0] = {
 228                 .name   = "CMT3",
 229                 .start  = 0x044a0040,
 230                 .end    = 0x044a004b,
 231                 .flags  = IORESOURCE_MEM,
 232         },
 233         [1] = {
 234                 .start  = 104,
 235                 .flags  = IORESOURCE_IRQ,
 236         },
 237 };
 238
 239 static struct platform_device cmt3_device = {
 240         .name           = "sh_cmt",
 241         .id             = 3,
 242         .dev = {
 243                 .platform_data  = &cmt3_platform_data,
 244         },
 245         .resource       = cmt3_resources,
 246         .num_resources  = ARRAY_SIZE(cmt3_resources),
 247 };
 248
 249 static struct sh_timer_config cmt4_platform_data = {
 250         .name = "CMT4",
 251         .channel_offset = 0x50,
 252         .timer_bit = 4,
 253         .clk = "peripheral_clk",
 254 };
 255
 256 static struct resource cmt4_resources[] = {
 257         [0] = {
 258                 .name   = "CMT4",
 259                 .start  = 0x044a0050,
 260                 .end    = 0x044a005b,
 261                 .flags  = IORESOURCE_MEM,
 262         },
 263         [1] = {
 264                 .start  = 104,
 265                 .flags  = IORESOURCE_IRQ,
 266         },
 267 };
 268
 269 static struct platform_device cmt4_device = {
 270         .name           = "sh_cmt",
 271         .id             = 4,
 272         .dev = {
 273                 .platform_data  = &cmt4_platform_data,
 274         },
 275         .resource       = cmt4_resources,
 276         .num_resources  = ARRAY_SIZE(cmt4_resources),
 277 };
 278
 279 static struct sh_timer_config tmu0_platform_data = {
 280         .name = "TMU0",
 281         .channel_offset = 0x02,
 282         .timer_bit = 0,
 283         .clk = "peripheral_clk",
 284         .clockevent_rating = 200,
 285 };
 286
 287 static struct resource tmu0_resources[] = {
 288         [0] = {
 289                 .name   = "TMU0",
 290                 .start  = 0xa412fe94,
 291                 .end    = 0xa412fe9f,
 292                 .flags  = IORESOURCE_MEM,
 293         },
 294         [1] = {
 295                 .start  = 16,
 296                 .flags  = IORESOURCE_IRQ,
 297         },
 298 };
 299
 300 static struct platform_device tmu0_device = {
 301         .name           = "sh_tmu",
 302         .id             = 0,
 303         .dev = {
 304                 .platform_data  = &tmu0_platform_data,
 305         },
 306         .resource       = tmu0_resources,
 307         .num_resources  = ARRAY_SIZE(tmu0_resources),
 308 };
 309
 310 static struct sh_timer_config tmu1_platform_data = {
 311         .name = "TMU1",
 312         .channel_offset = 0xe,
 313         .timer_bit = 1,
 314         .clk = "peripheral_clk",
 315         .clocksource_rating = 200,
 316 };
 317
 318 static struct resource tmu1_resources[] = {
 319         [0] = {
 320                 .name   = "TMU1",
 321                 .start  = 0xa412fea0,
 322                 .end    = 0xa412feab,
 323                 .flags  = IORESOURCE_MEM,
 324         },
 325         [1] = {
 326                 .start  = 17,
 327                 .flags  = IORESOURCE_IRQ,
 328         },
 329 };
 330
 331 static struct platform_device tmu1_device = {
 332         .name           = "sh_tmu",
 333         .id             = 1,
 334         .dev = {
 335                 .platform_data  = &tmu1_platform_data,
 336         },
 337         .resource       = tmu1_resources,
 338         .num_resources  = ARRAY_SIZE(tmu1_resources),
 339 };
 340
 341 static struct sh_timer_config tmu2_platform_data = {
 342         .name = "TMU2",
 343         .channel_offset = 0x1a,
 344         .timer_bit = 2,
 345         .clk = "peripheral_clk",
 346 };
 347
 348 static struct resource tmu2_resources[] = {
 349         [0] = {
 350                 .name   = "TMU2",
 351                 .start  = 0xa412feac,
 352                 .end    = 0xa412feb5,
 353                 .flags  = IORESOURCE_MEM,
 354         },
 355         [1] = {
 356                 .start  = 18,
 357                 .flags  = IORESOURCE_IRQ,
 358         },
 359 };
 360
 361 static struct platform_device tmu2_device = {
 362         .name           = "sh_tmu",
 363         .id             = 2,
 364         .dev = {
 365                 .platform_data  = &tmu2_platform_data,
 366         },
 367         .resource       = tmu2_resources,
 368         .num_resources  = ARRAY_SIZE(tmu2_resources),
 369 };
 370
 371 static struct platform_device *sh7720_devices[] __initdata = {
 372         &cmt0_device,
 373         &cmt1_device,
 374         &cmt2_device,
 375         &cmt3_device,
 376         &cmt4_device,
 377         &tmu0_device,
 378         &tmu1_device,
 379         &tmu2_device,
 380         &rtc_device,
 381         &sci_device,
 382         &usb_ohci_device,
 383         &usbf_device,
 384 };
 385
 386 static int __init sh7720_devices_setup(void)
 387 {
 388         return platform_add_devices(sh7720_devices,
 389                                     ARRAY_SIZE(sh7720_devices));
 390 }
 391 arch_initcall(sh7720_devices_setup);
 392
 393 static struct platform_device *sh7720_early_devices[] __initdata = {
 394         &cmt0_device,
 395         &cmt1_device,
 396         &cmt2_device,
 397         &cmt3_device,
 398         &cmt4_device,
 399         &tmu0_device,
 400         &tmu1_device,
 401         &tmu2_device,
 402 };
 403
 404 void __init plat_early_device_setup(void)
 405 {
 406         early_platform_add_devices(sh7720_early_devices,
 407                                    ARRAY_SIZE(sh7720_early_devices));
 408 }
 409
 410 enum {
 411         UNUSED = 0,
 412
 413         /* interrupt sources */
 414         TMU0, TMU1, TMU2, RTC,
 415         WDT, REF_RCMI, SIM,
 416         IRQ0, IRQ1, IRQ2, IRQ3,
 417         USBF_SPD, TMU_SUNI, IRQ5, IRQ4,
 418         DMAC1, LCDC, SSL,
 419         ADC, DMAC2, USBFI, CMT,
 420         SCIF0, SCIF1,
 421         PINT07, PINT815, TPU, IIC,
 422         SIOF0, SIOF1, MMC, PCC,
 423         USBHI, AFEIF,
 424         H_UDI,
 425 };
 426
 427 static struct intc_vect vectors[] __initdata = {
 428         /* IRQ0->5 are handled in setup-sh3.c */
 429         INTC_VECT(TMU0, 0x400),       INTC_VECT(TMU1, 0x420),
 430         INTC_VECT(TMU2, 0x440),       INTC_VECT(RTC, 0x480),
 431         INTC_VECT(RTC, 0x4a0),        INTC_VECT(RTC, 0x4c0),
 432         INTC_VECT(SIM, 0x4e0),        INTC_VECT(SIM, 0x500),
 433         INTC_VECT(SIM, 0x520),        INTC_VECT(SIM, 0x540),
 434         INTC_VECT(WDT, 0x560),        INTC_VECT(REF_RCMI, 0x580),
 435         /* H_UDI cannot be masked */  INTC_VECT(TMU_SUNI, 0x6c0),
 436         INTC_VECT(USBF_SPD, 0x6e0),   INTC_VECT(DMAC1, 0x800),
 437         INTC_VECT(DMAC1, 0x820),      INTC_VECT(DMAC1, 0x840),
 438         INTC_VECT(DMAC1, 0x860),      INTC_VECT(LCDC, 0x900),
 439 #if defined(CONFIG_CPU_SUBTYPE_SH7720)
 440         INTC_VECT(SSL, 0x980),
 441 #endif
 442         INTC_VECT(USBFI, 0xa20),      INTC_VECT(USBFI, 0xa40),
 443         INTC_VECT(USBHI, 0xa60),
 444         INTC_VECT(DMAC2, 0xb80),      INTC_VECT(DMAC2, 0xba0),
 445         INTC_VECT(ADC, 0xbe0),        INTC_VECT(SCIF0, 0xc00),
 446         INTC_VECT(SCIF1, 0xc20),      INTC_VECT(PINT07, 0xc80),
 447         INTC_VECT(PINT815, 0xca0),    INTC_VECT(SIOF0, 0xd00),
 448         INTC_VECT(SIOF1, 0xd20),      INTC_VECT(TPU, 0xd80),
 449         INTC_VECT(TPU, 0xda0),        INTC_VECT(TPU, 0xdc0),
 450         INTC_VECT(TPU, 0xde0),        INTC_VECT(IIC, 0xe00),
 451         INTC_VECT(MMC, 0xe80),        INTC_VECT(MMC, 0xea0),
 452         INTC_VECT(MMC, 0xec0),        INTC_VECT(MMC, 0xee0),
 453         INTC_VECT(CMT, 0xf00),        INTC_VECT(PCC, 0xf60),
 454         INTC_VECT(AFEIF, 0xfe0),
 455 };
 456
 457 static struct intc_prio_reg prio_registers[] __initdata = {
 458         { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
 459         { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
 460         { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
 461         { 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } },
 462         { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } },
 463         { 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } },
 464         { 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } },
 465         { 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } },
 466         { 0xA4080006UL, 0, 16, 4, /* IPRI */ { SIOF0, SIOF1, MMC, PCC } },
 467         { 0xA4080008UL, 0, 16, 4, /* IPRJ */ { 0, USBHI, 0, AFEIF } },
 468 };
 469
 470 static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, NULL,
 471                 NULL, prio_registers, NULL);
 472
 473 void __init plat_irq_setup(void)
 474 {
 475         register_intc_controller(&intc_desc);
 476         plat_irq_setup_sh3();
 477 }