arch/sh/kernel/cpu/sh3/setup-sh770x.c

   1 /*
   2  * SH3 Setup code for SH7706, SH7707, SH7708, SH7709
   3  *
   4  *  Copyright (C) 2007  Magnus Damm
   5  *  Copyright (C) 2009  Paul Mundt
   6  *
   7  * Based on setup-sh7709.c
   8  *
   9  *  Copyright (C) 2006  Paul Mundt
  10  *
  11  * This file is subject to the terms and conditions of the GNU General Public
  12  * License.  See the file "COPYING" in the main directory of this archive
  13  * for more details.
  14  */
  15 #include <linux/init.h>
  16 #include <linux/io.h>
  17 #include <linux/irq.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/serial.h>
  20 #include <linux/serial_sci.h>
  21 #include <linux/sh_timer.h>
  22
  23 enum {
  24         UNUSED = 0,
  25
  26         /* interrupt sources */
  27         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
  28         PINT07, PINT815,
  29         DMAC, SCIF0, SCIF2, SCI, ADC_ADI,
  30         LCDC, PCC0, PCC1,
  31         TMU0, TMU1, TMU2,
  32         RTC, WDT, REF,
  33 };
  34
  35 static struct intc_vect vectors[] __initdata = {
  36         INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
  37         INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
  38         INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
  39         INTC_VECT(RTC, 0x4c0),
  40         INTC_VECT(SCI, 0x4e0), INTC_VECT(SCI, 0x500),
  41         INTC_VECT(SCI, 0x520), INTC_VECT(SCI, 0x540),
  42         INTC_VECT(WDT, 0x560),
  43         INTC_VECT(REF, 0x580),
  44         INTC_VECT(REF, 0x5a0),
  45 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
  46     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
  47     defined(CONFIG_CPU_SUBTYPE_SH7709)
  48         /* IRQ0->5 are handled in setup-sh3.c */
  49         INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
  50         INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
  51         INTC_VECT(ADC_ADI, 0x980),
  52         INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
  53         INTC_VECT(SCIF2, 0x940), INTC_VECT(SCIF2, 0x960),
  54 #endif
  55 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
  56     defined(CONFIG_CPU_SUBTYPE_SH7709)
  57         INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
  58         INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
  59         INTC_VECT(SCIF0, 0x8c0), INTC_VECT(SCIF0, 0x8e0),
  60 #endif
  61 #if defined(CONFIG_CPU_SUBTYPE_SH7707)
  62         INTC_VECT(LCDC, 0x9a0),
  63         INTC_VECT(PCC0, 0x9c0), INTC_VECT(PCC1, 0x9e0),
  64 #endif
  65 };
  66
  67 static struct intc_prio_reg prio_registers[] __initdata = {
  68         { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
  69         { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } },
  70 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
  71     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
  72     defined(CONFIG_CPU_SUBTYPE_SH7709)
  73         { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
  74         { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
  75         { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, 0, SCIF2, ADC_ADI } },
  76 #endif
  77 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
  78     defined(CONFIG_CPU_SUBTYPE_SH7709)
  79         { 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, } },
  80         { 0xa400001a, 0, 16, 4, /* IPRE */ { 0, SCIF0 } },
  81 #endif
  82 #if defined(CONFIG_CPU_SUBTYPE_SH7707)
  83         { 0xa400001c, 0, 16, 4, /* IPRF */ { 0, LCDC, PCC0, PCC1, } },
  84 #endif
  85 };
  86
  87 static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, NULL,
  88                          NULL, prio_registers, NULL);
  89
  90 static struct resource rtc_resources[] = {
  91         [0] =   {
  92                 .start  = 0xfffffec0,
  93                 .end    = 0xfffffec0 + 0x1e,
  94                 .flags  = IORESOURCE_IO,
  95         },
  96         [1] =   {
  97                 .start  = 20,
  98                 .flags  = IORESOURCE_IRQ,
  99         },
 100 };
 101
 102 static struct platform_device rtc_device = {
 103         .name           = "sh-rtc",
 104         .id             = -1,
 105         .num_resources  = ARRAY_SIZE(rtc_resources),
 106         .resource       = rtc_resources,
 107 };
 108
 109 static struct plat_sci_port sci_platform_data[] = {
 110         {
 111                 .mapbase        = 0xfffffe80,
 112                 .flags          = UPF_BOOT_AUTOCONF,
 113                 .type           = PORT_SCI,
 114                 .irqs           = { 23, 23, 23, 0 },
 115         },
 116 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
 117     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
 118     defined(CONFIG_CPU_SUBTYPE_SH7709)
 119         {
 120                 .mapbase        = 0xa4000150,
 121                 .flags          = UPF_BOOT_AUTOCONF,
 122                 .type           = PORT_SCIF,
 123                 .irqs           = { 56, 56, 56, 56 },
 124         },
 125 #endif
 126 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
 127     defined(CONFIG_CPU_SUBTYPE_SH7709)
 128         {
 129                 .mapbase        = 0xa4000140,
 130                 .flags          = UPF_BOOT_AUTOCONF,
 131                 .type           = PORT_IRDA,
 132                 .irqs           = { 52, 52, 52, 52 },
 133         },
 134 #endif
 135         {
 136                 .flags = 0,
 137         }
 138 };
 139
 140 static struct platform_device sci_device = {
 141         .name           = "sh-sci",
 142         .id             = -1,
 143         .dev            = {
 144                 .platform_data  = sci_platform_data,
 145         },
 146 };
 147
 148 static struct sh_timer_config tmu0_platform_data = {
 149         .name = "TMU0",
 150         .channel_offset = 0x02,
 151         .timer_bit = 0,
 152         .clk = "peripheral_clk",
 153         .clockevent_rating = 200,
 154 };
 155
 156 static struct resource tmu0_resources[] = {
 157         [0] = {
 158                 .name   = "TMU0",
 159                 .start  = 0xfffffe94,
 160                 .end    = 0xfffffe9f,
 161                 .flags  = IORESOURCE_MEM,
 162         },
 163         [1] = {
 164                 .start  = 16,
 165                 .flags  = IORESOURCE_IRQ,
 166         },
 167 };
 168
 169 static struct platform_device tmu0_device = {
 170         .name           = "sh_tmu",
 171         .id             = 0,
 172         .dev = {
 173                 .platform_data  = &tmu0_platform_data,
 174         },
 175         .resource       = tmu0_resources,
 176         .num_resources  = ARRAY_SIZE(tmu0_resources),
 177 };
 178
 179 static struct sh_timer_config tmu1_platform_data = {
 180         .name = "TMU1",
 181         .channel_offset = 0xe,
 182         .timer_bit = 1,
 183         .clk = "peripheral_clk",
 184         .clocksource_rating = 200,
 185 };
 186
 187 static struct resource tmu1_resources[] = {
 188         [0] = {
 189                 .name   = "TMU1",
 190                 .start  = 0xfffffea0,
 191                 .end    = 0xfffffeab,
 192                 .flags  = IORESOURCE_MEM,
 193         },
 194         [1] = {
 195                 .start  = 17,
 196                 .flags  = IORESOURCE_IRQ,
 197         },
 198 };
 199
 200 static struct platform_device tmu1_device = {
 201         .name           = "sh_tmu",
 202         .id             = 1,
 203         .dev = {
 204                 .platform_data  = &tmu1_platform_data,
 205         },
 206         .resource       = tmu1_resources,
 207         .num_resources  = ARRAY_SIZE(tmu1_resources),
 208 };
 209
 210 static struct sh_timer_config tmu2_platform_data = {
 211         .name = "TMU2",
 212         .channel_offset = 0x1a,
 213         .timer_bit = 2,
 214         .clk = "peripheral_clk",
 215 };
 216
 217 static struct resource tmu2_resources[] = {
 218         [0] = {
 219                 .name   = "TMU2",
 220                 .start  = 0xfffffeac,
 221                 .end    = 0xfffffebb,
 222                 .flags  = IORESOURCE_MEM,
 223         },
 224         [1] = {
 225                 .start  = 18,
 226                 .flags  = IORESOURCE_IRQ,
 227         },
 228 };
 229
 230 static struct platform_device tmu2_device = {
 231         .name           = "sh_tmu",
 232         .id             = 2,
 233         .dev = {
 234                 .platform_data  = &tmu2_platform_data,
 235         },
 236         .resource       = tmu2_resources,
 237         .num_resources  = ARRAY_SIZE(tmu2_resources),
 238 };
 239
 240 static struct platform_device *sh770x_devices[] __initdata = {
 241         &tmu0_device,
 242         &tmu1_device,
 243         &tmu2_device,
 244         &sci_device,
 245         &rtc_device,
 246 };
 247
 248 static int __init sh770x_devices_setup(void)
 249 {
 250         return platform_add_devices(sh770x_devices,
 251                 ARRAY_SIZE(sh770x_devices));
 252 }
 253 arch_initcall(sh770x_devices_setup);
 254
 255 static struct platform_device *sh770x_early_devices[] __initdata = {
 256         &tmu0_device,
 257         &tmu1_device,
 258         &tmu2_device,
 259 };
 260
 261 void __init plat_early_device_setup(void)
 262 {
 263         early_platform_add_devices(sh770x_early_devices,
 264                                    ARRAY_SIZE(sh770x_early_devices));
 265 }
 266
 267 void __init plat_irq_setup(void)
 268 {
 269         register_intc_controller(&intc_desc);
 270 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
 271     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
 272     defined(CONFIG_CPU_SUBTYPE_SH7709)
 273         plat_irq_setup_sh3();
 274 #endif
 275 }