2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <trace/events/kvm.h>
41 #undef TRACE_INCLUDE_FILE
42 #define CREATE_TRACE_POINTS
45 #include <asm/uaccess.h>
51 #define MAX_IO_MSRS 256
52 #define CR0_RESERVED_BITS \
53 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
54 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
55 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
56 #define CR4_RESERVED_BITS \
57 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
58 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
59 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
60 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
62 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
64 #define KVM_MAX_MCE_BANKS 32
65 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
68 * - enable syscall per default because its emulated by KVM
69 * - enable LME and LMA per default on 64 bit KVM
72 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
74 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
77 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
78 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
80 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
81 struct kvm_cpuid_entry2 __user
*entries
);
83 struct kvm_x86_ops
*kvm_x86_ops
;
84 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
87 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
89 struct kvm_stats_debugfs_item debugfs_entries
[] = {
90 { "pf_fixed", VCPU_STAT(pf_fixed
) },
91 { "pf_guest", VCPU_STAT(pf_guest
) },
92 { "tlb_flush", VCPU_STAT(tlb_flush
) },
93 { "invlpg", VCPU_STAT(invlpg
) },
94 { "exits", VCPU_STAT(exits
) },
95 { "io_exits", VCPU_STAT(io_exits
) },
96 { "mmio_exits", VCPU_STAT(mmio_exits
) },
97 { "signal_exits", VCPU_STAT(signal_exits
) },
98 { "irq_window", VCPU_STAT(irq_window_exits
) },
99 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
100 { "halt_exits", VCPU_STAT(halt_exits
) },
101 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
102 { "hypercalls", VCPU_STAT(hypercalls
) },
103 { "request_irq", VCPU_STAT(request_irq_exits
) },
104 { "irq_exits", VCPU_STAT(irq_exits
) },
105 { "host_state_reload", VCPU_STAT(host_state_reload
) },
106 { "efer_reload", VCPU_STAT(efer_reload
) },
107 { "fpu_reload", VCPU_STAT(fpu_reload
) },
108 { "insn_emulation", VCPU_STAT(insn_emulation
) },
109 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
110 { "irq_injections", VCPU_STAT(irq_injections
) },
111 { "nmi_injections", VCPU_STAT(nmi_injections
) },
112 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
113 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
114 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
115 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
116 { "mmu_flooded", VM_STAT(mmu_flooded
) },
117 { "mmu_recycled", VM_STAT(mmu_recycled
) },
118 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
119 { "mmu_unsync", VM_STAT(mmu_unsync
) },
120 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
121 { "largepages", VM_STAT(lpages
) },
125 unsigned long segment_base(u16 selector
)
127 struct descriptor_table gdt
;
128 struct desc_struct
*d
;
129 unsigned long table_base
;
136 table_base
= gdt
.base
;
138 if (selector
& 4) { /* from ldt */
139 u16 ldt_selector
= kvm_read_ldt();
141 table_base
= segment_base(ldt_selector
);
143 d
= (struct desc_struct
*)(table_base
+ (selector
& ~7));
144 v
= get_desc_base(d
);
146 if (d
->s
== 0 && (d
->type
== 2 || d
->type
== 9 || d
->type
== 11))
147 v
|= ((unsigned long)((struct ldttss_desc64
*)d
)->base3
) << 32;
151 EXPORT_SYMBOL_GPL(segment_base
);
153 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
155 if (irqchip_in_kernel(vcpu
->kvm
))
156 return vcpu
->arch
.apic_base
;
158 return vcpu
->arch
.apic_base
;
160 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
162 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
164 /* TODO: reserve bits check */
165 if (irqchip_in_kernel(vcpu
->kvm
))
166 kvm_lapic_set_base(vcpu
, data
);
168 vcpu
->arch
.apic_base
= data
;
170 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
172 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
174 WARN_ON(vcpu
->arch
.exception
.pending
);
175 vcpu
->arch
.exception
.pending
= true;
176 vcpu
->arch
.exception
.has_error_code
= false;
177 vcpu
->arch
.exception
.nr
= nr
;
179 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
181 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, unsigned long addr
,
184 ++vcpu
->stat
.pf_guest
;
186 if (vcpu
->arch
.exception
.pending
) {
187 switch(vcpu
->arch
.exception
.nr
) {
189 /* triple fault -> shutdown */
190 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
193 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
194 vcpu
->arch
.exception
.error_code
= 0;
197 /* replace previous exception with a new one in a hope
198 that instruction re-execution will regenerate lost
200 vcpu
->arch
.exception
.pending
= false;
204 vcpu
->arch
.cr2
= addr
;
205 kvm_queue_exception_e(vcpu
, PF_VECTOR
, error_code
);
208 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
210 vcpu
->arch
.nmi_pending
= 1;
212 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
214 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
216 WARN_ON(vcpu
->arch
.exception
.pending
);
217 vcpu
->arch
.exception
.pending
= true;
218 vcpu
->arch
.exception
.has_error_code
= true;
219 vcpu
->arch
.exception
.nr
= nr
;
220 vcpu
->arch
.exception
.error_code
= error_code
;
222 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
225 * Load the pae pdptrs. Return true is they are all valid.
227 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
229 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
230 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
233 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
235 ret
= kvm_read_guest_page(vcpu
->kvm
, pdpt_gfn
, pdpte
,
236 offset
* sizeof(u64
), sizeof(pdpte
));
241 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
242 if (is_present_gpte(pdpte
[i
]) &&
243 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
250 memcpy(vcpu
->arch
.pdptrs
, pdpte
, sizeof(vcpu
->arch
.pdptrs
));
251 __set_bit(VCPU_EXREG_PDPTR
,
252 (unsigned long *)&vcpu
->arch
.regs_avail
);
253 __set_bit(VCPU_EXREG_PDPTR
,
254 (unsigned long *)&vcpu
->arch
.regs_dirty
);
259 EXPORT_SYMBOL_GPL(load_pdptrs
);
261 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
263 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
267 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
270 if (!test_bit(VCPU_EXREG_PDPTR
,
271 (unsigned long *)&vcpu
->arch
.regs_avail
))
274 r
= kvm_read_guest(vcpu
->kvm
, vcpu
->arch
.cr3
& ~31u, pdpte
, sizeof(pdpte
));
277 changed
= memcmp(pdpte
, vcpu
->arch
.pdptrs
, sizeof(pdpte
)) != 0;
283 void kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
285 if (cr0
& CR0_RESERVED_BITS
) {
286 printk(KERN_DEBUG
"set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
287 cr0
, vcpu
->arch
.cr0
);
288 kvm_inject_gp(vcpu
, 0);
292 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
)) {
293 printk(KERN_DEBUG
"set_cr0: #GP, CD == 0 && NW == 1\n");
294 kvm_inject_gp(vcpu
, 0);
298 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
)) {
299 printk(KERN_DEBUG
"set_cr0: #GP, set PG flag "
300 "and a clear PE flag\n");
301 kvm_inject_gp(vcpu
, 0);
305 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
307 if ((vcpu
->arch
.shadow_efer
& EFER_LME
)) {
311 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
312 "in long mode while PAE is disabled\n");
313 kvm_inject_gp(vcpu
, 0);
316 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
318 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
319 "in long mode while CS.L == 1\n");
320 kvm_inject_gp(vcpu
, 0);
326 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
327 printk(KERN_DEBUG
"set_cr0: #GP, pdptrs "
329 kvm_inject_gp(vcpu
, 0);
335 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
336 vcpu
->arch
.cr0
= cr0
;
338 kvm_mmu_reset_context(vcpu
);
341 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
343 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
345 kvm_set_cr0(vcpu
, (vcpu
->arch
.cr0
& ~0x0ful
) | (msw
& 0x0f));
347 EXPORT_SYMBOL_GPL(kvm_lmsw
);
349 void kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
351 unsigned long old_cr4
= vcpu
->arch
.cr4
;
352 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
354 if (cr4
& CR4_RESERVED_BITS
) {
355 printk(KERN_DEBUG
"set_cr4: #GP, reserved bits\n");
356 kvm_inject_gp(vcpu
, 0);
360 if (is_long_mode(vcpu
)) {
361 if (!(cr4
& X86_CR4_PAE
)) {
362 printk(KERN_DEBUG
"set_cr4: #GP, clearing PAE while "
364 kvm_inject_gp(vcpu
, 0);
367 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
368 && ((cr4
^ old_cr4
) & pdptr_bits
)
369 && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
370 printk(KERN_DEBUG
"set_cr4: #GP, pdptrs reserved bits\n");
371 kvm_inject_gp(vcpu
, 0);
375 if (cr4
& X86_CR4_VMXE
) {
376 printk(KERN_DEBUG
"set_cr4: #GP, setting VMXE\n");
377 kvm_inject_gp(vcpu
, 0);
380 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
381 vcpu
->arch
.cr4
= cr4
;
382 vcpu
->arch
.mmu
.base_role
.cr4_pge
= (cr4
& X86_CR4_PGE
) && !tdp_enabled
;
383 kvm_mmu_reset_context(vcpu
);
385 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
387 void kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
389 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
390 kvm_mmu_sync_roots(vcpu
);
391 kvm_mmu_flush_tlb(vcpu
);
395 if (is_long_mode(vcpu
)) {
396 if (cr3
& CR3_L_MODE_RESERVED_BITS
) {
397 printk(KERN_DEBUG
"set_cr3: #GP, reserved bits\n");
398 kvm_inject_gp(vcpu
, 0);
403 if (cr3
& CR3_PAE_RESERVED_BITS
) {
405 "set_cr3: #GP, reserved bits\n");
406 kvm_inject_gp(vcpu
, 0);
409 if (is_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
)) {
410 printk(KERN_DEBUG
"set_cr3: #GP, pdptrs "
412 kvm_inject_gp(vcpu
, 0);
417 * We don't check reserved bits in nonpae mode, because
418 * this isn't enforced, and VMware depends on this.
423 * Does the new cr3 value map to physical memory? (Note, we
424 * catch an invalid cr3 even in real-mode, because it would
425 * cause trouble later on when we turn on paging anyway.)
427 * A real CPU would silently accept an invalid cr3 and would
428 * attempt to use it - with largely undefined (and often hard
429 * to debug) behavior on the guest side.
431 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
432 kvm_inject_gp(vcpu
, 0);
434 vcpu
->arch
.cr3
= cr3
;
435 vcpu
->arch
.mmu
.new_cr3(vcpu
);
438 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
440 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
442 if (cr8
& CR8_RESERVED_BITS
) {
443 printk(KERN_DEBUG
"set_cr8: #GP, reserved bits 0x%lx\n", cr8
);
444 kvm_inject_gp(vcpu
, 0);
447 if (irqchip_in_kernel(vcpu
->kvm
))
448 kvm_lapic_set_tpr(vcpu
, cr8
);
450 vcpu
->arch
.cr8
= cr8
;
452 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
454 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
456 if (irqchip_in_kernel(vcpu
->kvm
))
457 return kvm_lapic_get_cr8(vcpu
);
459 return vcpu
->arch
.cr8
;
461 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
463 static inline u32
bit(int bitno
)
465 return 1 << (bitno
& 31);
469 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
470 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
472 * This list is modified at module load time to reflect the
473 * capabilities of the host cpu.
475 static u32 msrs_to_save
[] = {
476 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
479 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
481 MSR_IA32_TSC
, MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
482 MSR_IA32_PERF_STATUS
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
485 static unsigned num_msrs_to_save
;
487 static u32 emulated_msrs
[] = {
488 MSR_IA32_MISC_ENABLE
,
491 static void set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
493 if (efer
& efer_reserved_bits
) {
494 printk(KERN_DEBUG
"set_efer: 0x%llx #GP, reserved bits\n",
496 kvm_inject_gp(vcpu
, 0);
501 && (vcpu
->arch
.shadow_efer
& EFER_LME
) != (efer
& EFER_LME
)) {
502 printk(KERN_DEBUG
"set_efer: #GP, change LME while paging\n");
503 kvm_inject_gp(vcpu
, 0);
507 if (efer
& EFER_FFXSR
) {
508 struct kvm_cpuid_entry2
*feat
;
510 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
511 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
))) {
512 printk(KERN_DEBUG
"set_efer: #GP, enable FFXSR w/o CPUID capability\n");
513 kvm_inject_gp(vcpu
, 0);
518 if (efer
& EFER_SVME
) {
519 struct kvm_cpuid_entry2
*feat
;
521 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
522 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
))) {
523 printk(KERN_DEBUG
"set_efer: #GP, enable SVM w/o SVM\n");
524 kvm_inject_gp(vcpu
, 0);
529 kvm_x86_ops
->set_efer(vcpu
, efer
);
532 efer
|= vcpu
->arch
.shadow_efer
& EFER_LMA
;
534 vcpu
->arch
.shadow_efer
= efer
;
536 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
537 kvm_mmu_reset_context(vcpu
);
540 void kvm_enable_efer_bits(u64 mask
)
542 efer_reserved_bits
&= ~mask
;
544 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
548 * Writes msr value into into the appropriate "register".
549 * Returns 0 on success, non-0 otherwise.
550 * Assumes vcpu_load() was already called.
552 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
554 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
558 * Adapt set_msr() to msr_io()'s calling convention
560 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
562 return kvm_set_msr(vcpu
, index
, *data
);
565 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
568 struct pvclock_wall_clock wc
;
569 struct timespec now
, sys
, boot
;
576 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
579 * The guest calculates current wall clock time by adding
580 * system time (updated by kvm_write_guest_time below) to the
581 * wall clock specified here. guest system time equals host
582 * system time for us, thus we must fill in host boot time here.
584 now
= current_kernel_time();
586 boot
= ns_to_timespec(timespec_to_ns(&now
) - timespec_to_ns(&sys
));
588 wc
.sec
= boot
.tv_sec
;
589 wc
.nsec
= boot
.tv_nsec
;
590 wc
.version
= version
;
592 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
595 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
598 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
600 uint32_t quotient
, remainder
;
602 /* Don't try to replace with do_div(), this one calculates
603 * "(dividend << 32) / divisor" */
605 : "=a" (quotient
), "=d" (remainder
)
606 : "0" (0), "1" (dividend
), "r" (divisor
) );
610 static void kvm_set_time_scale(uint32_t tsc_khz
, struct pvclock_vcpu_time_info
*hv_clock
)
612 uint64_t nsecs
= 1000000000LL;
617 tps64
= tsc_khz
* 1000LL;
618 while (tps64
> nsecs
*2) {
623 tps32
= (uint32_t)tps64
;
624 while (tps32
<= (uint32_t)nsecs
) {
629 hv_clock
->tsc_shift
= shift
;
630 hv_clock
->tsc_to_system_mul
= div_frac(nsecs
, tps32
);
632 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
633 __func__
, tsc_khz
, hv_clock
->tsc_shift
,
634 hv_clock
->tsc_to_system_mul
);
637 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
639 static void kvm_write_guest_time(struct kvm_vcpu
*v
)
643 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
645 unsigned long this_tsc_khz
;
647 if ((!vcpu
->time_page
))
650 this_tsc_khz
= get_cpu_var(cpu_tsc_khz
);
651 if (unlikely(vcpu
->hv_clock_tsc_khz
!= this_tsc_khz
)) {
652 kvm_set_time_scale(this_tsc_khz
, &vcpu
->hv_clock
);
653 vcpu
->hv_clock_tsc_khz
= this_tsc_khz
;
655 put_cpu_var(cpu_tsc_khz
);
657 /* Keep irq disabled to prevent changes to the clock */
658 local_irq_save(flags
);
659 kvm_get_msr(v
, MSR_IA32_TSC
, &vcpu
->hv_clock
.tsc_timestamp
);
661 local_irq_restore(flags
);
663 /* With all the info we got, fill in the values */
665 vcpu
->hv_clock
.system_time
= ts
.tv_nsec
+
666 (NSEC_PER_SEC
* (u64
)ts
.tv_sec
);
668 * The interface expects us to write an even number signaling that the
669 * update is finished. Since the guest won't see the intermediate
670 * state, we just increase by 2 at the end.
672 vcpu
->hv_clock
.version
+= 2;
674 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
676 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
677 sizeof(vcpu
->hv_clock
));
679 kunmap_atomic(shared_kaddr
, KM_USER0
);
681 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
684 static int kvm_request_guest_time_update(struct kvm_vcpu
*v
)
686 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
688 if (!vcpu
->time_page
)
690 set_bit(KVM_REQ_KVMCLOCK_UPDATE
, &v
->requests
);
694 static bool msr_mtrr_valid(unsigned msr
)
697 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
698 case MSR_MTRRfix64K_00000
:
699 case MSR_MTRRfix16K_80000
:
700 case MSR_MTRRfix16K_A0000
:
701 case MSR_MTRRfix4K_C0000
:
702 case MSR_MTRRfix4K_C8000
:
703 case MSR_MTRRfix4K_D0000
:
704 case MSR_MTRRfix4K_D8000
:
705 case MSR_MTRRfix4K_E0000
:
706 case MSR_MTRRfix4K_E8000
:
707 case MSR_MTRRfix4K_F0000
:
708 case MSR_MTRRfix4K_F8000
:
709 case MSR_MTRRdefType
:
710 case MSR_IA32_CR_PAT
:
718 static bool valid_pat_type(unsigned t
)
720 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
723 static bool valid_mtrr_type(unsigned t
)
725 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
728 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
732 if (!msr_mtrr_valid(msr
))
735 if (msr
== MSR_IA32_CR_PAT
) {
736 for (i
= 0; i
< 8; i
++)
737 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
740 } else if (msr
== MSR_MTRRdefType
) {
743 return valid_mtrr_type(data
& 0xff);
744 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
745 for (i
= 0; i
< 8 ; i
++)
746 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
752 return valid_mtrr_type(data
& 0xff);
755 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
757 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
759 if (!mtrr_valid(vcpu
, msr
, data
))
762 if (msr
== MSR_MTRRdefType
) {
763 vcpu
->arch
.mtrr_state
.def_type
= data
;
764 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
765 } else if (msr
== MSR_MTRRfix64K_00000
)
767 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
768 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
769 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
770 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
771 else if (msr
== MSR_IA32_CR_PAT
)
772 vcpu
->arch
.pat
= data
;
773 else { /* Variable MTRRs */
774 int idx
, is_mtrr_mask
;
777 idx
= (msr
- 0x200) / 2;
778 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
781 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
784 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
788 kvm_mmu_reset_context(vcpu
);
792 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
794 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
795 unsigned bank_num
= mcg_cap
& 0xff;
798 case MSR_IA32_MCG_STATUS
:
799 vcpu
->arch
.mcg_status
= data
;
801 case MSR_IA32_MCG_CTL
:
802 if (!(mcg_cap
& MCG_CTL_P
))
804 if (data
!= 0 && data
!= ~(u64
)0)
806 vcpu
->arch
.mcg_ctl
= data
;
809 if (msr
>= MSR_IA32_MC0_CTL
&&
810 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
811 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
812 /* only 0 or all 1s can be written to IA32_MCi_CTL */
813 if ((offset
& 0x3) == 0 &&
814 data
!= 0 && data
!= ~(u64
)0)
816 vcpu
->arch
.mce_banks
[offset
] = data
;
824 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
828 set_efer(vcpu
, data
);
831 data
&= ~(u64
)0x40; /* ignore flush filter disable */
833 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
838 case MSR_FAM10H_MMIO_CONF_BASE
:
840 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
845 case MSR_AMD64_NB_CFG
:
847 case MSR_IA32_DEBUGCTLMSR
:
849 /* We support the non-activated case already */
851 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
852 /* Values other than LBR and BTF are vendor-specific,
853 thus reserved and should throw a #GP */
856 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
859 case MSR_IA32_UCODE_REV
:
860 case MSR_IA32_UCODE_WRITE
:
861 case MSR_VM_HSAVE_PA
:
862 case MSR_AMD64_PATCH_LOADER
:
864 case 0x200 ... 0x2ff:
865 return set_msr_mtrr(vcpu
, msr
, data
);
866 case MSR_IA32_APICBASE
:
867 kvm_set_apic_base(vcpu
, data
);
869 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
870 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
871 case MSR_IA32_MISC_ENABLE
:
872 vcpu
->arch
.ia32_misc_enable_msr
= data
;
874 case MSR_KVM_WALL_CLOCK
:
875 vcpu
->kvm
->arch
.wall_clock
= data
;
876 kvm_write_wall_clock(vcpu
->kvm
, data
);
878 case MSR_KVM_SYSTEM_TIME
: {
879 if (vcpu
->arch
.time_page
) {
880 kvm_release_page_dirty(vcpu
->arch
.time_page
);
881 vcpu
->arch
.time_page
= NULL
;
884 vcpu
->arch
.time
= data
;
886 /* we verify if the enable bit is set... */
890 /* ...but clean it before doing the actual write */
891 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
893 vcpu
->arch
.time_page
=
894 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
896 if (is_error_page(vcpu
->arch
.time_page
)) {
897 kvm_release_page_clean(vcpu
->arch
.time_page
);
898 vcpu
->arch
.time_page
= NULL
;
901 kvm_request_guest_time_update(vcpu
);
904 case MSR_IA32_MCG_CTL
:
905 case MSR_IA32_MCG_STATUS
:
906 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
907 return set_msr_mce(vcpu
, msr
, data
);
909 /* Performance counters are not protected by a CPUID bit,
910 * so we should check all of them in the generic path for the sake of
911 * cross vendor migration.
912 * Writing a zero into the event select MSRs disables them,
913 * which we perfectly emulate ;-). Any other value should be at least
914 * reported, some guests depend on them.
916 case MSR_P6_EVNTSEL0
:
917 case MSR_P6_EVNTSEL1
:
918 case MSR_K7_EVNTSEL0
:
919 case MSR_K7_EVNTSEL1
:
920 case MSR_K7_EVNTSEL2
:
921 case MSR_K7_EVNTSEL3
:
923 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
924 "0x%x data 0x%llx\n", msr
, data
);
926 /* at least RHEL 4 unconditionally writes to the perfctr registers,
927 * so we ignore writes to make it happy.
929 case MSR_P6_PERFCTR0
:
930 case MSR_P6_PERFCTR1
:
931 case MSR_K7_PERFCTR0
:
932 case MSR_K7_PERFCTR1
:
933 case MSR_K7_PERFCTR2
:
934 case MSR_K7_PERFCTR3
:
935 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
936 "0x%x data 0x%llx\n", msr
, data
);
940 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
944 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
951 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
955 * Reads an msr value (of 'msr_index') into 'pdata'.
956 * Returns 0 on success, non-0 otherwise.
957 * Assumes vcpu_load() was already called.
959 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
961 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
964 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
966 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
968 if (!msr_mtrr_valid(msr
))
971 if (msr
== MSR_MTRRdefType
)
972 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
973 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
974 else if (msr
== MSR_MTRRfix64K_00000
)
976 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
977 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
978 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
979 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
980 else if (msr
== MSR_IA32_CR_PAT
)
981 *pdata
= vcpu
->arch
.pat
;
982 else { /* Variable MTRRs */
983 int idx
, is_mtrr_mask
;
986 idx
= (msr
- 0x200) / 2;
987 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
990 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
993 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1000 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1003 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1004 unsigned bank_num
= mcg_cap
& 0xff;
1007 case MSR_IA32_P5_MC_ADDR
:
1008 case MSR_IA32_P5_MC_TYPE
:
1011 case MSR_IA32_MCG_CAP
:
1012 data
= vcpu
->arch
.mcg_cap
;
1014 case MSR_IA32_MCG_CTL
:
1015 if (!(mcg_cap
& MCG_CTL_P
))
1017 data
= vcpu
->arch
.mcg_ctl
;
1019 case MSR_IA32_MCG_STATUS
:
1020 data
= vcpu
->arch
.mcg_status
;
1023 if (msr
>= MSR_IA32_MC0_CTL
&&
1024 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1025 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1026 data
= vcpu
->arch
.mce_banks
[offset
];
1035 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1040 case MSR_IA32_PLATFORM_ID
:
1041 case MSR_IA32_UCODE_REV
:
1042 case MSR_IA32_EBL_CR_POWERON
:
1043 case MSR_IA32_DEBUGCTLMSR
:
1044 case MSR_IA32_LASTBRANCHFROMIP
:
1045 case MSR_IA32_LASTBRANCHTOIP
:
1046 case MSR_IA32_LASTINTFROMIP
:
1047 case MSR_IA32_LASTINTTOIP
:
1050 case MSR_VM_HSAVE_PA
:
1051 case MSR_P6_EVNTSEL0
:
1052 case MSR_P6_EVNTSEL1
:
1053 case MSR_K7_EVNTSEL0
:
1054 case MSR_K8_INT_PENDING_MSG
:
1055 case MSR_AMD64_NB_CFG
:
1056 case MSR_FAM10H_MMIO_CONF_BASE
:
1060 data
= 0x500 | KVM_NR_VAR_MTRR
;
1062 case 0x200 ... 0x2ff:
1063 return get_msr_mtrr(vcpu
, msr
, pdata
);
1064 case 0xcd: /* fsb frequency */
1067 case MSR_IA32_APICBASE
:
1068 data
= kvm_get_apic_base(vcpu
);
1070 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1071 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1073 case MSR_IA32_MISC_ENABLE
:
1074 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1076 case MSR_IA32_PERF_STATUS
:
1077 /* TSC increment by tick */
1079 /* CPU multiplier */
1080 data
|= (((uint64_t)4ULL) << 40);
1083 data
= vcpu
->arch
.shadow_efer
;
1085 case MSR_KVM_WALL_CLOCK
:
1086 data
= vcpu
->kvm
->arch
.wall_clock
;
1088 case MSR_KVM_SYSTEM_TIME
:
1089 data
= vcpu
->arch
.time
;
1091 case MSR_IA32_P5_MC_ADDR
:
1092 case MSR_IA32_P5_MC_TYPE
:
1093 case MSR_IA32_MCG_CAP
:
1094 case MSR_IA32_MCG_CTL
:
1095 case MSR_IA32_MCG_STATUS
:
1096 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1097 return get_msr_mce(vcpu
, msr
, pdata
);
1100 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1103 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1111 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1114 * Read or write a bunch of msrs. All parameters are kernel addresses.
1116 * @return number of msrs set successfully.
1118 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1119 struct kvm_msr_entry
*entries
,
1120 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1121 unsigned index
, u64
*data
))
1127 down_read(&vcpu
->kvm
->slots_lock
);
1128 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1129 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1131 up_read(&vcpu
->kvm
->slots_lock
);
1139 * Read or write a bunch of msrs. Parameters are user addresses.
1141 * @return number of msrs set successfully.
1143 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1144 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1145 unsigned index
, u64
*data
),
1148 struct kvm_msrs msrs
;
1149 struct kvm_msr_entry
*entries
;
1154 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1158 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1162 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1163 entries
= vmalloc(size
);
1168 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1171 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1176 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1187 int kvm_dev_ioctl_check_extension(long ext
)
1192 case KVM_CAP_IRQCHIP
:
1194 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1195 case KVM_CAP_SET_TSS_ADDR
:
1196 case KVM_CAP_EXT_CPUID
:
1197 case KVM_CAP_CLOCKSOURCE
:
1199 case KVM_CAP_NOP_IO_DELAY
:
1200 case KVM_CAP_MP_STATE
:
1201 case KVM_CAP_SYNC_MMU
:
1202 case KVM_CAP_REINJECT_CONTROL
:
1203 case KVM_CAP_IRQ_INJECT_STATUS
:
1204 case KVM_CAP_ASSIGN_DEV_IRQ
:
1206 case KVM_CAP_IOEVENTFD
:
1208 case KVM_CAP_PIT_STATE2
:
1211 case KVM_CAP_COALESCED_MMIO
:
1212 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1215 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1217 case KVM_CAP_NR_VCPUS
:
1220 case KVM_CAP_NR_MEMSLOTS
:
1221 r
= KVM_MEMORY_SLOTS
;
1223 case KVM_CAP_PV_MMU
:
1230 r
= KVM_MAX_MCE_BANKS
;
1240 long kvm_arch_dev_ioctl(struct file
*filp
,
1241 unsigned int ioctl
, unsigned long arg
)
1243 void __user
*argp
= (void __user
*)arg
;
1247 case KVM_GET_MSR_INDEX_LIST
: {
1248 struct kvm_msr_list __user
*user_msr_list
= argp
;
1249 struct kvm_msr_list msr_list
;
1253 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
1256 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
1257 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
1260 if (n
< msr_list
.nmsrs
)
1263 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
1264 num_msrs_to_save
* sizeof(u32
)))
1266 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
1268 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
1273 case KVM_GET_SUPPORTED_CPUID
: {
1274 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1275 struct kvm_cpuid2 cpuid
;
1278 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1280 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
1281 cpuid_arg
->entries
);
1286 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1291 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
1294 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
1296 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
1308 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
1310 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
1311 kvm_request_guest_time_update(vcpu
);
1314 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
1316 kvm_x86_ops
->vcpu_put(vcpu
);
1317 kvm_put_guest_fpu(vcpu
);
1320 static int is_efer_nx(void)
1322 unsigned long long efer
= 0;
1324 rdmsrl_safe(MSR_EFER
, &efer
);
1325 return efer
& EFER_NX
;
1328 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
1331 struct kvm_cpuid_entry2
*e
, *entry
;
1334 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
1335 e
= &vcpu
->arch
.cpuid_entries
[i
];
1336 if (e
->function
== 0x80000001) {
1341 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
1342 entry
->edx
&= ~(1 << 20);
1343 printk(KERN_INFO
"kvm: guest NX capability removed\n");
1347 /* when an old userspace process fills a new kernel module */
1348 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
1349 struct kvm_cpuid
*cpuid
,
1350 struct kvm_cpuid_entry __user
*entries
)
1353 struct kvm_cpuid_entry
*cpuid_entries
;
1356 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1359 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
1363 if (copy_from_user(cpuid_entries
, entries
,
1364 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
1366 for (i
= 0; i
< cpuid
->nent
; i
++) {
1367 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
1368 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
1369 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
1370 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
1371 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
1372 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
1373 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
1374 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
1375 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
1376 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
1378 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1379 cpuid_fix_nx_cap(vcpu
);
1381 kvm_apic_set_version(vcpu
);
1384 vfree(cpuid_entries
);
1389 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
1390 struct kvm_cpuid2
*cpuid
,
1391 struct kvm_cpuid_entry2 __user
*entries
)
1396 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1399 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
1400 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
1402 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1403 kvm_apic_set_version(vcpu
);
1410 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
1411 struct kvm_cpuid2
*cpuid
,
1412 struct kvm_cpuid_entry2 __user
*entries
)
1417 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
1420 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
1421 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
1426 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
1430 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1433 entry
->function
= function
;
1434 entry
->index
= index
;
1435 cpuid_count(entry
->function
, entry
->index
,
1436 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
1440 #define F(x) bit(X86_FEATURE_##x)
1442 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1443 u32 index
, int *nent
, int maxnent
)
1445 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
1446 #ifdef CONFIG_X86_64
1447 unsigned f_lm
= F(LM
);
1453 const u32 kvm_supported_word0_x86_features
=
1454 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1455 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1456 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
1457 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1458 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
1459 0 /* Reserved, DS, ACPI */ | F(MMX
) |
1460 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
1461 0 /* HTT, TM, Reserved, PBE */;
1462 /* cpuid 0x80000001.edx */
1463 const u32 kvm_supported_word1_x86_features
=
1464 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1465 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1466 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
1467 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1468 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
1469 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
1470 F(FXSR
) | F(FXSR_OPT
) | 0 /* GBPAGES */ | 0 /* RDTSCP */ |
1471 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
1473 const u32 kvm_supported_word4_x86_features
=
1474 F(XMM3
) | 0 /* Reserved, DTES64, MONITOR */ |
1475 0 /* DS-CPL, VMX, SMX, EST */ |
1476 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1477 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
1478 0 /* Reserved, DCA */ | F(XMM4_1
) |
1479 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
1480 0 /* Reserved, XSAVE, OSXSAVE */;
1481 /* cpuid 0x80000001.ecx */
1482 const u32 kvm_supported_word6_x86_features
=
1483 F(LAHF_LM
) | F(CMP_LEGACY
) | F(SVM
) | 0 /* ExtApicSpace */ |
1484 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
1485 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5
) |
1486 0 /* SKINIT */ | 0 /* WDT */;
1488 /* all calls to cpuid_count() should be made on the same cpu */
1490 do_cpuid_1_ent(entry
, function
, index
);
1495 entry
->eax
= min(entry
->eax
, (u32
)0xb);
1498 entry
->edx
&= kvm_supported_word0_x86_features
;
1499 entry
->ecx
&= kvm_supported_word4_x86_features
;
1500 /* we support x2apic emulation even if host does not support
1501 * it since we emulate x2apic in software */
1502 entry
->ecx
|= F(X2APIC
);
1504 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1505 * may return different values. This forces us to get_cpu() before
1506 * issuing the first command, and also to emulate this annoying behavior
1507 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1509 int t
, times
= entry
->eax
& 0xff;
1511 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1512 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
1513 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
1514 do_cpuid_1_ent(&entry
[t
], function
, 0);
1515 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1520 /* function 4 and 0xb have additional index. */
1524 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1525 /* read more entries until cache_type is zero */
1526 for (i
= 1; *nent
< maxnent
; ++i
) {
1527 cache_type
= entry
[i
- 1].eax
& 0x1f;
1530 do_cpuid_1_ent(&entry
[i
], function
, i
);
1532 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1540 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1541 /* read more entries until level_type is zero */
1542 for (i
= 1; *nent
< maxnent
; ++i
) {
1543 level_type
= entry
[i
- 1].ecx
& 0xff00;
1546 do_cpuid_1_ent(&entry
[i
], function
, i
);
1548 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1554 entry
->eax
= min(entry
->eax
, 0x8000001a);
1557 entry
->edx
&= kvm_supported_word1_x86_features
;
1558 entry
->ecx
&= kvm_supported_word6_x86_features
;
1566 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
1567 struct kvm_cpuid_entry2 __user
*entries
)
1569 struct kvm_cpuid_entry2
*cpuid_entries
;
1570 int limit
, nent
= 0, r
= -E2BIG
;
1573 if (cpuid
->nent
< 1)
1576 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
1580 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
1581 limit
= cpuid_entries
[0].eax
;
1582 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1583 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1584 &nent
, cpuid
->nent
);
1586 if (nent
>= cpuid
->nent
)
1589 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
1590 limit
= cpuid_entries
[nent
- 1].eax
;
1591 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1592 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1593 &nent
, cpuid
->nent
);
1595 if (nent
>= cpuid
->nent
)
1599 if (copy_to_user(entries
, cpuid_entries
,
1600 nent
* sizeof(struct kvm_cpuid_entry2
)))
1606 vfree(cpuid_entries
);
1611 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
1612 struct kvm_lapic_state
*s
)
1615 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
1621 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
1622 struct kvm_lapic_state
*s
)
1625 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
1626 kvm_apic_post_state_restore(vcpu
);
1632 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
1633 struct kvm_interrupt
*irq
)
1635 if (irq
->irq
< 0 || irq
->irq
>= 256)
1637 if (irqchip_in_kernel(vcpu
->kvm
))
1641 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
1648 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
1651 kvm_inject_nmi(vcpu
);
1657 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
1658 struct kvm_tpr_access_ctl
*tac
)
1662 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
1666 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
1670 unsigned bank_num
= mcg_cap
& 0xff, bank
;
1675 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
1678 vcpu
->arch
.mcg_cap
= mcg_cap
;
1679 /* Init IA32_MCG_CTL to all 1s */
1680 if (mcg_cap
& MCG_CTL_P
)
1681 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
1682 /* Init IA32_MCi_CTL to all 1s */
1683 for (bank
= 0; bank
< bank_num
; bank
++)
1684 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
1689 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
1690 struct kvm_x86_mce
*mce
)
1692 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1693 unsigned bank_num
= mcg_cap
& 0xff;
1694 u64
*banks
= vcpu
->arch
.mce_banks
;
1696 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
1699 * if IA32_MCG_CTL is not all 1s, the uncorrected error
1700 * reporting is disabled
1702 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
1703 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
1705 banks
+= 4 * mce
->bank
;
1707 * if IA32_MCi_CTL is not all 1s, the uncorrected error
1708 * reporting is disabled for the bank
1710 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
1712 if (mce
->status
& MCI_STATUS_UC
) {
1713 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
1714 !(vcpu
->arch
.cr4
& X86_CR4_MCE
)) {
1715 printk(KERN_DEBUG
"kvm: set_mce: "
1716 "injects mce exception while "
1717 "previous one is in progress!\n");
1718 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
1721 if (banks
[1] & MCI_STATUS_VAL
)
1722 mce
->status
|= MCI_STATUS_OVER
;
1723 banks
[2] = mce
->addr
;
1724 banks
[3] = mce
->misc
;
1725 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
1726 banks
[1] = mce
->status
;
1727 kvm_queue_exception(vcpu
, MC_VECTOR
);
1728 } else if (!(banks
[1] & MCI_STATUS_VAL
)
1729 || !(banks
[1] & MCI_STATUS_UC
)) {
1730 if (banks
[1] & MCI_STATUS_VAL
)
1731 mce
->status
|= MCI_STATUS_OVER
;
1732 banks
[2] = mce
->addr
;
1733 banks
[3] = mce
->misc
;
1734 banks
[1] = mce
->status
;
1736 banks
[1] |= MCI_STATUS_OVER
;
1740 long kvm_arch_vcpu_ioctl(struct file
*filp
,
1741 unsigned int ioctl
, unsigned long arg
)
1743 struct kvm_vcpu
*vcpu
= filp
->private_data
;
1744 void __user
*argp
= (void __user
*)arg
;
1746 struct kvm_lapic_state
*lapic
= NULL
;
1749 case KVM_GET_LAPIC
: {
1750 lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
1755 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, lapic
);
1759 if (copy_to_user(argp
, lapic
, sizeof(struct kvm_lapic_state
)))
1764 case KVM_SET_LAPIC
: {
1765 lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
1770 if (copy_from_user(lapic
, argp
, sizeof(struct kvm_lapic_state
)))
1772 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, lapic
);
1778 case KVM_INTERRUPT
: {
1779 struct kvm_interrupt irq
;
1782 if (copy_from_user(&irq
, argp
, sizeof irq
))
1784 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
1791 r
= kvm_vcpu_ioctl_nmi(vcpu
);
1797 case KVM_SET_CPUID
: {
1798 struct kvm_cpuid __user
*cpuid_arg
= argp
;
1799 struct kvm_cpuid cpuid
;
1802 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1804 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
1809 case KVM_SET_CPUID2
: {
1810 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1811 struct kvm_cpuid2 cpuid
;
1814 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1816 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
1817 cpuid_arg
->entries
);
1822 case KVM_GET_CPUID2
: {
1823 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1824 struct kvm_cpuid2 cpuid
;
1827 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1829 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
1830 cpuid_arg
->entries
);
1834 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1840 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
1843 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
1845 case KVM_TPR_ACCESS_REPORTING
: {
1846 struct kvm_tpr_access_ctl tac
;
1849 if (copy_from_user(&tac
, argp
, sizeof tac
))
1851 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
1855 if (copy_to_user(argp
, &tac
, sizeof tac
))
1860 case KVM_SET_VAPIC_ADDR
: {
1861 struct kvm_vapic_addr va
;
1864 if (!irqchip_in_kernel(vcpu
->kvm
))
1867 if (copy_from_user(&va
, argp
, sizeof va
))
1870 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
1873 case KVM_X86_SETUP_MCE
: {
1877 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
1879 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
1882 case KVM_X86_SET_MCE
: {
1883 struct kvm_x86_mce mce
;
1886 if (copy_from_user(&mce
, argp
, sizeof mce
))
1888 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
1899 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
1903 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
1905 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
1909 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
1910 u32 kvm_nr_mmu_pages
)
1912 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
1915 down_write(&kvm
->slots_lock
);
1916 spin_lock(&kvm
->mmu_lock
);
1918 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
1919 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
1921 spin_unlock(&kvm
->mmu_lock
);
1922 up_write(&kvm
->slots_lock
);
1926 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
1928 return kvm
->arch
.n_alloc_mmu_pages
;
1931 gfn_t
unalias_gfn(struct kvm
*kvm
, gfn_t gfn
)
1934 struct kvm_mem_alias
*alias
;
1936 for (i
= 0; i
< kvm
->arch
.naliases
; ++i
) {
1937 alias
= &kvm
->arch
.aliases
[i
];
1938 if (gfn
>= alias
->base_gfn
1939 && gfn
< alias
->base_gfn
+ alias
->npages
)
1940 return alias
->target_gfn
+ gfn
- alias
->base_gfn
;
1946 * Set a new alias region. Aliases map a portion of physical memory into
1947 * another portion. This is useful for memory windows, for example the PC
1950 static int kvm_vm_ioctl_set_memory_alias(struct kvm
*kvm
,
1951 struct kvm_memory_alias
*alias
)
1954 struct kvm_mem_alias
*p
;
1957 /* General sanity checks */
1958 if (alias
->memory_size
& (PAGE_SIZE
- 1))
1960 if (alias
->guest_phys_addr
& (PAGE_SIZE
- 1))
1962 if (alias
->slot
>= KVM_ALIAS_SLOTS
)
1964 if (alias
->guest_phys_addr
+ alias
->memory_size
1965 < alias
->guest_phys_addr
)
1967 if (alias
->target_phys_addr
+ alias
->memory_size
1968 < alias
->target_phys_addr
)
1971 down_write(&kvm
->slots_lock
);
1972 spin_lock(&kvm
->mmu_lock
);
1974 p
= &kvm
->arch
.aliases
[alias
->slot
];
1975 p
->base_gfn
= alias
->guest_phys_addr
>> PAGE_SHIFT
;
1976 p
->npages
= alias
->memory_size
>> PAGE_SHIFT
;
1977 p
->target_gfn
= alias
->target_phys_addr
>> PAGE_SHIFT
;
1979 for (n
= KVM_ALIAS_SLOTS
; n
> 0; --n
)
1980 if (kvm
->arch
.aliases
[n
- 1].npages
)
1982 kvm
->arch
.naliases
= n
;
1984 spin_unlock(&kvm
->mmu_lock
);
1985 kvm_mmu_zap_all(kvm
);
1987 up_write(&kvm
->slots_lock
);
1995 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2000 switch (chip
->chip_id
) {
2001 case KVM_IRQCHIP_PIC_MASTER
:
2002 memcpy(&chip
->chip
.pic
,
2003 &pic_irqchip(kvm
)->pics
[0],
2004 sizeof(struct kvm_pic_state
));
2006 case KVM_IRQCHIP_PIC_SLAVE
:
2007 memcpy(&chip
->chip
.pic
,
2008 &pic_irqchip(kvm
)->pics
[1],
2009 sizeof(struct kvm_pic_state
));
2011 case KVM_IRQCHIP_IOAPIC
:
2012 memcpy(&chip
->chip
.ioapic
,
2013 ioapic_irqchip(kvm
),
2014 sizeof(struct kvm_ioapic_state
));
2023 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2028 switch (chip
->chip_id
) {
2029 case KVM_IRQCHIP_PIC_MASTER
:
2030 spin_lock(&pic_irqchip(kvm
)->lock
);
2031 memcpy(&pic_irqchip(kvm
)->pics
[0],
2033 sizeof(struct kvm_pic_state
));
2034 spin_unlock(&pic_irqchip(kvm
)->lock
);
2036 case KVM_IRQCHIP_PIC_SLAVE
:
2037 spin_lock(&pic_irqchip(kvm
)->lock
);
2038 memcpy(&pic_irqchip(kvm
)->pics
[1],
2040 sizeof(struct kvm_pic_state
));
2041 spin_unlock(&pic_irqchip(kvm
)->lock
);
2043 case KVM_IRQCHIP_IOAPIC
:
2044 mutex_lock(&kvm
->irq_lock
);
2045 memcpy(ioapic_irqchip(kvm
),
2047 sizeof(struct kvm_ioapic_state
));
2048 mutex_unlock(&kvm
->irq_lock
);
2054 kvm_pic_update_irq(pic_irqchip(kvm
));
2058 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2062 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2063 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
2064 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2068 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2072 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2073 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
2074 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
2075 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2079 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2083 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2084 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
2085 sizeof(ps
->channels
));
2086 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
2087 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2091 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2093 int r
= 0, start
= 0;
2094 u32 prev_legacy
, cur_legacy
;
2095 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2096 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2097 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2098 if (!prev_legacy
&& cur_legacy
)
2100 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
2101 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
2102 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
2103 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
2104 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2108 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
2109 struct kvm_reinject_control
*control
)
2111 if (!kvm
->arch
.vpit
)
2113 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2114 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
2115 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2120 * Get (and clear) the dirty memory log for a memory slot.
2122 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
2123 struct kvm_dirty_log
*log
)
2127 struct kvm_memory_slot
*memslot
;
2130 down_write(&kvm
->slots_lock
);
2132 r
= kvm_get_dirty_log(kvm
, log
, &is_dirty
);
2136 /* If nothing is dirty, don't bother messing with page tables. */
2138 spin_lock(&kvm
->mmu_lock
);
2139 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
2140 spin_unlock(&kvm
->mmu_lock
);
2141 kvm_flush_remote_tlbs(kvm
);
2142 memslot
= &kvm
->memslots
[log
->slot
];
2143 n
= ALIGN(memslot
->npages
, BITS_PER_LONG
) / 8;
2144 memset(memslot
->dirty_bitmap
, 0, n
);
2148 up_write(&kvm
->slots_lock
);
2152 long kvm_arch_vm_ioctl(struct file
*filp
,
2153 unsigned int ioctl
, unsigned long arg
)
2155 struct kvm
*kvm
= filp
->private_data
;
2156 void __user
*argp
= (void __user
*)arg
;
2159 * This union makes it completely explicit to gcc-3.x
2160 * that these two variables' stack usage should be
2161 * combined, not added together.
2164 struct kvm_pit_state ps
;
2165 struct kvm_pit_state2 ps2
;
2166 struct kvm_memory_alias alias
;
2167 struct kvm_pit_config pit_config
;
2171 case KVM_SET_TSS_ADDR
:
2172 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
2176 case KVM_SET_MEMORY_REGION
: {
2177 struct kvm_memory_region kvm_mem
;
2178 struct kvm_userspace_memory_region kvm_userspace_mem
;
2181 if (copy_from_user(&kvm_mem
, argp
, sizeof kvm_mem
))
2183 kvm_userspace_mem
.slot
= kvm_mem
.slot
;
2184 kvm_userspace_mem
.flags
= kvm_mem
.flags
;
2185 kvm_userspace_mem
.guest_phys_addr
= kvm_mem
.guest_phys_addr
;
2186 kvm_userspace_mem
.memory_size
= kvm_mem
.memory_size
;
2187 r
= kvm_vm_ioctl_set_memory_region(kvm
, &kvm_userspace_mem
, 0);
2192 case KVM_SET_NR_MMU_PAGES
:
2193 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
2197 case KVM_GET_NR_MMU_PAGES
:
2198 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
2200 case KVM_SET_MEMORY_ALIAS
:
2202 if (copy_from_user(&u
.alias
, argp
, sizeof(struct kvm_memory_alias
)))
2204 r
= kvm_vm_ioctl_set_memory_alias(kvm
, &u
.alias
);
2208 case KVM_CREATE_IRQCHIP
:
2210 kvm
->arch
.vpic
= kvm_create_pic(kvm
);
2211 if (kvm
->arch
.vpic
) {
2212 r
= kvm_ioapic_init(kvm
);
2214 kfree(kvm
->arch
.vpic
);
2215 kvm
->arch
.vpic
= NULL
;
2220 r
= kvm_setup_default_irq_routing(kvm
);
2222 kfree(kvm
->arch
.vpic
);
2223 kfree(kvm
->arch
.vioapic
);
2227 case KVM_CREATE_PIT
:
2228 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
2230 case KVM_CREATE_PIT2
:
2232 if (copy_from_user(&u
.pit_config
, argp
,
2233 sizeof(struct kvm_pit_config
)))
2236 down_write(&kvm
->slots_lock
);
2239 goto create_pit_unlock
;
2241 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
2245 up_write(&kvm
->slots_lock
);
2247 case KVM_IRQ_LINE_STATUS
:
2248 case KVM_IRQ_LINE
: {
2249 struct kvm_irq_level irq_event
;
2252 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
2254 if (irqchip_in_kernel(kvm
)) {
2256 mutex_lock(&kvm
->irq_lock
);
2257 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
2258 irq_event
.irq
, irq_event
.level
);
2259 mutex_unlock(&kvm
->irq_lock
);
2260 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
2261 irq_event
.status
= status
;
2262 if (copy_to_user(argp
, &irq_event
,
2270 case KVM_GET_IRQCHIP
: {
2271 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2272 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2278 if (copy_from_user(chip
, argp
, sizeof *chip
))
2279 goto get_irqchip_out
;
2281 if (!irqchip_in_kernel(kvm
))
2282 goto get_irqchip_out
;
2283 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
2285 goto get_irqchip_out
;
2287 if (copy_to_user(argp
, chip
, sizeof *chip
))
2288 goto get_irqchip_out
;
2296 case KVM_SET_IRQCHIP
: {
2297 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2298 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2304 if (copy_from_user(chip
, argp
, sizeof *chip
))
2305 goto set_irqchip_out
;
2307 if (!irqchip_in_kernel(kvm
))
2308 goto set_irqchip_out
;
2309 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
2311 goto set_irqchip_out
;
2321 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
2324 if (!kvm
->arch
.vpit
)
2326 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
2330 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
2337 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
2340 if (!kvm
->arch
.vpit
)
2342 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
2348 case KVM_GET_PIT2
: {
2350 if (!kvm
->arch
.vpit
)
2352 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
2356 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
2361 case KVM_SET_PIT2
: {
2363 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
2366 if (!kvm
->arch
.vpit
)
2368 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
2374 case KVM_REINJECT_CONTROL
: {
2375 struct kvm_reinject_control control
;
2377 if (copy_from_user(&control
, argp
, sizeof(control
)))
2379 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
2392 static void kvm_init_msr_list(void)
2397 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
2398 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
2401 msrs_to_save
[j
] = msrs_to_save
[i
];
2404 num_msrs_to_save
= j
;
2407 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
2410 if (vcpu
->arch
.apic
&&
2411 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2414 return kvm_io_bus_write(&vcpu
->kvm
->mmio_bus
, addr
, len
, v
);
2417 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
2419 if (vcpu
->arch
.apic
&&
2420 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2423 return kvm_io_bus_read(&vcpu
->kvm
->mmio_bus
, addr
, len
, v
);
2426 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2427 struct kvm_vcpu
*vcpu
)
2430 int r
= X86EMUL_CONTINUE
;
2433 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2434 unsigned offset
= addr
& (PAGE_SIZE
-1);
2435 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2438 if (gpa
== UNMAPPED_GVA
) {
2439 r
= X86EMUL_PROPAGATE_FAULT
;
2442 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
2444 r
= X86EMUL_UNHANDLEABLE
;
2456 static int kvm_write_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2457 struct kvm_vcpu
*vcpu
)
2460 int r
= X86EMUL_CONTINUE
;
2463 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2464 unsigned offset
= addr
& (PAGE_SIZE
-1);
2465 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2468 if (gpa
== UNMAPPED_GVA
) {
2469 r
= X86EMUL_PROPAGATE_FAULT
;
2472 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
2474 r
= X86EMUL_UNHANDLEABLE
;
2487 static int emulator_read_emulated(unsigned long addr
,
2490 struct kvm_vcpu
*vcpu
)
2494 if (vcpu
->mmio_read_completed
) {
2495 memcpy(val
, vcpu
->mmio_data
, bytes
);
2496 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
2497 vcpu
->mmio_phys_addr
, *(u64
*)val
);
2498 vcpu
->mmio_read_completed
= 0;
2499 return X86EMUL_CONTINUE
;
2502 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2504 /* For APIC access vmexit */
2505 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2508 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
)
2509 == X86EMUL_CONTINUE
)
2510 return X86EMUL_CONTINUE
;
2511 if (gpa
== UNMAPPED_GVA
)
2512 return X86EMUL_PROPAGATE_FAULT
;
2516 * Is this MMIO handled locally?
2518 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
2519 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
2520 return X86EMUL_CONTINUE
;
2523 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
2525 vcpu
->mmio_needed
= 1;
2526 vcpu
->mmio_phys_addr
= gpa
;
2527 vcpu
->mmio_size
= bytes
;
2528 vcpu
->mmio_is_write
= 0;
2530 return X86EMUL_UNHANDLEABLE
;
2533 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
2534 const void *val
, int bytes
)
2538 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
2541 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
2545 static int emulator_write_emulated_onepage(unsigned long addr
,
2548 struct kvm_vcpu
*vcpu
)
2552 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2554 if (gpa
== UNMAPPED_GVA
) {
2555 kvm_inject_page_fault(vcpu
, addr
, 2);
2556 return X86EMUL_PROPAGATE_FAULT
;
2559 /* For APIC access vmexit */
2560 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2563 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
2564 return X86EMUL_CONTINUE
;
2567 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
2569 * Is this MMIO handled locally?
2571 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
2572 return X86EMUL_CONTINUE
;
2574 vcpu
->mmio_needed
= 1;
2575 vcpu
->mmio_phys_addr
= gpa
;
2576 vcpu
->mmio_size
= bytes
;
2577 vcpu
->mmio_is_write
= 1;
2578 memcpy(vcpu
->mmio_data
, val
, bytes
);
2580 return X86EMUL_CONTINUE
;
2583 int emulator_write_emulated(unsigned long addr
,
2586 struct kvm_vcpu
*vcpu
)
2588 /* Crossing a page boundary? */
2589 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
2592 now
= -addr
& ~PAGE_MASK
;
2593 rc
= emulator_write_emulated_onepage(addr
, val
, now
, vcpu
);
2594 if (rc
!= X86EMUL_CONTINUE
)
2600 return emulator_write_emulated_onepage(addr
, val
, bytes
, vcpu
);
2602 EXPORT_SYMBOL_GPL(emulator_write_emulated
);
2604 static int emulator_cmpxchg_emulated(unsigned long addr
,
2608 struct kvm_vcpu
*vcpu
)
2610 static int reported
;
2614 printk(KERN_WARNING
"kvm: emulating exchange as write\n");
2616 #ifndef CONFIG_X86_64
2617 /* guests cmpxchg8b have to be emulated atomically */
2624 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2626 if (gpa
== UNMAPPED_GVA
||
2627 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2630 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
2635 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
2637 kaddr
= kmap_atomic(page
, KM_USER0
);
2638 set_64bit((u64
*)(kaddr
+ offset_in_page(gpa
)), val
);
2639 kunmap_atomic(kaddr
, KM_USER0
);
2640 kvm_release_page_dirty(page
);
2645 return emulator_write_emulated(addr
, new, bytes
, vcpu
);
2648 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
2650 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
2653 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
2655 kvm_mmu_invlpg(vcpu
, address
);
2656 return X86EMUL_CONTINUE
;
2659 int emulate_clts(struct kvm_vcpu
*vcpu
)
2661 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
& ~X86_CR0_TS
);
2662 return X86EMUL_CONTINUE
;
2665 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
2667 struct kvm_vcpu
*vcpu
= ctxt
->vcpu
;
2671 *dest
= kvm_x86_ops
->get_dr(vcpu
, dr
);
2672 return X86EMUL_CONTINUE
;
2674 pr_unimpl(vcpu
, "%s: unexpected dr %u\n", __func__
, dr
);
2675 return X86EMUL_UNHANDLEABLE
;
2679 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
2681 unsigned long mask
= (ctxt
->mode
== X86EMUL_MODE_PROT64
) ? ~0ULL : ~0U;
2684 kvm_x86_ops
->set_dr(ctxt
->vcpu
, dr
, value
& mask
, &exception
);
2686 /* FIXME: better handling */
2687 return X86EMUL_UNHANDLEABLE
;
2689 return X86EMUL_CONTINUE
;
2692 void kvm_report_emulation_failure(struct kvm_vcpu
*vcpu
, const char *context
)
2695 unsigned long rip
= kvm_rip_read(vcpu
);
2696 unsigned long rip_linear
;
2698 if (!printk_ratelimit())
2701 rip_linear
= rip
+ get_segment_base(vcpu
, VCPU_SREG_CS
);
2703 kvm_read_guest_virt(rip_linear
, (void *)opcodes
, 4, vcpu
);
2705 printk(KERN_ERR
"emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2706 context
, rip
, opcodes
[0], opcodes
[1], opcodes
[2], opcodes
[3]);
2708 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure
);
2710 static struct x86_emulate_ops emulate_ops
= {
2711 .read_std
= kvm_read_guest_virt
,
2712 .read_emulated
= emulator_read_emulated
,
2713 .write_emulated
= emulator_write_emulated
,
2714 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
2717 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
2719 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
2720 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
2721 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
2722 vcpu
->arch
.regs_dirty
= ~0;
2725 int emulate_instruction(struct kvm_vcpu
*vcpu
,
2726 struct kvm_run
*run
,
2732 struct decode_cache
*c
;
2734 kvm_clear_exception_queue(vcpu
);
2735 vcpu
->arch
.mmio_fault_cr2
= cr2
;
2737 * TODO: fix x86_emulate.c to use guest_read/write_register
2738 * instead of direct ->regs accesses, can save hundred cycles
2739 * on Intel for instructions that don't read/change RSP, for
2742 cache_all_regs(vcpu
);
2744 vcpu
->mmio_is_write
= 0;
2745 vcpu
->arch
.pio
.string
= 0;
2747 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
2749 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
2751 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
2752 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_x86_ops
->get_rflags(vcpu
);
2753 vcpu
->arch
.emulate_ctxt
.mode
=
2754 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
2755 ? X86EMUL_MODE_REAL
: cs_l
2756 ? X86EMUL_MODE_PROT64
: cs_db
2757 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
2759 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
2761 /* Only allow emulation of specific instructions on #UD
2762 * (namely VMMCALL, sysenter, sysexit, syscall)*/
2763 c
= &vcpu
->arch
.emulate_ctxt
.decode
;
2764 if (emulation_type
& EMULTYPE_TRAP_UD
) {
2766 return EMULATE_FAIL
;
2768 case 0x01: /* VMMCALL */
2769 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
2770 return EMULATE_FAIL
;
2772 case 0x34: /* sysenter */
2773 case 0x35: /* sysexit */
2774 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
2775 return EMULATE_FAIL
;
2777 case 0x05: /* syscall */
2778 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
2779 return EMULATE_FAIL
;
2782 return EMULATE_FAIL
;
2785 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
2786 return EMULATE_FAIL
;
2789 ++vcpu
->stat
.insn_emulation
;
2791 ++vcpu
->stat
.insn_emulation_fail
;
2792 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
2793 return EMULATE_DONE
;
2794 return EMULATE_FAIL
;
2798 if (emulation_type
& EMULTYPE_SKIP
) {
2799 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
2800 return EMULATE_DONE
;
2803 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
2804 shadow_mask
= vcpu
->arch
.emulate_ctxt
.interruptibility
;
2807 kvm_x86_ops
->set_interrupt_shadow(vcpu
, shadow_mask
);
2809 if (vcpu
->arch
.pio
.string
)
2810 return EMULATE_DO_MMIO
;
2812 if ((r
|| vcpu
->mmio_is_write
) && run
) {
2813 run
->exit_reason
= KVM_EXIT_MMIO
;
2814 run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
;
2815 memcpy(run
->mmio
.data
, vcpu
->mmio_data
, 8);
2816 run
->mmio
.len
= vcpu
->mmio_size
;
2817 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
2821 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
2822 return EMULATE_DONE
;
2823 if (!vcpu
->mmio_needed
) {
2824 kvm_report_emulation_failure(vcpu
, "mmio");
2825 return EMULATE_FAIL
;
2827 return EMULATE_DO_MMIO
;
2830 kvm_x86_ops
->set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
2832 if (vcpu
->mmio_is_write
) {
2833 vcpu
->mmio_needed
= 0;
2834 return EMULATE_DO_MMIO
;
2837 return EMULATE_DONE
;
2839 EXPORT_SYMBOL_GPL(emulate_instruction
);
2841 static int pio_copy_data(struct kvm_vcpu
*vcpu
)
2843 void *p
= vcpu
->arch
.pio_data
;
2844 gva_t q
= vcpu
->arch
.pio
.guest_gva
;
2848 bytes
= vcpu
->arch
.pio
.size
* vcpu
->arch
.pio
.cur_count
;
2849 if (vcpu
->arch
.pio
.in
)
2850 ret
= kvm_write_guest_virt(q
, p
, bytes
, vcpu
);
2852 ret
= kvm_read_guest_virt(q
, p
, bytes
, vcpu
);
2856 int complete_pio(struct kvm_vcpu
*vcpu
)
2858 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
2865 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
2866 memcpy(&val
, vcpu
->arch
.pio_data
, io
->size
);
2867 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
2871 r
= pio_copy_data(vcpu
);
2878 delta
*= io
->cur_count
;
2880 * The size of the register should really depend on
2881 * current address size.
2883 val
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
2885 kvm_register_write(vcpu
, VCPU_REGS_RCX
, val
);
2891 val
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
2893 kvm_register_write(vcpu
, VCPU_REGS_RDI
, val
);
2895 val
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
2897 kvm_register_write(vcpu
, VCPU_REGS_RSI
, val
);
2901 io
->count
-= io
->cur_count
;
2907 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
2909 /* TODO: String I/O for in kernel device */
2912 if (vcpu
->arch
.pio
.in
)
2913 r
= kvm_io_bus_read(&vcpu
->kvm
->pio_bus
, vcpu
->arch
.pio
.port
,
2914 vcpu
->arch
.pio
.size
, pd
);
2916 r
= kvm_io_bus_write(&vcpu
->kvm
->pio_bus
, vcpu
->arch
.pio
.port
,
2917 vcpu
->arch
.pio
.size
, pd
);
2921 static int pio_string_write(struct kvm_vcpu
*vcpu
)
2923 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
2924 void *pd
= vcpu
->arch
.pio_data
;
2927 for (i
= 0; i
< io
->cur_count
; i
++) {
2928 if (kvm_io_bus_write(&vcpu
->kvm
->pio_bus
,
2929 io
->port
, io
->size
, pd
)) {
2938 int kvm_emulate_pio(struct kvm_vcpu
*vcpu
, struct kvm_run
*run
, int in
,
2939 int size
, unsigned port
)
2943 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
2944 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
2945 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
2946 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
2947 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= 1;
2948 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
2949 vcpu
->arch
.pio
.in
= in
;
2950 vcpu
->arch
.pio
.string
= 0;
2951 vcpu
->arch
.pio
.down
= 0;
2952 vcpu
->arch
.pio
.rep
= 0;
2954 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
2957 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
2958 memcpy(vcpu
->arch
.pio_data
, &val
, 4);
2960 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
2966 EXPORT_SYMBOL_GPL(kvm_emulate_pio
);
2968 int kvm_emulate_pio_string(struct kvm_vcpu
*vcpu
, struct kvm_run
*run
, int in
,
2969 int size
, unsigned long count
, int down
,
2970 gva_t address
, int rep
, unsigned port
)
2972 unsigned now
, in_page
;
2975 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
2976 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
2977 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
2978 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
2979 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= count
;
2980 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
2981 vcpu
->arch
.pio
.in
= in
;
2982 vcpu
->arch
.pio
.string
= 1;
2983 vcpu
->arch
.pio
.down
= down
;
2984 vcpu
->arch
.pio
.rep
= rep
;
2986 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
2990 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
2995 in_page
= PAGE_SIZE
- offset_in_page(address
);
2997 in_page
= offset_in_page(address
) + size
;
2998 now
= min(count
, (unsigned long)in_page
/ size
);
3003 * String I/O in reverse. Yuck. Kill the guest, fix later.
3005 pr_unimpl(vcpu
, "guest string pio down\n");
3006 kvm_inject_gp(vcpu
, 0);
3009 vcpu
->run
->io
.count
= now
;
3010 vcpu
->arch
.pio
.cur_count
= now
;
3012 if (vcpu
->arch
.pio
.cur_count
== vcpu
->arch
.pio
.count
)
3013 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3015 vcpu
->arch
.pio
.guest_gva
= address
;
3017 if (!vcpu
->arch
.pio
.in
) {
3018 /* string PIO write */
3019 ret
= pio_copy_data(vcpu
);
3020 if (ret
== X86EMUL_PROPAGATE_FAULT
) {
3021 kvm_inject_gp(vcpu
, 0);
3024 if (ret
== 0 && !pio_string_write(vcpu
)) {
3026 if (vcpu
->arch
.pio
.count
== 0)
3030 /* no string PIO read support yet */
3034 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string
);
3036 static void bounce_off(void *info
)
3041 static unsigned int ref_freq
;
3042 static unsigned long tsc_khz_ref
;
3044 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
3047 struct cpufreq_freqs
*freq
= data
;
3049 struct kvm_vcpu
*vcpu
;
3050 int i
, send_ipi
= 0;
3053 ref_freq
= freq
->old
;
3055 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
3057 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
3059 per_cpu(cpu_tsc_khz
, freq
->cpu
) = cpufreq_scale(tsc_khz_ref
, ref_freq
, freq
->new);
3061 spin_lock(&kvm_lock
);
3062 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
3063 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3064 if (vcpu
->cpu
!= freq
->cpu
)
3066 if (!kvm_request_guest_time_update(vcpu
))
3068 if (vcpu
->cpu
!= smp_processor_id())
3072 spin_unlock(&kvm_lock
);
3074 if (freq
->old
< freq
->new && send_ipi
) {
3076 * We upscale the frequency. Must make the guest
3077 * doesn't see old kvmclock values while running with
3078 * the new frequency, otherwise we risk the guest sees
3079 * time go backwards.
3081 * In case we update the frequency for another cpu
3082 * (which might be in guest context) send an interrupt
3083 * to kick the cpu out of guest context. Next time
3084 * guest context is entered kvmclock will be updated,
3085 * so the guest will not see stale values.
3087 smp_call_function_single(freq
->cpu
, bounce_off
, NULL
, 1);
3092 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
3093 .notifier_call
= kvmclock_cpufreq_notifier
3096 int kvm_arch_init(void *opaque
)
3099 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
3102 printk(KERN_ERR
"kvm: already loaded the other module\n");
3107 if (!ops
->cpu_has_kvm_support()) {
3108 printk(KERN_ERR
"kvm: no hardware support\n");
3112 if (ops
->disabled_by_bios()) {
3113 printk(KERN_ERR
"kvm: disabled by bios\n");
3118 r
= kvm_mmu_module_init();
3122 kvm_init_msr_list();
3125 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3126 kvm_mmu_set_base_ptes(PT_PRESENT_MASK
);
3127 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
3128 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
3130 for_each_possible_cpu(cpu
)
3131 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
3132 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
3133 tsc_khz_ref
= tsc_khz
;
3134 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
3135 CPUFREQ_TRANSITION_NOTIFIER
);
3144 void kvm_arch_exit(void)
3146 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
3147 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
3148 CPUFREQ_TRANSITION_NOTIFIER
);
3150 kvm_mmu_module_exit();
3153 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
3155 ++vcpu
->stat
.halt_exits
;
3156 if (irqchip_in_kernel(vcpu
->kvm
)) {
3157 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
3160 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
3164 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
3166 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
3169 if (is_long_mode(vcpu
))
3172 return a0
| ((gpa_t
)a1
<< 32);
3175 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
3177 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
3180 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3181 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3182 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3183 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3184 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3186 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
3188 if (!is_long_mode(vcpu
)) {
3197 case KVM_HC_VAPIC_POLL_IRQ
:
3201 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
3207 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
3208 ++vcpu
->stat
.hypercalls
;
3211 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
3213 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
3215 char instruction
[3];
3217 unsigned long rip
= kvm_rip_read(vcpu
);
3221 * Blow out the MMU to ensure that no other VCPU has an active mapping
3222 * to ensure that the updated hypercall appears atomically across all
3225 kvm_mmu_zap_all(vcpu
->kvm
);
3227 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
3228 if (emulator_write_emulated(rip
, instruction
, 3, vcpu
)
3229 != X86EMUL_CONTINUE
)
3235 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
3237 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
3240 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3242 struct descriptor_table dt
= { limit
, base
};
3244 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
3247 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3249 struct descriptor_table dt
= { limit
, base
};
3251 kvm_x86_ops
->set_idt(vcpu
, &dt
);
3254 void realmode_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
,
3255 unsigned long *rflags
)
3257 kvm_lmsw(vcpu
, msw
);
3258 *rflags
= kvm_x86_ops
->get_rflags(vcpu
);
3261 unsigned long realmode_get_cr(struct kvm_vcpu
*vcpu
, int cr
)
3263 unsigned long value
;
3265 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
3268 value
= vcpu
->arch
.cr0
;
3271 value
= vcpu
->arch
.cr2
;
3274 value
= vcpu
->arch
.cr3
;
3277 value
= vcpu
->arch
.cr4
;
3280 value
= kvm_get_cr8(vcpu
);
3283 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3290 void realmode_set_cr(struct kvm_vcpu
*vcpu
, int cr
, unsigned long val
,
3291 unsigned long *rflags
)
3295 kvm_set_cr0(vcpu
, mk_cr_64(vcpu
->arch
.cr0
, val
));
3296 *rflags
= kvm_x86_ops
->get_rflags(vcpu
);
3299 vcpu
->arch
.cr2
= val
;
3302 kvm_set_cr3(vcpu
, val
);
3305 kvm_set_cr4(vcpu
, mk_cr_64(vcpu
->arch
.cr4
, val
));
3308 kvm_set_cr8(vcpu
, val
& 0xfUL
);
3311 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3315 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
3317 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
3318 int j
, nent
= vcpu
->arch
.cpuid_nent
;
3320 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
3321 /* when no next entry is found, the current entry[i] is reselected */
3322 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
3323 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
3324 if (ej
->function
== e
->function
) {
3325 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
3329 return 0; /* silence gcc, even though control never reaches here */
3332 /* find an entry with matching function, matching index (if needed), and that
3333 * should be read next (if it's stateful) */
3334 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
3335 u32 function
, u32 index
)
3337 if (e
->function
!= function
)
3339 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
3341 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
3342 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
3347 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
3348 u32 function
, u32 index
)
3351 struct kvm_cpuid_entry2
*best
= NULL
;
3353 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
3354 struct kvm_cpuid_entry2
*e
;
3356 e
= &vcpu
->arch
.cpuid_entries
[i
];
3357 if (is_matching_cpuid_entry(e
, function
, index
)) {
3358 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
3359 move_to_next_stateful_cpuid_entry(vcpu
, i
);
3364 * Both basic or both extended?
3366 if (((e
->function
^ function
) & 0x80000000) == 0)
3367 if (!best
|| e
->function
> best
->function
)
3373 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
3375 struct kvm_cpuid_entry2
*best
;
3377 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
3379 return best
->eax
& 0xff;
3383 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
3385 u32 function
, index
;
3386 struct kvm_cpuid_entry2
*best
;
3388 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3389 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3390 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
3391 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
3392 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
3393 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
3394 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
3396 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
3397 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
3398 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
3399 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
3401 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3402 trace_kvm_cpuid(function
,
3403 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
3404 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
3405 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
3406 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
3408 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
3411 * Check if userspace requested an interrupt window, and that the
3412 * interrupt window is open.
3414 * No need to exit to userspace if we already have an interrupt queued.
3416 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
,
3417 struct kvm_run
*kvm_run
)
3419 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
3420 kvm_run
->request_interrupt_window
&&
3421 kvm_arch_interrupt_allowed(vcpu
));
3424 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
,
3425 struct kvm_run
*kvm_run
)
3427 kvm_run
->if_flag
= (kvm_x86_ops
->get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
3428 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
3429 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
3430 if (irqchip_in_kernel(vcpu
->kvm
))
3431 kvm_run
->ready_for_interrupt_injection
= 1;
3433 kvm_run
->ready_for_interrupt_injection
=
3434 kvm_arch_interrupt_allowed(vcpu
) &&
3435 !kvm_cpu_has_interrupt(vcpu
) &&
3436 !kvm_event_needs_reinjection(vcpu
);
3439 static void vapic_enter(struct kvm_vcpu
*vcpu
)
3441 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3444 if (!apic
|| !apic
->vapic_addr
)
3447 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3449 vcpu
->arch
.apic
->vapic_page
= page
;
3452 static void vapic_exit(struct kvm_vcpu
*vcpu
)
3454 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3456 if (!apic
|| !apic
->vapic_addr
)
3459 down_read(&vcpu
->kvm
->slots_lock
);
3460 kvm_release_page_dirty(apic
->vapic_page
);
3461 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3462 up_read(&vcpu
->kvm
->slots_lock
);
3465 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
3469 if (!kvm_x86_ops
->update_cr8_intercept
)
3472 if (!vcpu
->arch
.apic
->vapic_addr
)
3473 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
3480 tpr
= kvm_lapic_get_cr8(vcpu
);
3482 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
3485 static void inject_pending_event(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3487 /* try to reinject previous events if any */
3488 if (vcpu
->arch
.exception
.pending
) {
3489 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
3490 vcpu
->arch
.exception
.has_error_code
,
3491 vcpu
->arch
.exception
.error_code
);
3495 if (vcpu
->arch
.nmi_injected
) {
3496 kvm_x86_ops
->set_nmi(vcpu
);
3500 if (vcpu
->arch
.interrupt
.pending
) {
3501 kvm_x86_ops
->set_irq(vcpu
);
3505 /* try to inject new event if pending */
3506 if (vcpu
->arch
.nmi_pending
) {
3507 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
3508 vcpu
->arch
.nmi_pending
= false;
3509 vcpu
->arch
.nmi_injected
= true;
3510 kvm_x86_ops
->set_nmi(vcpu
);
3512 } else if (kvm_cpu_has_interrupt(vcpu
)) {
3513 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
3514 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
3516 kvm_x86_ops
->set_irq(vcpu
);
3521 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3524 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
3525 kvm_run
->request_interrupt_window
;
3528 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD
, &vcpu
->requests
))
3529 kvm_mmu_unload(vcpu
);
3531 r
= kvm_mmu_reload(vcpu
);
3535 if (vcpu
->requests
) {
3536 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
))
3537 __kvm_migrate_timers(vcpu
);
3538 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE
, &vcpu
->requests
))
3539 kvm_write_guest_time(vcpu
);
3540 if (test_and_clear_bit(KVM_REQ_MMU_SYNC
, &vcpu
->requests
))
3541 kvm_mmu_sync_roots(vcpu
);
3542 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH
, &vcpu
->requests
))
3543 kvm_x86_ops
->tlb_flush(vcpu
);
3544 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS
,
3546 kvm_run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
3550 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
)) {
3551 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
3559 kvm_x86_ops
->prepare_guest_switch(vcpu
);
3560 kvm_load_guest_fpu(vcpu
);
3562 local_irq_disable();
3564 clear_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3565 smp_mb__after_clear_bit();
3567 if (vcpu
->requests
|| need_resched() || signal_pending(current
)) {
3568 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3575 inject_pending_event(vcpu
, kvm_run
);
3577 /* enable NMI/IRQ window open exits if needed */
3578 if (vcpu
->arch
.nmi_pending
)
3579 kvm_x86_ops
->enable_nmi_window(vcpu
);
3580 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
3581 kvm_x86_ops
->enable_irq_window(vcpu
);
3583 if (kvm_lapic_enabled(vcpu
)) {
3584 update_cr8_intercept(vcpu
);
3585 kvm_lapic_sync_to_vapic(vcpu
);
3588 up_read(&vcpu
->kvm
->slots_lock
);
3592 get_debugreg(vcpu
->arch
.host_dr6
, 6);
3593 get_debugreg(vcpu
->arch
.host_dr7
, 7);
3594 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
3595 get_debugreg(vcpu
->arch
.host_db
[0], 0);
3596 get_debugreg(vcpu
->arch
.host_db
[1], 1);
3597 get_debugreg(vcpu
->arch
.host_db
[2], 2);
3598 get_debugreg(vcpu
->arch
.host_db
[3], 3);
3601 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
3602 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
3603 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
3604 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
3607 trace_kvm_entry(vcpu
->vcpu_id
);
3608 kvm_x86_ops
->run(vcpu
, kvm_run
);
3610 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
3612 set_debugreg(vcpu
->arch
.host_db
[0], 0);
3613 set_debugreg(vcpu
->arch
.host_db
[1], 1);
3614 set_debugreg(vcpu
->arch
.host_db
[2], 2);
3615 set_debugreg(vcpu
->arch
.host_db
[3], 3);
3617 set_debugreg(vcpu
->arch
.host_dr6
, 6);
3618 set_debugreg(vcpu
->arch
.host_dr7
, 7);
3620 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3626 * We must have an instruction between local_irq_enable() and
3627 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3628 * the interrupt shadow. The stat.exits increment will do nicely.
3629 * But we need to prevent reordering, hence this barrier():
3637 down_read(&vcpu
->kvm
->slots_lock
);
3640 * Profile KVM exit RIPs:
3642 if (unlikely(prof_on
== KVM_PROFILING
)) {
3643 unsigned long rip
= kvm_rip_read(vcpu
);
3644 profile_hit(KVM_PROFILING
, (void *)rip
);
3648 kvm_lapic_sync_from_vapic(vcpu
);
3650 r
= kvm_x86_ops
->handle_exit(kvm_run
, vcpu
);
3656 static int __vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3660 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
3661 pr_debug("vcpu %d received sipi with vector # %x\n",
3662 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
3663 kvm_lapic_reset(vcpu
);
3664 r
= kvm_arch_vcpu_reset(vcpu
);
3667 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
3670 down_read(&vcpu
->kvm
->slots_lock
);
3675 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
)
3676 r
= vcpu_enter_guest(vcpu
, kvm_run
);
3678 up_read(&vcpu
->kvm
->slots_lock
);
3679 kvm_vcpu_block(vcpu
);
3680 down_read(&vcpu
->kvm
->slots_lock
);
3681 if (test_and_clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
))
3683 switch(vcpu
->arch
.mp_state
) {
3684 case KVM_MP_STATE_HALTED
:
3685 vcpu
->arch
.mp_state
=
3686 KVM_MP_STATE_RUNNABLE
;
3687 case KVM_MP_STATE_RUNNABLE
:
3689 case KVM_MP_STATE_SIPI_RECEIVED
:
3700 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
3701 if (kvm_cpu_has_pending_timer(vcpu
))
3702 kvm_inject_pending_timer_irqs(vcpu
);
3704 if (dm_request_for_irq_injection(vcpu
, kvm_run
)) {
3706 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
3707 ++vcpu
->stat
.request_irq_exits
;
3709 if (signal_pending(current
)) {
3711 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
3712 ++vcpu
->stat
.signal_exits
;
3714 if (need_resched()) {
3715 up_read(&vcpu
->kvm
->slots_lock
);
3717 down_read(&vcpu
->kvm
->slots_lock
);
3721 up_read(&vcpu
->kvm
->slots_lock
);
3722 post_kvm_run_save(vcpu
, kvm_run
);
3729 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3736 if (vcpu
->sigset_active
)
3737 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
3739 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
3740 kvm_vcpu_block(vcpu
);
3741 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
3746 /* re-sync apic's tpr */
3747 if (!irqchip_in_kernel(vcpu
->kvm
))
3748 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
3750 if (vcpu
->arch
.pio
.cur_count
) {
3751 r
= complete_pio(vcpu
);
3755 #if CONFIG_HAS_IOMEM
3756 if (vcpu
->mmio_needed
) {
3757 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
3758 vcpu
->mmio_read_completed
= 1;
3759 vcpu
->mmio_needed
= 0;
3761 down_read(&vcpu
->kvm
->slots_lock
);
3762 r
= emulate_instruction(vcpu
, kvm_run
,
3763 vcpu
->arch
.mmio_fault_cr2
, 0,
3764 EMULTYPE_NO_DECODE
);
3765 up_read(&vcpu
->kvm
->slots_lock
);
3766 if (r
== EMULATE_DO_MMIO
) {
3768 * Read-modify-write. Back to userspace.
3775 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
3776 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
3777 kvm_run
->hypercall
.ret
);
3779 r
= __vcpu_run(vcpu
, kvm_run
);
3782 if (vcpu
->sigset_active
)
3783 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
3789 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
3793 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3794 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3795 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3796 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3797 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3798 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
3799 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
3800 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
3801 #ifdef CONFIG_X86_64
3802 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
3803 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
3804 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
3805 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
3806 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
3807 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
3808 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
3809 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
3812 regs
->rip
= kvm_rip_read(vcpu
);
3813 regs
->rflags
= kvm_x86_ops
->get_rflags(vcpu
);
3816 * Don't leak debug flags in case they were set for guest debugging
3818 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
3819 regs
->rflags
&= ~(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
3826 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
3830 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
3831 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
3832 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
3833 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
3834 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
3835 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
3836 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
3837 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
3838 #ifdef CONFIG_X86_64
3839 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
3840 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
3841 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
3842 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
3843 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
3844 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
3845 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
3846 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
3850 kvm_rip_write(vcpu
, regs
->rip
);
3851 kvm_x86_ops
->set_rflags(vcpu
, regs
->rflags
);
3854 vcpu
->arch
.exception
.pending
= false;
3861 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
3862 struct kvm_segment
*var
, int seg
)
3864 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
3867 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
3869 struct kvm_segment cs
;
3871 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
3875 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
3877 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
3878 struct kvm_sregs
*sregs
)
3880 struct descriptor_table dt
;
3884 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
3885 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
3886 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
3887 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
3888 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
3889 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
3891 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
3892 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
3894 kvm_x86_ops
->get_idt(vcpu
, &dt
);
3895 sregs
->idt
.limit
= dt
.limit
;
3896 sregs
->idt
.base
= dt
.base
;
3897 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
3898 sregs
->gdt
.limit
= dt
.limit
;
3899 sregs
->gdt
.base
= dt
.base
;
3901 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
3902 sregs
->cr0
= vcpu
->arch
.cr0
;
3903 sregs
->cr2
= vcpu
->arch
.cr2
;
3904 sregs
->cr3
= vcpu
->arch
.cr3
;
3905 sregs
->cr4
= vcpu
->arch
.cr4
;
3906 sregs
->cr8
= kvm_get_cr8(vcpu
);
3907 sregs
->efer
= vcpu
->arch
.shadow_efer
;
3908 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
3910 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
3912 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
3913 set_bit(vcpu
->arch
.interrupt
.nr
,
3914 (unsigned long *)sregs
->interrupt_bitmap
);
3921 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
3922 struct kvm_mp_state
*mp_state
)
3925 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
3930 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
3931 struct kvm_mp_state
*mp_state
)
3934 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
3939 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
3940 struct kvm_segment
*var
, int seg
)
3942 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
3945 static void seg_desct_to_kvm_desct(struct desc_struct
*seg_desc
, u16 selector
,
3946 struct kvm_segment
*kvm_desct
)
3948 kvm_desct
->base
= get_desc_base(seg_desc
);
3949 kvm_desct
->limit
= get_desc_limit(seg_desc
);
3951 kvm_desct
->limit
<<= 12;
3952 kvm_desct
->limit
|= 0xfff;
3954 kvm_desct
->selector
= selector
;
3955 kvm_desct
->type
= seg_desc
->type
;
3956 kvm_desct
->present
= seg_desc
->p
;
3957 kvm_desct
->dpl
= seg_desc
->dpl
;
3958 kvm_desct
->db
= seg_desc
->d
;
3959 kvm_desct
->s
= seg_desc
->s
;
3960 kvm_desct
->l
= seg_desc
->l
;
3961 kvm_desct
->g
= seg_desc
->g
;
3962 kvm_desct
->avl
= seg_desc
->avl
;
3964 kvm_desct
->unusable
= 1;
3966 kvm_desct
->unusable
= 0;
3967 kvm_desct
->padding
= 0;
3970 static void get_segment_descriptor_dtable(struct kvm_vcpu
*vcpu
,
3972 struct descriptor_table
*dtable
)
3974 if (selector
& 1 << 2) {
3975 struct kvm_segment kvm_seg
;
3977 kvm_get_segment(vcpu
, &kvm_seg
, VCPU_SREG_LDTR
);
3979 if (kvm_seg
.unusable
)
3982 dtable
->limit
= kvm_seg
.limit
;
3983 dtable
->base
= kvm_seg
.base
;
3986 kvm_x86_ops
->get_gdt(vcpu
, dtable
);
3989 /* allowed just for 8 bytes segments */
3990 static int load_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
3991 struct desc_struct
*seg_desc
)
3994 struct descriptor_table dtable
;
3995 u16 index
= selector
>> 3;
3997 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
3999 if (dtable
.limit
< index
* 8 + 7) {
4000 kvm_queue_exception_e(vcpu
, GP_VECTOR
, selector
& 0xfffc);
4003 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, dtable
.base
);
4005 return kvm_read_guest(vcpu
->kvm
, gpa
, seg_desc
, 8);
4008 /* allowed just for 8 bytes segments */
4009 static int save_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4010 struct desc_struct
*seg_desc
)
4013 struct descriptor_table dtable
;
4014 u16 index
= selector
>> 3;
4016 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4018 if (dtable
.limit
< index
* 8 + 7)
4020 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, dtable
.base
);
4022 return kvm_write_guest(vcpu
->kvm
, gpa
, seg_desc
, 8);
4025 static u32
get_tss_base_addr(struct kvm_vcpu
*vcpu
,
4026 struct desc_struct
*seg_desc
)
4028 u32 base_addr
= get_desc_base(seg_desc
);
4030 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, base_addr
);
4033 static u16
get_segment_selector(struct kvm_vcpu
*vcpu
, int seg
)
4035 struct kvm_segment kvm_seg
;
4037 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4038 return kvm_seg
.selector
;
4041 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu
*vcpu
,
4043 struct kvm_segment
*kvm_seg
)
4045 struct desc_struct seg_desc
;
4047 if (load_guest_segment_descriptor(vcpu
, selector
, &seg_desc
))
4049 seg_desct_to_kvm_desct(&seg_desc
, selector
, kvm_seg
);
4053 static int kvm_load_realmode_segment(struct kvm_vcpu
*vcpu
, u16 selector
, int seg
)
4055 struct kvm_segment segvar
= {
4056 .base
= selector
<< 4,
4058 .selector
= selector
,
4069 kvm_x86_ops
->set_segment(vcpu
, &segvar
, seg
);
4073 int kvm_load_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4074 int type_bits
, int seg
)
4076 struct kvm_segment kvm_seg
;
4078 if (!(vcpu
->arch
.cr0
& X86_CR0_PE
))
4079 return kvm_load_realmode_segment(vcpu
, selector
, seg
);
4080 if (load_segment_descriptor_to_kvm_desct(vcpu
, selector
, &kvm_seg
))
4082 kvm_seg
.type
|= type_bits
;
4084 if (seg
!= VCPU_SREG_SS
&& seg
!= VCPU_SREG_CS
&&
4085 seg
!= VCPU_SREG_LDTR
)
4087 kvm_seg
.unusable
= 1;
4089 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4093 static void save_state_to_tss32(struct kvm_vcpu
*vcpu
,
4094 struct tss_segment_32
*tss
)
4096 tss
->cr3
= vcpu
->arch
.cr3
;
4097 tss
->eip
= kvm_rip_read(vcpu
);
4098 tss
->eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4099 tss
->eax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4100 tss
->ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4101 tss
->edx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4102 tss
->ebx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4103 tss
->esp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4104 tss
->ebp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4105 tss
->esi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4106 tss
->edi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4107 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4108 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4109 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4110 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4111 tss
->fs
= get_segment_selector(vcpu
, VCPU_SREG_FS
);
4112 tss
->gs
= get_segment_selector(vcpu
, VCPU_SREG_GS
);
4113 tss
->ldt_selector
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4116 static int load_state_from_tss32(struct kvm_vcpu
*vcpu
,
4117 struct tss_segment_32
*tss
)
4119 kvm_set_cr3(vcpu
, tss
->cr3
);
4121 kvm_rip_write(vcpu
, tss
->eip
);
4122 kvm_x86_ops
->set_rflags(vcpu
, tss
->eflags
| 2);
4124 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->eax
);
4125 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->ecx
);
4126 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->edx
);
4127 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->ebx
);
4128 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->esp
);
4129 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->ebp
);
4130 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->esi
);
4131 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->edi
);
4133 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt_selector
, 0, VCPU_SREG_LDTR
))
4136 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4139 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4142 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4145 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4148 if (kvm_load_segment_descriptor(vcpu
, tss
->fs
, 1, VCPU_SREG_FS
))
4151 if (kvm_load_segment_descriptor(vcpu
, tss
->gs
, 1, VCPU_SREG_GS
))
4156 static void save_state_to_tss16(struct kvm_vcpu
*vcpu
,
4157 struct tss_segment_16
*tss
)
4159 tss
->ip
= kvm_rip_read(vcpu
);
4160 tss
->flag
= kvm_x86_ops
->get_rflags(vcpu
);
4161 tss
->ax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4162 tss
->cx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4163 tss
->dx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4164 tss
->bx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4165 tss
->sp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4166 tss
->bp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4167 tss
->si
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4168 tss
->di
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4170 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4171 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4172 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4173 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4174 tss
->ldt
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4175 tss
->prev_task_link
= get_segment_selector(vcpu
, VCPU_SREG_TR
);
4178 static int load_state_from_tss16(struct kvm_vcpu
*vcpu
,
4179 struct tss_segment_16
*tss
)
4181 kvm_rip_write(vcpu
, tss
->ip
);
4182 kvm_x86_ops
->set_rflags(vcpu
, tss
->flag
| 2);
4183 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->ax
);
4184 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->cx
);
4185 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->dx
);
4186 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->bx
);
4187 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->sp
);
4188 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->bp
);
4189 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->si
);
4190 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->di
);
4192 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt
, 0, VCPU_SREG_LDTR
))
4195 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4198 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4201 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4204 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4209 static int kvm_task_switch_16(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4210 u16 old_tss_sel
, u32 old_tss_base
,
4211 struct desc_struct
*nseg_desc
)
4213 struct tss_segment_16 tss_segment_16
;
4216 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4217 sizeof tss_segment_16
))
4220 save_state_to_tss16(vcpu
, &tss_segment_16
);
4222 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4223 sizeof tss_segment_16
))
4226 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4227 &tss_segment_16
, sizeof tss_segment_16
))
4230 if (old_tss_sel
!= 0xffff) {
4231 tss_segment_16
.prev_task_link
= old_tss_sel
;
4233 if (kvm_write_guest(vcpu
->kvm
,
4234 get_tss_base_addr(vcpu
, nseg_desc
),
4235 &tss_segment_16
.prev_task_link
,
4236 sizeof tss_segment_16
.prev_task_link
))
4240 if (load_state_from_tss16(vcpu
, &tss_segment_16
))
4248 static int kvm_task_switch_32(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4249 u16 old_tss_sel
, u32 old_tss_base
,
4250 struct desc_struct
*nseg_desc
)
4252 struct tss_segment_32 tss_segment_32
;
4255 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4256 sizeof tss_segment_32
))
4259 save_state_to_tss32(vcpu
, &tss_segment_32
);
4261 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4262 sizeof tss_segment_32
))
4265 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4266 &tss_segment_32
, sizeof tss_segment_32
))
4269 if (old_tss_sel
!= 0xffff) {
4270 tss_segment_32
.prev_task_link
= old_tss_sel
;
4272 if (kvm_write_guest(vcpu
->kvm
,
4273 get_tss_base_addr(vcpu
, nseg_desc
),
4274 &tss_segment_32
.prev_task_link
,
4275 sizeof tss_segment_32
.prev_task_link
))
4279 if (load_state_from_tss32(vcpu
, &tss_segment_32
))
4287 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
)
4289 struct kvm_segment tr_seg
;
4290 struct desc_struct cseg_desc
;
4291 struct desc_struct nseg_desc
;
4293 u32 old_tss_base
= get_segment_base(vcpu
, VCPU_SREG_TR
);
4294 u16 old_tss_sel
= get_segment_selector(vcpu
, VCPU_SREG_TR
);
4296 old_tss_base
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, old_tss_base
);
4298 /* FIXME: Handle errors. Failure to read either TSS or their
4299 * descriptors should generate a pagefault.
4301 if (load_guest_segment_descriptor(vcpu
, tss_selector
, &nseg_desc
))
4304 if (load_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
))
4307 if (reason
!= TASK_SWITCH_IRET
) {
4310 cpl
= kvm_x86_ops
->get_cpl(vcpu
);
4311 if ((tss_selector
& 3) > nseg_desc
.dpl
|| cpl
> nseg_desc
.dpl
) {
4312 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
4317 if (!nseg_desc
.p
|| get_desc_limit(&nseg_desc
) < 0x67) {
4318 kvm_queue_exception_e(vcpu
, TS_VECTOR
, tss_selector
& 0xfffc);
4322 if (reason
== TASK_SWITCH_IRET
|| reason
== TASK_SWITCH_JMP
) {
4323 cseg_desc
.type
&= ~(1 << 1); //clear the B flag
4324 save_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
);
4327 if (reason
== TASK_SWITCH_IRET
) {
4328 u32 eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4329 kvm_x86_ops
->set_rflags(vcpu
, eflags
& ~X86_EFLAGS_NT
);
4332 /* set back link to prev task only if NT bit is set in eflags
4333 note that old_tss_sel is not used afetr this point */
4334 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
4335 old_tss_sel
= 0xffff;
4337 /* set back link to prev task only if NT bit is set in eflags
4338 note that old_tss_sel is not used afetr this point */
4339 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
4340 old_tss_sel
= 0xffff;
4342 if (nseg_desc
.type
& 8)
4343 ret
= kvm_task_switch_32(vcpu
, tss_selector
, old_tss_sel
,
4344 old_tss_base
, &nseg_desc
);
4346 ret
= kvm_task_switch_16(vcpu
, tss_selector
, old_tss_sel
,
4347 old_tss_base
, &nseg_desc
);
4349 if (reason
== TASK_SWITCH_CALL
|| reason
== TASK_SWITCH_GATE
) {
4350 u32 eflags
= kvm_x86_ops
->get_rflags(vcpu
);
4351 kvm_x86_ops
->set_rflags(vcpu
, eflags
| X86_EFLAGS_NT
);
4354 if (reason
!= TASK_SWITCH_IRET
) {
4355 nseg_desc
.type
|= (1 << 1);
4356 save_guest_segment_descriptor(vcpu
, tss_selector
,
4360 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
| X86_CR0_TS
);
4361 seg_desct_to_kvm_desct(&nseg_desc
, tss_selector
, &tr_seg
);
4363 kvm_set_segment(vcpu
, &tr_seg
, VCPU_SREG_TR
);
4367 EXPORT_SYMBOL_GPL(kvm_task_switch
);
4369 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
4370 struct kvm_sregs
*sregs
)
4372 int mmu_reset_needed
= 0;
4373 int pending_vec
, max_bits
;
4374 struct descriptor_table dt
;
4378 dt
.limit
= sregs
->idt
.limit
;
4379 dt
.base
= sregs
->idt
.base
;
4380 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4381 dt
.limit
= sregs
->gdt
.limit
;
4382 dt
.base
= sregs
->gdt
.base
;
4383 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4385 vcpu
->arch
.cr2
= sregs
->cr2
;
4386 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
4387 vcpu
->arch
.cr3
= sregs
->cr3
;
4389 kvm_set_cr8(vcpu
, sregs
->cr8
);
4391 mmu_reset_needed
|= vcpu
->arch
.shadow_efer
!= sregs
->efer
;
4392 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
4393 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
4395 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
4397 mmu_reset_needed
|= vcpu
->arch
.cr0
!= sregs
->cr0
;
4398 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
4399 vcpu
->arch
.cr0
= sregs
->cr0
;
4401 mmu_reset_needed
|= vcpu
->arch
.cr4
!= sregs
->cr4
;
4402 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
4403 if (!is_long_mode(vcpu
) && is_pae(vcpu
))
4404 load_pdptrs(vcpu
, vcpu
->arch
.cr3
);
4406 if (mmu_reset_needed
)
4407 kvm_mmu_reset_context(vcpu
);
4409 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
4410 pending_vec
= find_first_bit(
4411 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
4412 if (pending_vec
< max_bits
) {
4413 kvm_queue_interrupt(vcpu
, pending_vec
, false);
4414 pr_debug("Set back pending irq %d\n", pending_vec
);
4415 if (irqchip_in_kernel(vcpu
->kvm
))
4416 kvm_pic_clear_isr_ack(vcpu
->kvm
);
4419 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4420 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4421 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4422 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4423 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4424 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4426 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4427 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4429 /* Older userspace won't unhalt the vcpu on reset. */
4430 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
4431 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
4432 !(vcpu
->arch
.cr0
& X86_CR0_PE
))
4433 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4440 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
4441 struct kvm_guest_debug
*dbg
)
4447 if ((dbg
->control
& (KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_HW_BP
)) ==
4448 (KVM_GUESTDBG_ENABLE
| KVM_GUESTDBG_USE_HW_BP
)) {
4449 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
4450 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
4451 vcpu
->arch
.switch_db_regs
=
4452 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
4454 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
4455 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
4456 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
4459 r
= kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
4461 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
4462 kvm_queue_exception(vcpu
, DB_VECTOR
);
4463 else if (dbg
->control
& KVM_GUESTDBG_INJECT_BP
)
4464 kvm_queue_exception(vcpu
, BP_VECTOR
);
4472 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4473 * we have asm/x86/processor.h
4484 u32 st_space
[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4485 #ifdef CONFIG_X86_64
4486 u32 xmm_space
[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4488 u32 xmm_space
[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4493 * Translate a guest virtual address to a guest physical address.
4495 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
4496 struct kvm_translation
*tr
)
4498 unsigned long vaddr
= tr
->linear_address
;
4502 down_read(&vcpu
->kvm
->slots_lock
);
4503 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, vaddr
);
4504 up_read(&vcpu
->kvm
->slots_lock
);
4505 tr
->physical_address
= gpa
;
4506 tr
->valid
= gpa
!= UNMAPPED_GVA
;
4514 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4516 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4520 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
4521 fpu
->fcw
= fxsave
->cwd
;
4522 fpu
->fsw
= fxsave
->swd
;
4523 fpu
->ftwx
= fxsave
->twd
;
4524 fpu
->last_opcode
= fxsave
->fop
;
4525 fpu
->last_ip
= fxsave
->rip
;
4526 fpu
->last_dp
= fxsave
->rdp
;
4527 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
4534 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4536 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4540 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
4541 fxsave
->cwd
= fpu
->fcw
;
4542 fxsave
->swd
= fpu
->fsw
;
4543 fxsave
->twd
= fpu
->ftwx
;
4544 fxsave
->fop
= fpu
->last_opcode
;
4545 fxsave
->rip
= fpu
->last_ip
;
4546 fxsave
->rdp
= fpu
->last_dp
;
4547 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
4554 void fx_init(struct kvm_vcpu
*vcpu
)
4556 unsigned after_mxcsr_mask
;
4559 * Touch the fpu the first time in non atomic context as if
4560 * this is the first fpu instruction the exception handler
4561 * will fire before the instruction returns and it'll have to
4562 * allocate ram with GFP_KERNEL.
4565 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4567 /* Initialize guest FPU by resetting ours and saving into guest's */
4569 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4571 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4572 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4575 vcpu
->arch
.cr0
|= X86_CR0_ET
;
4576 after_mxcsr_mask
= offsetof(struct i387_fxsave_struct
, st_space
);
4577 vcpu
->arch
.guest_fx_image
.mxcsr
= 0x1f80;
4578 memset((void *)&vcpu
->arch
.guest_fx_image
+ after_mxcsr_mask
,
4579 0, sizeof(struct i387_fxsave_struct
) - after_mxcsr_mask
);
4581 EXPORT_SYMBOL_GPL(fx_init
);
4583 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
4585 if (!vcpu
->fpu_active
|| vcpu
->guest_fpu_loaded
)
4588 vcpu
->guest_fpu_loaded
= 1;
4589 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4590 kvm_fx_restore(&vcpu
->arch
.guest_fx_image
);
4592 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu
);
4594 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
4596 if (!vcpu
->guest_fpu_loaded
)
4599 vcpu
->guest_fpu_loaded
= 0;
4600 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4601 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4602 ++vcpu
->stat
.fpu_reload
;
4604 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu
);
4606 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
4608 if (vcpu
->arch
.time_page
) {
4609 kvm_release_page_dirty(vcpu
->arch
.time_page
);
4610 vcpu
->arch
.time_page
= NULL
;
4613 kvm_x86_ops
->vcpu_free(vcpu
);
4616 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
4619 return kvm_x86_ops
->vcpu_create(kvm
, id
);
4622 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
4626 /* We do fxsave: this must be aligned. */
4627 BUG_ON((unsigned long)&vcpu
->arch
.host_fx_image
& 0xF);
4629 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
4631 r
= kvm_arch_vcpu_reset(vcpu
);
4633 r
= kvm_mmu_setup(vcpu
);
4640 kvm_x86_ops
->vcpu_free(vcpu
);
4644 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
4647 kvm_mmu_unload(vcpu
);
4650 kvm_x86_ops
->vcpu_free(vcpu
);
4653 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
4655 vcpu
->arch
.nmi_pending
= false;
4656 vcpu
->arch
.nmi_injected
= false;
4658 vcpu
->arch
.switch_db_regs
= 0;
4659 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
4660 vcpu
->arch
.dr6
= DR6_FIXED_1
;
4661 vcpu
->arch
.dr7
= DR7_FIXED_1
;
4663 return kvm_x86_ops
->vcpu_reset(vcpu
);
4666 void kvm_arch_hardware_enable(void *garbage
)
4668 kvm_x86_ops
->hardware_enable(garbage
);
4671 void kvm_arch_hardware_disable(void *garbage
)
4673 kvm_x86_ops
->hardware_disable(garbage
);
4676 int kvm_arch_hardware_setup(void)
4678 return kvm_x86_ops
->hardware_setup();
4681 void kvm_arch_hardware_unsetup(void)
4683 kvm_x86_ops
->hardware_unsetup();
4686 void kvm_arch_check_processor_compat(void *rtn
)
4688 kvm_x86_ops
->check_processor_compatibility(rtn
);
4691 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
4697 BUG_ON(vcpu
->kvm
== NULL
);
4700 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
4701 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
4702 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4704 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
4706 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
4711 vcpu
->arch
.pio_data
= page_address(page
);
4713 r
= kvm_mmu_create(vcpu
);
4715 goto fail_free_pio_data
;
4717 if (irqchip_in_kernel(kvm
)) {
4718 r
= kvm_create_lapic(vcpu
);
4720 goto fail_mmu_destroy
;
4723 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
4725 if (!vcpu
->arch
.mce_banks
) {
4727 goto fail_mmu_destroy
;
4729 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
4734 kvm_mmu_destroy(vcpu
);
4736 free_page((unsigned long)vcpu
->arch
.pio_data
);
4741 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
4743 kvm_free_lapic(vcpu
);
4744 down_read(&vcpu
->kvm
->slots_lock
);
4745 kvm_mmu_destroy(vcpu
);
4746 up_read(&vcpu
->kvm
->slots_lock
);
4747 free_page((unsigned long)vcpu
->arch
.pio_data
);
4750 struct kvm
*kvm_arch_create_vm(void)
4752 struct kvm
*kvm
= kzalloc(sizeof(struct kvm
), GFP_KERNEL
);
4755 return ERR_PTR(-ENOMEM
);
4757 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
4758 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
4760 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4761 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
4763 rdtscll(kvm
->arch
.vm_init_tsc
);
4768 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
4771 kvm_mmu_unload(vcpu
);
4775 static void kvm_free_vcpus(struct kvm
*kvm
)
4778 struct kvm_vcpu
*vcpu
;
4781 * Unpin any mmu pages first.
4783 kvm_for_each_vcpu(i
, vcpu
, kvm
)
4784 kvm_unload_vcpu_mmu(vcpu
);
4785 kvm_for_each_vcpu(i
, vcpu
, kvm
)
4786 kvm_arch_vcpu_free(vcpu
);
4788 mutex_lock(&kvm
->lock
);
4789 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
4790 kvm
->vcpus
[i
] = NULL
;
4792 atomic_set(&kvm
->online_vcpus
, 0);
4793 mutex_unlock(&kvm
->lock
);
4796 void kvm_arch_sync_events(struct kvm
*kvm
)
4798 kvm_free_all_assigned_devices(kvm
);
4801 void kvm_arch_destroy_vm(struct kvm
*kvm
)
4803 kvm_iommu_unmap_guest(kvm
);
4805 kfree(kvm
->arch
.vpic
);
4806 kfree(kvm
->arch
.vioapic
);
4807 kvm_free_vcpus(kvm
);
4808 kvm_free_physmem(kvm
);
4809 if (kvm
->arch
.apic_access_page
)
4810 put_page(kvm
->arch
.apic_access_page
);
4811 if (kvm
->arch
.ept_identity_pagetable
)
4812 put_page(kvm
->arch
.ept_identity_pagetable
);
4816 int kvm_arch_set_memory_region(struct kvm
*kvm
,
4817 struct kvm_userspace_memory_region
*mem
,
4818 struct kvm_memory_slot old
,
4821 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
4822 struct kvm_memory_slot
*memslot
= &kvm
->memslots
[mem
->slot
];
4824 /*To keep backward compatibility with older userspace,
4825 *x86 needs to hanlde !user_alloc case.
4828 if (npages
&& !old
.rmap
) {
4829 unsigned long userspace_addr
;
4831 down_write(¤t
->mm
->mmap_sem
);
4832 userspace_addr
= do_mmap(NULL
, 0,
4834 PROT_READ
| PROT_WRITE
,
4835 MAP_PRIVATE
| MAP_ANONYMOUS
,
4837 up_write(¤t
->mm
->mmap_sem
);
4839 if (IS_ERR((void *)userspace_addr
))
4840 return PTR_ERR((void *)userspace_addr
);
4842 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4843 spin_lock(&kvm
->mmu_lock
);
4844 memslot
->userspace_addr
= userspace_addr
;
4845 spin_unlock(&kvm
->mmu_lock
);
4847 if (!old
.user_alloc
&& old
.rmap
) {
4850 down_write(¤t
->mm
->mmap_sem
);
4851 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
4852 old
.npages
* PAGE_SIZE
);
4853 up_write(¤t
->mm
->mmap_sem
);
4856 "kvm_vm_ioctl_set_memory_region: "
4857 "failed to munmap memory\n");
4862 spin_lock(&kvm
->mmu_lock
);
4863 if (!kvm
->arch
.n_requested_mmu_pages
) {
4864 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
4865 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
4868 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
4869 spin_unlock(&kvm
->mmu_lock
);
4870 kvm_flush_remote_tlbs(kvm
);
4875 void kvm_arch_flush_shadow(struct kvm
*kvm
)
4877 kvm_mmu_zap_all(kvm
);
4878 kvm_reload_remote_mmus(kvm
);
4881 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
4883 return vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
4884 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
4885 || vcpu
->arch
.nmi_pending
||
4886 (kvm_arch_interrupt_allowed(vcpu
) &&
4887 kvm_cpu_has_interrupt(vcpu
));
4890 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
4893 int cpu
= vcpu
->cpu
;
4895 if (waitqueue_active(&vcpu
->wq
)) {
4896 wake_up_interruptible(&vcpu
->wq
);
4897 ++vcpu
->stat
.halt_wakeup
;
4901 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
4902 if (!test_and_set_bit(KVM_REQ_KICK
, &vcpu
->requests
))
4903 smp_send_reschedule(cpu
);
4907 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
4909 return kvm_x86_ops
->interrupt_allowed(vcpu
);
4912 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
4913 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
4914 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
4915 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
4916 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);