2 * Copyright (c) 2008 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 /* mac80211 and PCI callbacks */
19 #include <linux/nl80211.h>
22 #define ATH_PCI_VERSION "0.1"
24 #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
25 #define IEEE80211_ACTION_CAT_HT 7
26 #define IEEE80211_ACTION_HT_TXCHWIDTH 0
28 static char *dev_info
= "ath9k";
30 MODULE_AUTHOR("Atheros Communications");
31 MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
32 MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
33 MODULE_LICENSE("Dual BSD/GPL");
35 static struct pci_device_id ath_pci_id_table
[] __devinitdata
= {
36 { PCI_VDEVICE(ATHEROS
, 0x0023) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS
, 0x0024) }, /* PCI-E */
38 { PCI_VDEVICE(ATHEROS
, 0x0027) }, /* PCI */
39 { PCI_VDEVICE(ATHEROS
, 0x0029) }, /* PCI */
40 { PCI_VDEVICE(ATHEROS
, 0x002A) }, /* PCI-E */
44 static int ath_get_channel(struct ath_softc
*sc
,
45 struct ieee80211_channel
*chan
)
49 for (i
= 0; i
< sc
->sc_ah
->ah_nchan
; i
++) {
50 if (sc
->sc_ah
->ah_channels
[i
].channel
== chan
->center_freq
)
57 static u32
ath_get_extchanmode(struct ath_softc
*sc
,
58 struct ieee80211_channel
*chan
)
61 u8 ext_chan_offset
= sc
->sc_ht_info
.ext_chan_offset
;
62 enum ath9k_ht_macmode tx_chan_width
= sc
->sc_ht_info
.tx_chan_width
;
65 case IEEE80211_BAND_2GHZ
:
66 if ((ext_chan_offset
== IEEE80211_HT_IE_CHA_SEC_NONE
) &&
67 (tx_chan_width
== ATH9K_HT_MACMODE_20
))
68 chanmode
= CHANNEL_G_HT20
;
69 if ((ext_chan_offset
== IEEE80211_HT_IE_CHA_SEC_ABOVE
) &&
70 (tx_chan_width
== ATH9K_HT_MACMODE_2040
))
71 chanmode
= CHANNEL_G_HT40PLUS
;
72 if ((ext_chan_offset
== IEEE80211_HT_IE_CHA_SEC_BELOW
) &&
73 (tx_chan_width
== ATH9K_HT_MACMODE_2040
))
74 chanmode
= CHANNEL_G_HT40MINUS
;
76 case IEEE80211_BAND_5GHZ
:
77 if ((ext_chan_offset
== IEEE80211_HT_IE_CHA_SEC_NONE
) &&
78 (tx_chan_width
== ATH9K_HT_MACMODE_20
))
79 chanmode
= CHANNEL_A_HT20
;
80 if ((ext_chan_offset
== IEEE80211_HT_IE_CHA_SEC_ABOVE
) &&
81 (tx_chan_width
== ATH9K_HT_MACMODE_2040
))
82 chanmode
= CHANNEL_A_HT40PLUS
;
83 if ((ext_chan_offset
== IEEE80211_HT_IE_CHA_SEC_BELOW
) &&
84 (tx_chan_width
== ATH9K_HT_MACMODE_2040
))
85 chanmode
= CHANNEL_A_HT40MINUS
;
95 static int ath_setkey_tkip(struct ath_softc
*sc
,
96 struct ieee80211_key_conf
*key
,
97 struct ath9k_keyval
*hk
,
100 u8
*key_rxmic
= NULL
;
101 u8
*key_txmic
= NULL
;
103 key_txmic
= key
->key
+ NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY
;
104 key_rxmic
= key
->key
+ NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY
;
107 /* Group key installation */
108 memcpy(hk
->kv_mic
, key_rxmic
, sizeof(hk
->kv_mic
));
109 return ath_keyset(sc
, key
->keyidx
, hk
, addr
);
111 if (!sc
->sc_splitmic
) {
113 * data key goes at first index,
114 * the hal handles the MIC keys at index+64.
116 memcpy(hk
->kv_mic
, key_rxmic
, sizeof(hk
->kv_mic
));
117 memcpy(hk
->kv_txmic
, key_txmic
, sizeof(hk
->kv_txmic
));
118 return ath_keyset(sc
, key
->keyidx
, hk
, addr
);
121 * TX key goes at first index, RX key at +32.
122 * The hal handles the MIC keys at index+64.
124 memcpy(hk
->kv_mic
, key_txmic
, sizeof(hk
->kv_mic
));
125 if (!ath_keyset(sc
, key
->keyidx
, hk
, NULL
)) {
126 /* Txmic entry failed. No need to proceed further */
127 DPRINTF(sc
, ATH_DBG_KEYCACHE
,
128 "%s Setting TX MIC Key Failed\n", __func__
);
132 memcpy(hk
->kv_mic
, key_rxmic
, sizeof(hk
->kv_mic
));
133 /* XXX delete tx key on failure? */
134 return ath_keyset(sc
, key
->keyidx
+32, hk
, addr
);
137 static int ath_key_config(struct ath_softc
*sc
,
139 struct ieee80211_key_conf
*key
)
141 struct ieee80211_vif
*vif
;
142 struct ath9k_keyval hk
;
143 const u8
*mac
= NULL
;
145 enum ieee80211_if_types opmode
;
147 memset(&hk
, 0, sizeof(hk
));
151 hk
.kv_type
= ATH9K_CIPHER_WEP
;
154 hk
.kv_type
= ATH9K_CIPHER_TKIP
;
157 hk
.kv_type
= ATH9K_CIPHER_AES_CCM
;
163 hk
.kv_len
= key
->keylen
;
164 memcpy(hk
.kv_val
, key
->key
, key
->keylen
);
169 vif
= sc
->sc_vaps
[0]->av_if_data
;
174 * For _M_STA mc tx, we will not setup a key at all since we never
176 * _M_STA mc rx, we will use the keyID.
177 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
178 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
179 * peer node. BUT we will plumb a cleartext key so that we can do
180 * perSta default key table lookup in software.
182 if (is_broadcast_ether_addr(addr
)) {
184 case IEEE80211_IF_TYPE_STA
:
185 /* default key: could be group WPA key
186 * or could be static WEP key */
189 case IEEE80211_IF_TYPE_IBSS
:
191 case IEEE80211_IF_TYPE_AP
:
201 if (key
->alg
== ALG_TKIP
)
202 ret
= ath_setkey_tkip(sc
, key
, &hk
, mac
);
204 ret
= ath_keyset(sc
, key
->keyidx
, &hk
, mac
);
209 sc
->sc_keytype
= hk
.kv_type
;
213 static void ath_key_delete(struct ath_softc
*sc
, struct ieee80211_key_conf
*key
)
215 #define ATH_MAX_NUM_KEYS 4
218 freeslot
= (key
->keyidx
>= ATH_MAX_NUM_KEYS
) ? 1 : 0;
219 ath_key_reset(sc
, key
->keyidx
, freeslot
);
220 #undef ATH_MAX_NUM_KEYS
223 static void setup_ht_cap(struct ieee80211_ht_info
*ht_info
)
225 /* Until mac80211 includes these fields */
227 #define IEEE80211_HT_CAP_DSSSCCK40 0x1000
228 #define IEEE80211_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
229 #define IEEE80211_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
231 ht_info
->ht_supported
= 1;
232 ht_info
->cap
= (u16
)IEEE80211_HT_CAP_SUP_WIDTH
233 |(u16
)IEEE80211_HT_CAP_MIMO_PS
234 |(u16
)IEEE80211_HT_CAP_SGI_40
235 |(u16
)IEEE80211_HT_CAP_DSSSCCK40
;
237 ht_info
->ampdu_factor
= IEEE80211_HT_CAP_MAXRXAMPDU_65536
;
238 ht_info
->ampdu_density
= IEEE80211_HT_CAP_MPDUDENSITY_8
;
239 /* setup supported mcs set */
240 memset(ht_info
->supp_mcs_set
, 0, 16);
241 ht_info
->supp_mcs_set
[0] = 0xff;
242 ht_info
->supp_mcs_set
[1] = 0xff;
243 ht_info
->supp_mcs_set
[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED
;
246 static int ath_rate2idx(struct ath_softc
*sc
, int rate
)
248 int i
= 0, cur_band
, n_rates
;
249 struct ieee80211_hw
*hw
= sc
->hw
;
251 cur_band
= hw
->conf
.channel
->band
;
252 n_rates
= sc
->sbands
[cur_band
].n_bitrates
;
254 for (i
= 0; i
< n_rates
; i
++) {
255 if (sc
->sbands
[cur_band
].bitrates
[i
].bitrate
== rate
)
260 * NB:mac80211 validates rx rate index against the supported legacy rate
261 * index only (should be done against ht rates also), return the highest
262 * legacy rate index for rx rate which does not match any one of the
263 * supported basic and extended rates to make mac80211 happy.
264 * The following hack will be cleaned up once the issue with
265 * the rx rate index validation in mac80211 is fixed.
272 static void ath9k_rx_prepare(struct ath_softc
*sc
,
274 struct ath_recv_status
*status
,
275 struct ieee80211_rx_status
*rx_status
)
277 struct ieee80211_hw
*hw
= sc
->hw
;
278 struct ieee80211_channel
*curchan
= hw
->conf
.channel
;
280 memset(rx_status
, 0, sizeof(struct ieee80211_rx_status
));
282 rx_status
->mactime
= status
->tsf
;
283 rx_status
->band
= curchan
->band
;
284 rx_status
->freq
= curchan
->center_freq
;
285 rx_status
->noise
= ATH_DEFAULT_NOISE_FLOOR
;
286 rx_status
->signal
= rx_status
->noise
+ status
->rssi
;
287 rx_status
->rate_idx
= ath_rate2idx(sc
, (status
->rateKbps
/ 100));
288 rx_status
->antenna
= status
->antenna
;
289 rx_status
->qual
= status
->rssi
* 100 / 64;
291 if (status
->flags
& ATH_RX_MIC_ERROR
)
292 rx_status
->flag
|= RX_FLAG_MMIC_ERROR
;
293 if (status
->flags
& ATH_RX_FCS_ERROR
)
294 rx_status
->flag
|= RX_FLAG_FAILED_FCS_CRC
;
296 rx_status
->flag
|= RX_FLAG_TSFT
;
299 static u8
parse_mpdudensity(u8 mpdudensity
)
302 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
303 * 0 for no restriction
312 switch (mpdudensity
) {
318 /* Our lower layer calculations limit our precision to
334 static int ath9k_start(struct ieee80211_hw
*hw
)
336 struct ath_softc
*sc
= hw
->priv
;
337 struct ieee80211_channel
*curchan
= hw
->conf
.channel
;
340 DPRINTF(sc
, ATH_DBG_CONFIG
, "%s: Starting driver with "
341 "initial channel: %d MHz\n", __func__
, curchan
->center_freq
);
343 /* setup initial channel */
345 pos
= ath_get_channel(sc
, curchan
);
347 DPRINTF(sc
, ATH_DBG_FATAL
, "%s: Invalid channel\n", __func__
);
351 sc
->sc_ah
->ah_channels
[pos
].chanmode
=
352 (curchan
->band
== IEEE80211_BAND_2GHZ
) ? CHANNEL_G
: CHANNEL_A
;
355 error
= ath_open(sc
, &sc
->sc_ah
->ah_channels
[pos
]);
357 DPRINTF(sc
, ATH_DBG_FATAL
,
358 "%s: Unable to complete ath_open\n", __func__
);
362 ieee80211_wake_queues(hw
);
366 static int ath9k_tx(struct ieee80211_hw
*hw
,
369 struct ath_softc
*sc
= hw
->priv
;
372 /* Add the padding after the header if this is not already done */
373 hdrlen
= ieee80211_get_hdrlen_from_skb(skb
);
375 padsize
= hdrlen
% 4;
376 if (skb_headroom(skb
) < padsize
)
378 skb_push(skb
, padsize
);
379 memmove(skb
->data
, skb
->data
+ padsize
, hdrlen
);
382 DPRINTF(sc
, ATH_DBG_XMIT
, "%s: transmitting packet, skb: %p\n",
386 if (ath_tx_start(sc
, skb
) != 0) {
387 DPRINTF(sc
, ATH_DBG_XMIT
, "%s: TX failed\n", __func__
);
388 dev_kfree_skb_any(skb
);
389 /* FIXME: Check for proper return value from ATH_DEV */
396 static void ath9k_stop(struct ieee80211_hw
*hw
)
398 struct ath_softc
*sc
= hw
->priv
;
401 DPRINTF(sc
, ATH_DBG_CONFIG
, "%s: Driver halt\n", __func__
);
403 error
= ath_suspend(sc
);
405 DPRINTF(sc
, ATH_DBG_CONFIG
,
406 "%s: Device is no longer present\n", __func__
);
408 ieee80211_stop_queues(hw
);
411 static int ath9k_add_interface(struct ieee80211_hw
*hw
,
412 struct ieee80211_if_init_conf
*conf
)
414 struct ath_softc
*sc
= hw
->priv
;
415 int error
, ic_opmode
= 0;
417 /* Support only vap for now */
422 switch (conf
->type
) {
423 case IEEE80211_IF_TYPE_STA
:
424 ic_opmode
= ATH9K_M_STA
;
426 case IEEE80211_IF_TYPE_IBSS
:
427 ic_opmode
= ATH9K_M_IBSS
;
430 DPRINTF(sc
, ATH_DBG_FATAL
,
431 "%s: Only STA and IBSS are supported currently\n",
436 DPRINTF(sc
, ATH_DBG_CONFIG
, "%s: Attach a VAP of type: %d\n",
440 error
= ath_vap_attach(sc
, 0, conf
->vif
, ic_opmode
);
442 DPRINTF(sc
, ATH_DBG_FATAL
,
443 "%s: Unable to attach vap, error: %d\n",
451 static void ath9k_remove_interface(struct ieee80211_hw
*hw
,
452 struct ieee80211_if_init_conf
*conf
)
454 struct ath_softc
*sc
= hw
->priv
;
458 DPRINTF(sc
, ATH_DBG_CONFIG
, "%s: Detach VAP\n", __func__
);
460 avp
= sc
->sc_vaps
[0];
462 DPRINTF(sc
, ATH_DBG_FATAL
, "%s: Invalid interface\n",
467 #ifdef CONFIG_SLOW_ANT_DIV
468 ath_slow_ant_div_stop(&sc
->sc_antdiv
);
471 /* Update ratectrl */
472 ath_rate_newstate(sc
, avp
);
474 /* Reclaim beacon resources */
475 if (sc
->sc_ah
->ah_opmode
== ATH9K_M_HOSTAP
||
476 sc
->sc_ah
->ah_opmode
== ATH9K_M_IBSS
) {
477 ath9k_hw_stoptxdma(sc
->sc_ah
, sc
->sc_bhalq
);
478 ath_beacon_return(sc
, avp
);
481 /* Set interrupt mask */
482 sc
->sc_imask
&= ~(ATH9K_INT_SWBA
| ATH9K_INT_BMISS
);
483 ath9k_hw_set_interrupts(sc
->sc_ah
, sc
->sc_imask
& ~ATH9K_INT_GLOBAL
);
486 error
= ath_vap_detach(sc
, 0);
488 DPRINTF(sc
, ATH_DBG_FATAL
,
489 "%s: Unable to detach vap, error: %d\n",
493 static int ath9k_config(struct ieee80211_hw
*hw
,
494 struct ieee80211_conf
*conf
)
496 struct ath_softc
*sc
= hw
->priv
;
497 struct ieee80211_channel
*curchan
= hw
->conf
.channel
;
500 DPRINTF(sc
, ATH_DBG_CONFIG
, "%s: Set channel: %d MHz\n",
502 curchan
->center_freq
);
504 pos
= ath_get_channel(sc
, curchan
);
506 DPRINTF(sc
, ATH_DBG_FATAL
, "%s: Invalid channel\n", __func__
);
510 sc
->sc_ah
->ah_channels
[pos
].chanmode
=
511 (curchan
->band
== IEEE80211_BAND_2GHZ
) ?
512 CHANNEL_G
: CHANNEL_A
;
514 if (sc
->sc_curaid
&& hw
->conf
.ht_conf
.ht_supported
)
515 sc
->sc_ah
->ah_channels
[pos
].chanmode
=
516 ath_get_extchanmode(sc
, curchan
);
518 sc
->sc_config
.txpowlimit
= 2 * conf
->power_level
;
520 /* set h/w channel */
521 if (ath_set_channel(sc
, &sc
->sc_ah
->ah_channels
[pos
]) < 0)
522 DPRINTF(sc
, ATH_DBG_FATAL
, "%s: Unable to set channel\n",
528 static int ath9k_config_interface(struct ieee80211_hw
*hw
,
529 struct ieee80211_vif
*vif
,
530 struct ieee80211_if_conf
*conf
)
532 struct ath_softc
*sc
= hw
->priv
;
536 DECLARE_MAC_BUF(mac
);
538 avp
= sc
->sc_vaps
[0];
540 DPRINTF(sc
, ATH_DBG_FATAL
, "%s: Invalid interface\n",
545 if ((conf
->changed
& IEEE80211_IFCC_BSSID
) &&
546 !is_zero_ether_addr(conf
->bssid
)) {
548 case IEEE80211_IF_TYPE_STA
:
549 case IEEE80211_IF_TYPE_IBSS
:
550 /* Update ratectrl about the new state */
551 ath_rate_newstate(sc
, avp
);
554 memcpy(sc
->sc_curbssid
, conf
->bssid
, ETH_ALEN
);
556 ath9k_hw_write_associd(sc
->sc_ah
, sc
->sc_curbssid
,
559 /* Set aggregation protection mode parameters */
560 sc
->sc_config
.ath_aggr_prot
= 0;
563 * Reset our TSF so that its value is lower than the
564 * beacon that we are trying to catch.
565 * Only then hw will update its TSF register with the
566 * new beacon. Reset the TSF before setting the BSSID
567 * to avoid allowing in any frames that would update
568 * our TSF only to have us clear it
569 * immediately thereafter.
571 ath9k_hw_reset_tsf(sc
->sc_ah
);
573 /* Disable BMISS interrupt when we're not associated */
574 ath9k_hw_set_interrupts(sc
->sc_ah
,
576 ~(ATH9K_INT_SWBA
| ATH9K_INT_BMISS
));
577 sc
->sc_imask
&= ~(ATH9K_INT_SWBA
| ATH9K_INT_BMISS
);
579 DPRINTF(sc
, ATH_DBG_CONFIG
,
580 "%s: RX filter 0x%x bssid %s aid 0x%x\n",
582 print_mac(mac
, sc
->sc_curbssid
), sc
->sc_curaid
);
584 /* need to reconfigure the beacon */
593 if ((conf
->changed
& IEEE80211_IFCC_BEACON
) &&
594 (vif
->type
== IEEE80211_IF_TYPE_IBSS
)) {
596 * Allocate and setup the beacon frame.
598 * Stop any previous beacon DMA. This may be
599 * necessary, for example, when an ibss merge
600 * causes reconfiguration; we may be called
601 * with beacon transmission active.
603 ath9k_hw_stoptxdma(sc
->sc_ah
, sc
->sc_bhalq
);
605 error
= ath_beacon_alloc(sc
, 0);
609 ath_beacon_sync(sc
, 0);
612 /* Check for WLAN_CAPABILITY_PRIVACY ? */
613 if ((avp
->av_opmode
!= IEEE80211_IF_TYPE_STA
)) {
614 for (i
= 0; i
< IEEE80211_WEP_NKID
; i
++)
615 if (ath9k_hw_keyisvalid(sc
->sc_ah
, (u16
)i
))
616 ath9k_hw_keysetmac(sc
->sc_ah
,
621 /* Only legacy IBSS for now */
622 if (vif
->type
== IEEE80211_IF_TYPE_IBSS
)
623 ath_update_chainmask(sc
, 0);
628 #define SUPPORTED_FILTERS \
629 (FIF_PROMISC_IN_BSS | \
633 FIF_BCN_PRBRESP_PROMISC | \
636 /* FIXME: sc->sc_full_reset ? */
637 static void ath9k_configure_filter(struct ieee80211_hw
*hw
,
638 unsigned int changed_flags
,
639 unsigned int *total_flags
,
641 struct dev_mc_list
*mclist
)
643 struct ath_softc
*sc
= hw
->priv
;
646 changed_flags
&= SUPPORTED_FILTERS
;
647 *total_flags
&= SUPPORTED_FILTERS
;
649 sc
->rx_filter
= *total_flags
;
650 rfilt
= ath_calcrxfilter(sc
);
651 ath9k_hw_setrxfilter(sc
->sc_ah
, rfilt
);
653 if (changed_flags
& FIF_BCN_PRBRESP_PROMISC
) {
654 if (*total_flags
& FIF_BCN_PRBRESP_PROMISC
)
655 ath9k_hw_write_associd(sc
->sc_ah
, ath_bcast_mac
, 0);
658 DPRINTF(sc
, ATH_DBG_CONFIG
, "%s: Set HW RX filter: 0x%x\n",
659 __func__
, sc
->rx_filter
);
662 static void ath9k_sta_notify(struct ieee80211_hw
*hw
,
663 struct ieee80211_vif
*vif
,
664 enum sta_notify_cmd cmd
,
667 struct ath_softc
*sc
= hw
->priv
;
670 DECLARE_MAC_BUF(mac
);
672 spin_lock_irqsave(&sc
->node_lock
, flags
);
673 an
= ath_node_find(sc
, (u8
*) addr
);
674 spin_unlock_irqrestore(&sc
->node_lock
, flags
);
678 spin_lock_irqsave(&sc
->node_lock
, flags
);
680 ath_node_attach(sc
, (u8
*)addr
, 0);
681 DPRINTF(sc
, ATH_DBG_CONFIG
, "%s: Attach a node: %s\n",
683 print_mac(mac
, addr
));
685 ath_node_get(sc
, (u8
*)addr
);
687 spin_unlock_irqrestore(&sc
->node_lock
, flags
);
689 case STA_NOTIFY_REMOVE
:
691 DPRINTF(sc
, ATH_DBG_FATAL
,
692 "%s: Removal of a non-existent node\n",
695 ath_node_put(sc
, an
, ATH9K_BH_STATUS_INTACT
);
696 DPRINTF(sc
, ATH_DBG_CONFIG
, "%s: Put a node: %s\n",
698 print_mac(mac
, addr
));
706 static int ath9k_conf_tx(struct ieee80211_hw
*hw
,
708 const struct ieee80211_tx_queue_params
*params
)
710 struct ath_softc
*sc
= hw
->priv
;
711 struct ath9k_tx_queue_info qi
;
714 if (queue
>= WME_NUM_AC
)
717 qi
.tqi_aifs
= params
->aifs
;
718 qi
.tqi_cwmin
= params
->cw_min
;
719 qi
.tqi_cwmax
= params
->cw_max
;
720 qi
.tqi_burstTime
= params
->txop
;
721 qnum
= ath_get_hal_qnum(queue
, sc
);
723 DPRINTF(sc
, ATH_DBG_CONFIG
,
724 "%s: Configure tx [queue/halq] [%d/%d], "
725 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
734 ret
= ath_txq_update(sc
, qnum
, &qi
);
736 DPRINTF(sc
, ATH_DBG_FATAL
,
737 "%s: TXQ Update failed\n", __func__
);
742 static int ath9k_set_key(struct ieee80211_hw
*hw
,
743 enum set_key_cmd cmd
,
744 const u8
*local_addr
,
746 struct ieee80211_key_conf
*key
)
748 struct ath_softc
*sc
= hw
->priv
;
751 DPRINTF(sc
, ATH_DBG_KEYCACHE
, " %s: Set HW Key\n", __func__
);
755 ret
= ath_key_config(sc
, addr
, key
);
757 set_bit(key
->keyidx
, sc
->sc_keymap
);
758 key
->hw_key_idx
= key
->keyidx
;
759 /* push IV and Michael MIC generation to stack */
760 key
->flags
|= IEEE80211_KEY_FLAG_GENERATE_IV
;
761 key
->flags
|= IEEE80211_KEY_FLAG_GENERATE_MMIC
;
765 ath_key_delete(sc
, key
);
766 clear_bit(key
->keyidx
, sc
->sc_keymap
);
767 sc
->sc_keytype
= ATH9K_CIPHER_CLR
;
776 static void ath9k_ht_conf(struct ath_softc
*sc
,
777 struct ieee80211_bss_conf
*bss_conf
)
779 #define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
780 struct ath_ht_info
*ht_info
= &sc
->sc_ht_info
;
782 if (bss_conf
->assoc_ht
) {
783 ht_info
->ext_chan_offset
=
784 bss_conf
->ht_bss_conf
->bss_cap
&
785 IEEE80211_HT_IE_CHA_SEC_OFFSET
;
787 if (!(bss_conf
->ht_conf
->cap
&
788 IEEE80211_HT_CAP_40MHZ_INTOLERANT
) &&
789 (bss_conf
->ht_bss_conf
->bss_cap
&
790 IEEE80211_HT_IE_CHA_WIDTH
))
791 ht_info
->tx_chan_width
= ATH9K_HT_MACMODE_2040
;
793 ht_info
->tx_chan_width
= ATH9K_HT_MACMODE_20
;
795 ath9k_hw_set11nmac2040(sc
->sc_ah
, ht_info
->tx_chan_width
);
796 ht_info
->maxampdu
= 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR
+
797 bss_conf
->ht_conf
->ampdu_factor
);
798 ht_info
->mpdudensity
=
799 parse_mpdudensity(bss_conf
->ht_conf
->ampdu_density
);
803 #undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
806 static void ath9k_bss_assoc_info(struct ath_softc
*sc
,
807 struct ieee80211_bss_conf
*bss_conf
)
809 struct ieee80211_hw
*hw
= sc
->hw
;
810 struct ieee80211_channel
*curchan
= hw
->conf
.channel
;
813 DECLARE_MAC_BUF(mac
);
815 if (bss_conf
->assoc
) {
816 DPRINTF(sc
, ATH_DBG_CONFIG
, "%s: Bss Info ASSOC %d\n",
820 avp
= sc
->sc_vaps
[0];
822 DPRINTF(sc
, ATH_DBG_FATAL
, "%s: Invalid interface\n",
827 /* New association, store aid */
828 if (avp
->av_opmode
== ATH9K_M_STA
) {
829 sc
->sc_curaid
= bss_conf
->aid
;
830 ath9k_hw_write_associd(sc
->sc_ah
, sc
->sc_curbssid
,
834 /* Configure the beacon */
835 ath_beacon_config(sc
, 0);
838 /* Reset rssi stats */
839 sc
->sc_halstats
.ns_avgbrssi
= ATH_RSSI_DUMMY_MARKER
;
840 sc
->sc_halstats
.ns_avgrssi
= ATH_RSSI_DUMMY_MARKER
;
841 sc
->sc_halstats
.ns_avgtxrssi
= ATH_RSSI_DUMMY_MARKER
;
842 sc
->sc_halstats
.ns_avgtxrate
= ATH_RATE_DUMMY_MARKER
;
844 /* Update chainmask */
845 ath_update_chainmask(sc
, bss_conf
->assoc_ht
);
847 DPRINTF(sc
, ATH_DBG_CONFIG
,
848 "%s: bssid %s aid 0x%x\n",
850 print_mac(mac
, sc
->sc_curbssid
), sc
->sc_curaid
);
852 DPRINTF(sc
, ATH_DBG_CONFIG
, "%s: Set channel: %d MHz\n",
854 curchan
->center_freq
);
856 pos
= ath_get_channel(sc
, curchan
);
858 DPRINTF(sc
, ATH_DBG_FATAL
,
859 "%s: Invalid channel\n", __func__
);
863 if (hw
->conf
.ht_conf
.ht_supported
)
864 sc
->sc_ah
->ah_channels
[pos
].chanmode
=
865 ath_get_extchanmode(sc
, curchan
);
867 sc
->sc_ah
->ah_channels
[pos
].chanmode
=
868 (curchan
->band
== IEEE80211_BAND_2GHZ
) ?
869 CHANNEL_G
: CHANNEL_A
;
871 /* set h/w channel */
872 if (ath_set_channel(sc
, &sc
->sc_ah
->ah_channels
[pos
]) < 0)
873 DPRINTF(sc
, ATH_DBG_FATAL
,
874 "%s: Unable to set channel\n",
877 ath_rate_newstate(sc
, avp
);
878 /* Update ratectrl about the new state */
879 ath_rc_node_update(hw
, avp
->rc_node
);
881 DPRINTF(sc
, ATH_DBG_CONFIG
,
882 "%s: Bss Info DISSOC\n", __func__
);
887 static void ath9k_bss_info_changed(struct ieee80211_hw
*hw
,
888 struct ieee80211_vif
*vif
,
889 struct ieee80211_bss_conf
*bss_conf
,
892 struct ath_softc
*sc
= hw
->priv
;
894 if (changed
& BSS_CHANGED_ERP_PREAMBLE
) {
895 DPRINTF(sc
, ATH_DBG_CONFIG
, "%s: BSS Changed PREAMBLE %d\n",
897 bss_conf
->use_short_preamble
);
898 if (bss_conf
->use_short_preamble
)
899 sc
->sc_flags
|= ATH_PREAMBLE_SHORT
;
901 sc
->sc_flags
&= ~ATH_PREAMBLE_SHORT
;
904 if (changed
& BSS_CHANGED_ERP_CTS_PROT
) {
905 DPRINTF(sc
, ATH_DBG_CONFIG
, "%s: BSS Changed CTS PROT %d\n",
907 bss_conf
->use_cts_prot
);
908 if (bss_conf
->use_cts_prot
&&
909 hw
->conf
.channel
->band
!= IEEE80211_BAND_5GHZ
)
910 sc
->sc_flags
|= ATH_PROTECT_ENABLE
;
912 sc
->sc_flags
&= ~ATH_PROTECT_ENABLE
;
915 if (changed
& BSS_CHANGED_HT
) {
916 DPRINTF(sc
, ATH_DBG_CONFIG
, "%s: BSS Changed HT %d\n",
919 ath9k_ht_conf(sc
, bss_conf
);
922 if (changed
& BSS_CHANGED_ASSOC
) {
923 DPRINTF(sc
, ATH_DBG_CONFIG
, "%s: BSS Changed ASSOC %d\n",
926 ath9k_bss_assoc_info(sc
, bss_conf
);
930 static u64
ath9k_get_tsf(struct ieee80211_hw
*hw
)
933 struct ath_softc
*sc
= hw
->priv
;
934 struct ath_hal
*ah
= sc
->sc_ah
;
936 tsf
= ath9k_hw_gettsf64(ah
);
941 static void ath9k_reset_tsf(struct ieee80211_hw
*hw
)
943 struct ath_softc
*sc
= hw
->priv
;
944 struct ath_hal
*ah
= sc
->sc_ah
;
946 ath9k_hw_reset_tsf(ah
);
949 static int ath9k_ampdu_action(struct ieee80211_hw
*hw
,
950 enum ieee80211_ampdu_mlme_action action
,
955 struct ath_softc
*sc
= hw
->priv
;
959 case IEEE80211_AMPDU_RX_START
:
960 ret
= ath_rx_aggr_start(sc
, addr
, tid
, ssn
);
962 DPRINTF(sc
, ATH_DBG_FATAL
,
963 "%s: Unable to start RX aggregation\n",
966 case IEEE80211_AMPDU_RX_STOP
:
967 ret
= ath_rx_aggr_stop(sc
, addr
, tid
);
969 DPRINTF(sc
, ATH_DBG_FATAL
,
970 "%s: Unable to stop RX aggregation\n",
973 case IEEE80211_AMPDU_TX_START
:
974 ret
= ath_tx_aggr_start(sc
, addr
, tid
, ssn
);
976 DPRINTF(sc
, ATH_DBG_FATAL
,
977 "%s: Unable to start TX aggregation\n",
980 ieee80211_start_tx_ba_cb_irqsafe(hw
, (u8
*)addr
, tid
);
982 case IEEE80211_AMPDU_TX_STOP
:
983 ret
= ath_tx_aggr_stop(sc
, addr
, tid
);
985 DPRINTF(sc
, ATH_DBG_FATAL
,
986 "%s: Unable to stop TX aggregation\n",
989 ieee80211_stop_tx_ba_cb_irqsafe(hw
, (u8
*)addr
, tid
);
992 DPRINTF(sc
, ATH_DBG_FATAL
,
993 "%s: Unknown AMPDU action\n", __func__
);
999 static struct ieee80211_ops ath9k_ops
= {
1001 .start
= ath9k_start
,
1003 .add_interface
= ath9k_add_interface
,
1004 .remove_interface
= ath9k_remove_interface
,
1005 .config
= ath9k_config
,
1006 .config_interface
= ath9k_config_interface
,
1007 .configure_filter
= ath9k_configure_filter
,
1009 .sta_notify
= ath9k_sta_notify
,
1010 .conf_tx
= ath9k_conf_tx
,
1011 .get_tx_stats
= NULL
,
1012 .bss_info_changed
= ath9k_bss_info_changed
,
1014 .set_key
= ath9k_set_key
,
1016 .get_tkip_seq
= NULL
,
1017 .set_rts_threshold
= NULL
,
1018 .set_frag_threshold
= NULL
,
1019 .set_retry_limit
= NULL
,
1020 .get_tsf
= ath9k_get_tsf
,
1021 .reset_tsf
= ath9k_reset_tsf
,
1022 .tx_last_beacon
= NULL
,
1023 .ampdu_action
= ath9k_ampdu_action
1026 void ath_get_beaconconfig(struct ath_softc
*sc
,
1028 struct ath_beacon_config
*conf
)
1030 struct ieee80211_hw
*hw
= sc
->hw
;
1032 /* fill in beacon config data */
1034 conf
->beacon_interval
= hw
->conf
.beacon_int
;
1035 conf
->listen_interval
= 100;
1036 conf
->dtim_count
= 1;
1037 conf
->bmiss_timeout
= ATH_DEFAULT_BMISS_LIMIT
* conf
->listen_interval
;
1040 int ath_update_beacon(struct ath_softc
*sc
,
1042 struct ath_beacon_offset
*bo
,
1043 struct sk_buff
*skb
,
1049 void ath_tx_complete(struct ath_softc
*sc
, struct sk_buff
*skb
,
1050 struct ath_xmit_status
*tx_status
, struct ath_node
*an
)
1052 struct ieee80211_hw
*hw
= sc
->hw
;
1053 struct ieee80211_tx_info
*tx_info
= IEEE80211_SKB_CB(skb
);
1055 DPRINTF(sc
, ATH_DBG_XMIT
,
1056 "%s: TX complete: skb: %p\n", __func__
, skb
);
1058 if (tx_info
->flags
& IEEE80211_TX_CTL_NO_ACK
||
1059 tx_info
->flags
& IEEE80211_TX_STAT_TX_FILTERED
) {
1060 /* free driver's private data area of tx_info */
1061 if (tx_info
->driver_data
[0] != NULL
)
1062 kfree(tx_info
->driver_data
[0]);
1063 tx_info
->driver_data
[0] = NULL
;
1066 if (tx_status
->flags
& ATH_TX_BAR
) {
1067 tx_info
->flags
|= IEEE80211_TX_STAT_AMPDU_NO_BACK
;
1068 tx_status
->flags
&= ~ATH_TX_BAR
;
1070 if (tx_status
->flags
)
1071 tx_info
->status
.excessive_retries
= 1;
1073 tx_info
->status
.retry_count
= tx_status
->retries
;
1075 ieee80211_tx_status(hw
, skb
);
1077 ath_node_put(sc
, an
, ATH9K_BH_STATUS_CHANGE
);
1080 int ath__rx_indicate(struct ath_softc
*sc
,
1081 struct sk_buff
*skb
,
1082 struct ath_recv_status
*status
,
1085 struct ieee80211_hw
*hw
= sc
->hw
;
1086 struct ath_node
*an
= NULL
;
1087 struct ieee80211_rx_status rx_status
;
1088 struct ieee80211_hdr
*hdr
= (struct ieee80211_hdr
*) skb
->data
;
1089 int hdrlen
= ieee80211_get_hdrlen_from_skb(skb
);
1091 enum ATH_RX_TYPE st
;
1093 /* see if any padding is done by the hw and remove it */
1095 padsize
= hdrlen
% 4;
1096 memmove(skb
->data
+ padsize
, skb
->data
, hdrlen
);
1097 skb_pull(skb
, padsize
);
1100 /* remove FCS before passing up to protocol stack */
1101 skb_trim(skb
, (skb
->len
- FCS_LEN
));
1103 /* Prepare rx status */
1104 ath9k_rx_prepare(sc
, skb
, status
, &rx_status
);
1106 if (!(keyix
== ATH9K_RXKEYIX_INVALID
) &&
1107 !(status
->flags
& ATH_RX_DECRYPT_ERROR
)) {
1108 rx_status
.flag
|= RX_FLAG_DECRYPTED
;
1109 } else if ((le16_to_cpu(hdr
->frame_control
) & IEEE80211_FCTL_PROTECTED
)
1110 && !(status
->flags
& ATH_RX_DECRYPT_ERROR
)
1111 && skb
->len
>= hdrlen
+ 4) {
1112 keyix
= skb
->data
[hdrlen
+ 3] >> 6;
1114 if (test_bit(keyix
, sc
->sc_keymap
))
1115 rx_status
.flag
|= RX_FLAG_DECRYPTED
;
1118 spin_lock_bh(&sc
->node_lock
);
1119 an
= ath_node_find(sc
, hdr
->addr2
);
1120 spin_unlock_bh(&sc
->node_lock
);
1123 ath_rx_input(sc
, an
,
1124 hw
->conf
.ht_conf
.ht_supported
,
1127 if (!an
|| (st
!= ATH_RX_CONSUMED
))
1128 __ieee80211_rx(hw
, skb
, &rx_status
);
1133 int ath_rx_subframe(struct ath_node
*an
,
1134 struct sk_buff
*skb
,
1135 struct ath_recv_status
*status
)
1137 struct ath_softc
*sc
= an
->an_sc
;
1138 struct ieee80211_hw
*hw
= sc
->hw
;
1139 struct ieee80211_rx_status rx_status
;
1141 /* Prepare rx status */
1142 ath9k_rx_prepare(sc
, skb
, status
, &rx_status
);
1143 if (!(status
->flags
& ATH_RX_DECRYPT_ERROR
))
1144 rx_status
.flag
|= RX_FLAG_DECRYPTED
;
1146 __ieee80211_rx(hw
, skb
, &rx_status
);
1151 enum ath9k_ht_macmode
ath_cwm_macmode(struct ath_softc
*sc
)
1153 return sc
->sc_ht_info
.tx_chan_width
;
1156 static int ath_detach(struct ath_softc
*sc
)
1158 struct ieee80211_hw
*hw
= sc
->hw
;
1160 DPRINTF(sc
, ATH_DBG_CONFIG
, "%s: Detach ATH hw\n", __func__
);
1164 ieee80211_unregister_hw(hw
);
1166 /* unregister Rate control */
1167 ath_rate_control_unregister();
1181 static int ath_attach(u16 devid
,
1182 struct ath_softc
*sc
)
1184 struct ieee80211_hw
*hw
= sc
->hw
;
1187 DPRINTF(sc
, ATH_DBG_CONFIG
, "%s: Attach ATH hw\n", __func__
);
1189 error
= ath_init(devid
, sc
);
1195 INIT_LIST_HEAD(&sc
->node_list
);
1196 spin_lock_init(&sc
->node_lock
);
1198 /* get mac address from hardware and set in mac80211 */
1200 SET_IEEE80211_PERM_ADDR(hw
, sc
->sc_myaddr
);
1202 /* setup channels and rates */
1204 sc
->sbands
[IEEE80211_BAND_2GHZ
].channels
=
1205 sc
->channels
[IEEE80211_BAND_2GHZ
];
1206 sc
->sbands
[IEEE80211_BAND_2GHZ
].bitrates
=
1207 sc
->rates
[IEEE80211_BAND_2GHZ
];
1208 sc
->sbands
[IEEE80211_BAND_2GHZ
].band
= IEEE80211_BAND_2GHZ
;
1210 if (sc
->sc_ah
->ah_caps
.hw_caps
& ATH9K_HW_CAP_HT
)
1211 /* Setup HT capabilities for 2.4Ghz*/
1212 setup_ht_cap(&sc
->sbands
[IEEE80211_BAND_2GHZ
].ht_info
);
1214 hw
->wiphy
->bands
[IEEE80211_BAND_2GHZ
] =
1215 &sc
->sbands
[IEEE80211_BAND_2GHZ
];
1217 if (test_bit(ATH9K_MODE_11A
, sc
->sc_ah
->ah_caps
.wireless_modes
)) {
1218 sc
->sbands
[IEEE80211_BAND_5GHZ
].channels
=
1219 sc
->channels
[IEEE80211_BAND_5GHZ
];
1220 sc
->sbands
[IEEE80211_BAND_5GHZ
].bitrates
=
1221 sc
->rates
[IEEE80211_BAND_5GHZ
];
1222 sc
->sbands
[IEEE80211_BAND_5GHZ
].band
=
1223 IEEE80211_BAND_5GHZ
;
1225 if (sc
->sc_ah
->ah_caps
.hw_caps
& ATH9K_HW_CAP_HT
)
1226 /* Setup HT capabilities for 5Ghz*/
1227 setup_ht_cap(&sc
->sbands
[IEEE80211_BAND_5GHZ
].ht_info
);
1229 hw
->wiphy
->bands
[IEEE80211_BAND_5GHZ
] =
1230 &sc
->sbands
[IEEE80211_BAND_5GHZ
];
1233 /* FIXME: Have to figure out proper hw init values later */
1236 hw
->ampdu_queues
= 1;
1238 /* Register rate control */
1239 hw
->rate_control_algorithm
= "ath9k_rate_control";
1240 error
= ath_rate_control_register();
1242 DPRINTF(sc
, ATH_DBG_FATAL
,
1243 "%s: Unable to register rate control "
1244 "algorithm:%d\n", __func__
, error
);
1245 ath_rate_control_unregister();
1249 error
= ieee80211_register_hw(hw
);
1251 ath_rate_control_unregister();
1255 /* initialize tx/rx engine */
1257 error
= ath_tx_init(sc
, ATH_TXBUF
);
1261 error
= ath_rx_init(sc
, ATH_RXBUF
);
1272 static int ath_pci_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
1275 struct ath_softc
*sc
;
1276 struct ieee80211_hw
*hw
;
1277 const char *athname
;
1282 if (pci_enable_device(pdev
))
1285 /* XXX 32-bit addressing only */
1286 if (pci_set_dma_mask(pdev
, 0xffffffff)) {
1287 printk(KERN_ERR
"ath_pci: 32-bit DMA not available\n");
1293 * Cache line size is used to size and align various
1294 * structures used to communicate with the hardware.
1296 pci_read_config_byte(pdev
, PCI_CACHE_LINE_SIZE
, &csz
);
1299 * Linux 2.4.18 (at least) writes the cache line size
1300 * register as a 16-bit wide register which is wrong.
1301 * We must have this setup properly for rx buffer
1302 * DMA to work so force a reasonable value here if it
1305 csz
= L1_CACHE_BYTES
/ sizeof(u32
);
1306 pci_write_config_byte(pdev
, PCI_CACHE_LINE_SIZE
, csz
);
1309 * The default setting of latency timer yields poor results,
1310 * set it to the value used by other systems. It may be worth
1311 * tweaking this setting more.
1313 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, 0xa8);
1315 pci_set_master(pdev
);
1318 * Disable the RETRY_TIMEOUT register (0x41) to keep
1319 * PCI Tx retries from interfering with C3 CPU state.
1321 pci_read_config_dword(pdev
, 0x40, &val
);
1322 if ((val
& 0x0000ff00) != 0)
1323 pci_write_config_dword(pdev
, 0x40, val
& 0xffff00ff);
1325 ret
= pci_request_region(pdev
, 0, "ath9k");
1327 dev_err(&pdev
->dev
, "PCI memory region reserve error\n");
1332 mem
= pci_iomap(pdev
, 0, 0);
1334 printk(KERN_ERR
"PCI memory map error\n") ;
1339 hw
= ieee80211_alloc_hw(sizeof(struct ath_softc
), &ath9k_ops
);
1341 printk(KERN_ERR
"ath_pci: no memory for ieee80211_hw\n");
1345 hw
->flags
= IEEE80211_HW_SIGNAL_DBM
|
1346 IEEE80211_HW_NOISE_DBM
;
1348 SET_IEEE80211_DEV(hw
, &pdev
->dev
);
1349 pci_set_drvdata(pdev
, hw
);
1356 if (ath_attach(id
->device
, sc
) != 0) {
1361 /* setup interrupt service routine */
1363 if (request_irq(pdev
->irq
, ath_isr
, IRQF_SHARED
, "ath", sc
)) {
1364 printk(KERN_ERR
"%s: request_irq failed\n",
1365 wiphy_name(hw
->wiphy
));
1370 athname
= ath9k_hw_probe(id
->vendor
, id
->device
);
1372 printk(KERN_INFO
"%s: %s: mem=0x%lx, irq=%d\n",
1373 wiphy_name(hw
->wiphy
),
1374 athname
? athname
: "Atheros ???",
1375 (unsigned long)mem
, pdev
->irq
);
1381 ieee80211_free_hw(hw
);
1383 pci_iounmap(pdev
, mem
);
1385 pci_release_region(pdev
, 0);
1387 pci_disable_device(pdev
);
1391 static void ath_pci_remove(struct pci_dev
*pdev
)
1393 struct ieee80211_hw
*hw
= pci_get_drvdata(pdev
);
1394 struct ath_softc
*sc
= hw
->priv
;
1397 free_irq(pdev
->irq
, sc
);
1399 pci_iounmap(pdev
, sc
->mem
);
1400 pci_release_region(pdev
, 0);
1401 pci_disable_device(pdev
);
1402 ieee80211_free_hw(hw
);
1407 static int ath_pci_suspend(struct pci_dev
*pdev
, pm_message_t state
)
1409 pci_save_state(pdev
);
1410 pci_disable_device(pdev
);
1411 pci_set_power_state(pdev
, 3);
1416 static int ath_pci_resume(struct pci_dev
*pdev
)
1421 err
= pci_enable_device(pdev
);
1424 pci_restore_state(pdev
);
1426 * Suspend/Resume resets the PCI configuration space, so we have to
1427 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1428 * PCI Tx retries from interfering with C3 CPU state
1430 pci_read_config_dword(pdev
, 0x40, &val
);
1431 if ((val
& 0x0000ff00) != 0)
1432 pci_write_config_dword(pdev
, 0x40, val
& 0xffff00ff);
1437 #endif /* CONFIG_PM */
1439 MODULE_DEVICE_TABLE(pci
, ath_pci_id_table
);
1441 static struct pci_driver ath_pci_driver
= {
1443 .id_table
= ath_pci_id_table
,
1444 .probe
= ath_pci_probe
,
1445 .remove
= ath_pci_remove
,
1447 .suspend
= ath_pci_suspend
,
1448 .resume
= ath_pci_resume
,
1449 #endif /* CONFIG_PM */
1452 static int __init
init_ath_pci(void)
1454 printk(KERN_INFO
"%s: %s\n", dev_info
, ATH_PCI_VERSION
);
1456 if (pci_register_driver(&ath_pci_driver
) < 0) {
1458 "ath_pci: No devices found, driver not installed.\n");
1459 pci_unregister_driver(&ath_pci_driver
);
1465 module_init(init_ath_pci
);
1467 static void __exit
exit_ath_pci(void)
1469 pci_unregister_driver(&ath_pci_driver
);
1470 printk(KERN_INFO
"%s: driver unloaded\n", dev_info
);
1472 module_exit(exit_ath_pci
);