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ASoC: wm8960: remove usage of obsoleted TLV-related macro
[linux-2.6/btrfs-unstable.git] / sound / soc / codecs / wm8960.c
blob3d8c75617d8d6b7aaca6deb67384cb0595bf7143
1 /*
2 * wm8960.c -- WM8960 ALSA SoC Audio driver
3 *
4 * Copyright 2007-11 Wolfson Microelectronics, plc
5 *
6 * Author: Liam Girdwood
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/pm.h>
18 #include <linux/clk.h>
19 #include <linux/i2c.h>
20 #include <linux/slab.h>
21 #include <sound/core.h>
22 #include <sound/pcm.h>
23 #include <sound/pcm_params.h>
24 #include <sound/soc.h>
25 #include <sound/initval.h>
26 #include <sound/tlv.h>
27 #include <sound/wm8960.h>
28
29 #include "wm8960.h"
30
31 /* R25 - Power 1 */
32 #define WM8960_VMID_MASK 0x180
33 #define WM8960_VREF 0x40
34
35 /* R26 - Power 2 */
36 #define WM8960_PWR2_LOUT1 0x40
37 #define WM8960_PWR2_ROUT1 0x20
38 #define WM8960_PWR2_OUT3 0x02
39
40 /* R28 - Anti-pop 1 */
41 #define WM8960_POBCTRL 0x80
42 #define WM8960_BUFDCOPEN 0x10
43 #define WM8960_BUFIOEN 0x08
44 #define WM8960_SOFT_ST 0x04
45 #define WM8960_HPSTBY 0x01
46
47 /* R29 - Anti-pop 2 */
48 #define WM8960_DISOP 0x40
49 #define WM8960_DRES_MASK 0x30
50
51 static bool is_pll_freq_available(unsigned int source, unsigned int target);
52 static int wm8960_set_pll(struct snd_soc_codec *codec,
53 unsigned int freq_in, unsigned int freq_out);
54 /*
55 * wm8960 register cache
56 * We can't read the WM8960 register space when we are
57 * using 2 wire for device control, so we cache them instead.
58 */
59 static const struct reg_default wm8960_reg_defaults[] = {
60 { 0x0, 0x00a7 },
61 { 0x1, 0x00a7 },
62 { 0x2, 0x0000 },
63 { 0x3, 0x0000 },
64 { 0x4, 0x0000 },
65 { 0x5, 0x0008 },
66 { 0x6, 0x0000 },
67 { 0x7, 0x000a },
68 { 0x8, 0x01c0 },
69 { 0x9, 0x0000 },
70 { 0xa, 0x00ff },
71 { 0xb, 0x00ff },
72
73 { 0x10, 0x0000 },
74 { 0x11, 0x007b },
75 { 0x12, 0x0100 },
76 { 0x13, 0x0032 },
77 { 0x14, 0x0000 },
78 { 0x15, 0x00c3 },
79 { 0x16, 0x00c3 },
80 { 0x17, 0x01c0 },
81 { 0x18, 0x0000 },
82 { 0x19, 0x0000 },
83 { 0x1a, 0x0000 },
84 { 0x1b, 0x0000 },
85 { 0x1c, 0x0000 },
86 { 0x1d, 0x0000 },
87
88 { 0x20, 0x0100 },
89 { 0x21, 0x0100 },
90 { 0x22, 0x0050 },
91
92 { 0x25, 0x0050 },
93 { 0x26, 0x0000 },
94 { 0x27, 0x0000 },
95 { 0x28, 0x0000 },
96 { 0x29, 0x0000 },
97 { 0x2a, 0x0040 },
98 { 0x2b, 0x0000 },
99 { 0x2c, 0x0000 },
100 { 0x2d, 0x0050 },
101 { 0x2e, 0x0050 },
102 { 0x2f, 0x0000 },
103 { 0x30, 0x0002 },
104 { 0x31, 0x0037 },
105
106 { 0x33, 0x0080 },
107 { 0x34, 0x0008 },
108 { 0x35, 0x0031 },
109 { 0x36, 0x0026 },
110 { 0x37, 0x00e9 },
111 };
112
113 static bool wm8960_volatile(struct device *dev, unsigned int reg)
114 {
115 switch (reg) {
116 case WM8960_RESET:
117 return true;
118 default:
119 return false;
120 }
121 }
122
123 struct wm8960_priv {
124 struct clk *mclk;
125 struct regmap *regmap;
126 int (*set_bias_level)(struct snd_soc_codec *,
127 enum snd_soc_bias_level level);
128 struct snd_soc_dapm_widget *lout1;
129 struct snd_soc_dapm_widget *rout1;
130 struct snd_soc_dapm_widget *out3;
131 bool deemph;
132 int lrclk;
133 int bclk;
134 int sysclk;
135 int clk_id;
136 int freq_in;
137 bool is_stream_in_use[2];
138 struct wm8960_data pdata;
139 };
140
141 #define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0)
142
143 /* enumerated controls */
144 static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
145 "Right Inverted", "Stereo Inversion"};
146 static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
147 static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
148 static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
149 static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
150 static const char *wm8960_adc_data_output_sel[] = {
151 "Left Data = Left ADC; Right Data = Right ADC",
152 "Left Data = Left ADC; Right Data = Left ADC",
153 "Left Data = Right ADC; Right Data = Right ADC",
154 "Left Data = Right ADC; Right Data = Left ADC",
155 };
156 static const char *wm8960_dmonomix[] = {"Stereo", "Mono"};
157
158 static const struct soc_enum wm8960_enum[] = {
159 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
160 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
161 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
162 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
163 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
164 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
165 SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel),
166 SOC_ENUM_SINGLE(WM8960_ADDCTL1, 4, 2, wm8960_dmonomix),
167 };
168
169 static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
170
171 static int wm8960_set_deemph(struct snd_soc_codec *codec)
172 {
173 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
174 int val, i, best;
175
176 /* If we're using deemphasis select the nearest available sample
177 * rate.
178 */
179 if (wm8960->deemph) {
180 best = 1;
181 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
182 if (abs(deemph_settings[i] - wm8960->lrclk) <
183 abs(deemph_settings[best] - wm8960->lrclk))
184 best = i;
185 }
186
187 val = best << 1;
188 } else {
189 val = 0;
190 }
191
192 dev_dbg(codec->dev, "Set deemphasis %d\n", val);
193
194 return snd_soc_update_bits(codec, WM8960_DACCTL1,
195 0x6, val);
196 }
197
198 static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
199 struct snd_ctl_elem_value *ucontrol)
200 {
201 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
202 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
203
204 ucontrol->value.integer.value[0] = wm8960->deemph;
205 return 0;
206 }
207
208 static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
209 struct snd_ctl_elem_value *ucontrol)
210 {
211 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
212 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
213 unsigned int deemph = ucontrol->value.integer.value[0];
214
215 if (deemph > 1)
216 return -EINVAL;
217
218 wm8960->deemph = deemph;
219
220 return wm8960_set_deemph(codec);
221 }
222
223 static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
224 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0);
225 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
226 static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
227 static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
228 static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1);
229 static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(micboost_tlv,
230 0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0),
231 2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0),
232 );
233
234 static const struct snd_kcontrol_new wm8960_snd_controls[] = {
235 SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
236 0, 63, 0, inpga_tlv),
237 SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
238 6, 1, 0),
239 SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
240 7, 1, 1),
241
242 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
243 WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv),
244 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
245 WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv),
246 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
247 WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv),
248 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
249 WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv),
250 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume",
251 WM8960_RINPATH, 4, 3, 0, micboost_tlv),
252 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume",
253 WM8960_LINPATH, 4, 3, 0, micboost_tlv),
254
255 SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
256 0, 255, 0, dac_tlv),
257
258 SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
259 0, 127, 0, out_tlv),
260 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
261 7, 1, 0),
262
263 SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
264 0, 127, 0, out_tlv),
265 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
266 7, 1, 0),
267 SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
268 SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
269
270 SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
271 SOC_ENUM("ADC Polarity", wm8960_enum[0]),
272 SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
273
274 SOC_ENUM("DAC Polarity", wm8960_enum[1]),
275 SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
276 wm8960_get_deemph, wm8960_put_deemph),
277
278 SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
279 SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
280 SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
281 SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
282
283 SOC_ENUM("ALC Function", wm8960_enum[4]),
284 SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
285 SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
286 SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
287 SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
288 SOC_ENUM("ALC Mode", wm8960_enum[5]),
289 SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
290 SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
291
292 SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
293 SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
294
295 SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
296 0, 255, 0, adc_tlv),
297
298 SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
299 WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
300 SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
301 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
302 SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
303 WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
304 SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
305 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
306
307 SOC_ENUM("ADC Data Output Select", wm8960_enum[6]),
308 SOC_ENUM("DAC Mono Mix", wm8960_enum[7]),
309 };
310
311 static const struct snd_kcontrol_new wm8960_lin_boost[] = {
312 SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
313 SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
314 SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
315 };
316
317 static const struct snd_kcontrol_new wm8960_lin[] = {
318 SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
319 };
320
321 static const struct snd_kcontrol_new wm8960_rin_boost[] = {
322 SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
323 SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
324 SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
325 };
326
327 static const struct snd_kcontrol_new wm8960_rin[] = {
328 SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
329 };
330
331 static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
332 SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
333 SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
334 SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
335 };
336
337 static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
338 SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
339 SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
340 SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
341 };
342
343 static const struct snd_kcontrol_new wm8960_mono_out[] = {
344 SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
345 SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
346 };
347
348 static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
349 SND_SOC_DAPM_INPUT("LINPUT1"),
350 SND_SOC_DAPM_INPUT("RINPUT1"),
351 SND_SOC_DAPM_INPUT("LINPUT2"),
352 SND_SOC_DAPM_INPUT("RINPUT2"),
353 SND_SOC_DAPM_INPUT("LINPUT3"),
354 SND_SOC_DAPM_INPUT("RINPUT3"),
355
356 SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
357
358 SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
359 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
360 SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
361 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
362
363 SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
364 wm8960_lin, ARRAY_SIZE(wm8960_lin)),
365 SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
366 wm8960_rin, ARRAY_SIZE(wm8960_rin)),
367
368 SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
369 SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
370
371 SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
372 SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
373
374 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
375 &wm8960_loutput_mixer[0],
376 ARRAY_SIZE(wm8960_loutput_mixer)),
377 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
378 &wm8960_routput_mixer[0],
379 ARRAY_SIZE(wm8960_routput_mixer)),
380
381 SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
382 SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
383
384 SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
385 SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
386
387 SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
388 SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
389
390 SND_SOC_DAPM_OUTPUT("SPK_LP"),
391 SND_SOC_DAPM_OUTPUT("SPK_LN"),
392 SND_SOC_DAPM_OUTPUT("HP_L"),
393 SND_SOC_DAPM_OUTPUT("HP_R"),
394 SND_SOC_DAPM_OUTPUT("SPK_RP"),
395 SND_SOC_DAPM_OUTPUT("SPK_RN"),
396 SND_SOC_DAPM_OUTPUT("OUT3"),
397 };
398
399 static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
400 SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
401 &wm8960_mono_out[0],
402 ARRAY_SIZE(wm8960_mono_out)),
403 };
404
405 /* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
406 static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
407 SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
408 };
409
410 static const struct snd_soc_dapm_route audio_paths[] = {
411 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
412 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
413 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
414
415 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer" },
416 { "Left Input Mixer", "Boost Switch", "LINPUT1" }, /* Really Boost Switch */
417 { "Left Input Mixer", NULL, "LINPUT2" },
418 { "Left Input Mixer", NULL, "LINPUT3" },
419
420 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
421 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
422 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
423
424 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer" },
425 { "Right Input Mixer", "Boost Switch", "RINPUT1" }, /* Really Boost Switch */
426 { "Right Input Mixer", NULL, "RINPUT2" },
427 { "Right Input Mixer", NULL, "RINPUT3" },
428
429 { "Left ADC", NULL, "Left Input Mixer" },
430 { "Right ADC", NULL, "Right Input Mixer" },
431
432 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
433 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer" },
434 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
435
436 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
437 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" },
438 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
439
440 { "LOUT1 PGA", NULL, "Left Output Mixer" },
441 { "ROUT1 PGA", NULL, "Right Output Mixer" },
442
443 { "HP_L", NULL, "LOUT1 PGA" },
444 { "HP_R", NULL, "ROUT1 PGA" },
445
446 { "Left Speaker PGA", NULL, "Left Output Mixer" },
447 { "Right Speaker PGA", NULL, "Right Output Mixer" },
448
449 { "Left Speaker Output", NULL, "Left Speaker PGA" },
450 { "Right Speaker Output", NULL, "Right Speaker PGA" },
451
452 { "SPK_LN", NULL, "Left Speaker Output" },
453 { "SPK_LP", NULL, "Left Speaker Output" },
454 { "SPK_RN", NULL, "Right Speaker Output" },
455 { "SPK_RP", NULL, "Right Speaker Output" },
456 };
457
458 static const struct snd_soc_dapm_route audio_paths_out3[] = {
459 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
460 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
461
462 { "OUT3", NULL, "Mono Output Mixer", }
463 };
464
465 static const struct snd_soc_dapm_route audio_paths_capless[] = {
466 { "HP_L", NULL, "OUT3 VMID" },
467 { "HP_R", NULL, "OUT3 VMID" },
468
469 { "OUT3 VMID", NULL, "Left Output Mixer" },
470 { "OUT3 VMID", NULL, "Right Output Mixer" },
471 };
472
473 static int wm8960_add_widgets(struct snd_soc_codec *codec)
474 {
475 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
476 struct wm8960_data *pdata = &wm8960->pdata;
477 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
478 struct snd_soc_dapm_widget *w;
479
480 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
481 ARRAY_SIZE(wm8960_dapm_widgets));
482
483 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
484
485 /* In capless mode OUT3 is used to provide VMID for the
486 * headphone outputs, otherwise it is used as a mono mixer.
487 */
488 if (pdata && pdata->capless) {
489 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
490 ARRAY_SIZE(wm8960_dapm_widgets_capless));
491
492 snd_soc_dapm_add_routes(dapm, audio_paths_capless,
493 ARRAY_SIZE(audio_paths_capless));
494 } else {
495 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
496 ARRAY_SIZE(wm8960_dapm_widgets_out3));
497
498 snd_soc_dapm_add_routes(dapm, audio_paths_out3,
499 ARRAY_SIZE(audio_paths_out3));
500 }
501
502 /* We need to power up the headphone output stage out of
503 * sequence for capless mode. To save scanning the widget
504 * list each time to find the desired power state do so now
505 * and save the result.
506 */
507 list_for_each_entry(w, &codec->component.card->widgets, list) {
508 if (w->dapm != dapm)
509 continue;
510 if (strcmp(w->name, "LOUT1 PGA") == 0)
511 wm8960->lout1 = w;
512 if (strcmp(w->name, "ROUT1 PGA") == 0)
513 wm8960->rout1 = w;
514 if (strcmp(w->name, "OUT3 VMID") == 0)
515 wm8960->out3 = w;
516 }
517
518 return 0;
519 }
520
521 static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
522 unsigned int fmt)
523 {
524 struct snd_soc_codec *codec = codec_dai->codec;
525 u16 iface = 0;
526
527 /* set master/slave audio interface */
528 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
529 case SND_SOC_DAIFMT_CBM_CFM:
530 iface |= 0x0040;
531 break;
532 case SND_SOC_DAIFMT_CBS_CFS:
533 break;
534 default:
535 return -EINVAL;
536 }
537
538 /* interface format */
539 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
540 case SND_SOC_DAIFMT_I2S:
541 iface |= 0x0002;
542 break;
543 case SND_SOC_DAIFMT_RIGHT_J:
544 break;
545 case SND_SOC_DAIFMT_LEFT_J:
546 iface |= 0x0001;
547 break;
548 case SND_SOC_DAIFMT_DSP_A:
549 iface |= 0x0003;
550 break;
551 case SND_SOC_DAIFMT_DSP_B:
552 iface |= 0x0013;
553 break;
554 default:
555 return -EINVAL;
556 }
557
558 /* clock inversion */
559 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
560 case SND_SOC_DAIFMT_NB_NF:
561 break;
562 case SND_SOC_DAIFMT_IB_IF:
563 iface |= 0x0090;
564 break;
565 case SND_SOC_DAIFMT_IB_NF:
566 iface |= 0x0080;
567 break;
568 case SND_SOC_DAIFMT_NB_IF:
569 iface |= 0x0010;
570 break;
571 default:
572 return -EINVAL;
573 }
574
575 /* set iface */
576 snd_soc_write(codec, WM8960_IFACE1, iface);
577 return 0;
578 }
579
580 static struct {
581 int rate;
582 unsigned int val;
583 } alc_rates[] = {
584 { 48000, 0 },
585 { 44100, 0 },
586 { 32000, 1 },
587 { 22050, 2 },
588 { 24000, 2 },
589 { 16000, 3 },
590 { 11025, 4 },
591 { 12000, 4 },
592 { 8000, 5 },
593 };
594
595 /* -1 for reserved value */
596 static const int sysclk_divs[] = { 1, -1, 2, -1 };
597
598 /* Multiply 256 for internal 256 div */
599 static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 };
600
601 /* Multiply 10 to eliminate decimials */
602 static const int bclk_divs[] = {
603 10, 15, 20, 30, 40, 55, 60, 80, 110,
604 120, 160, 220, 240, 320, 320, 320
605 };
606
607 static int wm8960_configure_clocking(struct snd_soc_codec *codec)
608 {
609 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
610 int sysclk, bclk, lrclk, freq_out, freq_in;
611 u16 iface1 = snd_soc_read(codec, WM8960_IFACE1);
612 int i, j, k;
613
614 if (!(iface1 & (1<<6))) {
615 dev_dbg(codec->dev,
616 "Codec is slave mode, no need to configure clock\n");
617 return 0;
618 }
619
620 if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) {
621 dev_err(codec->dev, "No MCLK configured\n");
622 return -EINVAL;
623 }
624
625 freq_in = wm8960->freq_in;
626 bclk = wm8960->bclk;
627 lrclk = wm8960->lrclk;
628 /*
629 * If it's sysclk auto mode, check if the MCLK can provide sysclk or
630 * not. If MCLK can provide sysclk, using MCLK to provide sysclk
631 * directly. Otherwise, auto select a available pll out frequency
632 * and set PLL.
633 */
634 if (wm8960->clk_id == WM8960_SYSCLK_AUTO) {
635 /* disable the PLL and using MCLK to provide sysclk */
636 wm8960_set_pll(codec, 0, 0);
637 freq_out = freq_in;
638 } else if (wm8960->sysclk) {
639 freq_out = wm8960->sysclk;
640 } else {
641 dev_err(codec->dev, "No SYSCLK configured\n");
642 return -EINVAL;
643 }
644
645 if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
646 /* check if the sysclk frequency is available. */
647 for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
648 if (sysclk_divs[i] == -1)
649 continue;
650 sysclk = freq_out / sysclk_divs[i];
651 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
652 if (sysclk != dac_divs[j] * lrclk)
653 continue;
654 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k)
655 if (sysclk == bclk * bclk_divs[k] / 10)
656 break;
657 if (k != ARRAY_SIZE(bclk_divs))
658 break;
659 }
660 if (j != ARRAY_SIZE(dac_divs))
661 break;
662 }
663
664 if (i != ARRAY_SIZE(sysclk_divs)) {
665 goto configure_clock;
666 } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
667 dev_err(codec->dev, "failed to configure clock\n");
668 return -EINVAL;
669 }
670 }
671 /* get a available pll out frequency and set pll */
672 for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
673 if (sysclk_divs[i] == -1)
674 continue;
675 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
676 sysclk = lrclk * dac_divs[j];
677 freq_out = sysclk * sysclk_divs[i];
678
679 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
680 if (sysclk == bclk * bclk_divs[k] / 10 &&
681 is_pll_freq_available(freq_in, freq_out)) {
682 wm8960_set_pll(codec,
683 freq_in, freq_out);
684 break;
685 } else {
686 continue;
687 }
688 }
689 if (k != ARRAY_SIZE(bclk_divs))
690 break;
691 }
692 if (j != ARRAY_SIZE(dac_divs))
693 break;
694 }
695
696 if (i == ARRAY_SIZE(sysclk_divs)) {
697 dev_err(codec->dev, "failed to configure clock\n");
698 return -EINVAL;
699 }
700
701 configure_clock:
702 /* configure sysclk clock */
703 snd_soc_update_bits(codec, WM8960_CLOCK1, 3 << 1, i << 1);
704
705 /* configure frame clock */
706 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x7 << 3, j << 3);
707 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x7 << 6, j << 6);
708
709 /* configure bit clock */
710 snd_soc_update_bits(codec, WM8960_CLOCK2, 0xf, k);
711
712 return 0;
713 }
714
715 static int wm8960_hw_params(struct snd_pcm_substream *substream,
716 struct snd_pcm_hw_params *params,
717 struct snd_soc_dai *dai)
718 {
719 struct snd_soc_codec *codec = dai->codec;
720 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
721 u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
722 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
723 int i;
724
725 wm8960->bclk = snd_soc_params_to_bclk(params);
726 if (params_channels(params) == 1)
727 wm8960->bclk *= 2;
728
729 /* bit size */
730 switch (params_width(params)) {
731 case 16:
732 break;
733 case 20:
734 iface |= 0x0004;
735 break;
736 case 24:
737 iface |= 0x0008;
738 break;
739 case 32:
740 /* right justify mode does not support 32 word length */
741 if ((iface & 0x3) != 0) {
742 iface |= 0x000c;
743 break;
744 }
745 default:
746 dev_err(codec->dev, "unsupported width %d\n",
747 params_width(params));
748 return -EINVAL;
749 }
750
751 wm8960->lrclk = params_rate(params);
752 /* Update filters for the new rate */
753 if (tx) {
754 wm8960_set_deemph(codec);
755 } else {
756 for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
757 if (alc_rates[i].rate == params_rate(params))
758 snd_soc_update_bits(codec,
759 WM8960_ADDCTL3, 0x7,
760 alc_rates[i].val);
761 }
762
763 /* set iface */
764 snd_soc_write(codec, WM8960_IFACE1, iface);
765
766 wm8960->is_stream_in_use[tx] = true;
767
768 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON &&
769 !wm8960->is_stream_in_use[!tx])
770 return wm8960_configure_clocking(codec);
771
772 return 0;
773 }
774
775 static int wm8960_hw_free(struct snd_pcm_substream *substream,
776 struct snd_soc_dai *dai)
777 {
778 struct snd_soc_codec *codec = dai->codec;
779 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
780 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
781
782 wm8960->is_stream_in_use[tx] = false;
783
784 return 0;
785 }
786
787 static int wm8960_mute(struct snd_soc_dai *dai, int mute)
788 {
789 struct snd_soc_codec *codec = dai->codec;
790
791 if (mute)
792 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0x8);
793 else
794 snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0);
795 return 0;
796 }
797
798 static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
799 enum snd_soc_bias_level level)
800 {
801 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
802 u16 pm2 = snd_soc_read(codec, WM8960_POWER2);
803 int ret;
804
805 switch (level) {
806 case SND_SOC_BIAS_ON:
807 break;
808
809 case SND_SOC_BIAS_PREPARE:
810 switch (snd_soc_codec_get_bias_level(codec)) {
811 case SND_SOC_BIAS_STANDBY:
812 if (!IS_ERR(wm8960->mclk)) {
813 ret = clk_prepare_enable(wm8960->mclk);
814 if (ret) {
815 dev_err(codec->dev,
816 "Failed to enable MCLK: %d\n",
817 ret);
818 return ret;
819 }
820 }
821
822 ret = wm8960_configure_clocking(codec);
823 if (ret)
824 return ret;
825
826 /* Set VMID to 2x50k */
827 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x80);
828 break;
829
830 case SND_SOC_BIAS_ON:
831 /*
832 * If it's sysclk auto mode, and the pll is enabled,
833 * disable the pll
834 */
835 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
836 wm8960_set_pll(codec, 0, 0);
837
838 if (!IS_ERR(wm8960->mclk))
839 clk_disable_unprepare(wm8960->mclk);
840 break;
841
842 default:
843 break;
844 }
845
846 break;
847
848 case SND_SOC_BIAS_STANDBY:
849 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
850 regcache_sync(wm8960->regmap);
851
852 /* Enable anti-pop features */
853 snd_soc_write(codec, WM8960_APOP1,
854 WM8960_POBCTRL | WM8960_SOFT_ST |
855 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
856
857 /* Enable & ramp VMID at 2x50k */
858 snd_soc_update_bits(codec, WM8960_POWER1, 0x80, 0x80);
859 msleep(100);
860
861 /* Enable VREF */
862 snd_soc_update_bits(codec, WM8960_POWER1, WM8960_VREF,
863 WM8960_VREF);
864
865 /* Disable anti-pop features */
866 snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
867 }
868
869 /* Set VMID to 2x250k */
870 snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x100);
871 break;
872
873 case SND_SOC_BIAS_OFF:
874 /* Enable anti-pop features */
875 snd_soc_write(codec, WM8960_APOP1,
876 WM8960_POBCTRL | WM8960_SOFT_ST |
877 WM8960_BUFDCOPEN | WM8960_BUFIOEN);
878
879 /* Disable VMID and VREF, let them discharge */
880 snd_soc_write(codec, WM8960_POWER1, 0);
881 msleep(600);
882 break;
883 }
884
885 return 0;
886 }
887
888 static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
889 enum snd_soc_bias_level level)
890 {
891 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
892 u16 pm2 = snd_soc_read(codec, WM8960_POWER2);
893 int reg, ret;
894
895 switch (level) {
896 case SND_SOC_BIAS_ON:
897 break;
898
899 case SND_SOC_BIAS_PREPARE:
900 switch (snd_soc_codec_get_bias_level(codec)) {
901 case SND_SOC_BIAS_STANDBY:
902 /* Enable anti pop mode */
903 snd_soc_update_bits(codec, WM8960_APOP1,
904 WM8960_POBCTRL | WM8960_SOFT_ST |
905 WM8960_BUFDCOPEN,
906 WM8960_POBCTRL | WM8960_SOFT_ST |
907 WM8960_BUFDCOPEN);
908
909 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
910 reg = 0;
911 if (wm8960->lout1 && wm8960->lout1->power)
912 reg |= WM8960_PWR2_LOUT1;
913 if (wm8960->rout1 && wm8960->rout1->power)
914 reg |= WM8960_PWR2_ROUT1;
915 if (wm8960->out3 && wm8960->out3->power)
916 reg |= WM8960_PWR2_OUT3;
917 snd_soc_update_bits(codec, WM8960_POWER2,
918 WM8960_PWR2_LOUT1 |
919 WM8960_PWR2_ROUT1 |
920 WM8960_PWR2_OUT3, reg);
921
922 /* Enable VMID at 2*50k */
923 snd_soc_update_bits(codec, WM8960_POWER1,
924 WM8960_VMID_MASK, 0x80);
925
926 /* Ramp */
927 msleep(100);
928
929 /* Enable VREF */
930 snd_soc_update_bits(codec, WM8960_POWER1,
931 WM8960_VREF, WM8960_VREF);
932
933 msleep(100);
934
935 if (!IS_ERR(wm8960->mclk)) {
936 ret = clk_prepare_enable(wm8960->mclk);
937 if (ret) {
938 dev_err(codec->dev,
939 "Failed to enable MCLK: %d\n",
940 ret);
941 return ret;
942 }
943 }
944
945 ret = wm8960_configure_clocking(codec);
946 if (ret)
947 return ret;
948
949 break;
950
951 case SND_SOC_BIAS_ON:
952 /*
953 * If it's sysclk auto mode, and the pll is enabled,
954 * disable the pll
955 */
956 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
957 wm8960_set_pll(codec, 0, 0);
958
959 if (!IS_ERR(wm8960->mclk))
960 clk_disable_unprepare(wm8960->mclk);
961
962 /* Enable anti-pop mode */
963 snd_soc_update_bits(codec, WM8960_APOP1,
964 WM8960_POBCTRL | WM8960_SOFT_ST |
965 WM8960_BUFDCOPEN,
966 WM8960_POBCTRL | WM8960_SOFT_ST |
967 WM8960_BUFDCOPEN);
968
969 /* Disable VMID and VREF */
970 snd_soc_update_bits(codec, WM8960_POWER1,
971 WM8960_VREF | WM8960_VMID_MASK, 0);
972 break;
973
974 case SND_SOC_BIAS_OFF:
975 regcache_sync(wm8960->regmap);
976 break;
977 default:
978 break;
979 }
980 break;
981
982 case SND_SOC_BIAS_STANDBY:
983 switch (snd_soc_codec_get_bias_level(codec)) {
984 case SND_SOC_BIAS_PREPARE:
985 /* Disable HP discharge */
986 snd_soc_update_bits(codec, WM8960_APOP2,
987 WM8960_DISOP | WM8960_DRES_MASK,
988 0);
989
990 /* Disable anti-pop features */
991 snd_soc_update_bits(codec, WM8960_APOP1,
992 WM8960_POBCTRL | WM8960_SOFT_ST |
993 WM8960_BUFDCOPEN,
994 WM8960_POBCTRL | WM8960_SOFT_ST |
995 WM8960_BUFDCOPEN);
996 break;
997
998 default:
999 break;
1000 }
1001 break;
1002
1003 case SND_SOC_BIAS_OFF:
1004 break;
1005 }
1006
1007 return 0;
1008 }
1009
1010 /* PLL divisors */
1011 struct _pll_div {
1012 u32 pre_div:1;
1013 u32 n:4;
1014 u32 k:24;
1015 };
1016
1017 static bool is_pll_freq_available(unsigned int source, unsigned int target)
1018 {
1019 unsigned int Ndiv;
1020
1021 if (source == 0 || target == 0)
1022 return false;
1023
1024 /* Scale up target to PLL operating frequency */
1025 target *= 4;
1026 Ndiv = target / source;
1027
1028 if (Ndiv < 6) {
1029 source >>= 1;
1030 Ndiv = target / source;
1031 }
1032
1033 if ((Ndiv < 6) || (Ndiv > 12))
1034 return false;
1035
1036 return true;
1037 }
1038
1039 /* The size in bits of the pll divide multiplied by 10
1040 * to allow rounding later */
1041 #define FIXED_PLL_SIZE ((1 << 24) * 10)
1042
1043 static int pll_factors(unsigned int source, unsigned int target,
1044 struct _pll_div *pll_div)
1045 {
1046 unsigned long long Kpart;
1047 unsigned int K, Ndiv, Nmod;
1048
1049 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
1050
1051 /* Scale up target to PLL operating frequency */
1052 target *= 4;
1053
1054 Ndiv = target / source;
1055 if (Ndiv < 6) {
1056 source >>= 1;
1057 pll_div->pre_div = 1;
1058 Ndiv = target / source;
1059 } else
1060 pll_div->pre_div = 0;
1061
1062 if ((Ndiv < 6) || (Ndiv > 12)) {
1063 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
1064 return -EINVAL;
1065 }
1066
1067 pll_div->n = Ndiv;
1068 Nmod = target % source;
1069 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
1070
1071 do_div(Kpart, source);
1072
1073 K = Kpart & 0xFFFFFFFF;
1074
1075 /* Check if we need to round */
1076 if ((K % 10) >= 5)
1077 K += 5;
1078
1079 /* Move down to proper range now rounding is done */
1080 K /= 10;
1081
1082 pll_div->k = K;
1083
1084 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
1085 pll_div->n, pll_div->k, pll_div->pre_div);
1086
1087 return 0;
1088 }
1089
1090 static int wm8960_set_pll(struct snd_soc_codec *codec,
1091 unsigned int freq_in, unsigned int freq_out)
1092 {
1093 u16 reg;
1094 static struct _pll_div pll_div;
1095 int ret;
1096
1097 if (freq_in && freq_out) {
1098 ret = pll_factors(freq_in, freq_out, &pll_div);
1099 if (ret != 0)
1100 return ret;
1101 }
1102
1103 /* Disable the PLL: even if we are changing the frequency the
1104 * PLL needs to be disabled while we do so. */
1105 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0);
1106 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0);
1107
1108 if (!freq_in || !freq_out)
1109 return 0;
1110
1111 reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
1112 reg |= pll_div.pre_div << 4;
1113 reg |= pll_div.n;
1114
1115 if (pll_div.k) {
1116 reg |= 0x20;
1117
1118 snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
1119 snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
1120 snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0xff);
1121 }
1122 snd_soc_write(codec, WM8960_PLL1, reg);
1123
1124 /* Turn it on */
1125 snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0x1);
1126 msleep(250);
1127 snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0x1);
1128
1129 return 0;
1130 }
1131
1132 static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1133 int source, unsigned int freq_in, unsigned int freq_out)
1134 {
1135 struct snd_soc_codec *codec = codec_dai->codec;
1136 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
1137
1138 wm8960->freq_in = freq_in;
1139
1140 if (pll_id == WM8960_SYSCLK_AUTO)
1141 return 0;
1142
1143 return wm8960_set_pll(codec, freq_in, freq_out);
1144 }
1145
1146 static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1147 int div_id, int div)
1148 {
1149 struct snd_soc_codec *codec = codec_dai->codec;
1150 u16 reg;
1151
1152 switch (div_id) {
1153 case WM8960_SYSCLKDIV:
1154 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
1155 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
1156 break;
1157 case WM8960_DACDIV:
1158 reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
1159 snd_soc_write(codec, WM8960_CLOCK1, reg | div);
1160 break;
1161 case WM8960_OPCLKDIV:
1162 reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
1163 snd_soc_write(codec, WM8960_PLL1, reg | div);
1164 break;
1165 case WM8960_DCLKDIV:
1166 reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
1167 snd_soc_write(codec, WM8960_CLOCK2, reg | div);
1168 break;
1169 case WM8960_TOCLKSEL:
1170 reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
1171 snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
1172 break;
1173 default:
1174 return -EINVAL;
1175 }
1176
1177 return 0;
1178 }
1179
1180 static int wm8960_set_bias_level(struct snd_soc_codec *codec,
1181 enum snd_soc_bias_level level)
1182 {
1183 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
1184
1185 return wm8960->set_bias_level(codec, level);
1186 }
1187
1188 static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
1189 unsigned int freq, int dir)
1190 {
1191 struct snd_soc_codec *codec = dai->codec;
1192 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
1193
1194 switch (clk_id) {
1195 case WM8960_SYSCLK_MCLK:
1196 snd_soc_update_bits(codec, WM8960_CLOCK1,
1197 0x1, WM8960_SYSCLK_MCLK);
1198 break;
1199 case WM8960_SYSCLK_PLL:
1200 snd_soc_update_bits(codec, WM8960_CLOCK1,
1201 0x1, WM8960_SYSCLK_PLL);
1202 break;
1203 case WM8960_SYSCLK_AUTO:
1204 break;
1205 default:
1206 return -EINVAL;
1207 }
1208
1209 wm8960->sysclk = freq;
1210 wm8960->clk_id = clk_id;
1211
1212 return 0;
1213 }
1214
1215 #define WM8960_RATES SNDRV_PCM_RATE_8000_48000
1216
1217 #define WM8960_FORMATS \
1218 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1219 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1220
1221 static const struct snd_soc_dai_ops wm8960_dai_ops = {
1222 .hw_params = wm8960_hw_params,
1223 .hw_free = wm8960_hw_free,
1224 .digital_mute = wm8960_mute,
1225 .set_fmt = wm8960_set_dai_fmt,
1226 .set_clkdiv = wm8960_set_dai_clkdiv,
1227 .set_pll = wm8960_set_dai_pll,
1228 .set_sysclk = wm8960_set_dai_sysclk,
1229 };
1230
1231 static struct snd_soc_dai_driver wm8960_dai = {
1232 .name = "wm8960-hifi",
1233 .playback = {
1234 .stream_name = "Playback",
1235 .channels_min = 1,
1236 .channels_max = 2,
1237 .rates = WM8960_RATES,
1238 .formats = WM8960_FORMATS,},
1239 .capture = {
1240 .stream_name = "Capture",
1241 .channels_min = 1,
1242 .channels_max = 2,
1243 .rates = WM8960_RATES,
1244 .formats = WM8960_FORMATS,},
1245 .ops = &wm8960_dai_ops,
1246 .symmetric_rates = 1,
1247 };
1248
1249 static int wm8960_probe(struct snd_soc_codec *codec)
1250 {
1251 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
1252 struct wm8960_data *pdata = &wm8960->pdata;
1253
1254 if (pdata->capless)
1255 wm8960->set_bias_level = wm8960_set_bias_level_capless;
1256 else
1257 wm8960->set_bias_level = wm8960_set_bias_level_out3;
1258
1259 snd_soc_add_codec_controls(codec, wm8960_snd_controls,
1260 ARRAY_SIZE(wm8960_snd_controls));
1261 wm8960_add_widgets(codec);
1262
1263 return 0;
1264 }
1265
1266 static struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
1267 .probe = wm8960_probe,
1268 .set_bias_level = wm8960_set_bias_level,
1269 .suspend_bias_off = true,
1270 };
1271
1272 static const struct regmap_config wm8960_regmap = {
1273 .reg_bits = 7,
1274 .val_bits = 9,
1275 .max_register = WM8960_PLL4,
1276
1277 .reg_defaults = wm8960_reg_defaults,
1278 .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
1279 .cache_type = REGCACHE_RBTREE,
1280
1281 .volatile_reg = wm8960_volatile,
1282 };
1283
1284 static void wm8960_set_pdata_from_of(struct i2c_client *i2c,
1285 struct wm8960_data *pdata)
1286 {
1287 const struct device_node *np = i2c->dev.of_node;
1288
1289 if (of_property_read_bool(np, "wlf,capless"))
1290 pdata->capless = true;
1291
1292 if (of_property_read_bool(np, "wlf,shared-lrclk"))
1293 pdata->shared_lrclk = true;
1294 }
1295
1296 static int wm8960_i2c_probe(struct i2c_client *i2c,
1297 const struct i2c_device_id *id)
1298 {
1299 struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
1300 struct wm8960_priv *wm8960;
1301 int ret;
1302
1303 wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
1304 GFP_KERNEL);
1305 if (wm8960 == NULL)
1306 return -ENOMEM;
1307
1308 wm8960->mclk = devm_clk_get(&i2c->dev, "mclk");
1309 if (IS_ERR(wm8960->mclk)) {
1310 if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER)
1311 return -EPROBE_DEFER;
1312 }
1313
1314 wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
1315 if (IS_ERR(wm8960->regmap))
1316 return PTR_ERR(wm8960->regmap);
1317
1318 if (pdata)
1319 memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data));
1320 else if (i2c->dev.of_node)
1321 wm8960_set_pdata_from_of(i2c, &wm8960->pdata);
1322
1323 ret = wm8960_reset(wm8960->regmap);
1324 if (ret != 0) {
1325 dev_err(&i2c->dev, "Failed to issue reset\n");
1326 return ret;
1327 }
1328
1329 if (wm8960->pdata.shared_lrclk) {
1330 ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
1331 0x4, 0x4);
1332 if (ret != 0) {
1333 dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
1334 ret);
1335 return ret;
1336 }
1337 }
1338
1339 /* Latch the update bits */
1340 regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100);
1341 regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100);
1342 regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100);
1343 regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100);
1344 regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100);
1345 regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100);
1346 regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100);
1347 regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100);
1348 regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100);
1349 regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100);
1350
1351 i2c_set_clientdata(i2c, wm8960);
1352
1353 ret = snd_soc_register_codec(&i2c->dev,
1354 &soc_codec_dev_wm8960, &wm8960_dai, 1);
1355
1356 return ret;
1357 }
1358
1359 static int wm8960_i2c_remove(struct i2c_client *client)
1360 {
1361 snd_soc_unregister_codec(&client->dev);
1362 return 0;
1363 }
1364
1365 static const struct i2c_device_id wm8960_i2c_id[] = {
1366 { "wm8960", 0 },
1367 { }
1368 };
1369 MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1370
1371 static const struct of_device_id wm8960_of_match[] = {
1372 { .compatible = "wlf,wm8960", },
1373 { }
1374 };
1375 MODULE_DEVICE_TABLE(of, wm8960_of_match);
1376
1377 static struct i2c_driver wm8960_i2c_driver = {
1378 .driver = {
1379 .name = "wm8960",
1380 .of_match_table = wm8960_of_match,
1381 },
1382 .probe = wm8960_i2c_probe,
1383 .remove = wm8960_i2c_remove,
1384 .id_table = wm8960_i2c_id,
1385 };
1386
1387 module_i2c_driver(wm8960_i2c_driver);
1388
1389 MODULE_DESCRIPTION("ASoC WM8960 driver");
1390 MODULE_AUTHOR("Liam Girdwood");
1391 MODULE_LICENSE("GPL");
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