include/linux/gpio/driver.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __LINUX_GPIO_DRIVER_H
   3 #define __LINUX_GPIO_DRIVER_H
   4
   5 #include <linux/device.h>
   6 #include <linux/types.h>
   7 #include <linux/irq.h>
   8 #include <linux/irqchip/chained_irq.h>
   9 #include <linux/irqdomain.h>
  10 #include <linux/lockdep.h>
  11 #include <linux/pinctrl/pinctrl.h>
  12 #include <linux/pinctrl/pinconf-generic.h>
  13
  14 struct gpio_desc;
  15 struct of_phandle_args;
  16 struct device_node;
  17 struct seq_file;
  18 struct gpio_device;
  19 struct module;
  20
  21 #ifdef CONFIG_GPIOLIB
  22
  23 /**
  24  * struct gpio_chip - abstract a GPIO controller
  25  * @label: a functional name for the GPIO device, such as a part
  26  *      number or the name of the SoC IP-block implementing it.
  27  * @gpiodev: the internal state holder, opaque struct
  28  * @parent: optional parent device providing the GPIOs
  29  * @owner: helps prevent removal of modules exporting active GPIOs
  30  * @request: optional hook for chip-specific activation, such as
  31  *      enabling module power and clock; may sleep
  32  * @free: optional hook for chip-specific deactivation, such as
  33  *      disabling module power and clock; may sleep
  34  * @get_direction: returns direction for signal "offset", 0=out, 1=in,
  35  *      (same as GPIOF_DIR_XXX), or negative error
  36  * @direction_input: configures signal "offset" as input, or returns error
  37  * @direction_output: configures signal "offset" as output, or returns error
  38  * @get: returns value for signal "offset", 0=low, 1=high, or negative error
  39  * @set: assigns output value for signal "offset"
  40  * @set_multiple: assigns output values for multiple signals defined by "mask"
  41  * @set_config: optional hook for all kinds of settings. Uses the same
  42  *      packed config format as generic pinconf.
  43  * @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
  44  *      implementation may not sleep
  45  * @dbg_show: optional routine to show contents in debugfs; default code
  46  *      will be used when this is omitted, but custom code can show extra
  47  *      state (such as pullup/pulldown configuration).
  48  * @base: identifies the first GPIO number handled by this chip;
  49  *      or, if negative during registration, requests dynamic ID allocation.
  50  *      DEPRECATION: providing anything non-negative and nailing the base
  51  *      offset of GPIO chips is deprecated. Please pass -1 as base to
  52  *      let gpiolib select the chip base in all possible cases. We want to
  53  *      get rid of the static GPIO number space in the long run.
  54  * @ngpio: the number of GPIOs handled by this controller; the last GPIO
  55  *      handled is (base + ngpio - 1).
  56  * @names: if set, must be an array of strings to use as alternative
  57  *      names for the GPIOs in this chip. Any entry in the array
  58  *      may be NULL if there is no alias for the GPIO, however the
  59  *      array must be @ngpio entries long.  A name can include a single printk
  60  *      format specifier for an unsigned int.  It is substituted by the actual
  61  *      number of the gpio.
  62  * @can_sleep: flag must be set iff get()/set() methods sleep, as they
  63  *      must while accessing GPIO expander chips over I2C or SPI. This
  64  *      implies that if the chip supports IRQs, these IRQs need to be threaded
  65  *      as the chip access may sleep when e.g. reading out the IRQ status
  66  *      registers.
  67  * @read_reg: reader function for generic GPIO
  68  * @write_reg: writer function for generic GPIO
  69  * @pin2mask: some generic GPIO controllers work with the big-endian bits
  70  *      notation, e.g. in a 8-bits register, GPIO7 is the least significant
  71  *      bit. This callback assigns the right bit mask.
  72  * @reg_dat: data (in) register for generic GPIO
  73  * @reg_set: output set register (out=high) for generic GPIO
  74  * @reg_clr: output clear register (out=low) for generic GPIO
  75  * @reg_dir: direction setting register for generic GPIO
  76  * @bgpio_bits: number of register bits used for a generic GPIO i.e.
  77  *      <register width> * 8
  78  * @bgpio_lock: used to lock chip->bgpio_data. Also, this is needed to keep
  79  *      shadowed and real data registers writes together.
  80  * @bgpio_data: shadowed data register for generic GPIO to clear/set bits
  81  *      safely.
  82  * @bgpio_dir: shadowed direction register for generic GPIO to clear/set
  83  *      direction safely.
  84  * @irqchip: GPIO IRQ chip impl, provided by GPIO driver
  85  * @irqdomain: Interrupt translation domain; responsible for mapping
  86  *      between GPIO hwirq number and linux irq number
  87  * @irq_base: first linux IRQ number assigned to GPIO IRQ chip (deprecated)
  88  * @irq_handler: the irq handler to use (often a predefined irq core function)
  89  *      for GPIO IRQs, provided by GPIO driver
  90  * @irq_default_type: default IRQ triggering type applied during GPIO driver
  91  *      initialization, provided by GPIO driver
  92  * @irq_chained_parent: GPIO IRQ chip parent/bank linux irq number,
  93  *      provided by GPIO driver for chained interrupt (not for nested
  94  *      interrupts).
  95  * @irq_nested: True if set the interrupt handling is nested.
  96  * @irq_need_valid_mask: If set core allocates @irq_valid_mask with all
  97  *      bits set to one
  98  * @irq_valid_mask: If not %NULL holds bitmask of GPIOs which are valid to
  99  *      be included in IRQ domain of the chip
 100  * @lock_key: per GPIO IRQ chip lockdep class
 101  *
 102  * A gpio_chip can help platforms abstract various sources of GPIOs so
 103  * they can all be accessed through a common programing interface.
 104  * Example sources would be SOC controllers, FPGAs, multifunction
 105  * chips, dedicated GPIO expanders, and so on.
 106  *
 107  * Each chip controls a number of signals, identified in method calls
 108  * by "offset" values in the range 0..(@ngpio - 1).  When those signals
 109  * are referenced through calls like gpio_get_value(gpio), the offset
 110  * is calculated by subtracting @base from the gpio number.
 111  */
 112 struct gpio_chip {
 113         const char              *label;
 114         struct gpio_device      *gpiodev;
 115         struct device           *parent;
 116         struct module           *owner;
 117
 118         int                     (*request)(struct gpio_chip *chip,
 119                                                 unsigned offset);
 120         void                    (*free)(struct gpio_chip *chip,
 121                                                 unsigned offset);
 122         int                     (*get_direction)(struct gpio_chip *chip,
 123                                                 unsigned offset);
 124         int                     (*direction_input)(struct gpio_chip *chip,
 125                                                 unsigned offset);
 126         int                     (*direction_output)(struct gpio_chip *chip,
 127                                                 unsigned offset, int value);
 128         int                     (*get)(struct gpio_chip *chip,
 129                                                 unsigned offset);
 130         void                    (*set)(struct gpio_chip *chip,
 131                                                 unsigned offset, int value);
 132         void                    (*set_multiple)(struct gpio_chip *chip,
 133                                                 unsigned long *mask,
 134                                                 unsigned long *bits);
 135         int                     (*set_config)(struct gpio_chip *chip,
 136                                               unsigned offset,
 137                                               unsigned long config);
 138         int                     (*to_irq)(struct gpio_chip *chip,
 139                                                 unsigned offset);
 140
 141         void                    (*dbg_show)(struct seq_file *s,
 142                                                 struct gpio_chip *chip);
 143         int                     base;
 144         u16                     ngpio;
 145         const char              *const *names;
 146         bool                    can_sleep;
 147
 148 #if IS_ENABLED(CONFIG_GPIO_GENERIC)
 149         unsigned long (*read_reg)(void __iomem *reg);
 150         void (*write_reg)(void __iomem *reg, unsigned long data);
 151         unsigned long (*pin2mask)(struct gpio_chip *gc, unsigned int pin);
 152         void __iomem *reg_dat;
 153         void __iomem *reg_set;
 154         void __iomem *reg_clr;
 155         void __iomem *reg_dir;
 156         int bgpio_bits;
 157         spinlock_t bgpio_lock;
 158         unsigned long bgpio_data;
 159         unsigned long bgpio_dir;
 160 #endif
 161
 162 #ifdef CONFIG_GPIOLIB_IRQCHIP
 163         /*
 164          * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib
 165          * to handle IRQs for most practical cases.
 166          */
 167         struct irq_chip         *irqchip;
 168         struct irq_domain       *irqdomain;
 169         unsigned int            irq_base;
 170         irq_flow_handler_t      irq_handler;
 171         unsigned int            irq_default_type;
 172         unsigned int            irq_chained_parent;
 173         bool                    irq_nested;
 174         bool                    irq_need_valid_mask;
 175         unsigned long           *irq_valid_mask;
 176         struct lock_class_key   *lock_key;
 177 #endif
 178
 179 #if defined(CONFIG_OF_GPIO)
 180         /*
 181          * If CONFIG_OF is enabled, then all GPIO controllers described in the
 182          * device tree automatically may have an OF translation
 183          */
 184
 185         /**
 186          * @of_node:
 187          *
 188          * Pointer to a device tree node representing this GPIO controller.
 189          */
 190         struct device_node *of_node;
 191
 192         /**
 193          * @of_gpio_n_cells:
 194          *
 195          * Number of cells used to form the GPIO specifier.
 196          */
 197         unsigned int of_gpio_n_cells;
 198
 199         /**
 200          * @of_xlate:
 201          *
 202          * Callback to translate a device tree GPIO specifier into a chip-
 203          * relative GPIO number and flags.
 204          */
 205         int (*of_xlate)(struct gpio_chip *gc,
 206                         const struct of_phandle_args *gpiospec, u32 *flags);
 207 #endif
 208 };
 209
 210 extern const char *gpiochip_is_requested(struct gpio_chip *chip,
 211                         unsigned offset);
 212
 213 /* add/remove chips */
 214 extern int gpiochip_add_data(struct gpio_chip *chip, void *data);
 215 static inline int gpiochip_add(struct gpio_chip *chip)
 216 {
 217         return gpiochip_add_data(chip, NULL);
 218 }
 219 extern void gpiochip_remove(struct gpio_chip *chip);
 220 extern int devm_gpiochip_add_data(struct device *dev, struct gpio_chip *chip,
 221                                   void *data);
 222 extern void devm_gpiochip_remove(struct device *dev, struct gpio_chip *chip);
 223
 224 extern struct gpio_chip *gpiochip_find(void *data,
 225                               int (*match)(struct gpio_chip *chip, void *data));
 226
 227 /* lock/unlock as IRQ */
 228 int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset);
 229 void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset);
 230 bool gpiochip_line_is_irq(struct gpio_chip *chip, unsigned int offset);
 231
 232 /* Line status inquiry for drivers */
 233 bool gpiochip_line_is_open_drain(struct gpio_chip *chip, unsigned int offset);
 234 bool gpiochip_line_is_open_source(struct gpio_chip *chip, unsigned int offset);
 235
 236 /* Sleep persistence inquiry for drivers */
 237 bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset);
 238
 239 /* get driver data */
 240 void *gpiochip_get_data(struct gpio_chip *chip);
 241
 242 struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
 243
 244 struct bgpio_pdata {
 245         const char *label;
 246         int base;
 247         int ngpio;
 248 };
 249
 250 #if IS_ENABLED(CONFIG_GPIO_GENERIC)
 251
 252 int bgpio_init(struct gpio_chip *gc, struct device *dev,
 253                unsigned long sz, void __iomem *dat, void __iomem *set,
 254                void __iomem *clr, void __iomem *dirout, void __iomem *dirin,
 255                unsigned long flags);
 256
 257 #define BGPIOF_BIG_ENDIAN               BIT(0)
 258 #define BGPIOF_UNREADABLE_REG_SET       BIT(1) /* reg_set is unreadable */
 259 #define BGPIOF_UNREADABLE_REG_DIR       BIT(2) /* reg_dir is unreadable */
 260 #define BGPIOF_BIG_ENDIAN_BYTE_ORDER    BIT(3)
 261 #define BGPIOF_READ_OUTPUT_REG_SET      BIT(4) /* reg_set stores output value */
 262 #define BGPIOF_NO_OUTPUT                BIT(5) /* only input */
 263
 264 #endif
 265
 266 #ifdef CONFIG_GPIOLIB_IRQCHIP
 267
 268 void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
 269                 struct irq_chip *irqchip,
 270                 unsigned int parent_irq,
 271                 irq_flow_handler_t parent_handler);
 272
 273 void gpiochip_set_nested_irqchip(struct gpio_chip *gpiochip,
 274                 struct irq_chip *irqchip,
 275                 unsigned int parent_irq);
 276
 277 int gpiochip_irqchip_add_key(struct gpio_chip *gpiochip,
 278                              struct irq_chip *irqchip,
 279                              unsigned int first_irq,
 280                              irq_flow_handler_t handler,
 281                              unsigned int type,
 282                              bool nested,
 283                              struct lock_class_key *lock_key);
 284
 285 #ifdef CONFIG_LOCKDEP
 286
 287 /*
 288  * Lockdep requires that each irqchip instance be created with a
 289  * unique key so as to avoid unnecessary warnings. This upfront
 290  * boilerplate static inlines provides such a key for each
 291  * unique instance.
 292  */
 293 static inline int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
 294                                        struct irq_chip *irqchip,
 295                                        unsigned int first_irq,
 296                                        irq_flow_handler_t handler,
 297                                        unsigned int type)
 298 {
 299         static struct lock_class_key key;
 300
 301         return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
 302                                         handler, type, false, &key);
 303 }
 304
 305 static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gpiochip,
 306                           struct irq_chip *irqchip,
 307                           unsigned int first_irq,
 308                           irq_flow_handler_t handler,
 309                           unsigned int type)
 310 {
 311
 312         static struct lock_class_key key;
 313
 314         return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
 315                                         handler, type, true, &key);
 316 }
 317 #else
 318 static inline int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
 319                                        struct irq_chip *irqchip,
 320                                        unsigned int first_irq,
 321                                        irq_flow_handler_t handler,
 322                                        unsigned int type)
 323 {
 324         return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
 325                                         handler, type, false, NULL);
 326 }
 327
 328 static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gpiochip,
 329                           struct irq_chip *irqchip,
 330                           unsigned int first_irq,
 331                           irq_flow_handler_t handler,
 332                           unsigned int type)
 333 {
 334         return gpiochip_irqchip_add_key(gpiochip, irqchip, first_irq,
 335                                         handler, type, true, NULL);
 336 }
 337 #endif /* CONFIG_LOCKDEP */
 338
 339 #endif /* CONFIG_GPIOLIB_IRQCHIP */
 340
 341 int gpiochip_generic_request(struct gpio_chip *chip, unsigned offset);
 342 void gpiochip_generic_free(struct gpio_chip *chip, unsigned offset);
 343 int gpiochip_generic_config(struct gpio_chip *chip, unsigned offset,
 344                             unsigned long config);
 345
 346 #ifdef CONFIG_PINCTRL
 347
 348 /**
 349  * struct gpio_pin_range - pin range controlled by a gpio chip
 350  * @node: list for maintaining set of pin ranges, used internally
 351  * @pctldev: pinctrl device which handles corresponding pins
 352  * @range: actual range of pins controlled by a gpio controller
 353  */
 354 struct gpio_pin_range {
 355         struct list_head node;
 356         struct pinctrl_dev *pctldev;
 357         struct pinctrl_gpio_range range;
 358 };
 359
 360 int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
 361                            unsigned int gpio_offset, unsigned int pin_offset,
 362                            unsigned int npins);
 363 int gpiochip_add_pingroup_range(struct gpio_chip *chip,
 364                         struct pinctrl_dev *pctldev,
 365                         unsigned int gpio_offset, const char *pin_group);
 366 void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
 367
 368 #else
 369
 370 static inline int
 371 gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
 372                        unsigned int gpio_offset, unsigned int pin_offset,
 373                        unsigned int npins)
 374 {
 375         return 0;
 376 }
 377 static inline int
 378 gpiochip_add_pingroup_range(struct gpio_chip *chip,
 379                         struct pinctrl_dev *pctldev,
 380                         unsigned int gpio_offset, const char *pin_group)
 381 {
 382         return 0;
 383 }
 384
 385 static inline void
 386 gpiochip_remove_pin_ranges(struct gpio_chip *chip)
 387 {
 388 }
 389
 390 #endif /* CONFIG_PINCTRL */
 391
 392 struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
 393                                             const char *label);
 394 void gpiochip_free_own_desc(struct gpio_desc *desc);
 395
 396 #else /* CONFIG_GPIOLIB */
 397
 398 static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
 399 {
 400         /* GPIO can never have been requested */
 401         WARN_ON(1);
 402         return ERR_PTR(-ENODEV);
 403 }
 404
 405 #endif /* CONFIG_GPIOLIB */
 406
 407 #endif