| blob | c41adce6062cbeabc4f6e49881c57398fa733131 |
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * S390 low-level entry points.
4 *
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
12 #include <linux/init.h>
13 #include <linux/linkage.h>
14 #include <asm/processor.h>
15 #include <asm/cache.h>
16 #include <asm/errno.h>
17 #include <asm/ptrace.h>
18 #include <asm/thread_info.h>
19 #include <asm/asm-offsets.h>
20 #include <asm/unistd.h>
21 #include <asm/page.h>
22 #include <asm/sigp.h>
23 #include <asm/irq.h>
24 #include <asm/vx-insn.h>
25 #include <asm/setup.h>
26 #include <asm/nmi.h>
27 #include <asm/export.h>
29 __PT_R0 = __PT_GPRS
30 __PT_R1 = __PT_GPRS + 8
31 __PT_R2 = __PT_GPRS + 16
32 __PT_R3 = __PT_GPRS + 24
33 __PT_R4 = __PT_GPRS + 32
34 __PT_R5 = __PT_GPRS + 40
35 __PT_R6 = __PT_GPRS + 48
36 __PT_R7 = __PT_GPRS + 56
37 __PT_R8 = __PT_GPRS + 64
38 __PT_R9 = __PT_GPRS + 72
39 __PT_R10 = __PT_GPRS + 80
40 __PT_R11 = __PT_GPRS + 88
41 __PT_R12 = __PT_GPRS + 96
42 __PT_R13 = __PT_GPRS + 104
43 __PT_R14 = __PT_GPRS + 112
44 __PT_R15 = __PT_GPRS + 120
46 STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
47 STACK_SIZE = 1 << STACK_SHIFT
48 STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
50 _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
51 _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING)
52 _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
53 _TIF_SYSCALL_TRACEPOINT)
54 _CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE_PRIMARY | \
55 _CIF_ASCE_SECONDARY | _CIF_FPU)
56 _PIF_WORK = (_PIF_PER_TRAP | _PIF_SYSCALL_RESTART)
58 #define BASED(name) name-cleanup_critical(%r13)
60 .macro TRACE_IRQS_ON
61 #ifdef CONFIG_TRACE_IRQFLAGS
62 basr %r2,%r0
63 brasl %r14,trace_hardirqs_on_caller
64 #endif
65 .endm
67 .macro TRACE_IRQS_OFF
68 #ifdef CONFIG_TRACE_IRQFLAGS
69 basr %r2,%r0
70 brasl %r14,trace_hardirqs_off_caller
71 #endif
72 .endm
74 .macro LOCKDEP_SYS_EXIT
75 #ifdef CONFIG_LOCKDEP
76 tm __PT_PSW+1(%r11),0x01 # returning to user ?
77 jz .+10
78 brasl %r14,lockdep_sys_exit
79 #endif
80 .endm
82 .macro CHECK_STACK stacksize,savearea
83 #ifdef CONFIG_CHECK_STACK
84 tml %r15,\stacksize - CONFIG_STACK_GUARD
85 lghi %r14,\savearea
86 jz stack_overflow
87 #endif
88 .endm
90 .macro SWITCH_ASYNC savearea,timer
91 tmhh %r8,0x0001 # interrupting from user ?
92 jnz 1f
93 lgr %r14,%r9
94 slg %r14,BASED(.Lcritical_start)
95 clg %r14,BASED(.Lcritical_length)
96 jhe 0f
97 lghi %r11,\savearea # inside critical section, do cleanup
98 brasl %r14,cleanup_critical
99 tmhh %r8,0x0001 # retest problem state after cleanup
100 jnz 1f
101 0: lg %r14,__LC_ASYNC_STACK # are we already on the async stack?
102 slgr %r14,%r15
103 srag %r14,%r14,STACK_SHIFT
104 jnz 2f
105 CHECK_STACK 1<<STACK_SHIFT,\savearea
106 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
107 j 3f
108 1: UPDATE_VTIME %r14,%r15,\timer
109 2: lg %r15,__LC_ASYNC_STACK # load async stack
110 3: la %r11,STACK_FRAME_OVERHEAD(%r15)
111 .endm
113 .macro UPDATE_VTIME w1,w2,enter_timer
114 lg \w1,__LC_EXIT_TIMER
115 lg \w2,__LC_LAST_UPDATE_TIMER
116 slg \w1,\enter_timer
117 slg \w2,__LC_EXIT_TIMER
118 alg \w1,__LC_USER_TIMER
119 alg \w2,__LC_SYSTEM_TIMER
120 stg \w1,__LC_USER_TIMER
121 stg \w2,__LC_SYSTEM_TIMER
122 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer
123 .endm
125 .macro REENABLE_IRQS
126 stg %r8,__LC_RETURN_PSW
127 ni __LC_RETURN_PSW,0xbf
128 ssm __LC_RETURN_PSW
129 .endm
131 .macro STCK savearea
132 #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
133 .insn s,0xb27c0000,\savearea # store clock fast
134 #else
135 .insn s,0xb2050000,\savearea # store clock
136 #endif
137 .endm
139 /*
140 * The TSTMSK macro generates a test-under-mask instruction by
141 * calculating the memory offset for the specified mask value.
142 * Mask value can be any constant. The macro shifts the mask
143 * value to calculate the memory offset for the test-under-mask
144 * instruction.
145 */
146 .macro TSTMSK addr, mask, size=8, bytepos=0
147 .if (\bytepos < \size) && (\mask >> 8)
148 .if (\mask & 0xff)
149 .error "Mask exceeds byte boundary"
150 .endif
151 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
152 .exitm
153 .endif
154 .ifeq \mask
155 .error "Mask must not be zero"
156 .endif
157 off = \size - \bytepos - 1
158 tm off+\addr, \mask
159 .endm
161 .section .kprobes.text, "ax"
162 .Ldummy:
163 /*
164 * This nop exists only in order to avoid that __switch_to starts at
165 * the beginning of the kprobes text section. In that case we would
166 * have several symbols at the same address. E.g. objdump would take
167 * an arbitrary symbol name when disassembling this code.
168 * With the added nop in between the __switch_to symbol is unique
169 * again.
170 */
171 nop 0
173 /*
174 * Scheduler resume function, called by switch_to
175 * gpr2 = (task_struct *) prev
176 * gpr3 = (task_struct *) next
177 * Returns:
178 * gpr2 = prev
179 */
180 ENTRY(__switch_to)
181 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
182 lgr %r1,%r2
183 aghi %r1,__TASK_thread # thread_struct of prev task
184 lg %r5,__TASK_stack(%r3) # start of kernel stack of next
185 stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev
186 lgr %r1,%r3
187 aghi %r1,__TASK_thread # thread_struct of next task
188 lgr %r15,%r5
189 aghi %r15,STACK_INIT # end of kernel stack of next
190 stg %r3,__LC_CURRENT # store task struct of next
191 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
192 lg %r15,__THREAD_ksp(%r1) # load kernel stack of next
193 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next
194 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
195 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
196 bzr %r14
197 .insn s,0xb2800000,__LC_LPP # set program parameter
198 br %r14
200 .L__critical_start:
202 #if IS_ENABLED(CONFIG_KVM)
203 /*
204 * sie64a calling convention:
205 * %r2 pointer to sie control block
206 * %r3 guest register save area
207 */
208 ENTRY(sie64a)
209 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
210 stg %r2,__SF_EMPTY(%r15) # save control block pointer
211 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area
212 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0
213 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ?
214 jno .Lsie_load_guest_gprs
215 brasl %r14,load_fpu_regs # load guest fp/vx regs
216 .Lsie_load_guest_gprs:
217 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
218 lg %r14,__LC_GMAP # get gmap pointer
219 ltgr %r14,%r14
220 jz .Lsie_gmap
221 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
222 .Lsie_gmap:
223 lg %r14,__SF_EMPTY(%r15) # get control block pointer
224 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
225 tm __SIE_PROG20+3(%r14),3 # last exit...
226 jnz .Lsie_skip
227 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
228 jo .Lsie_skip # exit if fp/vx regs changed
229 .Lsie_entry:
230 sie 0(%r14)
231 .Lsie_skip:
232 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
233 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
234 .Lsie_done:
235 # some program checks are suppressing. C code (e.g. do_protection_exception)
236 # will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
237 # are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
238 # Other instructions between sie64a and .Lsie_done should not cause program
239 # interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
240 # See also .Lcleanup_sie
241 .Lrewind_pad6:
242 nopr 7
243 .Lrewind_pad4:
244 nopr 7
245 .Lrewind_pad2:
246 nopr 7
247 .globl sie_exit
248 sie_exit:
249 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area
250 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
251 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
252 lg %r2,__SF_EMPTY+16(%r15) # return exit reason code
253 br %r14
254 .Lsie_fault:
255 lghi %r14,-EFAULT
256 stg %r14,__SF_EMPTY+16(%r15) # set exit reason code
257 j sie_exit
259 EX_TABLE(.Lrewind_pad6,.Lsie_fault)
260 EX_TABLE(.Lrewind_pad4,.Lsie_fault)
261 EX_TABLE(.Lrewind_pad2,.Lsie_fault)
262 EX_TABLE(sie_exit,.Lsie_fault)
263 EXPORT_SYMBOL(sie64a)
264 EXPORT_SYMBOL(sie_exit)
265 #endif
267 /*
268 * SVC interrupt handler routine. System calls are synchronous events and
269 * are executed with interrupts enabled.
270 */
272 ENTRY(system_call)
273 stpt __LC_SYNC_ENTER_TIMER
274 .Lsysc_stmg:
275 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
276 lg %r12,__LC_CURRENT
277 lghi %r13,__TASK_thread
278 lghi %r14,_PIF_SYSCALL
279 .Lsysc_per:
280 lg %r15,__LC_KERNEL_STACK
281 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
282 .Lsysc_vtime:
283 UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER
284 stmg %r0,%r7,__PT_R0(%r11)
285 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
286 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW
287 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC
288 stg %r14,__PT_FLAGS(%r11)
289 .Lsysc_do_svc:
290 # load address of system call table
291 lg %r10,__THREAD_sysc_table(%r13,%r12)
292 llgh %r8,__PT_INT_CODE+2(%r11)
293 slag %r8,%r8,2 # shift and test for svc 0
294 jnz .Lsysc_nr_ok
295 # svc 0: system call number in %r1
296 llgfr %r1,%r1 # clear high word in r1
297 cghi %r1,NR_syscalls
298 jnl .Lsysc_nr_ok
299 sth %r1,__PT_INT_CODE+2(%r11)
300 slag %r8,%r1,2
301 .Lsysc_nr_ok:
302 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
303 stg %r2,__PT_ORIG_GPR2(%r11)
304 stg %r7,STACK_FRAME_OVERHEAD(%r15)
305 lgf %r9,0(%r8,%r10) # get system call add.
306 TSTMSK __TI_flags(%r12),_TIF_TRACE
307 jnz .Lsysc_tracesys
308 basr %r14,%r9 # call sys_xxxx
309 stg %r2,__PT_R2(%r11) # store return value
311 .Lsysc_return:
312 LOCKDEP_SYS_EXIT
313 .Lsysc_tif:
314 TSTMSK __PT_FLAGS(%r11),_PIF_WORK
315 jnz .Lsysc_work
316 TSTMSK __TI_flags(%r12),_TIF_WORK
317 jnz .Lsysc_work # check for work
318 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
319 jnz .Lsysc_work
320 .Lsysc_restore:
321 lg %r14,__LC_VDSO_PER_CPU
322 lmg %r0,%r10,__PT_R0(%r11)
323 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
324 .Lsysc_exit_timer:
325 stpt __LC_EXIT_TIMER
326 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
327 lmg %r11,%r15,__PT_R11(%r11)
328 lpswe __LC_RETURN_PSW
329 .Lsysc_done:
331 #
332 # One of the work bits is on. Find out which one.
333 #
334 .Lsysc_work:
335 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
336 jo .Lsysc_mcck_pending
337 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
338 jo .Lsysc_reschedule
339 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
340 jo .Lsysc_syscall_restart
341 #ifdef CONFIG_UPROBES
342 TSTMSK __TI_flags(%r12),_TIF_UPROBE
343 jo .Lsysc_uprobe_notify
344 #endif
345 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
346 jo .Lsysc_guarded_storage
347 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP
348 jo .Lsysc_singlestep
349 #ifdef CONFIG_LIVEPATCH
350 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
351 jo .Lsysc_patch_pending # handle live patching just before
352 # signals and possible syscall restart
353 #endif
354 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
355 jo .Lsysc_syscall_restart
356 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
357 jo .Lsysc_sigpending
358 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
359 jo .Lsysc_notify_resume
360 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
361 jo .Lsysc_vxrs
362 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
363 jnz .Lsysc_asce
364 j .Lsysc_return # beware of critical section cleanup
366 #
367 # _TIF_NEED_RESCHED is set, call schedule
368 #
369 .Lsysc_reschedule:
370 larl %r14,.Lsysc_return
371 jg schedule
373 #
374 # _CIF_MCCK_PENDING is set, call handler
375 #
376 .Lsysc_mcck_pending:
377 larl %r14,.Lsysc_return
378 jg s390_handle_mcck # TIF bit will be cleared by handler
380 #
381 # _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
382 #
383 .Lsysc_asce:
384 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
385 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
386 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY
387 jz .Lsysc_return
388 larl %r14,.Lsysc_return
389 jg set_fs_fixup
391 #
392 # CIF_FPU is set, restore floating-point controls and floating-point registers.
393 #
394 .Lsysc_vxrs:
395 larl %r14,.Lsysc_return
396 jg load_fpu_regs
398 #
399 # _TIF_SIGPENDING is set, call do_signal
400 #
401 .Lsysc_sigpending:
402 lgr %r2,%r11 # pass pointer to pt_regs
403 brasl %r14,do_signal
404 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
405 jno .Lsysc_return
406 .Lsysc_do_syscall:
407 lghi %r13,__TASK_thread
408 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
409 lghi %r1,0 # svc 0 returns -ENOSYS
410 j .Lsysc_do_svc
412 #
413 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
414 #
415 .Lsysc_notify_resume:
416 lgr %r2,%r11 # pass pointer to pt_regs
417 larl %r14,.Lsysc_return
418 jg do_notify_resume
420 #
421 # _TIF_UPROBE is set, call uprobe_notify_resume
422 #
423 #ifdef CONFIG_UPROBES
424 .Lsysc_uprobe_notify:
425 lgr %r2,%r11 # pass pointer to pt_regs
426 larl %r14,.Lsysc_return
427 jg uprobe_notify_resume
428 #endif
430 #
431 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
432 #
433 .Lsysc_guarded_storage:
434 lgr %r2,%r11 # pass pointer to pt_regs
435 larl %r14,.Lsysc_return
436 jg gs_load_bc_cb
437 #
438 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
439 #
440 #ifdef CONFIG_LIVEPATCH
441 .Lsysc_patch_pending:
442 lg %r2,__LC_CURRENT # pass pointer to task struct
443 larl %r14,.Lsysc_return
444 jg klp_update_patch_state
445 #endif
447 #
448 # _PIF_PER_TRAP is set, call do_per_trap
449 #
450 .Lsysc_singlestep:
451 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
452 lgr %r2,%r11 # pass pointer to pt_regs
453 larl %r14,.Lsysc_return
454 jg do_per_trap
456 #
457 # _PIF_SYSCALL_RESTART is set, repeat the current system call
458 #
459 .Lsysc_syscall_restart:
460 ni __PT_FLAGS+7(%r11),255-_PIF_SYSCALL_RESTART
461 lmg %r1,%r7,__PT_R1(%r11) # load svc arguments
462 lg %r2,__PT_ORIG_GPR2(%r11)
463 j .Lsysc_do_svc
465 #
466 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
467 # and after the system call
468 #
469 .Lsysc_tracesys:
470 lgr %r2,%r11 # pass pointer to pt_regs
471 la %r3,0
472 llgh %r0,__PT_INT_CODE+2(%r11)
473 stg %r0,__PT_R2(%r11)
474 brasl %r14,do_syscall_trace_enter
475 lghi %r0,NR_syscalls
476 clgr %r0,%r2
477 jnh .Lsysc_tracenogo
478 sllg %r8,%r2,2
479 lgf %r9,0(%r8,%r10)
480 .Lsysc_tracego:
481 lmg %r3,%r7,__PT_R3(%r11)
482 stg %r7,STACK_FRAME_OVERHEAD(%r15)
483 lg %r2,__PT_ORIG_GPR2(%r11)
484 basr %r14,%r9 # call sys_xxx
485 stg %r2,__PT_R2(%r11) # store return value
486 .Lsysc_tracenogo:
487 TSTMSK __TI_flags(%r12),_TIF_TRACE
488 jz .Lsysc_return
489 lgr %r2,%r11 # pass pointer to pt_regs
490 larl %r14,.Lsysc_return
491 jg do_syscall_trace_exit
493 #
494 # a new process exits the kernel with ret_from_fork
495 #
496 ENTRY(ret_from_fork)
497 la %r11,STACK_FRAME_OVERHEAD(%r15)
498 lg %r12,__LC_CURRENT
499 brasl %r14,schedule_tail
500 TRACE_IRQS_ON
501 ssm __LC_SVC_NEW_PSW # reenable interrupts
502 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ?
503 jne .Lsysc_tracenogo
504 # it's a kernel thread
505 lmg %r9,%r10,__PT_R9(%r11) # load gprs
506 ENTRY(kernel_thread_starter)
507 la %r2,0(%r10)
508 basr %r14,%r9
509 j .Lsysc_tracenogo
511 /*
512 * Program check handler routine
513 */
515 ENTRY(pgm_check_handler)
516 stpt __LC_SYNC_ENTER_TIMER
517 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
518 lg %r10,__LC_LAST_BREAK
519 lg %r12,__LC_CURRENT
520 larl %r13,cleanup_critical
521 lmg %r8,%r9,__LC_PGM_OLD_PSW
522 tmhh %r8,0x0001 # test problem state bit
523 jnz 2f # -> fault in user space
524 #if IS_ENABLED(CONFIG_KVM)
525 # cleanup critical section for sie64a
526 lgr %r14,%r9
527 slg %r14,BASED(.Lsie_critical_start)
528 clg %r14,BASED(.Lsie_critical_length)
529 jhe 0f
530 brasl %r14,.Lcleanup_sie
531 #endif
532 0: tmhh %r8,0x4000 # PER bit set in old PSW ?
533 jnz 1f # -> enabled, can't be a double fault
534 tm __LC_PGM_ILC+3,0x80 # check for per exception
535 jnz .Lpgm_svcper # -> single stepped svc
536 1: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
537 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
538 j 4f
539 2: UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
540 lg %r15,__LC_KERNEL_STACK
541 lgr %r14,%r12
542 aghi %r14,__TASK_thread # pointer to thread_struct
543 lghi %r13,__LC_PGM_TDB
544 tm __LC_PGM_ILC+2,0x02 # check for transaction abort
545 jz 3f
546 mvc __THREAD_trap_tdb(256,%r14),0(%r13)
547 3: stg %r10,__THREAD_last_break(%r14)
548 4: la %r11,STACK_FRAME_OVERHEAD(%r15)
549 stmg %r0,%r7,__PT_R0(%r11)
550 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
551 stmg %r8,%r9,__PT_PSW(%r11)
552 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC
553 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
554 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
555 stg %r10,__PT_ARGS(%r11)
556 tm __LC_PGM_ILC+3,0x80 # check for per exception
557 jz 5f
558 tmhh %r8,0x0001 # kernel per event ?
559 jz .Lpgm_kprobe
560 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP
561 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS
562 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE
563 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
564 5: REENABLE_IRQS
565 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
566 larl %r1,pgm_check_table
567 llgh %r10,__PT_INT_CODE+2(%r11)
568 nill %r10,0x007f
569 sll %r10,2
570 je .Lpgm_return
571 lgf %r1,0(%r10,%r1) # load address of handler routine
572 lgr %r2,%r11 # pass pointer to pt_regs
573 basr %r14,%r1 # branch to interrupt-handler
574 .Lpgm_return:
575 LOCKDEP_SYS_EXIT
576 tm __PT_PSW+1(%r11),0x01 # returning to user ?
577 jno .Lsysc_restore
578 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
579 jo .Lsysc_do_syscall
580 j .Lsysc_tif
582 #
583 # PER event in supervisor state, must be kprobes
584 #
585 .Lpgm_kprobe:
586 REENABLE_IRQS
587 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
588 lgr %r2,%r11 # pass pointer to pt_regs
589 brasl %r14,do_per_trap
590 j .Lpgm_return
592 #
593 # single stepped system call
594 #
595 .Lpgm_svcper:
596 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
597 lghi %r13,__TASK_thread
598 larl %r14,.Lsysc_per
599 stg %r14,__LC_RETURN_PSW+8
600 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP
601 lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs
603 /*
604 * IO interrupt handler routine
605 */
606 ENTRY(io_int_handler)
607 STCK __LC_INT_CLOCK
608 stpt __LC_ASYNC_ENTER_TIMER
609 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
610 lg %r12,__LC_CURRENT
611 larl %r13,cleanup_critical
612 lmg %r8,%r9,__LC_IO_OLD_PSW
613 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
614 stmg %r0,%r7,__PT_R0(%r11)
615 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
616 stmg %r8,%r9,__PT_PSW(%r11)
617 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
618 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
619 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
620 jo .Lio_restore
621 TRACE_IRQS_OFF
622 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
623 .Lio_loop:
624 lgr %r2,%r11 # pass pointer to pt_regs
625 lghi %r3,IO_INTERRUPT
626 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ?
627 jz .Lio_call
628 lghi %r3,THIN_INTERRUPT
629 .Lio_call:
630 brasl %r14,do_IRQ
631 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
632 jz .Lio_return
633 tpi 0
634 jz .Lio_return
635 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
636 j .Lio_loop
637 .Lio_return:
638 LOCKDEP_SYS_EXIT
639 TRACE_IRQS_ON
640 .Lio_tif:
641 TSTMSK __TI_flags(%r12),_TIF_WORK
642 jnz .Lio_work # there is work to do (signals etc.)
643 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
644 jnz .Lio_work
645 .Lio_restore:
646 lg %r14,__LC_VDSO_PER_CPU
647 lmg %r0,%r10,__PT_R0(%r11)
648 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
649 .Lio_exit_timer:
650 stpt __LC_EXIT_TIMER
651 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
652 lmg %r11,%r15,__PT_R11(%r11)
653 lpswe __LC_RETURN_PSW
654 .Lio_done:
656 #
657 # There is work todo, find out in which context we have been interrupted:
658 # 1) if we return to user space we can do all _TIF_WORK work
659 # 2) if we return to kernel code and kvm is enabled check if we need to
660 # modify the psw to leave SIE
661 # 3) if we return to kernel code and preemptive scheduling is enabled check
662 # the preemption counter and if it is zero call preempt_schedule_irq
663 # Before any work can be done, a switch to the kernel stack is required.
664 #
665 .Lio_work:
666 tm __PT_PSW+1(%r11),0x01 # returning to user ?
667 jo .Lio_work_user # yes -> do resched & signal
668 #ifdef CONFIG_PREEMPT
669 # check for preemptive scheduling
670 icm %r0,15,__LC_PREEMPT_COUNT
671 jnz .Lio_restore # preemption is disabled
672 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
673 jno .Lio_restore
674 # switch to kernel stack
675 lg %r1,__PT_R15(%r11)
676 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
677 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
678 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
679 la %r11,STACK_FRAME_OVERHEAD(%r1)
680 lgr %r15,%r1
681 # TRACE_IRQS_ON already done at .Lio_return, call
682 # TRACE_IRQS_OFF to keep things symmetrical
683 TRACE_IRQS_OFF
684 brasl %r14,preempt_schedule_irq
685 j .Lio_return
686 #else
687 j .Lio_restore
688 #endif
690 #
691 # Need to do work before returning to userspace, switch to kernel stack
692 #
693 .Lio_work_user:
694 lg %r1,__LC_KERNEL_STACK
695 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
696 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
697 la %r11,STACK_FRAME_OVERHEAD(%r1)
698 lgr %r15,%r1
700 #
701 # One of the work bits is on. Find out which one.
702 #
703 .Lio_work_tif:
704 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
705 jo .Lio_mcck_pending
706 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
707 jo .Lio_reschedule
708 #ifdef CONFIG_LIVEPATCH
709 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
710 jo .Lio_patch_pending
711 #endif
712 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
713 jo .Lio_sigpending
714 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
715 jo .Lio_notify_resume
716 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
717 jo .Lio_guarded_storage
718 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
719 jo .Lio_vxrs
720 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
721 jnz .Lio_asce
722 j .Lio_return # beware of critical section cleanup
724 #
725 # _CIF_MCCK_PENDING is set, call handler
726 #
727 .Lio_mcck_pending:
728 # TRACE_IRQS_ON already done at .Lio_return
729 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
730 TRACE_IRQS_OFF
731 j .Lio_return
733 #
734 # _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
735 #
736 .Lio_asce:
737 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
738 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
739 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY
740 jz .Lio_return
741 larl %r14,.Lio_return
742 jg set_fs_fixup
744 #
745 # CIF_FPU is set, restore floating-point controls and floating-point registers.
746 #
747 .Lio_vxrs:
748 larl %r14,.Lio_return
749 jg load_fpu_regs
751 #
752 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
753 #
754 .Lio_guarded_storage:
755 # TRACE_IRQS_ON already done at .Lio_return
756 ssm __LC_SVC_NEW_PSW # reenable interrupts
757 lgr %r2,%r11 # pass pointer to pt_regs
758 brasl %r14,gs_load_bc_cb
759 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
760 TRACE_IRQS_OFF
761 j .Lio_return
763 #
764 # _TIF_NEED_RESCHED is set, call schedule
765 #
766 .Lio_reschedule:
767 # TRACE_IRQS_ON already done at .Lio_return
768 ssm __LC_SVC_NEW_PSW # reenable interrupts
769 brasl %r14,schedule # call scheduler
770 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
771 TRACE_IRQS_OFF
772 j .Lio_return
774 #
775 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
776 #
777 #ifdef CONFIG_LIVEPATCH
778 .Lio_patch_pending:
779 lg %r2,__LC_CURRENT # pass pointer to task struct
780 larl %r14,.Lio_return
781 jg klp_update_patch_state
782 #endif
784 #
785 # _TIF_SIGPENDING or is set, call do_signal
786 #
787 .Lio_sigpending:
788 # TRACE_IRQS_ON already done at .Lio_return
789 ssm __LC_SVC_NEW_PSW # reenable interrupts
790 lgr %r2,%r11 # pass pointer to pt_regs
791 brasl %r14,do_signal
792 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
793 TRACE_IRQS_OFF
794 j .Lio_return
796 #
797 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
798 #
799 .Lio_notify_resume:
800 # TRACE_IRQS_ON already done at .Lio_return
801 ssm __LC_SVC_NEW_PSW # reenable interrupts
802 lgr %r2,%r11 # pass pointer to pt_regs
803 brasl %r14,do_notify_resume
804 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
805 TRACE_IRQS_OFF
806 j .Lio_return
808 /*
809 * External interrupt handler routine
810 */
811 ENTRY(ext_int_handler)
812 STCK __LC_INT_CLOCK
813 stpt __LC_ASYNC_ENTER_TIMER
814 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
815 lg %r12,__LC_CURRENT
816 larl %r13,cleanup_critical
817 lmg %r8,%r9,__LC_EXT_OLD_PSW
818 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
819 stmg %r0,%r7,__PT_R0(%r11)
820 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
821 stmg %r8,%r9,__PT_PSW(%r11)
822 lghi %r1,__LC_EXT_PARAMS2
823 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
824 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
825 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1)
826 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
827 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
828 jo .Lio_restore
829 TRACE_IRQS_OFF
830 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
831 lgr %r2,%r11 # pass pointer to pt_regs
832 lghi %r3,EXT_INTERRUPT
833 brasl %r14,do_IRQ
834 j .Lio_return
836 /*
837 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
838 */
839 ENTRY(psw_idle)
840 stg %r3,__SF_EMPTY(%r15)
841 larl %r1,.Lpsw_idle_lpsw+4
842 stg %r1,__SF_EMPTY+8(%r15)
843 #ifdef CONFIG_SMP
844 larl %r1,smp_cpu_mtid
845 llgf %r1,0(%r1)
846 ltgr %r1,%r1
847 jz .Lpsw_idle_stcctm
848 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
849 .Lpsw_idle_stcctm:
850 #endif
851 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
852 STCK __CLOCK_IDLE_ENTER(%r2)
853 stpt __TIMER_IDLE_ENTER(%r2)
854 .Lpsw_idle_lpsw:
855 lpswe __SF_EMPTY(%r15)
856 br %r14
857 .Lpsw_idle_end:
859 /*
860 * Store floating-point controls and floating-point or vector register
861 * depending whether the vector facility is available. A critical section
862 * cleanup assures that the registers are stored even if interrupted for
863 * some other work. The CIF_FPU flag is set to trigger a lazy restore
864 * of the register contents at return from io or a system call.
865 */
866 ENTRY(save_fpu_regs)
867 lg %r2,__LC_CURRENT
868 aghi %r2,__TASK_thread
869 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
870 bor %r14
871 stfpc __THREAD_FPU_fpc(%r2)
872 lg %r3,__THREAD_FPU_regs(%r2)
873 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
874 jz .Lsave_fpu_regs_fp # no -> store FP regs
875 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3)
876 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3)
877 j .Lsave_fpu_regs_done # -> set CIF_FPU flag
878 .Lsave_fpu_regs_fp:
879 std 0,0(%r3)
880 std 1,8(%r3)
881 std 2,16(%r3)
882 std 3,24(%r3)
883 std 4,32(%r3)
884 std 5,40(%r3)
885 std 6,48(%r3)
886 std 7,56(%r3)
887 std 8,64(%r3)
888 std 9,72(%r3)
889 std 10,80(%r3)
890 std 11,88(%r3)
891 std 12,96(%r3)
892 std 13,104(%r3)
893 std 14,112(%r3)
894 std 15,120(%r3)
895 .Lsave_fpu_regs_done:
896 oi __LC_CPU_FLAGS+7,_CIF_FPU
897 br %r14
898 .Lsave_fpu_regs_end:
899 EXPORT_SYMBOL(save_fpu_regs)
901 /*
902 * Load floating-point controls and floating-point or vector registers.
903 * A critical section cleanup assures that the register contents are
904 * loaded even if interrupted for some other work.
905 *
906 * There are special calling conventions to fit into sysc and io return work:
907 * %r15: <kernel stack>
908 * The function requires:
909 * %r4
910 */
911 load_fpu_regs:
912 lg %r4,__LC_CURRENT
913 aghi %r4,__TASK_thread
914 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
915 bnor %r14
916 lfpc __THREAD_FPU_fpc(%r4)
917 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
918 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area
919 jz .Lload_fpu_regs_fp # -> no VX, load FP regs
920 VLM %v0,%v15,0,%r4
921 VLM %v16,%v31,256,%r4
922 j .Lload_fpu_regs_done
923 .Lload_fpu_regs_fp:
924 ld 0,0(%r4)
925 ld 1,8(%r4)
926 ld 2,16(%r4)
927 ld 3,24(%r4)
928 ld 4,32(%r4)
929 ld 5,40(%r4)
930 ld 6,48(%r4)
931 ld 7,56(%r4)
932 ld 8,64(%r4)
933 ld 9,72(%r4)
934 ld 10,80(%r4)
935 ld 11,88(%r4)
936 ld 12,96(%r4)
937 ld 13,104(%r4)
938 ld 14,112(%r4)
939 ld 15,120(%r4)
940 .Lload_fpu_regs_done:
941 ni __LC_CPU_FLAGS+7,255-_CIF_FPU
942 br %r14
943 .Lload_fpu_regs_end:
945 .L__critical_end:
947 /*
948 * Machine check handler routines
949 */
950 ENTRY(mcck_int_handler)
951 STCK __LC_MCCK_CLOCK
952 la %r1,4095 # revalidate r1
953 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
954 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
955 lg %r12,__LC_CURRENT
956 larl %r13,cleanup_critical
957 lmg %r8,%r9,__LC_MCK_OLD_PSW
958 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
959 jo .Lmcck_panic # yes -> rest of mcck code invalid
960 lghi %r14,__LC_CPU_TIMER_SAVE_AREA
961 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
962 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
963 jo 3f
964 la %r14,__LC_SYNC_ENTER_TIMER
965 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
966 jl 0f
967 la %r14,__LC_ASYNC_ENTER_TIMER
968 0: clc 0(8,%r14),__LC_EXIT_TIMER
969 jl 1f
970 la %r14,__LC_EXIT_TIMER
971 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
972 jl 2f
973 la %r14,__LC_LAST_UPDATE_TIMER
974 2: spt 0(%r14)
975 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
976 3: TSTMSK __LC_MCCK_CODE,(MCCK_CODE_PSW_MWP_VALID|MCCK_CODE_PSW_IA_VALID)
977 jno .Lmcck_panic # no -> skip cleanup critical
978 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
979 .Lmcck_skip:
980 lghi %r14,__LC_GPREGS_SAVE_AREA+64
981 stmg %r0,%r7,__PT_R0(%r11)
982 mvc __PT_R8(64,%r11),0(%r14)
983 stmg %r8,%r9,__PT_PSW(%r11)
984 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
985 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
986 lgr %r2,%r11 # pass pointer to pt_regs
987 brasl %r14,s390_do_machine_check
988 tm __PT_PSW+1(%r11),0x01 # returning to user ?
989 jno .Lmcck_return
990 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
991 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
992 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
993 la %r11,STACK_FRAME_OVERHEAD(%r1)
994 lgr %r15,%r1
995 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
996 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
997 jno .Lmcck_return
998 TRACE_IRQS_OFF
999 brasl %r14,s390_handle_mcck
1000 TRACE_IRQS_ON
1001 .Lmcck_return:
1002 lg %r14,__LC_VDSO_PER_CPU
1003 lmg %r0,%r10,__PT_R0(%r11)
1004 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
1005 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
1006 jno 0f
1007 stpt __LC_EXIT_TIMER
1008 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
1009 0: lmg %r11,%r15,__PT_R11(%r11)
1010 lpswe __LC_RETURN_MCCK_PSW
1012 .Lmcck_panic:
1013 lg %r15,__LC_PANIC_STACK
1014 la %r11,STACK_FRAME_OVERHEAD(%r15)
1015 j .Lmcck_skip
1017 #
1018 # PSW restart interrupt handler
1019 #
1020 ENTRY(restart_int_handler)
1021 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
1022 jz 0f
1023 .insn s,0xb2800000,__LC_LPP
1024 0: stg %r15,__LC_SAVE_AREA_RESTART
1025 lg %r15,__LC_RESTART_STACK
1026 aghi %r15,-__PT_SIZE # create pt_regs on stack
1027 xc 0(__PT_SIZE,%r15),0(%r15)
1028 stmg %r0,%r14,__PT_R0(%r15)
1029 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
1030 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
1031 aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack
1032 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
1033 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
1034 lg %r2,__LC_RESTART_DATA
1035 lg %r3,__LC_RESTART_SOURCE
1036 ltgr %r3,%r3 # test source cpu address
1037 jm 1f # negative -> skip source stop
1038 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
1039 brc 10,0b # wait for status stored
1040 1: basr %r14,%r1 # call function
1041 stap __SF_EMPTY(%r15) # store cpu address
1042 llgh %r3,__SF_EMPTY(%r15)
1043 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
1044 brc 2,2b
1045 3: j 3b
1047 .section .kprobes.text, "ax"
1049 #ifdef CONFIG_CHECK_STACK
1050 /*
1051 * The synchronous or the asynchronous stack overflowed. We are dead.
1052 * No need to properly save the registers, we are going to panic anyway.
1053 * Setup a pt_regs so that show_trace can provide a good call trace.
1054 */
1055 stack_overflow:
1056 lg %r15,__LC_PANIC_STACK # change to panic stack
1057 la %r11,STACK_FRAME_OVERHEAD(%r15)
1058 stmg %r0,%r7,__PT_R0(%r11)
1059 stmg %r8,%r9,__PT_PSW(%r11)
1060 mvc __PT_R8(64,%r11),0(%r14)
1061 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
1062 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1063 lgr %r2,%r11 # pass pointer to pt_regs
1064 jg kernel_stack_overflow
1065 #endif
1067 cleanup_critical:
1068 #if IS_ENABLED(CONFIG_KVM)
1069 clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap
1070 jl 0f
1071 clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
1072 jl .Lcleanup_sie
1073 #endif
1074 clg %r9,BASED(.Lcleanup_table) # system_call
1075 jl 0f
1076 clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc
1077 jl .Lcleanup_system_call
1078 clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif
1079 jl 0f
1080 clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore
1081 jl .Lcleanup_sysc_tif
1082 clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done
1083 jl .Lcleanup_sysc_restore
1084 clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif
1085 jl 0f
1086 clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore
1087 jl .Lcleanup_io_tif
1088 clg %r9,BASED(.Lcleanup_table+56) # .Lio_done
1089 jl .Lcleanup_io_restore
1090 clg %r9,BASED(.Lcleanup_table+64) # psw_idle
1091 jl 0f
1092 clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end
1093 jl .Lcleanup_idle
1094 clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs
1095 jl 0f
1096 clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end
1097 jl .Lcleanup_save_fpu_regs
1098 clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs
1099 jl 0f
1100 clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end
1101 jl .Lcleanup_load_fpu_regs
1102 0: br %r14
1104 .align 8
1105 .Lcleanup_table:
1106 .quad system_call
1107 .quad .Lsysc_do_svc
1108 .quad .Lsysc_tif
1109 .quad .Lsysc_restore
1110 .quad .Lsysc_done
1111 .quad .Lio_tif
1112 .quad .Lio_restore
1113 .quad .Lio_done
1114 .quad psw_idle
1115 .quad .Lpsw_idle_end
1116 .quad save_fpu_regs
1117 .quad .Lsave_fpu_regs_end
1118 .quad load_fpu_regs
1119 .quad .Lload_fpu_regs_end
1121 #if IS_ENABLED(CONFIG_KVM)
1122 .Lcleanup_table_sie:
1123 .quad .Lsie_gmap
1124 .quad .Lsie_done
1126 .Lcleanup_sie:
1127 cghi %r11,__LC_SAVE_AREA_ASYNC #Is this in normal interrupt?
1128 je 1f
1129 slg %r9,BASED(.Lsie_crit_mcck_start)
1130 clg %r9,BASED(.Lsie_crit_mcck_length)
1131 jh 1f
1132 oi __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST
1133 1: lg %r9,__SF_EMPTY(%r15) # get control block pointer
1134 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
1135 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
1136 larl %r9,sie_exit # skip forward to sie_exit
1137 br %r14
1138 #endif
1140 .Lcleanup_system_call:
1141 # check if stpt has been executed
1142 clg %r9,BASED(.Lcleanup_system_call_insn)
1143 jh 0f
1144 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1145 cghi %r11,__LC_SAVE_AREA_ASYNC
1146 je 0f
1147 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
1148 0: # check if stmg has been executed
1149 clg %r9,BASED(.Lcleanup_system_call_insn+8)
1150 jh 0f
1151 mvc __LC_SAVE_AREA_SYNC(64),0(%r11)
1152 0: # check if base register setup + TIF bit load has been done
1153 clg %r9,BASED(.Lcleanup_system_call_insn+16)
1154 jhe 0f
1155 # set up saved register r12 task struct pointer
1156 stg %r12,32(%r11)
1157 # set up saved register r13 __TASK_thread offset
1158 mvc 40(8,%r11),BASED(.Lcleanup_system_call_const)
1159 0: # check if the user time update has been done
1160 clg %r9,BASED(.Lcleanup_system_call_insn+24)
1161 jh 0f
1162 lg %r15,__LC_EXIT_TIMER
1163 slg %r15,__LC_SYNC_ENTER_TIMER
1164 alg %r15,__LC_USER_TIMER
1165 stg %r15,__LC_USER_TIMER
1166 0: # check if the system time update has been done
1167 clg %r9,BASED(.Lcleanup_system_call_insn+32)
1168 jh 0f
1169 lg %r15,__LC_LAST_UPDATE_TIMER
1170 slg %r15,__LC_EXIT_TIMER
1171 alg %r15,__LC_SYSTEM_TIMER
1172 stg %r15,__LC_SYSTEM_TIMER
1173 0: # update accounting time stamp
1174 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1175 # set up saved register r11
1176 lg %r15,__LC_KERNEL_STACK
1177 la %r9,STACK_FRAME_OVERHEAD(%r15)
1178 stg %r9,24(%r11) # r11 pt_regs pointer
1179 # fill pt_regs
1180 mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
1181 stmg %r0,%r7,__PT_R0(%r9)
1182 mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW
1183 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC
1184 xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
1185 mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL
1186 # setup saved register r15
1187 stg %r15,56(%r11) # r15 stack pointer
1188 # set new psw address and exit
1189 larl %r9,.Lsysc_do_svc
1190 br %r14
1191 .Lcleanup_system_call_insn:
1192 .quad system_call
1193 .quad .Lsysc_stmg
1194 .quad .Lsysc_per
1195 .quad .Lsysc_vtime+36
1196 .quad .Lsysc_vtime+42
1197 .Lcleanup_system_call_const:
1198 .quad __TASK_thread
1200 .Lcleanup_sysc_tif:
1201 larl %r9,.Lsysc_tif
1202 br %r14
1204 .Lcleanup_sysc_restore:
1205 # check if stpt has been executed
1206 clg %r9,BASED(.Lcleanup_sysc_restore_insn)
1207 jh 0f
1208 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1209 cghi %r11,__LC_SAVE_AREA_ASYNC
1210 je 0f
1211 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1212 0: clg %r9,BASED(.Lcleanup_sysc_restore_insn+8)
1213 je 1f
1214 lg %r9,24(%r11) # get saved pointer to pt_regs
1215 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1216 mvc 0(64,%r11),__PT_R8(%r9)
1217 lmg %r0,%r7,__PT_R0(%r9)
1218 1: lmg %r8,%r9,__LC_RETURN_PSW
1219 br %r14
1220 .Lcleanup_sysc_restore_insn:
1221 .quad .Lsysc_exit_timer
1222 .quad .Lsysc_done - 4
1224 .Lcleanup_io_tif:
1225 larl %r9,.Lio_tif
1226 br %r14
1228 .Lcleanup_io_restore:
1229 # check if stpt has been executed
1230 clg %r9,BASED(.Lcleanup_io_restore_insn)
1231 jh 0f
1232 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1233 0: clg %r9,BASED(.Lcleanup_io_restore_insn+8)
1234 je 1f
1235 lg %r9,24(%r11) # get saved r11 pointer to pt_regs
1236 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1237 mvc 0(64,%r11),__PT_R8(%r9)
1238 lmg %r0,%r7,__PT_R0(%r9)
1239 1: lmg %r8,%r9,__LC_RETURN_PSW
1240 br %r14
1241 .Lcleanup_io_restore_insn:
1242 .quad .Lio_exit_timer
1243 .quad .Lio_done - 4
1245 .Lcleanup_idle:
1246 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
1247 # copy interrupt clock & cpu timer
1248 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
1249 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
1250 cghi %r11,__LC_SAVE_AREA_ASYNC
1251 je 0f
1252 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
1253 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
1254 0: # check if stck & stpt have been executed
1255 clg %r9,BASED(.Lcleanup_idle_insn)
1256 jhe 1f
1257 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
1258 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
1259 1: # calculate idle cycles
1260 #ifdef CONFIG_SMP
1261 clg %r9,BASED(.Lcleanup_idle_insn)
1262 jl 3f
1263 larl %r1,smp_cpu_mtid
1264 llgf %r1,0(%r1)
1265 ltgr %r1,%r1
1266 jz 3f
1267 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
1268 larl %r3,mt_cycles
1269 ag %r3,__LC_PERCPU_OFFSET
1270 la %r4,__SF_EMPTY+16(%r15)
1271 2: lg %r0,0(%r3)
1272 slg %r0,0(%r4)
1273 alg %r0,64(%r4)
1274 stg %r0,0(%r3)
1275 la %r3,8(%r3)
1276 la %r4,8(%r4)
1277 brct %r1,2b
1278 #endif
1279 3: # account system time going idle
1280 lg %r9,__LC_STEAL_TIMER
1281 alg %r9,__CLOCK_IDLE_ENTER(%r2)
1282 slg %r9,__LC_LAST_UPDATE_CLOCK
1283 stg %r9,__LC_STEAL_TIMER
1284 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
1285 lg %r9,__LC_SYSTEM_TIMER
1286 alg %r9,__LC_LAST_UPDATE_TIMER
1287 slg %r9,__TIMER_IDLE_ENTER(%r2)
1288 stg %r9,__LC_SYSTEM_TIMER
1289 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
1290 # prepare return psw
1291 nihh %r8,0xfcfd # clear irq & wait state bits
1292 lg %r9,48(%r11) # return from psw_idle
1293 br %r14
1294 .Lcleanup_idle_insn:
1295 .quad .Lpsw_idle_lpsw
1297 .Lcleanup_save_fpu_regs:
1298 larl %r9,save_fpu_regs
1299 br %r14
1301 .Lcleanup_load_fpu_regs:
1302 larl %r9,load_fpu_regs
1303 br %r14
1305 /*
1306 * Integer constants
1307 */
1308 .align 8
1309 .Lcritical_start:
1310 .quad .L__critical_start
1311 .Lcritical_length:
1312 .quad .L__critical_end - .L__critical_start
1313 #if IS_ENABLED(CONFIG_KVM)
1314 .Lsie_critical_start:
1315 .quad .Lsie_gmap
1316 .Lsie_critical_length:
1317 .quad .Lsie_done - .Lsie_gmap
1318 .Lsie_crit_mcck_start:
1319 .quad .Lsie_entry
1320 .Lsie_crit_mcck_length:
1321 .quad .Lsie_skip - .Lsie_entry
1322 #endif
1324 .section .rodata, "a"
1325 #define SYSCALL(esame,emu) .long esame
1326 .globl sys_call_table
1327 sys_call_table:
1328 #include "syscalls.S"
1329 #undef SYSCALL
1331 #ifdef CONFIG_COMPAT
1333 #define SYSCALL(esame,emu) .long emu
1334 .globl sys_call_table_emu
1335 sys_call_table_emu:
1336 #include "syscalls.S"
1337 #undef SYSCALL
1338 #endif