arch/s390/include/asm/mmu_context.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  *  S390 version
   4  *
   5  *  Derived from "include/asm-i386/mmu_context.h"
   6  */
   7
   8 #ifndef __S390_MMU_CONTEXT_H
   9 #define __S390_MMU_CONTEXT_H
  10
  11 #include <asm/pgalloc.h>
  12 #include <linux/uaccess.h>
  13 #include <linux/mm_types.h>
  14 #include <asm/tlbflush.h>
  15 #include <asm/ctl_reg.h>
  16 #include <asm-generic/mm_hooks.h>
  17
  18 static inline int init_new_context(struct task_struct *tsk,
  19                                    struct mm_struct *mm)
  20 {
  21         spin_lock_init(&mm->context.lock);
  22         INIT_LIST_HEAD(&mm->context.pgtable_list);
  23         INIT_LIST_HEAD(&mm->context.gmap_list);
  24         cpumask_clear(&mm->context.cpu_attach_mask);
  25         atomic_set(&mm->context.flush_count, 0);
  26         mm->context.gmap_asce = 0;
  27         mm->context.flush_mm = 0;
  28 #ifdef CONFIG_PGSTE
  29         mm->context.alloc_pgste = page_table_allocate_pgste ||
  30                 test_thread_flag(TIF_PGSTE) ||
  31                 current->mm->context.alloc_pgste;
  32         mm->context.has_pgste = 0;
  33         mm->context.use_skey = 0;
  34         mm->context.use_cmma = 0;
  35 #endif
  36         switch (mm->context.asce_limit) {
  37         case _REGION2_SIZE:
  38                 /*
  39                  * forked 3-level task, fall through to set new asce with new
  40                  * mm->pgd
  41                  */
  42         case 0:
  43                 /* context created by exec, set asce limit to 4TB */
  44                 mm->context.asce_limit = STACK_TOP_MAX;
  45                 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
  46                                    _ASCE_USER_BITS | _ASCE_TYPE_REGION3;
  47                 break;
  48         case -PAGE_SIZE:
  49                 /* forked 5-level task, set new asce with new_mm->pgd */
  50                 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
  51                         _ASCE_USER_BITS | _ASCE_TYPE_REGION1;
  52                 break;
  53         case _REGION1_SIZE:
  54                 /* forked 4-level task, set new asce with new mm->pgd */
  55                 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
  56                                    _ASCE_USER_BITS | _ASCE_TYPE_REGION2;
  57                 break;
  58         case _REGION3_SIZE:
  59                 /* forked 2-level compat task, set new asce with new mm->pgd */
  60                 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
  61                                    _ASCE_USER_BITS | _ASCE_TYPE_SEGMENT;
  62                 /* pgd_alloc() did not increase mm->nr_pmds */
  63                 mm_inc_nr_pmds(mm);
  64         }
  65         crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm));
  66         return 0;
  67 }
  68
  69 #define destroy_context(mm)             do { } while (0)
  70
  71 static inline void set_user_asce(struct mm_struct *mm)
  72 {
  73         S390_lowcore.user_asce = mm->context.asce;
  74         if (current->thread.mm_segment.ar4)
  75                 __ctl_load(S390_lowcore.user_asce, 7, 7);
  76         set_cpu_flag(CIF_ASCE_PRIMARY);
  77 }
  78
  79 static inline void clear_user_asce(void)
  80 {
  81         S390_lowcore.user_asce = S390_lowcore.kernel_asce;
  82
  83         __ctl_load(S390_lowcore.user_asce, 1, 1);
  84         __ctl_load(S390_lowcore.user_asce, 7, 7);
  85 }
  86
  87 static inline void load_kernel_asce(void)
  88 {
  89         unsigned long asce;
  90
  91         __ctl_store(asce, 1, 1);
  92         if (asce != S390_lowcore.kernel_asce)
  93                 __ctl_load(S390_lowcore.kernel_asce, 1, 1);
  94         set_cpu_flag(CIF_ASCE_PRIMARY);
  95 }
  96
  97 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
  98                              struct task_struct *tsk)
  99 {
 100         int cpu = smp_processor_id();
 101
 102         S390_lowcore.user_asce = next->context.asce;
 103         if (prev == next)
 104                 return;
 105         cpumask_set_cpu(cpu, &next->context.cpu_attach_mask);
 106         /* Clear old ASCE by loading the kernel ASCE. */
 107         __ctl_load(S390_lowcore.kernel_asce, 1, 1);
 108         __ctl_load(S390_lowcore.kernel_asce, 7, 7);
 109         cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
 110 }
 111
 112 #define finish_arch_post_lock_switch finish_arch_post_lock_switch
 113 static inline void finish_arch_post_lock_switch(void)
 114 {
 115         struct task_struct *tsk = current;
 116         struct mm_struct *mm = tsk->mm;
 117
 118         load_kernel_asce();
 119         if (mm) {
 120                 preempt_disable();
 121                 while (atomic_read(&mm->context.flush_count))
 122                         cpu_relax();
 123                 cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
 124                 __tlb_flush_mm_lazy(mm);
 125                 preempt_enable();
 126         }
 127         set_fs(current->thread.mm_segment);
 128 }
 129
 130 #define enter_lazy_tlb(mm,tsk)  do { } while (0)
 131 #define deactivate_mm(tsk,mm)   do { } while (0)
 132
 133 static inline void activate_mm(struct mm_struct *prev,
 134                                struct mm_struct *next)
 135 {
 136         switch_mm(prev, next, current);
 137         cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
 138         set_user_asce(next);
 139 }
 140
 141 #endif /* __S390_MMU_CONTEXT_H */