arch/mips/lib/iomap.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Implement the default iomap interfaces
   4  *
   5  * (C) Copyright 2004 Linus Torvalds
   6  * (C) Copyright 2006 Ralf Baechle <ralf@linux-mips.org>
   7  * (C) Copyright 2007 MIPS Technologies, Inc.
   8  *     written by Ralf Baechle <ralf@linux-mips.org>
   9  */
  10 #include <linux/export.h>
  11 #include <asm/io.h>
  12
  13 /*
  14  * Read/write from/to an (offsettable) iomem cookie. It might be a PIO
  15  * access or a MMIO access, these functions don't care. The info is
  16  * encoded in the hardware mapping set up by the mapping functions
  17  * (or the cookie itself, depending on implementation and hw).
  18  *
  19  * The generic routines don't assume any hardware mappings, and just
  20  * encode the PIO/MMIO as part of the cookie. They coldly assume that
  21  * the MMIO IO mappings are not in the low address range.
  22  *
  23  * Architectures for which this is not true can't use this generic
  24  * implementation and should do their own copy.
  25  */
  26
  27 #define PIO_MASK        0x0ffffUL
  28
  29 unsigned int ioread8(void __iomem *addr)
  30 {
  31         return readb(addr);
  32 }
  33
  34 EXPORT_SYMBOL(ioread8);
  35
  36 unsigned int ioread16(void __iomem *addr)
  37 {
  38         return readw(addr);
  39 }
  40
  41 EXPORT_SYMBOL(ioread16);
  42
  43 unsigned int ioread16be(void __iomem *addr)
  44 {
  45         return be16_to_cpu(__raw_readw(addr));
  46 }
  47
  48 EXPORT_SYMBOL(ioread16be);
  49
  50 unsigned int ioread32(void __iomem *addr)
  51 {
  52         return readl(addr);
  53 }
  54
  55 EXPORT_SYMBOL(ioread32);
  56
  57 unsigned int ioread32be(void __iomem *addr)
  58 {
  59         return be32_to_cpu(__raw_readl(addr));
  60 }
  61
  62 EXPORT_SYMBOL(ioread32be);
  63
  64 void iowrite8(u8 val, void __iomem *addr)
  65 {
  66         writeb(val, addr);
  67 }
  68
  69 EXPORT_SYMBOL(iowrite8);
  70
  71 void iowrite16(u16 val, void __iomem *addr)
  72 {
  73         writew(val, addr);
  74 }
  75
  76 EXPORT_SYMBOL(iowrite16);
  77
  78 void iowrite16be(u16 val, void __iomem *addr)
  79 {
  80         __raw_writew(cpu_to_be16(val), addr);
  81 }
  82
  83 EXPORT_SYMBOL(iowrite16be);
  84
  85 void iowrite32(u32 val, void __iomem *addr)
  86 {
  87         writel(val, addr);
  88 }
  89
  90 EXPORT_SYMBOL(iowrite32);
  91
  92 void iowrite32be(u32 val, void __iomem *addr)
  93 {
  94         __raw_writel(cpu_to_be32(val), addr);
  95 }
  96
  97 EXPORT_SYMBOL(iowrite32be);
  98
  99 /*
 100  * These are the "repeat MMIO read/write" functions.
 101  * Note the "__mem" accesses, since we want to convert
 102  * to CPU byte order if the host bus happens to not match the
 103  * endianness of PCI/ISA (see mach-generic/mangle-port.h).
 104  */
 105 static inline void mmio_insb(void __iomem *addr, u8 *dst, int count)
 106 {
 107         while (--count >= 0) {
 108                 u8 data = __mem_readb(addr);
 109                 *dst = data;
 110                 dst++;
 111         }
 112 }
 113
 114 static inline void mmio_insw(void __iomem *addr, u16 *dst, int count)
 115 {
 116         while (--count >= 0) {
 117                 u16 data = __mem_readw(addr);
 118                 *dst = data;
 119                 dst++;
 120         }
 121 }
 122
 123 static inline void mmio_insl(void __iomem *addr, u32 *dst, int count)
 124 {
 125         while (--count >= 0) {
 126                 u32 data = __mem_readl(addr);
 127                 *dst = data;
 128                 dst++;
 129         }
 130 }
 131
 132 static inline void mmio_outsb(void __iomem *addr, const u8 *src, int count)
 133 {
 134         while (--count >= 0) {
 135                 __mem_writeb(*src, addr);
 136                 src++;
 137         }
 138 }
 139
 140 static inline void mmio_outsw(void __iomem *addr, const u16 *src, int count)
 141 {
 142         while (--count >= 0) {
 143                 __mem_writew(*src, addr);
 144                 src++;
 145         }
 146 }
 147
 148 static inline void mmio_outsl(void __iomem *addr, const u32 *src, int count)
 149 {
 150         while (--count >= 0) {
 151                 __mem_writel(*src, addr);
 152                 src++;
 153         }
 154 }
 155
 156 void ioread8_rep(void __iomem *addr, void *dst, unsigned long count)
 157 {
 158         mmio_insb(addr, dst, count);
 159 }
 160
 161 EXPORT_SYMBOL(ioread8_rep);
 162
 163 void ioread16_rep(void __iomem *addr, void *dst, unsigned long count)
 164 {
 165         mmio_insw(addr, dst, count);
 166 }
 167
 168 EXPORT_SYMBOL(ioread16_rep);
 169
 170 void ioread32_rep(void __iomem *addr, void *dst, unsigned long count)
 171 {
 172         mmio_insl(addr, dst, count);
 173 }
 174
 175 EXPORT_SYMBOL(ioread32_rep);
 176
 177 void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
 178 {
 179         mmio_outsb(addr, src, count);
 180 }
 181
 182 EXPORT_SYMBOL(iowrite8_rep);
 183
 184 void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
 185 {
 186         mmio_outsw(addr, src, count);
 187 }
 188
 189 EXPORT_SYMBOL(iowrite16_rep);
 190
 191 void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
 192 {
 193         mmio_outsl(addr, src, count);
 194 }
 195
 196 EXPORT_SYMBOL(iowrite32_rep);
 197
 198 /*
 199  * Create a virtual mapping cookie for an IO port range
 200  *
 201  * This uses the same mapping are as the in/out family which has to be setup
 202  * by the platform initialization code.
 203  *
 204  * Just to make matters somewhat more interesting on MIPS systems with
 205  * multiple host bridge each will have it's own ioport address space.
 206  */
 207 static void __iomem *ioport_map_legacy(unsigned long port, unsigned int nr)
 208 {
 209         return (void __iomem *) (mips_io_port_base + port);
 210 }
 211
 212 void __iomem *ioport_map(unsigned long port, unsigned int nr)
 213 {
 214         if (port > PIO_MASK)
 215                 return NULL;
 216
 217         return ioport_map_legacy(port, nr);
 218 }
 219
 220 EXPORT_SYMBOL(ioport_map);
 221
 222 void ioport_unmap(void __iomem *addr)
 223 {
 224         /* Nothing to do */
 225 }
 226
 227 EXPORT_SYMBOL(ioport_unmap);