drivers/video/via/share.h

   1 /*
   2  * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
   3  * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
   4
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public
   7  * License as published by the Free Software Foundation;
   8  * either version 2, or (at your option) any later version.
   9
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
  12  * the implied warranty of MERCHANTABILITY or FITNESS FOR
  13  * A PARTICULAR PURPOSE.See the GNU General Public License
  14  * for more details.
  15
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc.,
  19  * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20  */
  21
  22 #ifndef __SHARE_H__
  23 #define __SHARE_H__
  24
  25 /* Define Bit Field */
  26 #define BIT0    0x01
  27 #define BIT1    0x02
  28 #define BIT2    0x04
  29 #define BIT3    0x08
  30 #define BIT4    0x10
  31 #define BIT5    0x20
  32 #define BIT6    0x40
  33 #define BIT7    0x80
  34
  35 /* Video Memory Size */
  36 #define VIDEO_MEMORY_SIZE_16M    0x1000000
  37
  38 /*
  39  * Lengths of the VPIT structure arrays.
  40  */
  41 #define StdCR       0x19
  42 #define StdSR       0x04
  43 #define StdGR       0x09
  44 #define StdAR       0x14
  45
  46 #define PatchCR     11
  47
  48 /* Display path */
  49 #define IGA1        1
  50 #define IGA2        2
  51
  52 /* Define Color Depth  */
  53 #define MODE_8BPP       1
  54 #define MODE_16BPP      2
  55 #define MODE_32BPP      4
  56
  57 #define GR20    0x20
  58 #define GR21    0x21
  59 #define GR22    0x22
  60
  61 /* Sequencer Registers */
  62 #define SR01    0x01
  63 #define SR10    0x10
  64 #define SR12    0x12
  65 #define SR15    0x15
  66 #define SR16    0x16
  67 #define SR17    0x17
  68 #define SR18    0x18
  69 #define SR1B    0x1B
  70 #define SR1A    0x1A
  71 #define SR1C    0x1C
  72 #define SR1D    0x1D
  73 #define SR1E    0x1E
  74 #define SR1F    0x1F
  75 #define SR20    0x20
  76 #define SR21    0x21
  77 #define SR22    0x22
  78 #define SR2A    0x2A
  79 #define SR2D    0x2D
  80 #define SR2E    0x2E
  81
  82 #define SR30    0x30
  83 #define SR39    0x39
  84 #define SR3D    0x3D
  85 #define SR3E    0x3E
  86 #define SR3F    0x3F
  87 #define SR40    0x40
  88 #define SR43    0x43
  89 #define SR44    0x44
  90 #define SR45    0x45
  91 #define SR46    0x46
  92 #define SR47    0x47
  93 #define SR48    0x48
  94 #define SR49    0x49
  95 #define SR4A    0x4A
  96 #define SR4B    0x4B
  97 #define SR4C    0x4C
  98 #define SR52    0x52
  99 #define SR57    0x57
 100 #define SR58    0x58
 101 #define SR59    0x59
 102 #define SR5D    0x5D
 103 #define SR5E    0x5E
 104 #define SR65    0x65
 105
 106 /* CRT Controller Registers */
 107 #define CR00    0x00
 108 #define CR01    0x01
 109 #define CR02    0x02
 110 #define CR03    0x03
 111 #define CR04    0x04
 112 #define CR05    0x05
 113 #define CR06    0x06
 114 #define CR07    0x07
 115 #define CR08    0x08
 116 #define CR09    0x09
 117 #define CR0A    0x0A
 118 #define CR0B    0x0B
 119 #define CR0C    0x0C
 120 #define CR0D    0x0D
 121 #define CR0E    0x0E
 122 #define CR0F    0x0F
 123 #define CR10    0x10
 124 #define CR11    0x11
 125 #define CR12    0x12
 126 #define CR13    0x13
 127 #define CR14    0x14
 128 #define CR15    0x15
 129 #define CR16    0x16
 130 #define CR17    0x17
 131 #define CR18    0x18
 132
 133 /* Extend CRT Controller Registers */
 134 #define CR30    0x30
 135 #define CR31    0x31
 136 #define CR32    0x32
 137 #define CR33    0x33
 138 #define CR34    0x34
 139 #define CR35    0x35
 140 #define CR36    0x36
 141 #define CR37    0x37
 142 #define CR38    0x38
 143 #define CR39    0x39
 144 #define CR3A    0x3A
 145 #define CR3B    0x3B
 146 #define CR3C    0x3C
 147 #define CR3D    0x3D
 148 #define CR3E    0x3E
 149 #define CR3F    0x3F
 150 #define CR40    0x40
 151 #define CR41    0x41
 152 #define CR42    0x42
 153 #define CR43    0x43
 154 #define CR44    0x44
 155 #define CR45    0x45
 156 #define CR46    0x46
 157 #define CR47    0x47
 158 #define CR48    0x48
 159 #define CR49    0x49
 160 #define CR4A    0x4A
 161 #define CR4B    0x4B
 162 #define CR4C    0x4C
 163 #define CR4D    0x4D
 164 #define CR4E    0x4E
 165 #define CR4F    0x4F
 166 #define CR50    0x50
 167 #define CR51    0x51
 168 #define CR52    0x52
 169 #define CR53    0x53
 170 #define CR54    0x54
 171 #define CR55    0x55
 172 #define CR56    0x56
 173 #define CR57    0x57
 174 #define CR58    0x58
 175 #define CR59    0x59
 176 #define CR5A    0x5A
 177 #define CR5B    0x5B
 178 #define CR5C    0x5C
 179 #define CR5D    0x5D
 180 #define CR5E    0x5E
 181 #define CR5F    0x5F
 182 #define CR60    0x60
 183 #define CR61    0x61
 184 #define CR62    0x62
 185 #define CR63    0x63
 186 #define CR64    0x64
 187 #define CR65    0x65
 188 #define CR66    0x66
 189 #define CR67    0x67
 190 #define CR68    0x68
 191 #define CR69    0x69
 192 #define CR6A    0x6A
 193 #define CR6B    0x6B
 194 #define CR6C    0x6C
 195 #define CR6D    0x6D
 196 #define CR6E    0x6E
 197 #define CR6F    0x6F
 198 #define CR70    0x70
 199 #define CR71    0x71
 200 #define CR72    0x72
 201 #define CR73    0x73
 202 #define CR74    0x74
 203 #define CR75    0x75
 204 #define CR76    0x76
 205 #define CR77    0x77
 206 #define CR78    0x78
 207 #define CR79    0x79
 208 #define CR7A    0x7A
 209 #define CR7B    0x7B
 210 #define CR7C    0x7C
 211 #define CR7D    0x7D
 212 #define CR7E    0x7E
 213 #define CR7F    0x7F
 214 #define CR80    0x80
 215 #define CR81    0x81
 216 #define CR82    0x82
 217 #define CR83    0x83
 218 #define CR84    0x84
 219 #define CR85    0x85
 220 #define CR86    0x86
 221 #define CR87    0x87
 222 #define CR88    0x88
 223 #define CR89    0x89
 224 #define CR8A    0x8A
 225 #define CR8B    0x8B
 226 #define CR8C    0x8C
 227 #define CR8D    0x8D
 228 #define CR8E    0x8E
 229 #define CR8F    0x8F
 230 #define CR90    0x90
 231 #define CR91    0x91
 232 #define CR92    0x92
 233 #define CR93    0x93
 234 #define CR94    0x94
 235 #define CR95    0x95
 236 #define CR96    0x96
 237 #define CR97    0x97
 238 #define CR98    0x98
 239 #define CR99    0x99
 240 #define CR9A    0x9A
 241 #define CR9B    0x9B
 242 #define CR9C    0x9C
 243 #define CR9D    0x9D
 244 #define CR9E    0x9E
 245 #define CR9F    0x9F
 246 #define CRA0    0xA0
 247 #define CRA1    0xA1
 248 #define CRA2    0xA2
 249 #define CRA3    0xA3
 250 #define CRD2    0xD2
 251 #define CRD3    0xD3
 252 #define CRD4    0xD4
 253
 254 /* LUT Table*/
 255 #define LUT_DATA             0x3C9      /* DACDATA */
 256 #define LUT_INDEX_READ       0x3C7      /* DACRX */
 257 #define LUT_INDEX_WRITE      0x3C8      /* DACWX */
 258 #define DACMASK              0x3C6
 259
 260 /* Definition Device */
 261 #define DEVICE_CRT  0x01
 262 #define DEVICE_DVI  0x03
 263 #define DEVICE_LCD  0x04
 264
 265 /* Device output interface */
 266 #define INTERFACE_NONE          0x00
 267 #define INTERFACE_ANALOG_RGB    0x01
 268 #define INTERFACE_DVP0          0x02
 269 #define INTERFACE_DVP1          0x03
 270 #define INTERFACE_DFP_HIGH      0x04
 271 #define INTERFACE_DFP_LOW       0x05
 272 #define INTERFACE_DFP           0x06
 273 #define INTERFACE_LVDS0         0x07
 274 #define INTERFACE_LVDS1         0x08
 275 #define INTERFACE_LVDS0LVDS1    0x09
 276 #define INTERFACE_TMDS          0x0A
 277
 278 #define HW_LAYOUT_LCD_ONLY      0x01
 279 #define HW_LAYOUT_DVI_ONLY      0x02
 280 #define HW_LAYOUT_LCD_DVI       0x03
 281 #define HW_LAYOUT_LCD1_LCD2     0x04
 282 #define HW_LAYOUT_LCD_EXTERNAL_LCD2 0x10
 283
 284 /* Definition Refresh Rate */
 285 #define REFRESH_49      49
 286 #define REFRESH_50      50
 287 #define REFRESH_60      60
 288 #define REFRESH_75      75
 289 #define REFRESH_85      85
 290 #define REFRESH_100     100
 291 #define REFRESH_120     120
 292
 293 /* Definition Sync Polarity*/
 294 #define NEGATIVE        1
 295 #define POSITIVE        0
 296
 297 /*480x640@60 Sync Polarity (GTF)
 298 */
 299 #define M480X640_R60_HSP        NEGATIVE
 300 #define M480X640_R60_VSP        POSITIVE
 301
 302 /*640x480@60 Sync Polarity (VESA Mode)
 303 */
 304 #define M640X480_R60_HSP        NEGATIVE
 305 #define M640X480_R60_VSP        NEGATIVE
 306
 307 /*640x480@75 Sync Polarity (VESA Mode)
 308 */
 309 #define M640X480_R75_HSP        NEGATIVE
 310 #define M640X480_R75_VSP        NEGATIVE
 311
 312 /*640x480@85 Sync Polarity (VESA Mode)
 313 */
 314 #define M640X480_R85_HSP        NEGATIVE
 315 #define M640X480_R85_VSP        NEGATIVE
 316
 317 /*640x480@100 Sync Polarity (GTF Mode)
 318 */
 319 #define M640X480_R100_HSP       NEGATIVE
 320 #define M640X480_R100_VSP       POSITIVE
 321
 322 /*640x480@120 Sync Polarity (GTF Mode)
 323 */
 324 #define M640X480_R120_HSP       NEGATIVE
 325 #define M640X480_R120_VSP       POSITIVE
 326
 327 /*720x480@60 Sync Polarity  (GTF Mode)
 328 */
 329 #define M720X480_R60_HSP        NEGATIVE
 330 #define M720X480_R60_VSP        POSITIVE
 331
 332 /*720x576@60 Sync Polarity  (GTF Mode)
 333 */
 334 #define M720X576_R60_HSP        NEGATIVE
 335 #define M720X576_R60_VSP        POSITIVE
 336
 337 /*800x600@60 Sync Polarity (VESA Mode)
 338 */
 339 #define M800X600_R60_HSP        POSITIVE
 340 #define M800X600_R60_VSP        POSITIVE
 341
 342 /*800x600@75 Sync Polarity (VESA Mode)
 343 */
 344 #define M800X600_R75_HSP        POSITIVE
 345 #define M800X600_R75_VSP        POSITIVE
 346
 347 /*800x600@85 Sync Polarity (VESA Mode)
 348 */
 349 #define M800X600_R85_HSP        POSITIVE
 350 #define M800X600_R85_VSP        POSITIVE
 351
 352 /*800x600@100 Sync Polarity (GTF Mode)
 353 */
 354 #define M800X600_R100_HSP       NEGATIVE
 355 #define M800X600_R100_VSP       POSITIVE
 356
 357 /*800x600@120 Sync Polarity (GTF Mode)
 358 */
 359 #define M800X600_R120_HSP       NEGATIVE
 360 #define M800X600_R120_VSP       POSITIVE
 361
 362 /*800x480@60 Sync Polarity  (CVT Mode)
 363 */
 364 #define M800X480_R60_HSP        NEGATIVE
 365 #define M800X480_R60_VSP        POSITIVE
 366
 367 /*848x480@60 Sync Polarity  (CVT Mode)
 368 */
 369 #define M848X480_R60_HSP        NEGATIVE
 370 #define M848X480_R60_VSP        POSITIVE
 371
 372 /*852x480@60 Sync Polarity  (GTF Mode)
 373 */
 374 #define M852X480_R60_HSP        NEGATIVE
 375 #define M852X480_R60_VSP        POSITIVE
 376
 377 /*1024x512@60 Sync Polarity (GTF Mode)
 378 */
 379 #define M1024X512_R60_HSP       NEGATIVE
 380 #define M1024X512_R60_VSP       POSITIVE
 381
 382 /*1024x600@60 Sync Polarity (GTF Mode)
 383 */
 384 #define M1024X600_R60_HSP       NEGATIVE
 385 #define M1024X600_R60_VSP       POSITIVE
 386
 387 /*1024x768@60 Sync Polarity (VESA Mode)
 388 */
 389 #define M1024X768_R60_HSP       NEGATIVE
 390 #define M1024X768_R60_VSP       NEGATIVE
 391
 392 /*1024x768@75 Sync Polarity (VESA Mode)
 393 */
 394 #define M1024X768_R75_HSP       POSITIVE
 395 #define M1024X768_R75_VSP       POSITIVE
 396
 397 /*1024x768@85 Sync Polarity (VESA Mode)
 398 */
 399 #define M1024X768_R85_HSP       POSITIVE
 400 #define M1024X768_R85_VSP       POSITIVE
 401
 402 /*1024x768@100 Sync Polarity (GTF Mode)
 403 */
 404 #define M1024X768_R100_HSP      NEGATIVE
 405 #define M1024X768_R100_VSP      POSITIVE
 406
 407 /*1152x864@75 Sync Polarity (VESA Mode)
 408 */
 409 #define M1152X864_R75_HSP       POSITIVE
 410 #define M1152X864_R75_VSP       POSITIVE
 411
 412 /*1280x720@60 Sync Polarity  (GTF Mode)
 413 */
 414 #define M1280X720_R60_HSP       NEGATIVE
 415 #define M1280X720_R60_VSP       POSITIVE
 416
 417 /* 1280x768@50 Sync Polarity  (GTF Mode) */
 418 #define M1280X768_R50_HSP       NEGATIVE
 419 #define M1280X768_R50_VSP       POSITIVE
 420
 421 /*1280x768@60 Sync Polarity  (GTF Mode)
 422 */
 423 #define M1280X768_R60_HSP       NEGATIVE
 424 #define M1280X768_R60_VSP       POSITIVE
 425
 426 /*1280x800@60 Sync Polarity  (CVT Mode)
 427 */
 428 #define M1280X800_R60_HSP       NEGATIVE
 429 #define M1280X800_R60_VSP       POSITIVE
 430
 431 /*1280x960@60 Sync Polarity (VESA Mode)
 432 */
 433 #define M1280X960_R60_HSP       POSITIVE
 434 #define M1280X960_R60_VSP       POSITIVE
 435
 436 /*1280x1024@60 Sync Polarity (VESA Mode)
 437 */
 438 #define M1280X1024_R60_HSP      POSITIVE
 439 #define M1280X1024_R60_VSP      POSITIVE
 440
 441 /* 1360x768@60 Sync Polarity (CVT Mode) */
 442 #define M1360X768_R60_HSP       POSITIVE
 443 #define M1360X768_R60_VSP       POSITIVE
 444
 445 /* 1360x768@60 Sync Polarity (CVT Reduce Blanking Mode) */
 446 #define M1360X768_RB_R60_HSP       POSITIVE
 447 #define M1360X768_RB_R60_VSP       NEGATIVE
 448
 449 /* 1368x768@50 Sync Polarity (GTF Mode) */
 450 #define M1368X768_R50_HSP       NEGATIVE
 451 #define M1368X768_R50_VSP       POSITIVE
 452
 453 /* 1368x768@60 Sync Polarity (VESA Mode) */
 454 #define M1368X768_R60_HSP       NEGATIVE
 455 #define M1368X768_R60_VSP       POSITIVE
 456
 457 /*1280x1024@75 Sync Polarity (VESA Mode)
 458 */
 459 #define M1280X1024_R75_HSP      POSITIVE
 460 #define M1280X1024_R75_VSP      POSITIVE
 461
 462 /*1280x1024@85 Sync Polarity (VESA Mode)
 463 */
 464 #define M1280X1024_R85_HSP      POSITIVE
 465 #define M1280X1024_R85_VSP      POSITIVE
 466
 467 /*1440x1050@60 Sync Polarity (GTF Mode)
 468 */
 469 #define M1440X1050_R60_HSP      NEGATIVE
 470 #define M1440X1050_R60_VSP      POSITIVE
 471
 472 /*1600x1200@60 Sync Polarity (VESA Mode)
 473 */
 474 #define M1600X1200_R60_HSP      POSITIVE
 475 #define M1600X1200_R60_VSP      POSITIVE
 476
 477 /*1600x1200@75 Sync Polarity (VESA Mode)
 478 */
 479 #define M1600X1200_R75_HSP      POSITIVE
 480 #define M1600X1200_R75_VSP      POSITIVE
 481
 482 /* 1680x1050@60 Sync Polarity (CVT Mode) */
 483 #define M1680x1050_R60_HSP      NEGATIVE
 484 #define M1680x1050_R60_VSP      NEGATIVE
 485
 486 /* 1680x1050@60 Sync Polarity (CVT Reduce Blanking Mode) */
 487 #define M1680x1050_RB_R60_HSP      POSITIVE
 488 #define M1680x1050_RB_R60_VSP      NEGATIVE
 489
 490 /* 1680x1050@75 Sync Polarity (CVT Mode) */
 491 #define M1680x1050_R75_HSP      NEGATIVE
 492 #define M1680x1050_R75_VSP      POSITIVE
 493
 494 /*1920x1080@60 Sync Polarity (CVT Mode)
 495 */
 496 #define M1920X1080_R60_HSP      NEGATIVE
 497 #define M1920X1080_R60_VSP      POSITIVE
 498
 499 /* 1920x1080@60 Sync Polarity (CVT Reduce Blanking Mode) */
 500 #define M1920X1080_RB_R60_HSP  POSITIVE
 501 #define M1920X1080_RB_R60_VSP  NEGATIVE
 502
 503 /*1920x1440@60 Sync Polarity (VESA Mode)
 504 */
 505 #define M1920X1440_R60_HSP      NEGATIVE
 506 #define M1920X1440_R60_VSP      POSITIVE
 507
 508 /*1920x1440@75 Sync Polarity (VESA Mode)
 509 */
 510 #define M1920X1440_R75_HSP      NEGATIVE
 511 #define M1920X1440_R75_VSP      POSITIVE
 512
 513 #if 0
 514 /* 1400x1050@60 Sync Polarity (VESA Mode) */
 515 #define M1400X1050_R60_HSP      NEGATIVE
 516 #define M1400X1050_R60_VSP      NEGATIVE
 517 #endif
 518
 519 /* 1400x1050@60 Sync Polarity (CVT Mode) */
 520 #define M1400X1050_R60_HSP      NEGATIVE
 521 #define M1400X1050_R60_VSP      POSITIVE
 522
 523 /* 1400x1050@60 Sync Polarity (CVT Reduce Blanking Mode) */
 524 #define M1400X1050_RB_R60_HSP      POSITIVE
 525 #define M1400X1050_RB_R60_VSP      NEGATIVE
 526
 527 /* 1400x1050@75 Sync Polarity (CVT Mode) */
 528 #define M1400X1050_R75_HSP      NEGATIVE
 529 #define M1400X1050_R75_VSP      POSITIVE
 530
 531 /* 960x600@60 Sync Polarity (CVT Mode) */
 532 #define M960X600_R60_HSP        NEGATIVE
 533 #define M960X600_R60_VSP        POSITIVE
 534
 535 /* 1000x600@60 Sync Polarity (GTF Mode) */
 536 #define M1000X600_R60_HSP       NEGATIVE
 537 #define M1000X600_R60_VSP       POSITIVE
 538
 539 /* 1024x576@60 Sync Polarity (GTF Mode) */
 540 #define M1024X576_R60_HSP       NEGATIVE
 541 #define M1024X576_R60_VSP       POSITIVE
 542
 543 /*1024x600@60 Sync Polarity (GTF Mode)*/
 544 #define M1024X600_R60_HSP       NEGATIVE
 545 #define M1024X600_R60_VSP       POSITIVE
 546
 547 /* 1088x612@60 Sync Polarity (CVT Mode) */
 548 #define M1088X612_R60_HSP       NEGATIVE
 549 #define M1088X612_R60_VSP       POSITIVE
 550
 551 /* 1152x720@60 Sync Polarity (CVT Mode) */
 552 #define M1152X720_R60_HSP       NEGATIVE
 553 #define M1152X720_R60_VSP       POSITIVE
 554
 555 /* 1200x720@60 Sync Polarity (GTF Mode) */
 556 #define M1200X720_R60_HSP       NEGATIVE
 557 #define M1200X720_R60_VSP       POSITIVE
 558
 559 /* 1200x900@60 Sync Polarity (DCON) */
 560 #define M1200X900_R60_HSP       NEGATIVE
 561 #define M1200X900_R60_VSP       NEGATIVE
 562
 563 /* 1280x600@60 Sync Polarity (GTF Mode) */
 564 #define M1280x600_R60_HSP       NEGATIVE
 565 #define M1280x600_R60_VSP       POSITIVE
 566
 567 /* 1280x720@50 Sync Polarity  (GTF Mode) */
 568 #define M1280X720_R50_HSP       NEGATIVE
 569 #define M1280X720_R50_VSP       POSITIVE
 570
 571 /* 1440x900@60 Sync Polarity (CVT Mode) */
 572 #define M1440X900_R60_HSP       NEGATIVE
 573 #define M1440X900_R60_VSP       POSITIVE
 574
 575 /* 1440x900@75 Sync Polarity (CVT Mode) */
 576 #define M1440X900_R75_HSP       NEGATIVE
 577 #define M1440X900_R75_VSP       POSITIVE
 578
 579 /* 1440x900@60 Sync Polarity (CVT Reduce Blanking Mode) */
 580 #define M1440X900_RB_R60_HSP       POSITIVE
 581 #define M1440X900_RB_R60_VSP       NEGATIVE
 582
 583 /* 1600x900@60 Sync Polarity (CVT Mode) */
 584 #define M1600X900_R60_HSP       NEGATIVE
 585 #define M1600X900_R60_VSP       POSITIVE
 586
 587 /* 1600x900@60 Sync Polarity (CVT Reduce Blanking Mode) */
 588 #define M1600X900_RB_R60_HSP       POSITIVE
 589 #define M1600X900_RB_R60_VSP       NEGATIVE
 590
 591 /* 1600x1024@60 Sync Polarity (GTF Mode) */
 592 #define M1600X1024_R60_HSP      NEGATIVE
 593 #define M1600X1024_R60_VSP      POSITIVE
 594
 595 /* 1792x1344@60 Sync Polarity (DMT Mode) */
 596 #define M1792x1344_R60_HSP      NEGATIVE
 597 #define M1792x1344_R60_VSP      POSITIVE
 598
 599 /* 1856x1392@60 Sync Polarity (DMT Mode) */
 600 #define M1856x1392_R60_HSP      NEGATIVE
 601 #define M1856x1392_R60_VSP      POSITIVE
 602
 603 /* 1920x1200@60 Sync Polarity (CVT Mode) */
 604 #define M1920X1200_R60_HSP      NEGATIVE
 605 #define M1920X1200_R60_VSP      POSITIVE
 606
 607 /* 1920x1200@60 Sync Polarity (CVT Reduce Blanking Mode) */
 608 #define M1920X1200_RB_R60_HSP  POSITIVE
 609 #define M1920X1200_RB_R60_VSP  NEGATIVE
 610
 611 /* 2048x1536@60 Sync Polarity (CVT Mode) */
 612 #define M2048x1536_R60_HSP      NEGATIVE
 613 #define M2048x1536_R60_VSP      POSITIVE
 614
 615 /* Definition CRTC Timing Index */
 616 #define H_TOTAL_INDEX               0
 617 #define H_ADDR_INDEX                1
 618 #define H_BLANK_START_INDEX         2
 619 #define H_BLANK_END_INDEX           3
 620 #define H_SYNC_START_INDEX          4
 621 #define H_SYNC_END_INDEX            5
 622 #define V_TOTAL_INDEX               6
 623 #define V_ADDR_INDEX                7
 624 #define V_BLANK_START_INDEX         8
 625 #define V_BLANK_END_INDEX           9
 626 #define V_SYNC_START_INDEX          10
 627 #define V_SYNC_END_INDEX            11
 628 #define H_TOTAL_SHADOW_INDEX        12
 629 #define H_BLANK_END_SHADOW_INDEX    13
 630 #define V_TOTAL_SHADOW_INDEX        14
 631 #define V_ADDR_SHADOW_INDEX         15
 632 #define V_BLANK_SATRT_SHADOW_INDEX  16
 633 #define V_BLANK_END_SHADOW_INDEX    17
 634 #define V_SYNC_SATRT_SHADOW_INDEX   18
 635 #define V_SYNC_END_SHADOW_INDEX     19
 636
 637 /* Definition Video Mode Pixel Clock (picoseconds)
 638 */
 639 #define RES_640X480_60HZ_PIXCLOCK    39722
 640
 641 /* LCD display method
 642 */
 643 #define     LCD_EXPANDSION              0x00
 644 #define     LCD_CENTERING               0x01
 645
 646 /* LCD mode
 647 */
 648 #define     LCD_OPENLDI               0x00
 649 #define     LCD_SPWG                  0x01
 650
 651 /* Define display timing
 652 */
 653 struct display_timing {
 654         u16 hor_total;
 655         u16 hor_addr;
 656         u16 hor_blank_start;
 657         u16 hor_blank_end;
 658         u16 hor_sync_start;
 659         u16 hor_sync_end;
 660         u16 ver_total;
 661         u16 ver_addr;
 662         u16 ver_blank_start;
 663         u16 ver_blank_end;
 664         u16 ver_sync_start;
 665         u16 ver_sync_end;
 666 };
 667
 668 struct crt_mode_table {
 669         int refresh_rate;
 670         int h_sync_polarity;
 671         int v_sync_polarity;
 672         struct display_timing crtc;
 673 };
 674
 675 struct io_reg {
 676         int port;
 677         u8 index;
 678         u8 mask;
 679         u8 value;
 680 };
 681
 682 #endif /* __SHARE_H__ */