RTL8192CU: Increase max APFM_ONMAC polling count
[linux-2.6/btrfs-unstable.git] / drivers / watchdog / bcm_kona_wdt.c
blob9c248099f4a250849618d9009b0ad05d12e0ca69
1 /*
2 * Copyright (C) 2013 Broadcom Corporation
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/debugfs.h>
15 #include <linux/delay.h>
16 #include <linux/err.h>
17 #include <linux/io.h>
18 #include <linux/module.h>
19 #include <linux/of_address.h>
20 #include <linux/platform_device.h>
21 #include <linux/watchdog.h>
23 #define SECWDOG_CTRL_REG 0x00000000
24 #define SECWDOG_COUNT_REG 0x00000004
26 #define SECWDOG_RESERVED_MASK 0x1dffffff
27 #define SECWDOG_WD_LOAD_FLAG 0x10000000
28 #define SECWDOG_EN_MASK 0x08000000
29 #define SECWDOG_SRSTEN_MASK 0x04000000
30 #define SECWDOG_RES_MASK 0x00f00000
31 #define SECWDOG_COUNT_MASK 0x000fffff
33 #define SECWDOG_MAX_COUNT SECWDOG_COUNT_MASK
34 #define SECWDOG_CLKS_SHIFT 20
35 #define SECWDOG_MAX_RES 15
36 #define SECWDOG_DEFAULT_RESOLUTION 4
37 #define SECWDOG_MAX_TRY 1000
39 #define SECS_TO_TICKS(x, w) ((x) << (w)->resolution)
40 #define TICKS_TO_SECS(x, w) ((x) >> (w)->resolution)
42 #define BCM_KONA_WDT_NAME "bcm_kona_wdt"
44 struct bcm_kona_wdt {
45 void __iomem *base;
47 * One watchdog tick is 1/(2^resolution) seconds. Resolution can take
48 * the values 0-15, meaning one tick can be 1s to 30.52us. Our default
49 * resolution of 4 means one tick is 62.5ms.
51 * The watchdog counter is 20 bits. Depending on resolution, the maximum
52 * counter value of 0xfffff expires after about 12 days (resolution 0)
53 * down to only 32s (resolution 15). The default resolution of 4 gives
54 * us a maximum of about 18 hours and 12 minutes before the watchdog
55 * times out.
57 int resolution;
58 spinlock_t lock;
59 #ifdef CONFIG_BCM_KONA_WDT_DEBUG
60 unsigned long busy_count;
61 struct dentry *debugfs;
62 #endif
65 static int secure_register_read(struct bcm_kona_wdt *wdt, uint32_t offset)
67 uint32_t val;
68 unsigned count = 0;
71 * If the WD_LOAD_FLAG is set, the watchdog counter field is being
72 * updated in hardware. Once the WD timer is updated in hardware, it
73 * gets cleared.
75 do {
76 if (unlikely(count > 1))
77 udelay(5);
78 val = readl_relaxed(wdt->base + offset);
79 count++;
80 } while ((val & SECWDOG_WD_LOAD_FLAG) && count < SECWDOG_MAX_TRY);
82 #ifdef CONFIG_BCM_KONA_WDT_DEBUG
83 /* Remember the maximum number iterations due to WD_LOAD_FLAG */
84 if (count > wdt->busy_count)
85 wdt->busy_count = count;
86 #endif
88 /* This is the only place we return a negative value. */
89 if (val & SECWDOG_WD_LOAD_FLAG)
90 return -ETIMEDOUT;
92 /* We always mask out reserved bits. */
93 val &= SECWDOG_RESERVED_MASK;
95 return val;
98 #ifdef CONFIG_BCM_KONA_WDT_DEBUG
100 static int bcm_kona_wdt_dbg_show(struct seq_file *s, void *data)
102 int ctl_val, cur_val, ret;
103 unsigned long flags;
104 struct bcm_kona_wdt *wdt = s->private;
106 if (!wdt)
107 return seq_puts(s, "No device pointer\n");
109 spin_lock_irqsave(&wdt->lock, flags);
110 ctl_val = secure_register_read(wdt, SECWDOG_CTRL_REG);
111 cur_val = secure_register_read(wdt, SECWDOG_COUNT_REG);
112 spin_unlock_irqrestore(&wdt->lock, flags);
114 if (ctl_val < 0 || cur_val < 0) {
115 ret = seq_puts(s, "Error accessing hardware\n");
116 } else {
117 int ctl, cur, ctl_sec, cur_sec, res;
119 ctl = ctl_val & SECWDOG_COUNT_MASK;
120 res = (ctl_val & SECWDOG_RES_MASK) >> SECWDOG_CLKS_SHIFT;
121 cur = cur_val & SECWDOG_COUNT_MASK;
122 ctl_sec = TICKS_TO_SECS(ctl, wdt);
123 cur_sec = TICKS_TO_SECS(cur, wdt);
124 ret = seq_printf(s, "Resolution: %d / %d\n"
125 "Control: %d s / %d (%#x) ticks\n"
126 "Current: %d s / %d (%#x) ticks\n"
127 "Busy count: %lu\n", res,
128 wdt->resolution, ctl_sec, ctl, ctl, cur_sec,
129 cur, cur, wdt->busy_count);
132 return ret;
135 static int bcm_kona_dbg_open(struct inode *inode, struct file *file)
137 return single_open(file, bcm_kona_wdt_dbg_show, inode->i_private);
140 static const struct file_operations bcm_kona_dbg_operations = {
141 .open = bcm_kona_dbg_open,
142 .read = seq_read,
143 .llseek = seq_lseek,
144 .release = single_release,
147 static void bcm_kona_wdt_debug_init(struct platform_device *pdev)
149 struct dentry *dir;
150 struct bcm_kona_wdt *wdt = platform_get_drvdata(pdev);
152 if (!wdt)
153 return;
155 wdt->debugfs = NULL;
157 dir = debugfs_create_dir(BCM_KONA_WDT_NAME, NULL);
158 if (IS_ERR_OR_NULL(dir))
159 return;
161 if (debugfs_create_file("info", S_IFREG | S_IRUGO, dir, wdt,
162 &bcm_kona_dbg_operations))
163 wdt->debugfs = dir;
164 else
165 debugfs_remove_recursive(dir);
168 static void bcm_kona_wdt_debug_exit(struct platform_device *pdev)
170 struct bcm_kona_wdt *wdt = platform_get_drvdata(pdev);
172 if (wdt && wdt->debugfs) {
173 debugfs_remove_recursive(wdt->debugfs);
174 wdt->debugfs = NULL;
178 #else
180 static void bcm_kona_wdt_debug_init(struct platform_device *pdev) {}
181 static void bcm_kona_wdt_debug_exit(struct platform_device *pdev) {}
183 #endif /* CONFIG_BCM_KONA_WDT_DEBUG */
185 static int bcm_kona_wdt_ctrl_reg_modify(struct bcm_kona_wdt *wdt,
186 unsigned mask, unsigned newval)
188 int val;
189 unsigned long flags;
190 int ret = 0;
192 spin_lock_irqsave(&wdt->lock, flags);
194 val = secure_register_read(wdt, SECWDOG_CTRL_REG);
195 if (val < 0) {
196 ret = val;
197 } else {
198 val &= ~mask;
199 val |= newval;
200 writel_relaxed(val, wdt->base + SECWDOG_CTRL_REG);
203 spin_unlock_irqrestore(&wdt->lock, flags);
205 return ret;
208 static int bcm_kona_wdt_set_resolution_reg(struct bcm_kona_wdt *wdt)
210 if (wdt->resolution > SECWDOG_MAX_RES)
211 return -EINVAL;
213 return bcm_kona_wdt_ctrl_reg_modify(wdt, SECWDOG_RES_MASK,
214 wdt->resolution << SECWDOG_CLKS_SHIFT);
217 static int bcm_kona_wdt_set_timeout_reg(struct watchdog_device *wdog,
218 unsigned watchdog_flags)
220 struct bcm_kona_wdt *wdt = watchdog_get_drvdata(wdog);
222 return bcm_kona_wdt_ctrl_reg_modify(wdt, SECWDOG_COUNT_MASK,
223 SECS_TO_TICKS(wdog->timeout, wdt) |
224 watchdog_flags);
227 static int bcm_kona_wdt_set_timeout(struct watchdog_device *wdog,
228 unsigned int t)
230 wdog->timeout = t;
231 return 0;
234 static unsigned int bcm_kona_wdt_get_timeleft(struct watchdog_device *wdog)
236 struct bcm_kona_wdt *wdt = watchdog_get_drvdata(wdog);
237 int val;
238 unsigned long flags;
240 spin_lock_irqsave(&wdt->lock, flags);
241 val = secure_register_read(wdt, SECWDOG_COUNT_REG);
242 spin_unlock_irqrestore(&wdt->lock, flags);
244 if (val < 0)
245 return val;
247 return TICKS_TO_SECS(val & SECWDOG_COUNT_MASK, wdt);
250 static int bcm_kona_wdt_start(struct watchdog_device *wdog)
252 return bcm_kona_wdt_set_timeout_reg(wdog,
253 SECWDOG_EN_MASK | SECWDOG_SRSTEN_MASK);
256 static int bcm_kona_wdt_stop(struct watchdog_device *wdog)
258 struct bcm_kona_wdt *wdt = watchdog_get_drvdata(wdog);
260 return bcm_kona_wdt_ctrl_reg_modify(wdt, SECWDOG_EN_MASK |
261 SECWDOG_SRSTEN_MASK, 0);
264 static struct watchdog_ops bcm_kona_wdt_ops = {
265 .owner = THIS_MODULE,
266 .start = bcm_kona_wdt_start,
267 .stop = bcm_kona_wdt_stop,
268 .set_timeout = bcm_kona_wdt_set_timeout,
269 .get_timeleft = bcm_kona_wdt_get_timeleft,
272 static struct watchdog_info bcm_kona_wdt_info = {
273 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE |
274 WDIOF_KEEPALIVEPING,
275 .identity = "Broadcom Kona Watchdog Timer",
278 static struct watchdog_device bcm_kona_wdt_wdd = {
279 .info = &bcm_kona_wdt_info,
280 .ops = &bcm_kona_wdt_ops,
281 .min_timeout = 1,
282 .max_timeout = SECWDOG_MAX_COUNT >> SECWDOG_DEFAULT_RESOLUTION,
283 .timeout = SECWDOG_MAX_COUNT >> SECWDOG_DEFAULT_RESOLUTION,
286 static void bcm_kona_wdt_shutdown(struct platform_device *pdev)
288 bcm_kona_wdt_stop(&bcm_kona_wdt_wdd);
291 static int bcm_kona_wdt_probe(struct platform_device *pdev)
293 struct device *dev = &pdev->dev;
294 struct bcm_kona_wdt *wdt;
295 struct resource *res;
296 int ret;
298 wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
299 if (!wdt)
300 return -ENOMEM;
302 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
303 wdt->base = devm_ioremap_resource(dev, res);
304 if (IS_ERR(wdt->base))
305 return -ENODEV;
307 wdt->resolution = SECWDOG_DEFAULT_RESOLUTION;
308 ret = bcm_kona_wdt_set_resolution_reg(wdt);
309 if (ret) {
310 dev_err(dev, "Failed to set resolution (error: %d)", ret);
311 return ret;
314 spin_lock_init(&wdt->lock);
315 platform_set_drvdata(pdev, wdt);
316 watchdog_set_drvdata(&bcm_kona_wdt_wdd, wdt);
318 ret = bcm_kona_wdt_set_timeout_reg(&bcm_kona_wdt_wdd, 0);
319 if (ret) {
320 dev_err(dev, "Failed set watchdog timeout");
321 return ret;
324 ret = watchdog_register_device(&bcm_kona_wdt_wdd);
325 if (ret) {
326 dev_err(dev, "Failed to register watchdog device");
327 return ret;
330 bcm_kona_wdt_debug_init(pdev);
331 dev_dbg(dev, "Broadcom Kona Watchdog Timer");
333 return 0;
336 static int bcm_kona_wdt_remove(struct platform_device *pdev)
338 bcm_kona_wdt_debug_exit(pdev);
339 bcm_kona_wdt_shutdown(pdev);
340 watchdog_unregister_device(&bcm_kona_wdt_wdd);
341 dev_dbg(&pdev->dev, "Watchdog driver disabled");
343 return 0;
346 static const struct of_device_id bcm_kona_wdt_of_match[] = {
347 { .compatible = "brcm,kona-wdt", },
350 MODULE_DEVICE_TABLE(of, bcm_kona_wdt_of_match);
352 static struct platform_driver bcm_kona_wdt_driver = {
353 .driver = {
354 .name = BCM_KONA_WDT_NAME,
355 .owner = THIS_MODULE,
356 .of_match_table = bcm_kona_wdt_of_match,
358 .probe = bcm_kona_wdt_probe,
359 .remove = bcm_kona_wdt_remove,
360 .shutdown = bcm_kona_wdt_shutdown,
363 module_platform_driver(bcm_kona_wdt_driver);
365 MODULE_ALIAS("platform:" BCM_KONA_WDT_NAME);
366 MODULE_AUTHOR("Markus Mayer <mmayer@broadcom.com>");
367 MODULE_DESCRIPTION("Broadcom Kona Watchdog Driver");
368 MODULE_LICENSE("GPL v2");