include/asm-mips/serial.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1999 by Ralf Baechle
   7  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
   8  */
   9 #ifndef _ASM_SERIAL_H
  10 #define _ASM_SERIAL_H
  11
  12 #include <linux/config.h>
  13
  14 /*
  15  * This assumes you have a 1.8432 MHz clock for your UART.
  16  *
  17  * It'd be nice if someone built a serial card with a 24.576 MHz
  18  * clock, since the 16550A is capable of handling a top speed of 1.5
  19  * megabits/second; but this requires the faster clock.
  20  */
  21 #define BASE_BAUD (1843200 / 16)
  22
  23 /* Standard COM flags (except for COM4, because of the 8514 problem) */
  24 #ifdef CONFIG_SERIAL_DETECT_IRQ
  25 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
  26 #define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
  27 #else
  28 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
  29 #define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
  30 #endif
  31
  32 #ifdef CONFIG_MACH_JAZZ
  33 #include <asm/jazz.h>
  34
  35 #ifndef CONFIG_OLIVETTI_M700
  36    /* Some Jazz machines seem to have an 8MHz crystal clock but I don't know
  37       exactly which ones ... XXX */
  38 #define JAZZ_BASE_BAUD ( 8000000 / 16 ) /* ( 3072000 / 16) */
  39 #else
  40 /* but the M700 isn't such a strange beast */
  41 #define JAZZ_BASE_BAUD BASE_BAUD
  42 #endif
  43
  44 #define _JAZZ_SERIAL_INIT(int, base)                                    \
  45         { .baud_base = JAZZ_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS,      \
  46           .iomem_base = (u8 *) base, .iomem_reg_shift = 0,                      \
  47           .io_type = SERIAL_IO_MEM }
  48 #define JAZZ_SERIAL_PORT_DEFNS                                          \
  49         _JAZZ_SERIAL_INIT(JAZZ_SERIAL1_IRQ, JAZZ_SERIAL1_BASE),         \
  50         _JAZZ_SERIAL_INIT(JAZZ_SERIAL2_IRQ, JAZZ_SERIAL2_BASE),
  51 #else
  52 #define JAZZ_SERIAL_PORT_DEFNS
  53 #endif
  54
  55 /*
  56  * Both Galileo boards have the same UART mappings.
  57  */
  58 #if defined (CONFIG_MIPS_EV96100) || defined (CONFIG_MIPS_EV64120)
  59 #include <asm/galileo-boards/ev96100.h>
  60 #include <asm/galileo-boards/ev96100int.h>
  61 #define EV96100_SERIAL_PORT_DEFNS                                  \
  62     { .baud_base = EV96100_BASE_BAUD, .irq = EV96100INT_UART_0, \
  63       .flags = STD_COM_FLAGS,  \
  64       .iomem_base = EV96100_UART0_REGS_BASE, .iomem_reg_shift = 2, \
  65       .io_type = SERIAL_IO_MEM }, \
  66     { .baud_base = EV96100_BASE_BAUD, .irq = EV96100INT_UART_0, \
  67       .flags = STD_COM_FLAGS, \
  68       .iomem_base = EV96100_UART1_REGS_BASE, .iomem_reg_shift = 2, \
  69       .io_type = SERIAL_IO_MEM },
  70 #else
  71 #define EV96100_SERIAL_PORT_DEFNS
  72 #endif
  73
  74 #ifdef CONFIG_MIPS_ITE8172
  75 #include <asm/it8172/it8172.h>
  76 #include <asm/it8172/it8172_int.h>
  77 #include <asm/it8712.h>
  78 #define ITE_SERIAL_PORT_DEFNS                                  \
  79     { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \
  80       .irq = IT8172_UART_IRQ, .flags = STD_COM_FLAGS, .port = PORT_16550 }, \
  81     { .baud_base = (24000000/(16*13)), .port = (IT8172_PCI_IO_BASE + IT8712_UART1_PORT), \
  82       .irq = IT8172_SERIRQ_4, .flags = STD_COM_FLAGS, .port = PORT_16550 }, \
  83     /* Smart Card Reader 0 */ \
  84     { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR0_BASE), \
  85       .irq = IT8172_SCR0_IRQ, .flags = STD_COM_FLAGS, .port = PORT_16550 }, \
  86     /* Smart Card Reader 1 */ \
  87     { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \
  88       .irq = IT8172_SCR1_IRQ, .flags = STD_COM_FLAGS, .port = PORT_16550 },
  89 #else
  90 #define ITE_SERIAL_PORT_DEFNS
  91 #endif
  92
  93 #ifdef CONFIG_MIPS_IVR
  94 #include <asm/it8172/it8172.h>
  95 #include <asm/it8172/it8172_int.h>
  96 #define IVR_SERIAL_PORT_DEFNS                                  \
  97     { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \
  98       .irq = IT8172_UART_IRQ, .flags = STD_COM_FLAGS, .port = PORT_16550 },         \
  99     /* Smart Card Reader 1 */ \
 100     { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \
 101       .irq = IT8172_SCR1_IRQ, .flags = STD_COM_FLAGS, .port = PORT_16550 },
 102 #else
 103 #define IVR_SERIAL_PORT_DEFNS
 104 #endif
 105
 106 #ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT
 107 #define STD_SERIAL_PORT_DEFNS                   \
 108         /* UART CLK   PORT IRQ     FLAGS        */                      \
 109         { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS },      /* ttyS0 */     \
 110         { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS },      /* ttyS1 */     \
 111         { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS },      /* ttyS2 */     \
 112         { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS },     /* ttyS3 */
 113
 114 #else /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
 115 #define STD_SERIAL_PORT_DEFNS
 116 #endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
 117
 118 #ifdef CONFIG_MOMENCO_JAGUAR_ATX
 119 /* Ordinary NS16552 duart with a 20MHz crystal.  */
 120 #define JAGUAR_ATX_UART_CLK     20000000
 121 #define JAGUAR_ATX_BASE_BAUD    (JAGUAR_ATX_UART_CLK / 16)
 122
 123 #define JAGUAR_ATX_SERIAL1_IRQ  6
 124 #define JAGUAR_ATX_SERIAL1_BASE 0xfd000023L
 125
 126 #define _JAGUAR_ATX_SERIAL_INIT(int, base)                              \
 127         { .baud_base = JAGUAR_ATX_BASE_BAUD, irq: int,                  \
 128           .flags = (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST),             \
 129           .iomem_base = (u8 *) base, iomem_reg_shift: 2,                        \
 130           io_type: SERIAL_IO_MEM }
 131 #define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS                            \
 132         _JAGUAR_ATX_SERIAL_INIT(JAGUAR_ATX_SERIAL1_IRQ, JAGUAR_ATX_SERIAL1_BASE)
 133 #else
 134 #define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS
 135 #endif
 136
 137 #ifdef CONFIG_MOMENCO_OCELOT_3
 138 #define OCELOT_3_BASE_BAUD      ( 20000000 / 16 )
 139 #define OCELOT_3_SERIAL_IRQ     6
 140 #define OCELOT_3_SERIAL_BASE    (signed)0xfd000020
 141
 142 #define _OCELOT_3_SERIAL_INIT(int, base)                                \
 143         { .baud_base = OCELOT_3_BASE_BAUD, irq: int,                    \
 144           .flags = STD_COM_FLAGS,                                               \
 145           .iomem_base = (u8 *) base, iomem_reg_shift: 2,                        \
 146           io_type: SERIAL_IO_MEM }
 147
 148 #define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS                              \
 149         _OCELOT_3_SERIAL_INIT(OCELOT_3_SERIAL_IRQ, OCELOT_3_SERIAL_BASE)
 150 #else
 151 #define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
 152 #endif
 153
 154 #ifdef CONFIG_MOMENCO_OCELOT
 155 /* Ordinary NS16552 duart with a 20MHz crystal.  */
 156 #define OCELOT_BASE_BAUD ( 20000000 / 16 )
 157
 158 #define OCELOT_SERIAL1_IRQ      4
 159 #define OCELOT_SERIAL1_BASE     0xe0001020
 160
 161 #define _OCELOT_SERIAL_INIT(int, base)                                  \
 162         { .baud_base = OCELOT_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS,    \
 163           .iomem_base = (u8 *) base, .iomem_reg_shift = 2,                      \
 164           .io_type = SERIAL_IO_MEM }
 165 #define MOMENCO_OCELOT_SERIAL_PORT_DEFNS                                \
 166         _OCELOT_SERIAL_INIT(OCELOT_SERIAL1_IRQ, OCELOT_SERIAL1_BASE)
 167 #else
 168 #define MOMENCO_OCELOT_SERIAL_PORT_DEFNS
 169 #endif
 170
 171 #ifdef CONFIG_MOMENCO_OCELOT_G
 172 /* Ordinary NS16552 duart with a 20MHz crystal.  */
 173 #define OCELOT_G_BASE_BAUD ( 20000000 / 16 )
 174
 175 #define OCELOT_G_SERIAL1_IRQ    4
 176 #if 0
 177 #define OCELOT_G_SERIAL1_BASE   0xe0001020
 178 #else
 179 #define OCELOT_G_SERIAL1_BASE   0xfd000020
 180 #endif
 181
 182 #define _OCELOT_G_SERIAL_INIT(int, base)                                \
 183         { .baud_base = OCELOT_G_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS,\
 184           .iomem_base = (u8 *) base, .iomem_reg_shift = 2,                      \
 185           .io_type = SERIAL_IO_MEM }
 186 #define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS                              \
 187         _OCELOT_G_SERIAL_INIT(OCELOT_G_SERIAL1_IRQ, OCELOT_G_SERIAL1_BASE)
 188 #else
 189 #define MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS
 190 #endif
 191
 192 #ifdef CONFIG_MOMENCO_OCELOT_C
 193 /* Ordinary NS16552 duart with a 20MHz crystal.  */
 194 #define OCELOT_C_BASE_BAUD ( 20000000 / 16 )
 195
 196 #define OCELOT_C_SERIAL1_IRQ    80
 197 #define OCELOT_C_SERIAL1_BASE   0xfd000020
 198
 199 #define OCELOT_C_SERIAL2_IRQ    81
 200 #define OCELOT_C_SERIAL2_BASE   0xfd000000
 201
 202 #define _OCELOT_C_SERIAL_INIT(int, base)                                \
 203         { .baud_base            = OCELOT_C_BASE_BAUD,                   \
 204           .irq                  = (int),                                \
 205           .flags                = STD_COM_FLAGS,                        \
 206           .iomem_base           = (u8 *) base,                          \
 207           .iomem_reg_shift      = 2,                                    \
 208           .io_type              = SERIAL_IO_MEM                         \
 209          }
 210 #define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS                              \
 211         _OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL1_IRQ, OCELOT_C_SERIAL1_BASE), \
 212         _OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL2_IRQ, OCELOT_C_SERIAL2_BASE)
 213 #else
 214 #define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS
 215 #endif
 216
 217 #ifdef CONFIG_DDB5477
 218 #include <asm/ddb5xxx/ddb5477.h>
 219 #define DDB5477_SERIAL_PORT_DEFNS                                       \
 220         { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART0,             \
 221           .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04200,        \
 222           .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM},              \
 223         { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART1,             \
 224           .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04240,        \
 225           .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM},
 226 #else
 227 #define DDB5477_SERIAL_PORT_DEFNS
 228 #endif
 229
 230 #ifdef CONFIG_SGI_IP32
 231 /*
 232  * The IP32 (SGI O2) has standard serial ports (UART 16550A) mapped in memory
 233  * They are initialized in ip32_setup
 234  */
 235 #define IP32_SERIAL_PORT_DEFNS                          \
 236         {},{},
 237 #else
 238 #define IP32_SERIAL_PORT_DEFNS
 239 #endif /* CONFIG_SGI_IP32 */
 240
 241 #define SERIAL_PORT_DFNS                                \
 242         DDB5477_SERIAL_PORT_DEFNS                       \
 243         EV96100_SERIAL_PORT_DEFNS                       \
 244         IP32_SERIAL_PORT_DEFNS                          \
 245         ITE_SERIAL_PORT_DEFNS                           \
 246         IVR_SERIAL_PORT_DEFNS                           \
 247         JAZZ_SERIAL_PORT_DEFNS                          \
 248         STD_SERIAL_PORT_DEFNS                           \
 249         MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS              \
 250         MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS              \
 251         MOMENCO_OCELOT_SERIAL_PORT_DEFNS                \
 252         MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
 253
 254 #endif /* _ASM_SERIAL_H */