3 * pxa-ssp.c -- ALSA Soc Audio Layer
5 * Copyright 2005,2008 Wolfson Microelectronics PLC.
6 * Author: Liam Girdwood
7 * Mark Brown <broonie@opensource.wolfsonmicro.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 * o Test network mode for > 16bit sample size
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
21 #include <linux/clk.h>
26 #include <sound/core.h>
27 #include <sound/pcm.h>
28 #include <sound/initval.h>
29 #include <sound/pcm_params.h>
30 #include <sound/soc.h>
31 #include <sound/pxa2xx-lib.h>
33 #include <mach/hardware.h>
34 #include <mach/pxa-regs.h>
35 #include <mach/regs-ssp.h>
36 #include <mach/audio.h>
39 #include "pxa2xx-pcm.h"
43 * SSP audio private data
50 struct ssp_state state
;
54 #define PXA2xx_SSP1_BASE 0x41000000
55 #define PXA27x_SSP2_BASE 0x41700000
56 #define PXA27x_SSP3_BASE 0x41900000
57 #define PXA3xx_SSP4_BASE 0x41a00000
59 static struct pxa2xx_pcm_dma_params pxa_ssp1_pcm_mono_out
= {
60 .name
= "SSP1 PCM Mono out",
61 .dev_addr
= PXA2xx_SSP1_BASE
+ SSDR
,
63 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
64 DCMD_BURST16
| DCMD_WIDTH2
,
67 static struct pxa2xx_pcm_dma_params pxa_ssp1_pcm_mono_in
= {
68 .name
= "SSP1 PCM Mono in",
69 .dev_addr
= PXA2xx_SSP1_BASE
+ SSDR
,
71 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
72 DCMD_BURST16
| DCMD_WIDTH2
,
75 static struct pxa2xx_pcm_dma_params pxa_ssp1_pcm_stereo_out
= {
76 .name
= "SSP1 PCM Stereo out",
77 .dev_addr
= PXA2xx_SSP1_BASE
+ SSDR
,
79 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
80 DCMD_BURST16
| DCMD_WIDTH4
,
83 static struct pxa2xx_pcm_dma_params pxa_ssp1_pcm_stereo_in
= {
84 .name
= "SSP1 PCM Stereo in",
85 .dev_addr
= PXA2xx_SSP1_BASE
+ SSDR
,
87 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
88 DCMD_BURST16
| DCMD_WIDTH4
,
91 static struct pxa2xx_pcm_dma_params pxa_ssp2_pcm_mono_out
= {
92 .name
= "SSP2 PCM Mono out",
93 .dev_addr
= PXA27x_SSP2_BASE
+ SSDR
,
95 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
96 DCMD_BURST16
| DCMD_WIDTH2
,
99 static struct pxa2xx_pcm_dma_params pxa_ssp2_pcm_mono_in
= {
100 .name
= "SSP2 PCM Mono in",
101 .dev_addr
= PXA27x_SSP2_BASE
+ SSDR
,
103 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
104 DCMD_BURST16
| DCMD_WIDTH2
,
107 static struct pxa2xx_pcm_dma_params pxa_ssp2_pcm_stereo_out
= {
108 .name
= "SSP2 PCM Stereo out",
109 .dev_addr
= PXA27x_SSP2_BASE
+ SSDR
,
111 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
112 DCMD_BURST16
| DCMD_WIDTH4
,
115 static struct pxa2xx_pcm_dma_params pxa_ssp2_pcm_stereo_in
= {
116 .name
= "SSP2 PCM Stereo in",
117 .dev_addr
= PXA27x_SSP2_BASE
+ SSDR
,
119 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
120 DCMD_BURST16
| DCMD_WIDTH4
,
123 static struct pxa2xx_pcm_dma_params pxa_ssp3_pcm_mono_out
= {
124 .name
= "SSP3 PCM Mono out",
125 .dev_addr
= PXA27x_SSP3_BASE
+ SSDR
,
127 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
128 DCMD_BURST16
| DCMD_WIDTH2
,
131 static struct pxa2xx_pcm_dma_params pxa_ssp3_pcm_mono_in
= {
132 .name
= "SSP3 PCM Mono in",
133 .dev_addr
= PXA27x_SSP3_BASE
+ SSDR
,
135 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
136 DCMD_BURST16
| DCMD_WIDTH2
,
139 static struct pxa2xx_pcm_dma_params pxa_ssp3_pcm_stereo_out
= {
140 .name
= "SSP3 PCM Stereo out",
141 .dev_addr
= PXA27x_SSP3_BASE
+ SSDR
,
143 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
144 DCMD_BURST16
| DCMD_WIDTH4
,
147 static struct pxa2xx_pcm_dma_params pxa_ssp3_pcm_stereo_in
= {
148 .name
= "SSP3 PCM Stereo in",
149 .dev_addr
= PXA27x_SSP3_BASE
+ SSDR
,
151 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
152 DCMD_BURST16
| DCMD_WIDTH4
,
155 static struct pxa2xx_pcm_dma_params pxa_ssp4_pcm_mono_out
= {
156 .name
= "SSP4 PCM Mono out",
157 .dev_addr
= PXA3xx_SSP4_BASE
+ SSDR
,
159 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
160 DCMD_BURST16
| DCMD_WIDTH2
,
163 static struct pxa2xx_pcm_dma_params pxa_ssp4_pcm_mono_in
= {
164 .name
= "SSP4 PCM Mono in",
165 .dev_addr
= PXA3xx_SSP4_BASE
+ SSDR
,
167 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
168 DCMD_BURST16
| DCMD_WIDTH2
,
171 static struct pxa2xx_pcm_dma_params pxa_ssp4_pcm_stereo_out
= {
172 .name
= "SSP4 PCM Stereo out",
173 .dev_addr
= PXA3xx_SSP4_BASE
+ SSDR
,
175 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
176 DCMD_BURST16
| DCMD_WIDTH4
,
179 static struct pxa2xx_pcm_dma_params pxa_ssp4_pcm_stereo_in
= {
180 .name
= "SSP4 PCM Stereo in",
181 .dev_addr
= PXA3xx_SSP4_BASE
+ SSDR
,
183 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
184 DCMD_BURST16
| DCMD_WIDTH4
,
187 static void dump_registers(struct ssp_device
*ssp
)
189 dev_dbg(&ssp
->pdev
->dev
, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n",
190 ssp_read_reg(ssp
, SSCR0
), ssp_read_reg(ssp
, SSCR1
),
191 ssp_read_reg(ssp
, SSTO
));
193 dev_dbg(&ssp
->pdev
->dev
, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n",
194 ssp_read_reg(ssp
, SSPSP
), ssp_read_reg(ssp
, SSSR
),
195 ssp_read_reg(ssp
, SSACD
));
198 static struct pxa2xx_pcm_dma_params
*ssp_dma_params
[4][4] = {
200 &pxa_ssp1_pcm_mono_out
, &pxa_ssp1_pcm_mono_in
,
201 &pxa_ssp1_pcm_stereo_out
, &pxa_ssp1_pcm_stereo_in
,
204 &pxa_ssp2_pcm_mono_out
, &pxa_ssp2_pcm_mono_in
,
205 &pxa_ssp2_pcm_stereo_out
, &pxa_ssp2_pcm_stereo_in
,
208 &pxa_ssp3_pcm_mono_out
, &pxa_ssp3_pcm_mono_in
,
209 &pxa_ssp3_pcm_stereo_out
, &pxa_ssp3_pcm_stereo_in
,
212 &pxa_ssp4_pcm_mono_out
, &pxa_ssp4_pcm_mono_in
,
213 &pxa_ssp4_pcm_stereo_out
, &pxa_ssp4_pcm_stereo_in
,
217 static int pxa_ssp_startup(struct snd_pcm_substream
*substream
,
218 struct snd_soc_dai
*dai
)
220 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
221 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
222 struct ssp_priv
*priv
= cpu_dai
->private_data
;
225 if (!cpu_dai
->active
) {
226 priv
->dev
.port
= cpu_dai
->id
+ 1;
227 priv
->dev
.irq
= NO_IRQ
;
228 clk_enable(priv
->dev
.ssp
->clk
);
229 ssp_disable(&priv
->dev
);
234 static void pxa_ssp_shutdown(struct snd_pcm_substream
*substream
,
235 struct snd_soc_dai
*dai
)
237 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
238 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
239 struct ssp_priv
*priv
= cpu_dai
->private_data
;
241 if (!cpu_dai
->active
) {
242 ssp_disable(&priv
->dev
);
243 clk_disable(priv
->dev
.ssp
->clk
);
249 static int pxa_ssp_suspend(struct snd_soc_dai
*cpu_dai
)
251 struct ssp_priv
*priv
= cpu_dai
->private_data
;
253 if (!cpu_dai
->active
)
256 ssp_save_state(&priv
->dev
, &priv
->state
);
257 clk_disable(priv
->dev
.ssp
->clk
);
261 static int pxa_ssp_resume(struct snd_soc_dai
*cpu_dai
)
263 struct ssp_priv
*priv
= cpu_dai
->private_data
;
265 if (!cpu_dai
->active
)
268 clk_enable(priv
->dev
.ssp
->clk
);
269 ssp_restore_state(&priv
->dev
, &priv
->state
);
270 ssp_enable(&priv
->dev
);
276 #define pxa_ssp_suspend NULL
277 #define pxa_ssp_resume NULL
281 * ssp_set_clkdiv - set SSP clock divider
282 * @div: serial clock rate divider
284 static void ssp_set_scr(struct ssp_dev
*dev
, u32 div
)
286 struct ssp_device
*ssp
= dev
->ssp
;
287 u32 sscr0
= ssp_read_reg(dev
->ssp
, SSCR0
) & ~SSCR0_SCR
;
289 ssp_write_reg(ssp
, SSCR0
, (sscr0
| SSCR0_SerClkDiv(div
)));
293 * Set the SSP ports SYSCLK.
295 static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai
*cpu_dai
,
296 int clk_id
, unsigned int freq
, int dir
)
298 struct ssp_priv
*priv
= cpu_dai
->private_data
;
299 struct ssp_device
*ssp
= priv
->dev
.ssp
;
302 u32 sscr0
= ssp_read_reg(ssp
, SSCR0
) &
303 ~(SSCR0_ECS
| SSCR0_NCS
| SSCR0_MOD
| SSCR0_ADC
);
305 dev_dbg(&ssp
->pdev
->dev
,
306 "pxa_ssp_set_dai_sysclk id: %d, clk_id %d, freq %d\n",
307 cpu_dai
->id
, clk_id
, freq
);
310 case PXA_SSP_CLK_NET_PLL
:
313 case PXA_SSP_CLK_PLL
:
314 /* Internal PLL is fixed */
316 priv
->sysclk
= 1843200;
318 priv
->sysclk
= 13000000;
320 case PXA_SSP_CLK_EXT
:
324 case PXA_SSP_CLK_NET
:
326 sscr0
|= SSCR0_NCS
| SSCR0_MOD
;
328 case PXA_SSP_CLK_AUDIO
:
330 ssp_set_scr(&priv
->dev
, 1);
337 /* The SSP clock must be disabled when changing SSP clock mode
338 * on PXA2xx. On PXA3xx it must be enabled when doing so. */
339 if (!cpu_is_pxa3xx())
340 clk_disable(priv
->dev
.ssp
->clk
);
341 val
= ssp_read_reg(ssp
, SSCR0
) | sscr0
;
342 ssp_write_reg(ssp
, SSCR0
, val
);
343 if (!cpu_is_pxa3xx())
344 clk_enable(priv
->dev
.ssp
->clk
);
350 * Set the SSP clock dividers.
352 static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai
*cpu_dai
,
355 struct ssp_priv
*priv
= cpu_dai
->private_data
;
356 struct ssp_device
*ssp
= priv
->dev
.ssp
;
360 case PXA_SSP_AUDIO_DIV_ACDS
:
361 val
= (ssp_read_reg(ssp
, SSACD
) & ~0x7) | SSACD_ACDS(div
);
362 ssp_write_reg(ssp
, SSACD
, val
);
364 case PXA_SSP_AUDIO_DIV_SCDB
:
365 val
= ssp_read_reg(ssp
, SSACD
);
367 #if defined(CONFIG_PXA3xx)
372 case PXA_SSP_CLK_SCDB_1
:
375 case PXA_SSP_CLK_SCDB_4
:
377 #if defined(CONFIG_PXA3xx)
378 case PXA_SSP_CLK_SCDB_8
:
388 ssp_write_reg(ssp
, SSACD
, val
);
390 case PXA_SSP_DIV_SCR
:
391 ssp_set_scr(&priv
->dev
, div
);
401 * Configure the PLL frequency pxa27x and (afaik - pxa320 only)
403 static int pxa_ssp_set_dai_pll(struct snd_soc_dai
*cpu_dai
,
404 int pll_id
, unsigned int freq_in
, unsigned int freq_out
)
406 struct ssp_priv
*priv
= cpu_dai
->private_data
;
407 struct ssp_device
*ssp
= priv
->dev
.ssp
;
408 u32 ssacd
= ssp_read_reg(ssp
, SSACD
) & ~0x70;
410 #if defined(CONFIG_PXA3xx)
412 ssp_write_reg(ssp
, SSACDD
, 0);
439 /* PXA3xx has a clock ditherer which can be used to generate
440 * a wider range of frequencies - calculate a value for it.
442 if (cpu_is_pxa3xx()) {
446 do_div(tmp
, freq_out
);
449 val
= (val
<< 16) | 64;;
450 ssp_write_reg(ssp
, SSACDD
, val
);
454 dev_dbg(&ssp
->pdev
->dev
,
455 "Using SSACDD %x to supply %dHz\n",
464 ssp_write_reg(ssp
, SSACD
, ssacd
);
470 * Set the active slots in TDM/Network mode
472 static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai
*cpu_dai
,
473 unsigned int mask
, int slots
)
475 struct ssp_priv
*priv
= cpu_dai
->private_data
;
476 struct ssp_device
*ssp
= priv
->dev
.ssp
;
479 sscr0
= ssp_read_reg(ssp
, SSCR0
) & ~SSCR0_SlotsPerFrm(7);
481 /* set number of active slots */
482 sscr0
|= SSCR0_SlotsPerFrm(slots
);
483 ssp_write_reg(ssp
, SSCR0
, sscr0
);
485 /* set active slot mask */
486 ssp_write_reg(ssp
, SSTSA
, mask
);
487 ssp_write_reg(ssp
, SSRSA
, mask
);
492 * Tristate the SSP DAI lines
494 static int pxa_ssp_set_dai_tristate(struct snd_soc_dai
*cpu_dai
,
497 struct ssp_priv
*priv
= cpu_dai
->private_data
;
498 struct ssp_device
*ssp
= priv
->dev
.ssp
;
501 sscr1
= ssp_read_reg(ssp
, SSCR1
);
506 ssp_write_reg(ssp
, SSCR1
, sscr1
);
512 * Set up the SSP DAI format.
513 * The SSP Port must be inactive before calling this function as the
514 * physical interface format is changed.
516 static int pxa_ssp_set_dai_fmt(struct snd_soc_dai
*cpu_dai
,
519 struct ssp_priv
*priv
= cpu_dai
->private_data
;
520 struct ssp_device
*ssp
= priv
->dev
.ssp
;
525 /* reset port settings */
526 sscr0
= ssp_read_reg(ssp
, SSCR0
) &
527 (SSCR0_ECS
| SSCR0_NCS
| SSCR0_MOD
| SSCR0_ADC
);
528 sscr1
= SSCR1_RxTresh(8) | SSCR1_TxTresh(7);
531 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
532 case SND_SOC_DAIFMT_CBM_CFM
:
533 sscr1
|= SSCR1_SCLKDIR
| SSCR1_SFRMDIR
;
535 case SND_SOC_DAIFMT_CBM_CFS
:
536 sscr1
|= SSCR1_SCLKDIR
;
538 case SND_SOC_DAIFMT_CBS_CFS
:
544 ssp_write_reg(ssp
, SSCR0
, sscr0
);
545 ssp_write_reg(ssp
, SSCR1
, sscr1
);
546 ssp_write_reg(ssp
, SSPSP
, sspsp
);
548 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
549 case SND_SOC_DAIFMT_I2S
:
550 sscr0
|= SSCR0_MOD
| SSCR0_PSP
;
551 sscr1
|= SSCR1_RWOT
| SSCR1_TRAIL
;
553 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
554 case SND_SOC_DAIFMT_NB_NF
:
557 case SND_SOC_DAIFMT_NB_IF
:
558 sspsp
|= SSPSP_SFRMP
| SSPSP_FSRT
;
560 case SND_SOC_DAIFMT_IB_IF
:
561 sspsp
|= SSPSP_SFRMP
;
568 case SND_SOC_DAIFMT_DSP_A
:
570 case SND_SOC_DAIFMT_DSP_B
:
571 sscr0
|= SSCR0_MOD
| SSCR0_PSP
;
572 sscr1
|= SSCR1_TRAIL
| SSCR1_RWOT
;
574 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
575 case SND_SOC_DAIFMT_NB_NF
:
576 sspsp
|= SSPSP_SFRMP
;
578 case SND_SOC_DAIFMT_IB_IF
:
589 ssp_write_reg(ssp
, SSCR0
, sscr0
);
590 ssp_write_reg(ssp
, SSCR1
, sscr1
);
591 ssp_write_reg(ssp
, SSPSP
, sspsp
);
595 /* Since we are configuring the timings for the format by hand
596 * we have to defer some things until hw_params() where we
597 * know parameters like the sample size.
605 * Set the SSP audio DMA parameters and sample size.
606 * Can be called multiple times by oss emulation.
608 static int pxa_ssp_hw_params(struct snd_pcm_substream
*substream
,
609 struct snd_pcm_hw_params
*params
,
610 struct snd_soc_dai
*dai
)
612 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
613 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
614 struct ssp_priv
*priv
= cpu_dai
->private_data
;
615 struct ssp_device
*ssp
= priv
->dev
.ssp
;
616 int dma
= 0, chn
= params_channels(params
);
619 int width
= snd_pcm_format_physical_width(params_format(params
));
621 /* select correct DMA params */
622 if (substream
->stream
!= SNDRV_PCM_STREAM_PLAYBACK
)
623 dma
= 1; /* capture DMA offset is 1,3 */
625 dma
+= 2; /* stereo DMA offset is 2, mono is 0 */
626 cpu_dai
->dma_data
= ssp_dma_params
[cpu_dai
->id
][dma
];
628 dev_dbg(&ssp
->pdev
->dev
, "pxa_ssp_hw_params: dma %d\n", dma
);
630 /* we can only change the settings if the port is not in use */
631 if (ssp_read_reg(ssp
, SSCR0
) & SSCR0_SSE
)
634 /* clear selected SSP bits */
635 sscr0
= ssp_read_reg(ssp
, SSCR0
) & ~(SSCR0_DSS
| SSCR0_EDSS
);
636 ssp_write_reg(ssp
, SSCR0
, sscr0
);
639 sscr0
= ssp_read_reg(ssp
, SSCR0
);
640 switch (params_format(params
)) {
641 case SNDRV_PCM_FORMAT_S16_LE
:
644 sscr0
|= SSCR0_FPCKE
;
646 sscr0
|= SSCR0_DataSize(16);
647 /* use network mode (2 slots) for 16 bit stereo */
649 case SNDRV_PCM_FORMAT_S24_LE
:
650 sscr0
|= (SSCR0_EDSS
| SSCR0_DataSize(8));
651 /* we must be in network mode (2 slots) for 24 bit stereo */
653 case SNDRV_PCM_FORMAT_S32_LE
:
654 sscr0
|= (SSCR0_EDSS
| SSCR0_DataSize(16));
655 /* we must be in network mode (2 slots) for 32 bit stereo */
658 ssp_write_reg(ssp
, SSCR0
, sscr0
);
660 switch (priv
->dai_fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
661 case SND_SOC_DAIFMT_I2S
:
662 /* Cleared when the DAI format is set */
663 sspsp
= ssp_read_reg(ssp
, SSPSP
) | SSPSP_SFRMWDTH(width
);
664 ssp_write_reg(ssp
, SSPSP
, sspsp
);
670 /* We always use a network mode so we always require TDM slots
671 * - complain loudly and fail if they've not been set up yet.
673 if (!(ssp_read_reg(ssp
, SSTSA
) & 0xf)) {
674 dev_err(&ssp
->pdev
->dev
, "No TDM timeslot configured\n");
683 static int pxa_ssp_trigger(struct snd_pcm_substream
*substream
, int cmd
,
684 struct snd_soc_dai
*dai
)
686 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
687 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
689 struct ssp_priv
*priv
= cpu_dai
->private_data
;
690 struct ssp_device
*ssp
= priv
->dev
.ssp
;
694 case SNDRV_PCM_TRIGGER_RESUME
:
695 ssp_enable(&priv
->dev
);
697 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
698 val
= ssp_read_reg(ssp
, SSCR1
);
699 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
703 ssp_write_reg(ssp
, SSCR1
, val
);
704 val
= ssp_read_reg(ssp
, SSSR
);
705 ssp_write_reg(ssp
, SSSR
, val
);
707 case SNDRV_PCM_TRIGGER_START
:
708 val
= ssp_read_reg(ssp
, SSCR1
);
709 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
713 ssp_write_reg(ssp
, SSCR1
, val
);
714 ssp_enable(&priv
->dev
);
716 case SNDRV_PCM_TRIGGER_STOP
:
717 val
= ssp_read_reg(ssp
, SSCR1
);
718 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
722 ssp_write_reg(ssp
, SSCR1
, val
);
724 case SNDRV_PCM_TRIGGER_SUSPEND
:
725 ssp_disable(&priv
->dev
);
727 case SNDRV_PCM_TRIGGER_PAUSE_PUSH
:
728 val
= ssp_read_reg(ssp
, SSCR1
);
729 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
733 ssp_write_reg(ssp
, SSCR1
, val
);
745 static int pxa_ssp_probe(struct platform_device
*pdev
,
746 struct snd_soc_dai
*dai
)
748 struct ssp_priv
*priv
;
751 priv
= kzalloc(sizeof(struct ssp_priv
), GFP_KERNEL
);
755 priv
->dev
.ssp
= ssp_request(dai
->id
+ 1, "SoC audio");
756 if (priv
->dev
.ssp
== NULL
) {
761 dai
->private_data
= priv
;
770 static void pxa_ssp_remove(struct platform_device
*pdev
,
771 struct snd_soc_dai
*dai
)
773 struct ssp_priv
*priv
= dai
->private_data
;
774 ssp_free(priv
->dev
.ssp
);
777 #define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
778 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
779 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \
780 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
782 #define PXA_SSP_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
783 SNDRV_PCM_FMTBIT_S24_LE | \
784 SNDRV_PCM_FMTBIT_S32_LE)
786 struct snd_soc_dai pxa_ssp_dai
[] = {
788 .name
= "pxa2xx-ssp1",
790 .probe
= pxa_ssp_probe
,
791 .remove
= pxa_ssp_remove
,
792 .suspend
= pxa_ssp_suspend
,
793 .resume
= pxa_ssp_resume
,
797 .rates
= PXA_SSP_RATES
,
798 .formats
= PXA_SSP_FORMATS
,
803 .rates
= PXA_SSP_RATES
,
804 .formats
= PXA_SSP_FORMATS
,
807 .startup
= pxa_ssp_startup
,
808 .shutdown
= pxa_ssp_shutdown
,
809 .trigger
= pxa_ssp_trigger
,
810 .hw_params
= pxa_ssp_hw_params
,
811 .set_sysclk
= pxa_ssp_set_dai_sysclk
,
812 .set_clkdiv
= pxa_ssp_set_dai_clkdiv
,
813 .set_pll
= pxa_ssp_set_dai_pll
,
814 .set_fmt
= pxa_ssp_set_dai_fmt
,
815 .set_tdm_slot
= pxa_ssp_set_dai_tdm_slot
,
816 .set_tristate
= pxa_ssp_set_dai_tristate
,
819 { .name
= "pxa2xx-ssp2",
821 .probe
= pxa_ssp_probe
,
822 .remove
= pxa_ssp_remove
,
823 .suspend
= pxa_ssp_suspend
,
824 .resume
= pxa_ssp_resume
,
828 .rates
= PXA_SSP_RATES
,
829 .formats
= PXA_SSP_FORMATS
,
834 .rates
= PXA_SSP_RATES
,
835 .formats
= PXA_SSP_FORMATS
,
838 .startup
= pxa_ssp_startup
,
839 .shutdown
= pxa_ssp_shutdown
,
840 .trigger
= pxa_ssp_trigger
,
841 .hw_params
= pxa_ssp_hw_params
,
842 .set_sysclk
= pxa_ssp_set_dai_sysclk
,
843 .set_clkdiv
= pxa_ssp_set_dai_clkdiv
,
844 .set_pll
= pxa_ssp_set_dai_pll
,
845 .set_fmt
= pxa_ssp_set_dai_fmt
,
846 .set_tdm_slot
= pxa_ssp_set_dai_tdm_slot
,
847 .set_tristate
= pxa_ssp_set_dai_tristate
,
851 .name
= "pxa2xx-ssp3",
853 .probe
= pxa_ssp_probe
,
854 .remove
= pxa_ssp_remove
,
855 .suspend
= pxa_ssp_suspend
,
856 .resume
= pxa_ssp_resume
,
860 .rates
= PXA_SSP_RATES
,
861 .formats
= PXA_SSP_FORMATS
,
866 .rates
= PXA_SSP_RATES
,
867 .formats
= PXA_SSP_FORMATS
,
870 .startup
= pxa_ssp_startup
,
871 .shutdown
= pxa_ssp_shutdown
,
872 .trigger
= pxa_ssp_trigger
,
873 .hw_params
= pxa_ssp_hw_params
,
874 .set_sysclk
= pxa_ssp_set_dai_sysclk
,
875 .set_clkdiv
= pxa_ssp_set_dai_clkdiv
,
876 .set_pll
= pxa_ssp_set_dai_pll
,
877 .set_fmt
= pxa_ssp_set_dai_fmt
,
878 .set_tdm_slot
= pxa_ssp_set_dai_tdm_slot
,
879 .set_tristate
= pxa_ssp_set_dai_tristate
,
883 .name
= "pxa2xx-ssp4",
885 .probe
= pxa_ssp_probe
,
886 .remove
= pxa_ssp_remove
,
887 .suspend
= pxa_ssp_suspend
,
888 .resume
= pxa_ssp_resume
,
892 .rates
= PXA_SSP_RATES
,
893 .formats
= PXA_SSP_FORMATS
,
898 .rates
= PXA_SSP_RATES
,
899 .formats
= PXA_SSP_FORMATS
,
902 .startup
= pxa_ssp_startup
,
903 .shutdown
= pxa_ssp_shutdown
,
904 .trigger
= pxa_ssp_trigger
,
905 .hw_params
= pxa_ssp_hw_params
,
906 .set_sysclk
= pxa_ssp_set_dai_sysclk
,
907 .set_clkdiv
= pxa_ssp_set_dai_clkdiv
,
908 .set_pll
= pxa_ssp_set_dai_pll
,
909 .set_fmt
= pxa_ssp_set_dai_fmt
,
910 .set_tdm_slot
= pxa_ssp_set_dai_tdm_slot
,
911 .set_tristate
= pxa_ssp_set_dai_tristate
,
915 EXPORT_SYMBOL_GPL(pxa_ssp_dai
);
917 static int __init
pxa_ssp_init(void)
919 return snd_soc_register_dais(pxa_ssp_dai
, ARRAY_SIZE(pxa_ssp_dai
));
921 module_init(pxa_ssp_init
);
923 static void __exit
pxa_ssp_exit(void)
925 snd_soc_unregister_dais(pxa_ssp_dai
, ARRAY_SIZE(pxa_ssp_dai
));
927 module_exit(pxa_ssp_exit
);
929 /* Module information */
930 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
931 MODULE_DESCRIPTION("PXA SSP/PCM SoC Interface");
932 MODULE_LICENSE("GPL");