arch/sh/boards/se/770x/irq.c

   1 /*
   2  * linux/arch/sh/boards/se/770x/irq.c
   3  *
   4  * Copyright (C) 2000  Kazumoto Kojima
   5  * Copyright (C) 2006  Nobuhiro Iwamatsu
   6  *
   7  * Hitachi SolutionEngine Support.
   8  *
   9  */
  10
  11 #include <linux/init.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/irq.h>
  14 #include <asm/irq.h>
  15 #include <asm/io.h>
  16 #include <asm/se.h>
  17
  18 /*
  19  * If the problem of make_ipr_irq is solved,
  20  * this code will become unnecessary. :-)
  21  */
  22 static void se770x_disable_ipr_irq(unsigned int irq)
  23 {
  24         struct ipr_data *p = get_irq_chip_data(irq);
  25
  26         ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << p->shift)), p->addr);
  27 }
  28
  29 static void se770x_enable_ipr_irq(unsigned int irq)
  30 {
  31         struct ipr_data *p = get_irq_chip_data(irq);
  32
  33         ctrl_outw(ctrl_inw(p->addr) | (p->priority << p->shift), p->addr);
  34 }
  35
  36 static struct irq_chip se770x_irq_chip = {
  37         .name           = "MS770xSE-FPGA",
  38         .mask           = se770x_disable_ipr_irq,
  39         .unmask         = se770x_enable_ipr_irq,
  40         .mask_ack       = se770x_disable_ipr_irq,
  41 };
  42
  43 void make_se770x_irq(struct ipr_data *table, unsigned int nr_irqs)
  44 {
  45         int i;
  46
  47         for (i = 0; i < nr_irqs; i++) {
  48                 unsigned int irq = table[i].irq;
  49                 disable_irq_nosync(irq);
  50                 set_irq_chip_and_handler_name(irq, &se770x_irq_chip,
  51                         handle_level_irq, "level");
  52                 set_irq_chip_data(irq, &table[i]);
  53                 se770x_enable_ipr_irq(irq);
  54         }
  55 }
  56
  57 static struct ipr_data se770x_ipr_map[] = {
  58 #if defined(CONFIG_CPU_SUBTYPE_SH7705)
  59         /* This is default value */
  60         { 0xf-0x2, 0, 8,  0x2 , BCR_ILCRA},
  61         { 0xf-0xa, 0, 4,  0xa , BCR_ILCRA},
  62         { 0xf-0x5, 0, 0,  0x5 , BCR_ILCRB},
  63         { 0xf-0x8, 0, 4,  0x8 , BCR_ILCRC},
  64         { 0xf-0xc, 0, 0,  0xc , BCR_ILCRC},
  65         { 0xf-0xe, 0, 12, 0xe , BCR_ILCRD},
  66         { 0xf-0x3, 0, 4,  0x3 , BCR_ILCRD}, /* LAN */
  67         { 0xf-0xd, 0, 8,  0xd , BCR_ILCRE},
  68         { 0xf-0x9, 0, 4,  0x9 , BCR_ILCRE},
  69         { 0xf-0x1, 0, 0,  0x1 , BCR_ILCRE},
  70         { 0xf-0xf, 0, 12, 0xf , BCR_ILCRF},
  71         { 0xf-0xb, 0, 4,  0xb , BCR_ILCRF},
  72         { 0xf-0x7, 0, 12, 0x7 , BCR_ILCRG},
  73         { 0xf-0x6, 0, 8,  0x6 , BCR_ILCRG},
  74         { 0xf-0x4, 0, 4,  0x4 , BCR_ILCRG},
  75 #else
  76         { 14, 0,  8, 0x0f-14 ,BCR_ILCRA},
  77         { 12, 0,  4, 0x0f-12 ,BCR_ILCRA},
  78         {  8, 0,  4, 0x0f- 8 ,BCR_ILCRB},
  79         {  6, 0, 12, 0x0f- 6 ,BCR_ILCRC},
  80         {  5, 0,  8, 0x0f- 5 ,BCR_ILCRC},
  81         {  4, 0,  4, 0x0f- 4 ,BCR_ILCRC},
  82         {  3, 0,  0, 0x0f- 3 ,BCR_ILCRC},
  83         {  1, 0, 12, 0x0f- 1 ,BCR_ILCRD},
  84         /* ST NIC */
  85         { 10, 0,  4, 0x0f-10 ,BCR_ILCRD},       /* LAN */
  86         /* MRSHPC IRQs setting */
  87         {  0, 0, 12, 0x0f- 0 ,BCR_ILCRE},       /* PCIRQ3 */
  88         { 11, 0,  8, 0x0f-11 ,BCR_ILCRE},       /* PCIRQ2 */
  89         {  9, 0,  4, 0x0f- 9 ,BCR_ILCRE},       /* PCIRQ1 */
  90         {  7, 0,  0, 0x0f- 7 ,BCR_ILCRE},       /* PCIRQ0 */
  91         /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */
  92         /* NOTE: #2 and #13 are not used on PC */
  93         { 13, 0,  4, 0x0f-13 ,BCR_ILCRG},       /* SLOTIRQ2 */
  94         {  2, 0,  0, 0x0f- 2 ,BCR_ILCRG},       /* SLOTIRQ1 */
  95 #endif
  96 };
  97
  98 /*
  99  * Initialize IRQ setting
 100  */
 101 void __init init_se_IRQ(void)
 102 {
 103         /*
 104          * Super I/O (Just mimic PC):
 105          *  1: keyboard
 106          *  3: serial 0
 107          *  4: serial 1
 108          *  5: printer
 109          *  6: floppy
 110          *  8: rtc
 111          * 12: mouse
 112          * 14: ide0
 113          */
 114 #if defined(CONFIG_CPU_SUBTYPE_SH7705)
 115         /* Disable all interrupts */
 116         ctrl_outw(0, BCR_ILCRA);
 117         ctrl_outw(0, BCR_ILCRB);
 118         ctrl_outw(0, BCR_ILCRC);
 119         ctrl_outw(0, BCR_ILCRD);
 120         ctrl_outw(0, BCR_ILCRE);
 121         ctrl_outw(0, BCR_ILCRF);
 122         ctrl_outw(0, BCR_ILCRG);
 123 #endif
 124         make_se770x_irq(se770x_ipr_map, ARRAY_SIZE(se770x_ipr_map));
 125 }