2 * Driver for Silicon Labs Si570/Si571 Programmable XO/VCXO
4 * Copyright (C) 2010, 2011 Ericsson AB.
5 * Copyright (C) 2011 Guenter Roeck.
6 * Copyright (C) 2011 - 2013 Xilinx Inc.
8 * Author: Guenter Roeck <guenter.roeck@ericsson.com>
9 * Sören Brinkmann <soren.brinkmann@xilinx.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
22 #include <linux/clk.h>
23 #include <linux/clk-provider.h>
24 #include <linux/delay.h>
25 #include <linux/module.h>
26 #include <linux/i2c.h>
27 #include <linux/regmap.h>
28 #include <linux/slab.h>
31 #define SI570_REG_HS_N1 7
32 #define SI570_REG_N1_RFREQ0 8
33 #define SI570_REG_RFREQ1 9
34 #define SI570_REG_RFREQ2 10
35 #define SI570_REG_RFREQ3 11
36 #define SI570_REG_RFREQ4 12
37 #define SI570_REG_CONTROL 135
38 #define SI570_REG_FREEZE_DCO 137
39 #define SI570_DIV_OFFSET_7PPM 6
41 #define HS_DIV_SHIFT 5
42 #define HS_DIV_MASK 0xe0
43 #define HS_DIV_OFFSET 4
44 #define N1_6_2_MASK 0x1f
45 #define N1_1_0_MASK 0xc0
46 #define RFREQ_37_32_MASK 0x3f
48 #define SI570_MIN_FREQ 10000000L
49 #define SI570_MAX_FREQ 1417500000L
50 #define SI598_MAX_FREQ 525000000L
52 #define FDCO_MIN 4850000000LL
53 #define FDCO_MAX 5670000000LL
55 #define SI570_CNTRL_RECALL (1 << 0)
56 #define SI570_CNTRL_FREEZE_M (1 << 5)
57 #define SI570_CNTRL_NEWFREQ (1 << 6)
59 #define SI570_FREEZE_DCO (1 << 4)
63 * @hw: Clock hw struct
64 * @regmap: Device's regmap
65 * @div_offset: Rgister offset for dividers
66 * @max_freq: Maximum frequency for this device
67 * @fxtal: Factory xtal frequency
68 * @n1: Clock divider N1
69 * @hs_div: Clock divider HSDIV
70 * @rfreq: Clock multiplier RFREQ
71 * @frequency: Current output frequency
72 * @i2c_client: I2C client pointer
76 struct regmap
*regmap
;
77 unsigned int div_offset
;
84 struct i2c_client
*i2c_client
;
86 #define to_clk_si570(_hw) container_of(_hw, struct clk_si570, hw)
88 enum clk_si570_variant
{
94 * si570_get_divs() - Read clock dividers from HW
95 * @data: Pointer to struct clk_si570
96 * @rfreq: Fractional multiplier (output)
97 * @n1: Divider N1 (output)
98 * @hs_div: Divider HSDIV (output)
99 * Returns 0 on success, negative errno otherwise.
101 * Retrieve clock dividers and multipliers from the HW.
103 static int si570_get_divs(struct clk_si570
*data
, u64
*rfreq
,
104 unsigned int *n1
, unsigned int *hs_div
)
110 err
= regmap_bulk_read(data
->regmap
, SI570_REG_HS_N1
+ data
->div_offset
,
111 reg
, ARRAY_SIZE(reg
));
115 *hs_div
= ((reg
[0] & HS_DIV_MASK
) >> HS_DIV_SHIFT
) + HS_DIV_OFFSET
;
116 *n1
= ((reg
[0] & N1_6_2_MASK
) << 2) + ((reg
[1] & N1_1_0_MASK
) >> 6) + 1;
117 /* Handle invalid cases */
121 tmp
= reg
[1] & RFREQ_37_32_MASK
;
122 tmp
= (tmp
<< 8) + reg
[2];
123 tmp
= (tmp
<< 8) + reg
[3];
124 tmp
= (tmp
<< 8) + reg
[4];
125 tmp
= (tmp
<< 8) + reg
[5];
132 * si570_get_defaults() - Get default values
133 * @data: Driver data structure
134 * @fout: Factory frequency output
135 * Returns 0 on success, negative errno otherwise.
137 static int si570_get_defaults(struct clk_si570
*data
, u64 fout
)
142 regmap_write(data
->regmap
, SI570_REG_CONTROL
, SI570_CNTRL_RECALL
);
144 err
= si570_get_divs(data
, &data
->rfreq
, &data
->n1
, &data
->hs_div
);
149 * Accept optional precision loss to avoid arithmetic overflows.
150 * Acceptable per Silicon Labs Application Note AN334.
152 fdco
= fout
* data
->n1
* data
->hs_div
;
153 if (fdco
>= (1LL << 36))
154 data
->fxtal
= div64_u64(fdco
<< 24, data
->rfreq
>> 4);
156 data
->fxtal
= div64_u64(fdco
<< 28, data
->rfreq
);
158 data
->frequency
= fout
;
164 * si570_update_rfreq() - Update clock multiplier
165 * @data: Driver data structure
166 * Passes on regmap_bulk_write() return value.
168 static int si570_update_rfreq(struct clk_si570
*data
)
172 reg
[0] = ((data
->n1
- 1) << 6) |
173 ((data
->rfreq
>> 32) & RFREQ_37_32_MASK
);
174 reg
[1] = (data
->rfreq
>> 24) & 0xff;
175 reg
[2] = (data
->rfreq
>> 16) & 0xff;
176 reg
[3] = (data
->rfreq
>> 8) & 0xff;
177 reg
[4] = data
->rfreq
& 0xff;
179 return regmap_bulk_write(data
->regmap
, SI570_REG_N1_RFREQ0
+
180 data
->div_offset
, reg
, ARRAY_SIZE(reg
));
184 * si570_calc_divs() - Caluclate clock dividers
185 * @frequency: Target frequency
186 * @data: Driver data structure
187 * @out_rfreq: RFREG fractional multiplier (output)
188 * @out_n1: Clock divider N1 (output)
189 * @out_hs_div: Clock divider HSDIV (output)
190 * Returns 0 on success, negative errno otherwise.
192 * Calculate the clock dividers (@out_hs_div, @out_n1) and clock multiplier
193 * (@out_rfreq) for a given target @frequency.
195 static int si570_calc_divs(unsigned long frequency
, struct clk_si570
*data
,
196 u64
*out_rfreq
, unsigned int *out_n1
, unsigned int *out_hs_div
)
199 unsigned int n1
, hs_div
;
200 u64 fdco
, best_fdco
= ULLONG_MAX
;
201 static const uint8_t si570_hs_div_values
[] = { 11, 9, 7, 6, 5, 4 };
203 for (i
= 0; i
< ARRAY_SIZE(si570_hs_div_values
); i
++) {
204 hs_div
= si570_hs_div_values
[i
];
205 /* Calculate lowest possible value for n1 */
206 n1
= div_u64(div_u64(FDCO_MIN
, hs_div
), frequency
);
210 fdco
= (u64
)frequency
* (u64
)hs_div
* (u64
)n1
;
213 if (fdco
>= FDCO_MIN
&& fdco
< best_fdco
) {
215 *out_hs_div
= hs_div
;
216 *out_rfreq
= div64_u64(fdco
<< 28, data
->fxtal
);
219 n1
+= (n1
== 1 ? 1 : 2);
223 if (best_fdco
== ULLONG_MAX
)
229 static unsigned long si570_recalc_rate(struct clk_hw
*hw
,
230 unsigned long parent_rate
)
234 unsigned int n1
, hs_div
;
235 struct clk_si570
*data
= to_clk_si570(hw
);
237 err
= si570_get_divs(data
, &rfreq
, &n1
, &hs_div
);
239 dev_err(&data
->i2c_client
->dev
, "unable to recalc rate\n");
240 return data
->frequency
;
243 rfreq
= div_u64(rfreq
, hs_div
* n1
);
244 rate
= (data
->fxtal
* rfreq
) >> 28;
249 static long si570_round_rate(struct clk_hw
*hw
, unsigned long rate
,
250 unsigned long *parent_rate
)
254 unsigned int n1
, hs_div
;
255 struct clk_si570
*data
= to_clk_si570(hw
);
260 if (div64_u64(abs(rate
- data
->frequency
) * 10000LL,
261 data
->frequency
) < 35) {
262 rfreq
= div64_u64((data
->rfreq
* rate
) +
263 div64_u64(data
->frequency
, 2), data
->frequency
);
265 hs_div
= data
->hs_div
;
268 err
= si570_calc_divs(rate
, data
, &rfreq
, &n1
, &hs_div
);
270 dev_err(&data
->i2c_client
->dev
,
271 "unable to round rate\n");
280 * si570_set_frequency() - Adjust output frequency
281 * @data: Driver data structure
282 * @frequency: Target frequency
283 * Returns 0 on success.
285 * Update output frequency for big frequency changes (> 3,500 ppm).
287 static int si570_set_frequency(struct clk_si570
*data
, unsigned long frequency
)
291 err
= si570_calc_divs(frequency
, data
, &data
->rfreq
, &data
->n1
,
297 * The DCO reg should be accessed with a read-modify-write operation
300 regmap_write(data
->regmap
, SI570_REG_FREEZE_DCO
, SI570_FREEZE_DCO
);
301 regmap_write(data
->regmap
, SI570_REG_HS_N1
+ data
->div_offset
,
302 ((data
->hs_div
- HS_DIV_OFFSET
) << HS_DIV_SHIFT
) |
303 (((data
->n1
- 1) >> 2) & N1_6_2_MASK
));
304 si570_update_rfreq(data
);
305 regmap_write(data
->regmap
, SI570_REG_FREEZE_DCO
, 0);
306 regmap_write(data
->regmap
, SI570_REG_CONTROL
, SI570_CNTRL_NEWFREQ
);
308 /* Applying a new frequency can take up to 10ms */
309 usleep_range(10000, 12000);
315 * si570_set_frequency_small() - Adjust output frequency
316 * @data: Driver data structure
317 * @frequency: Target frequency
318 * Returns 0 on success.
320 * Update output frequency for small frequency changes (< 3,500 ppm).
322 static int si570_set_frequency_small(struct clk_si570
*data
,
323 unsigned long frequency
)
326 * This is a re-implementation of DIV_ROUND_CLOSEST
327 * using the div64_u64 function lieu of letting the compiler
330 data
->rfreq
= div64_u64((data
->rfreq
* frequency
) +
331 div_u64(data
->frequency
, 2), data
->frequency
);
332 regmap_write(data
->regmap
, SI570_REG_CONTROL
, SI570_CNTRL_FREEZE_M
);
333 si570_update_rfreq(data
);
334 regmap_write(data
->regmap
, SI570_REG_CONTROL
, 0);
336 /* Applying a new frequency (small change) can take up to 100us */
337 usleep_range(100, 200);
342 static int si570_set_rate(struct clk_hw
*hw
, unsigned long rate
,
343 unsigned long parent_rate
)
345 struct clk_si570
*data
= to_clk_si570(hw
);
346 struct i2c_client
*client
= data
->i2c_client
;
349 if (rate
< SI570_MIN_FREQ
|| rate
> data
->max_freq
) {
350 dev_err(&client
->dev
,
351 "requested frequency %lu Hz is out of range\n", rate
);
355 if (div64_u64(abs(rate
- data
->frequency
) * 10000LL,
356 data
->frequency
) < 35)
357 err
= si570_set_frequency_small(data
, rate
);
359 err
= si570_set_frequency(data
, rate
);
364 data
->frequency
= rate
;
369 static const struct clk_ops si570_clk_ops
= {
370 .recalc_rate
= si570_recalc_rate
,
371 .round_rate
= si570_round_rate
,
372 .set_rate
= si570_set_rate
,
375 static bool si570_regmap_is_volatile(struct device
*dev
, unsigned int reg
)
378 case SI570_REG_CONTROL
:
385 static bool si570_regmap_is_writeable(struct device
*dev
, unsigned int reg
)
388 case SI570_REG_HS_N1
... (SI570_REG_RFREQ4
+ SI570_DIV_OFFSET_7PPM
):
389 case SI570_REG_CONTROL
:
390 case SI570_REG_FREEZE_DCO
:
397 static const struct regmap_config si570_regmap_config
= {
400 .cache_type
= REGCACHE_RBTREE
,
402 .writeable_reg
= si570_regmap_is_writeable
,
403 .volatile_reg
= si570_regmap_is_volatile
,
406 static int si570_probe(struct i2c_client
*client
,
407 const struct i2c_device_id
*id
)
409 struct clk_si570
*data
;
410 struct clk_init_data init
;
411 u32 initial_fout
, factory_fout
, stability
;
413 enum clk_si570_variant variant
= id
->driver_data
;
415 data
= devm_kzalloc(&client
->dev
, sizeof(*data
), GFP_KERNEL
);
419 init
.ops
= &si570_clk_ops
;
421 init
.num_parents
= 0;
422 data
->hw
.init
= &init
;
423 data
->i2c_client
= client
;
425 if (variant
== si57x
) {
426 err
= of_property_read_u32(client
->dev
.of_node
,
427 "temperature-stability", &stability
);
429 dev_err(&client
->dev
,
430 "'temperature-stability' property missing\n");
433 /* adjust register offsets for 7ppm devices */
435 data
->div_offset
= SI570_DIV_OFFSET_7PPM
;
437 data
->max_freq
= SI570_MAX_FREQ
;
439 data
->max_freq
= SI598_MAX_FREQ
;
442 if (of_property_read_string(client
->dev
.of_node
, "clock-output-names",
444 init
.name
= client
->dev
.of_node
->name
;
446 err
= of_property_read_u32(client
->dev
.of_node
, "factory-fout",
449 dev_err(&client
->dev
, "'factory-fout' property missing\n");
453 data
->regmap
= devm_regmap_init_i2c(client
, &si570_regmap_config
);
454 if (IS_ERR(data
->regmap
)) {
455 dev_err(&client
->dev
, "failed to allocate register map\n");
456 return PTR_ERR(data
->regmap
);
459 i2c_set_clientdata(client
, data
);
460 err
= si570_get_defaults(data
, factory_fout
);
464 err
= devm_clk_hw_register(&client
->dev
, &data
->hw
);
466 dev_err(&client
->dev
, "clock registration failed\n");
469 err
= of_clk_add_hw_provider(client
->dev
.of_node
, of_clk_hw_simple_get
,
472 dev_err(&client
->dev
, "unable to add clk provider\n");
476 /* Read the requested initial output frequency from device tree */
477 if (!of_property_read_u32(client
->dev
.of_node
, "clock-frequency",
479 err
= clk_set_rate(data
->hw
.clk
, initial_fout
);
481 of_clk_del_provider(client
->dev
.of_node
);
486 /* Display a message indicating that we've successfully registered */
487 dev_info(&client
->dev
, "registered, current frequency %llu Hz\n",
493 static int si570_remove(struct i2c_client
*client
)
495 of_clk_del_provider(client
->dev
.of_node
);
499 static const struct i2c_device_id si570_id
[] = {
506 MODULE_DEVICE_TABLE(i2c
, si570_id
);
508 static const struct of_device_id clk_si570_of_match
[] = {
509 { .compatible
= "silabs,si570" },
510 { .compatible
= "silabs,si571" },
511 { .compatible
= "silabs,si598" },
512 { .compatible
= "silabs,si599" },
515 MODULE_DEVICE_TABLE(of
, clk_si570_of_match
);
517 static struct i2c_driver si570_driver
= {
520 .of_match_table
= clk_si570_of_match
,
522 .probe
= si570_probe
,
523 .remove
= si570_remove
,
524 .id_table
= si570_id
,
526 module_i2c_driver(si570_driver
);
528 MODULE_AUTHOR("Guenter Roeck <guenter.roeck@ericsson.com>");
529 MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>");
530 MODULE_DESCRIPTION("Si570 driver");
531 MODULE_LICENSE("GPL");