2 * rt5645.c -- RT5645 ALSA SoC audio codec driver
4 * Copyright 2013 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/gpio.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/acpi.h>
23 #include <linux/dmi.h>
24 #include <sound/core.h>
25 #include <sound/pcm.h>
26 #include <sound/pcm_params.h>
27 #include <sound/jack.h>
28 #include <sound/soc.h>
29 #include <sound/soc-dapm.h>
30 #include <sound/initval.h>
31 #include <sound/tlv.h>
36 #define RT5645_DEVICE_ID 0x6308
37 #define RT5650_DEVICE_ID 0x6419
39 #define RT5645_PR_RANGE_BASE (0xff + 1)
40 #define RT5645_PR_SPACING 0x100
42 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
44 static const struct regmap_range_cfg rt5645_ranges
[] = {
47 .range_min
= RT5645_PR_BASE
,
48 .range_max
= RT5645_PR_BASE
+ 0xf8,
49 .selector_reg
= RT5645_PRIV_INDEX
,
50 .selector_mask
= 0xff,
51 .selector_shift
= 0x0,
52 .window_start
= RT5645_PRIV_DATA
,
57 static const struct reg_default init_list
[] = {
58 {RT5645_PR_BASE
+ 0x3d, 0x3600},
59 {RT5645_PR_BASE
+ 0x1c, 0xfd20},
60 {RT5645_PR_BASE
+ 0x20, 0x611f},
61 {RT5645_PR_BASE
+ 0x21, 0x4040},
62 {RT5645_PR_BASE
+ 0x23, 0x0004},
64 #define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list)
66 static const struct reg_default rt5650_init_list
[] = {
70 static const struct reg_default rt5645_reg
[] = {
226 static int rt5645_reset(struct snd_soc_codec
*codec
)
228 return snd_soc_write(codec
, RT5645_RESET
, 0);
231 static bool rt5645_volatile_register(struct device
*dev
, unsigned int reg
)
235 for (i
= 0; i
< ARRAY_SIZE(rt5645_ranges
); i
++) {
236 if (reg
>= rt5645_ranges
[i
].range_min
&&
237 reg
<= rt5645_ranges
[i
].range_max
) {
244 case RT5645_PRIV_DATA
:
245 case RT5645_IN1_CTRL1
:
246 case RT5645_IN1_CTRL2
:
247 case RT5645_IN1_CTRL3
:
248 case RT5645_A_JD_CTRL1
:
249 case RT5645_ADC_EQ_CTRL1
:
250 case RT5645_EQ_CTRL1
:
251 case RT5645_ALC_CTRL_1
:
252 case RT5645_IRQ_CTRL2
:
253 case RT5645_IRQ_CTRL3
:
254 case RT5645_INT_IRQ_ST
:
256 case RT5650_4BTN_IL_CMD1
:
257 case RT5645_VENDOR_ID
:
258 case RT5645_VENDOR_ID1
:
259 case RT5645_VENDOR_ID2
:
266 static bool rt5645_readable_register(struct device
*dev
, unsigned int reg
)
270 for (i
= 0; i
< ARRAY_SIZE(rt5645_ranges
); i
++) {
271 if (reg
>= rt5645_ranges
[i
].range_min
&&
272 reg
<= rt5645_ranges
[i
].range_max
) {
282 case RT5645_IN1_CTRL1
:
283 case RT5645_IN1_CTRL2
:
284 case RT5645_IN1_CTRL3
:
285 case RT5645_IN2_CTRL
:
286 case RT5645_INL1_INR1_VOL
:
287 case RT5645_SPK_FUNC_LIM
:
288 case RT5645_ADJ_HPF_CTRL
:
289 case RT5645_DAC1_DIG_VOL
:
290 case RT5645_DAC2_DIG_VOL
:
291 case RT5645_DAC_CTRL
:
292 case RT5645_STO1_ADC_DIG_VOL
:
293 case RT5645_MONO_ADC_DIG_VOL
:
294 case RT5645_ADC_BST_VOL1
:
295 case RT5645_ADC_BST_VOL2
:
296 case RT5645_STO1_ADC_MIXER
:
297 case RT5645_MONO_ADC_MIXER
:
298 case RT5645_AD_DA_MIXER
:
299 case RT5645_STO_DAC_MIXER
:
300 case RT5645_MONO_DAC_MIXER
:
301 case RT5645_DIG_MIXER
:
302 case RT5650_A_DAC_SOUR
:
303 case RT5645_DIG_INF1_DATA
:
304 case RT5645_PDM_OUT_CTRL
:
305 case RT5645_REC_L1_MIXER
:
306 case RT5645_REC_L2_MIXER
:
307 case RT5645_REC_R1_MIXER
:
308 case RT5645_REC_R2_MIXER
:
309 case RT5645_HPMIXL_CTRL
:
310 case RT5645_HPOMIXL_CTRL
:
311 case RT5645_HPMIXR_CTRL
:
312 case RT5645_HPOMIXR_CTRL
:
313 case RT5645_HPO_MIXER
:
314 case RT5645_SPK_L_MIXER
:
315 case RT5645_SPK_R_MIXER
:
316 case RT5645_SPO_MIXER
:
317 case RT5645_SPO_CLSD_RATIO
:
318 case RT5645_OUT_L1_MIXER
:
319 case RT5645_OUT_R1_MIXER
:
320 case RT5645_OUT_L_GAIN1
:
321 case RT5645_OUT_L_GAIN2
:
322 case RT5645_OUT_R_GAIN1
:
323 case RT5645_OUT_R_GAIN2
:
324 case RT5645_LOUT_MIXER
:
325 case RT5645_HAPTIC_CTRL1
:
326 case RT5645_HAPTIC_CTRL2
:
327 case RT5645_HAPTIC_CTRL3
:
328 case RT5645_HAPTIC_CTRL4
:
329 case RT5645_HAPTIC_CTRL5
:
330 case RT5645_HAPTIC_CTRL6
:
331 case RT5645_HAPTIC_CTRL7
:
332 case RT5645_HAPTIC_CTRL8
:
333 case RT5645_HAPTIC_CTRL9
:
334 case RT5645_HAPTIC_CTRL10
:
335 case RT5645_PWR_DIG1
:
336 case RT5645_PWR_DIG2
:
337 case RT5645_PWR_ANLG1
:
338 case RT5645_PWR_ANLG2
:
339 case RT5645_PWR_MIXER
:
341 case RT5645_PRIV_INDEX
:
342 case RT5645_PRIV_DATA
:
343 case RT5645_I2S1_SDP
:
344 case RT5645_I2S2_SDP
:
345 case RT5645_ADDA_CLK1
:
346 case RT5645_ADDA_CLK2
:
347 case RT5645_DMIC_CTRL1
:
348 case RT5645_DMIC_CTRL2
:
349 case RT5645_TDM_CTRL_1
:
350 case RT5645_TDM_CTRL_2
:
351 case RT5645_TDM_CTRL_3
:
352 case RT5650_TDM_CTRL_4
:
354 case RT5645_PLL_CTRL1
:
355 case RT5645_PLL_CTRL2
:
360 case RT5645_DEPOP_M1
:
361 case RT5645_DEPOP_M2
:
362 case RT5645_DEPOP_M3
:
364 case RT5645_A_JD_CTRL1
:
365 case RT5645_VAD_CTRL4
:
366 case RT5645_CLSD_OUT_CTRL
:
367 case RT5645_ADC_EQ_CTRL1
:
368 case RT5645_ADC_EQ_CTRL2
:
369 case RT5645_EQ_CTRL1
:
370 case RT5645_EQ_CTRL2
:
371 case RT5645_ALC_CTRL_1
:
372 case RT5645_ALC_CTRL_2
:
373 case RT5645_ALC_CTRL_3
:
374 case RT5645_ALC_CTRL_4
:
375 case RT5645_ALC_CTRL_5
:
377 case RT5645_IRQ_CTRL1
:
378 case RT5645_IRQ_CTRL2
:
379 case RT5645_IRQ_CTRL3
:
380 case RT5645_INT_IRQ_ST
:
381 case RT5645_GPIO_CTRL1
:
382 case RT5645_GPIO_CTRL2
:
383 case RT5645_GPIO_CTRL3
:
384 case RT5645_BASS_BACK
:
385 case RT5645_MP3_PLUS1
:
386 case RT5645_MP3_PLUS2
:
387 case RT5645_ADJ_HPF1
:
388 case RT5645_ADJ_HPF2
:
389 case RT5645_HP_CALIB_AMP_DET
:
395 case RT5650_4BTN_IL_CMD1
:
396 case RT5650_4BTN_IL_CMD2
:
397 case RT5645_DRC1_HL_CTRL1
:
398 case RT5645_DRC2_HL_CTRL1
:
399 case RT5645_ADC_MONO_HP_CTRL1
:
400 case RT5645_ADC_MONO_HP_CTRL2
:
401 case RT5645_DRC2_CTRL1
:
402 case RT5645_DRC2_CTRL2
:
403 case RT5645_DRC2_CTRL3
:
404 case RT5645_DRC2_CTRL4
:
405 case RT5645_DRC2_CTRL5
:
406 case RT5645_JD_CTRL3
:
407 case RT5645_JD_CTRL4
:
408 case RT5645_GEN_CTRL1
:
409 case RT5645_GEN_CTRL2
:
410 case RT5645_GEN_CTRL3
:
411 case RT5645_VENDOR_ID
:
412 case RT5645_VENDOR_ID1
:
413 case RT5645_VENDOR_ID2
:
420 static const DECLARE_TLV_DB_SCALE(out_vol_tlv
, -4650, 150, 0);
421 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv
, -6525, 75, 0);
422 static const DECLARE_TLV_DB_SCALE(in_vol_tlv
, -3450, 150, 0);
423 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv
, -1725, 75, 0);
424 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv
, 0, 1200, 0);
426 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
427 static unsigned int bst_tlv
[] = {
428 TLV_DB_RANGE_HEAD(7),
429 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
430 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
431 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
432 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
433 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
434 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
435 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
438 static const struct snd_kcontrol_new rt5645_snd_controls
[] = {
439 /* Speaker Output Volume */
440 SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL
,
441 RT5645_VOL_L_SFT
, RT5645_VOL_R_SFT
, 1, 1),
442 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5645_SPK_VOL
,
443 RT5645_L_VOL_SFT
, RT5645_R_VOL_SFT
, 39, 1, out_vol_tlv
),
445 /* Headphone Output Volume */
446 SOC_DOUBLE("Headphone Channel Switch", RT5645_HP_VOL
,
447 RT5645_VOL_L_SFT
, RT5645_VOL_R_SFT
, 1, 1),
448 SOC_DOUBLE_TLV("Headphone Playback Volume", RT5645_HP_VOL
,
449 RT5645_L_VOL_SFT
, RT5645_R_VOL_SFT
, 39, 1, out_vol_tlv
),
452 SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1
,
453 RT5645_L_MUTE_SFT
, RT5645_R_MUTE_SFT
, 1, 1),
454 SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1
,
455 RT5645_VOL_L_SFT
, RT5645_VOL_R_SFT
, 1, 1),
456 SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1
,
457 RT5645_L_VOL_SFT
, RT5645_R_VOL_SFT
, 39, 1, out_vol_tlv
),
459 /* DAC Digital Volume */
460 SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL
,
461 RT5645_M_DAC_L2_VOL_SFT
, RT5645_M_DAC_R2_VOL_SFT
, 1, 1),
462 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL
,
463 RT5645_L_VOL_SFT
+ 1, RT5645_R_VOL_SFT
+ 1, 87, 0, dac_vol_tlv
),
464 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL
,
465 RT5645_L_VOL_SFT
+ 1, RT5645_R_VOL_SFT
+ 1, 87, 0, dac_vol_tlv
),
467 /* IN1/IN2 Control */
468 SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1
,
469 RT5645_BST_SFT1
, 8, 0, bst_tlv
),
470 SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL
,
471 RT5645_BST_SFT2
, 8, 0, bst_tlv
),
473 /* INL/INR Volume Control */
474 SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL
,
475 RT5645_INL_VOL_SFT
, RT5645_INR_VOL_SFT
, 31, 1, in_vol_tlv
),
477 /* ADC Digital Volume Control */
478 SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL
,
479 RT5645_L_MUTE_SFT
, RT5645_R_MUTE_SFT
, 1, 1),
480 SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL
,
481 RT5645_L_VOL_SFT
+ 1, RT5645_R_VOL_SFT
+ 1, 63, 0, adc_vol_tlv
),
482 SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL
,
483 RT5645_L_MUTE_SFT
, RT5645_R_MUTE_SFT
, 1, 1),
484 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL
,
485 RT5645_L_VOL_SFT
+ 1, RT5645_R_VOL_SFT
+ 1, 63, 0, adc_vol_tlv
),
487 /* ADC Boost Volume Control */
488 SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5645_ADC_BST_VOL1
,
489 RT5645_STO1_ADC_L_BST_SFT
, RT5645_STO1_ADC_R_BST_SFT
, 3, 0,
491 SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5645_ADC_BST_VOL1
,
492 RT5645_STO2_ADC_L_BST_SFT
, RT5645_STO2_ADC_R_BST_SFT
, 3, 0,
495 /* I2S2 function select */
496 SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1
, RT5645_I2S2_SEL_SFT
,
501 * set_dmic_clk - Set parameter of dmic.
504 * @kcontrol: The kcontrol of this widget.
508 static int set_dmic_clk(struct snd_soc_dapm_widget
*w
,
509 struct snd_kcontrol
*kcontrol
, int event
)
511 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
512 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
515 idx
= rl6231_calc_dmic_clk(rt5645
->sysclk
);
518 dev_err(codec
->dev
, "Failed to set DMIC clock\n");
520 snd_soc_update_bits(codec
, RT5645_DMIC_CTRL1
,
521 RT5645_DMIC_CLK_MASK
, idx
<< RT5645_DMIC_CLK_SFT
);
525 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget
*source
,
526 struct snd_soc_dapm_widget
*sink
)
528 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(source
->dapm
);
531 val
= snd_soc_read(codec
, RT5645_GLB_CLK
);
532 val
&= RT5645_SCLK_SRC_MASK
;
533 if (val
== RT5645_SCLK_SRC_PLL1
)
539 static int is_using_asrc(struct snd_soc_dapm_widget
*source
,
540 struct snd_soc_dapm_widget
*sink
)
542 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(source
->dapm
);
543 unsigned int reg
, shift
, val
;
545 switch (source
->shift
) {
574 val
= (snd_soc_read(codec
, reg
) >> shift
) & 0xf;
588 * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
589 * @codec: SoC audio codec device.
590 * @filter_mask: mask of filters.
591 * @clk_src: clock source
593 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
594 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
595 * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
596 * ASRC function will track i2s clock and generate a corresponding system clock
597 * for codec. This function provides an API to select the clock source for a
598 * set of filters specified by the mask. And the codec driver will turn on ASRC
599 * for these filters if ASRC is selected as their clock source.
601 int rt5645_sel_asrc_clk_src(struct snd_soc_codec
*codec
,
602 unsigned int filter_mask
, unsigned int clk_src
)
604 unsigned int asrc2_mask
= 0;
605 unsigned int asrc2_value
= 0;
606 unsigned int asrc3_mask
= 0;
607 unsigned int asrc3_value
= 0;
610 case RT5645_CLK_SEL_SYS
:
611 case RT5645_CLK_SEL_I2S1_ASRC
:
612 case RT5645_CLK_SEL_I2S2_ASRC
:
613 case RT5645_CLK_SEL_SYS2
:
620 if (filter_mask
& RT5645_DA_STEREO_FILTER
) {
621 asrc2_mask
|= RT5645_DA_STO_CLK_SEL_MASK
;
622 asrc2_value
= (asrc2_value
& ~RT5645_DA_STO_CLK_SEL_MASK
)
623 | (clk_src
<< RT5645_DA_STO_CLK_SEL_SFT
);
626 if (filter_mask
& RT5645_DA_MONO_L_FILTER
) {
627 asrc2_mask
|= RT5645_DA_MONOL_CLK_SEL_MASK
;
628 asrc2_value
= (asrc2_value
& ~RT5645_DA_MONOL_CLK_SEL_MASK
)
629 | (clk_src
<< RT5645_DA_MONOL_CLK_SEL_SFT
);
632 if (filter_mask
& RT5645_DA_MONO_R_FILTER
) {
633 asrc2_mask
|= RT5645_DA_MONOR_CLK_SEL_MASK
;
634 asrc2_value
= (asrc2_value
& ~RT5645_DA_MONOR_CLK_SEL_MASK
)
635 | (clk_src
<< RT5645_DA_MONOR_CLK_SEL_SFT
);
638 if (filter_mask
& RT5645_AD_STEREO_FILTER
) {
639 asrc2_mask
|= RT5645_AD_STO1_CLK_SEL_MASK
;
640 asrc2_value
= (asrc2_value
& ~RT5645_AD_STO1_CLK_SEL_MASK
)
641 | (clk_src
<< RT5645_AD_STO1_CLK_SEL_SFT
);
644 if (filter_mask
& RT5645_AD_MONO_L_FILTER
) {
645 asrc3_mask
|= RT5645_AD_MONOL_CLK_SEL_MASK
;
646 asrc3_value
= (asrc3_value
& ~RT5645_AD_MONOL_CLK_SEL_MASK
)
647 | (clk_src
<< RT5645_AD_MONOL_CLK_SEL_SFT
);
650 if (filter_mask
& RT5645_AD_MONO_R_FILTER
) {
651 asrc3_mask
|= RT5645_AD_MONOR_CLK_SEL_MASK
;
652 asrc3_value
= (asrc3_value
& ~RT5645_AD_MONOR_CLK_SEL_MASK
)
653 | (clk_src
<< RT5645_AD_MONOR_CLK_SEL_SFT
);
657 snd_soc_update_bits(codec
, RT5645_ASRC_2
,
658 asrc2_mask
, asrc2_value
);
661 snd_soc_update_bits(codec
, RT5645_ASRC_3
,
662 asrc3_mask
, asrc3_value
);
666 EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src
);
669 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix
[] = {
670 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER
,
671 RT5645_M_ADC_L1_SFT
, 1, 1),
672 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER
,
673 RT5645_M_ADC_L2_SFT
, 1, 1),
676 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix
[] = {
677 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER
,
678 RT5645_M_ADC_R1_SFT
, 1, 1),
679 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER
,
680 RT5645_M_ADC_R2_SFT
, 1, 1),
683 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix
[] = {
684 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER
,
685 RT5645_M_MONO_ADC_L1_SFT
, 1, 1),
686 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER
,
687 RT5645_M_MONO_ADC_L2_SFT
, 1, 1),
690 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix
[] = {
691 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER
,
692 RT5645_M_MONO_ADC_R1_SFT
, 1, 1),
693 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER
,
694 RT5645_M_MONO_ADC_R2_SFT
, 1, 1),
697 static const struct snd_kcontrol_new rt5645_dac_l_mix
[] = {
698 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER
,
699 RT5645_M_ADCMIX_L_SFT
, 1, 1),
700 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER
,
701 RT5645_M_DAC1_L_SFT
, 1, 1),
704 static const struct snd_kcontrol_new rt5645_dac_r_mix
[] = {
705 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER
,
706 RT5645_M_ADCMIX_R_SFT
, 1, 1),
707 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER
,
708 RT5645_M_DAC1_R_SFT
, 1, 1),
711 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix
[] = {
712 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER
,
713 RT5645_M_DAC_L1_SFT
, 1, 1),
714 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER
,
715 RT5645_M_DAC_L2_SFT
, 1, 1),
716 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER
,
717 RT5645_M_DAC_R1_STO_L_SFT
, 1, 1),
720 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix
[] = {
721 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER
,
722 RT5645_M_DAC_R1_SFT
, 1, 1),
723 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER
,
724 RT5645_M_DAC_R2_SFT
, 1, 1),
725 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER
,
726 RT5645_M_DAC_L1_STO_R_SFT
, 1, 1),
729 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix
[] = {
730 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER
,
731 RT5645_M_DAC_L1_MONO_L_SFT
, 1, 1),
732 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER
,
733 RT5645_M_DAC_L2_MONO_L_SFT
, 1, 1),
734 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER
,
735 RT5645_M_DAC_R2_MONO_L_SFT
, 1, 1),
738 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix
[] = {
739 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER
,
740 RT5645_M_DAC_R1_MONO_R_SFT
, 1, 1),
741 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER
,
742 RT5645_M_DAC_R2_MONO_R_SFT
, 1, 1),
743 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER
,
744 RT5645_M_DAC_L2_MONO_R_SFT
, 1, 1),
747 static const struct snd_kcontrol_new rt5645_dig_l_mix
[] = {
748 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER
,
749 RT5645_M_STO_L_DAC_L_SFT
, 1, 1),
750 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER
,
751 RT5645_M_DAC_L2_DAC_L_SFT
, 1, 1),
752 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER
,
753 RT5645_M_DAC_R2_DAC_L_SFT
, 1, 1),
756 static const struct snd_kcontrol_new rt5645_dig_r_mix
[] = {
757 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER
,
758 RT5645_M_STO_R_DAC_R_SFT
, 1, 1),
759 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER
,
760 RT5645_M_DAC_R2_DAC_R_SFT
, 1, 1),
761 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER
,
762 RT5645_M_DAC_L2_DAC_R_SFT
, 1, 1),
765 /* Analog Input Mixer */
766 static const struct snd_kcontrol_new rt5645_rec_l_mix
[] = {
767 SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER
,
768 RT5645_M_HP_L_RM_L_SFT
, 1, 1),
769 SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER
,
770 RT5645_M_IN_L_RM_L_SFT
, 1, 1),
771 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER
,
772 RT5645_M_BST2_RM_L_SFT
, 1, 1),
773 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER
,
774 RT5645_M_BST1_RM_L_SFT
, 1, 1),
775 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER
,
776 RT5645_M_OM_L_RM_L_SFT
, 1, 1),
779 static const struct snd_kcontrol_new rt5645_rec_r_mix
[] = {
780 SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER
,
781 RT5645_M_HP_R_RM_R_SFT
, 1, 1),
782 SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER
,
783 RT5645_M_IN_R_RM_R_SFT
, 1, 1),
784 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER
,
785 RT5645_M_BST2_RM_R_SFT
, 1, 1),
786 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER
,
787 RT5645_M_BST1_RM_R_SFT
, 1, 1),
788 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER
,
789 RT5645_M_OM_R_RM_R_SFT
, 1, 1),
792 static const struct snd_kcontrol_new rt5645_spk_l_mix
[] = {
793 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER
,
794 RT5645_M_DAC_L1_SM_L_SFT
, 1, 1),
795 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER
,
796 RT5645_M_DAC_L2_SM_L_SFT
, 1, 1),
797 SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER
,
798 RT5645_M_IN_L_SM_L_SFT
, 1, 1),
799 SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER
,
800 RT5645_M_BST1_L_SM_L_SFT
, 1, 1),
803 static const struct snd_kcontrol_new rt5645_spk_r_mix
[] = {
804 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER
,
805 RT5645_M_DAC_R1_SM_R_SFT
, 1, 1),
806 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER
,
807 RT5645_M_DAC_R2_SM_R_SFT
, 1, 1),
808 SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER
,
809 RT5645_M_IN_R_SM_R_SFT
, 1, 1),
810 SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER
,
811 RT5645_M_BST2_R_SM_R_SFT
, 1, 1),
814 static const struct snd_kcontrol_new rt5645_out_l_mix
[] = {
815 SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER
,
816 RT5645_M_BST1_OM_L_SFT
, 1, 1),
817 SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER
,
818 RT5645_M_IN_L_OM_L_SFT
, 1, 1),
819 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER
,
820 RT5645_M_DAC_L2_OM_L_SFT
, 1, 1),
821 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER
,
822 RT5645_M_DAC_L1_OM_L_SFT
, 1, 1),
825 static const struct snd_kcontrol_new rt5645_out_r_mix
[] = {
826 SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER
,
827 RT5645_M_BST2_OM_R_SFT
, 1, 1),
828 SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER
,
829 RT5645_M_IN_R_OM_R_SFT
, 1, 1),
830 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER
,
831 RT5645_M_DAC_R2_OM_R_SFT
, 1, 1),
832 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER
,
833 RT5645_M_DAC_R1_OM_R_SFT
, 1, 1),
836 static const struct snd_kcontrol_new rt5645_spo_l_mix
[] = {
837 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER
,
838 RT5645_M_DAC_R1_SPM_L_SFT
, 1, 1),
839 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER
,
840 RT5645_M_DAC_L1_SPM_L_SFT
, 1, 1),
841 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER
,
842 RT5645_M_SV_R_SPM_L_SFT
, 1, 1),
843 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER
,
844 RT5645_M_SV_L_SPM_L_SFT
, 1, 1),
847 static const struct snd_kcontrol_new rt5645_spo_r_mix
[] = {
848 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER
,
849 RT5645_M_DAC_R1_SPM_R_SFT
, 1, 1),
850 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER
,
851 RT5645_M_SV_R_SPM_R_SFT
, 1, 1),
854 static const struct snd_kcontrol_new rt5645_hpo_mix
[] = {
855 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER
,
856 RT5645_M_DAC1_HM_SFT
, 1, 1),
857 SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER
,
858 RT5645_M_HPVOL_HM_SFT
, 1, 1),
861 static const struct snd_kcontrol_new rt5645_hpvoll_mix
[] = {
862 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL
,
863 RT5645_M_DAC1_HV_SFT
, 1, 1),
864 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL
,
865 RT5645_M_DAC2_HV_SFT
, 1, 1),
866 SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL
,
867 RT5645_M_IN_HV_SFT
, 1, 1),
868 SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL
,
869 RT5645_M_BST1_HV_SFT
, 1, 1),
872 static const struct snd_kcontrol_new rt5645_hpvolr_mix
[] = {
873 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL
,
874 RT5645_M_DAC1_HV_SFT
, 1, 1),
875 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL
,
876 RT5645_M_DAC2_HV_SFT
, 1, 1),
877 SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL
,
878 RT5645_M_IN_HV_SFT
, 1, 1),
879 SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL
,
880 RT5645_M_BST2_HV_SFT
, 1, 1),
883 static const struct snd_kcontrol_new rt5645_lout_mix
[] = {
884 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER
,
885 RT5645_M_DAC_L1_LM_SFT
, 1, 1),
886 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER
,
887 RT5645_M_DAC_R1_LM_SFT
, 1, 1),
888 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER
,
889 RT5645_M_OV_L_LM_SFT
, 1, 1),
890 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER
,
891 RT5645_M_OV_R_LM_SFT
, 1, 1),
894 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
895 static const char * const rt5645_dac1_src
[] = {
896 "IF1 DAC", "IF2 DAC", "IF3 DAC"
899 static SOC_ENUM_SINGLE_DECL(
900 rt5645_dac1l_enum
, RT5645_AD_DA_MIXER
,
901 RT5645_DAC1_L_SEL_SFT
, rt5645_dac1_src
);
903 static const struct snd_kcontrol_new rt5645_dac1l_mux
=
904 SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum
);
906 static SOC_ENUM_SINGLE_DECL(
907 rt5645_dac1r_enum
, RT5645_AD_DA_MIXER
,
908 RT5645_DAC1_R_SEL_SFT
, rt5645_dac1_src
);
910 static const struct snd_kcontrol_new rt5645_dac1r_mux
=
911 SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum
);
913 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
914 static const char * const rt5645_dac12_src
[] = {
915 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
918 static SOC_ENUM_SINGLE_DECL(
919 rt5645_dac2l_enum
, RT5645_DAC_CTRL
,
920 RT5645_DAC2_L_SEL_SFT
, rt5645_dac12_src
);
922 static const struct snd_kcontrol_new rt5645_dac_l2_mux
=
923 SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum
);
925 static const char * const rt5645_dacr2_src
[] = {
926 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
929 static SOC_ENUM_SINGLE_DECL(
930 rt5645_dac2r_enum
, RT5645_DAC_CTRL
,
931 RT5645_DAC2_R_SEL_SFT
, rt5645_dacr2_src
);
933 static const struct snd_kcontrol_new rt5645_dac_r2_mux
=
934 SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum
);
938 static const char * const rt5645_inl_src
[] = {
942 static SOC_ENUM_SINGLE_DECL(
943 rt5645_inl_enum
, RT5645_INL1_INR1_VOL
,
944 RT5645_INL_SEL_SFT
, rt5645_inl_src
);
946 static const struct snd_kcontrol_new rt5645_inl_mux
=
947 SOC_DAPM_ENUM("INL source", rt5645_inl_enum
);
949 static const char * const rt5645_inr_src
[] = {
953 static SOC_ENUM_SINGLE_DECL(
954 rt5645_inr_enum
, RT5645_INL1_INR1_VOL
,
955 RT5645_INR_SEL_SFT
, rt5645_inr_src
);
957 static const struct snd_kcontrol_new rt5645_inr_mux
=
958 SOC_DAPM_ENUM("INR source", rt5645_inr_enum
);
960 /* Stereo1 ADC source */
962 static const char * const rt5645_stereo_adc1_src
[] = {
966 static SOC_ENUM_SINGLE_DECL(
967 rt5645_stereo1_adc1_enum
, RT5645_STO1_ADC_MIXER
,
968 RT5645_ADC_1_SRC_SFT
, rt5645_stereo_adc1_src
);
970 static const struct snd_kcontrol_new rt5645_sto_adc1_mux
=
971 SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum
);
974 static const char * const rt5645_stereo_adc2_src
[] = {
978 static SOC_ENUM_SINGLE_DECL(
979 rt5645_stereo1_adc2_enum
, RT5645_STO1_ADC_MIXER
,
980 RT5645_ADC_2_SRC_SFT
, rt5645_stereo_adc2_src
);
982 static const struct snd_kcontrol_new rt5645_sto_adc2_mux
=
983 SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum
);
986 static const char * const rt5645_stereo_dmic_src
[] = {
990 static SOC_ENUM_SINGLE_DECL(
991 rt5645_stereo1_dmic_enum
, RT5645_STO1_ADC_MIXER
,
992 RT5645_DMIC_SRC_SFT
, rt5645_stereo_dmic_src
);
994 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux
=
995 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum
);
997 /* Mono ADC source */
999 static const char * const rt5645_mono_adc_l1_src
[] = {
1000 "Mono DAC MIXL", "ADC"
1003 static SOC_ENUM_SINGLE_DECL(
1004 rt5645_mono_adc_l1_enum
, RT5645_MONO_ADC_MIXER
,
1005 RT5645_MONO_ADC_L1_SRC_SFT
, rt5645_mono_adc_l1_src
);
1007 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux
=
1008 SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum
);
1010 static const char * const rt5645_mono_adc_l2_src
[] = {
1011 "Mono DAC MIXL", "DMIC"
1014 static SOC_ENUM_SINGLE_DECL(
1015 rt5645_mono_adc_l2_enum
, RT5645_MONO_ADC_MIXER
,
1016 RT5645_MONO_ADC_L2_SRC_SFT
, rt5645_mono_adc_l2_src
);
1018 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux
=
1019 SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum
);
1022 static const char * const rt5645_mono_dmic_src
[] = {
1026 static SOC_ENUM_SINGLE_DECL(
1027 rt5645_mono_dmic_l_enum
, RT5645_MONO_ADC_MIXER
,
1028 RT5645_MONO_DMIC_L_SRC_SFT
, rt5645_mono_dmic_src
);
1030 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux
=
1031 SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum
);
1033 static SOC_ENUM_SINGLE_DECL(
1034 rt5645_mono_dmic_r_enum
, RT5645_MONO_ADC_MIXER
,
1035 RT5645_MONO_DMIC_R_SRC_SFT
, rt5645_mono_dmic_src
);
1037 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux
=
1038 SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum
);
1040 static const char * const rt5645_mono_adc_r1_src
[] = {
1041 "Mono DAC MIXR", "ADC"
1044 static SOC_ENUM_SINGLE_DECL(
1045 rt5645_mono_adc_r1_enum
, RT5645_MONO_ADC_MIXER
,
1046 RT5645_MONO_ADC_R1_SRC_SFT
, rt5645_mono_adc_r1_src
);
1048 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux
=
1049 SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum
);
1051 static const char * const rt5645_mono_adc_r2_src
[] = {
1052 "Mono DAC MIXR", "DMIC"
1055 static SOC_ENUM_SINGLE_DECL(
1056 rt5645_mono_adc_r2_enum
, RT5645_MONO_ADC_MIXER
,
1057 RT5645_MONO_ADC_R2_SRC_SFT
, rt5645_mono_adc_r2_src
);
1059 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux
=
1060 SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum
);
1063 static const char * const rt5645_if1_adc_in_src
[] = {
1064 "IF_ADC1/IF_ADC2/VAD_ADC", "IF_ADC2/IF_ADC1/VAD_ADC",
1065 "VAD_ADC/IF_ADC1/IF_ADC2", "VAD_ADC/IF_ADC2/IF_ADC1"
1068 static SOC_ENUM_SINGLE_DECL(
1069 rt5645_if1_adc_in_enum
, RT5645_TDM_CTRL_1
,
1070 RT5645_IF1_ADC_IN_SFT
, rt5645_if1_adc_in_src
);
1072 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux
=
1073 SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum
);
1076 static const char * const rt5650_if1_adc_in_src
[] = {
1077 "IF_ADC1/IF_ADC2/DAC_REF/Null",
1078 "IF_ADC1/IF_ADC2/Null/DAC_REF",
1079 "IF_ADC1/DAC_REF/IF_ADC2/Null",
1080 "IF_ADC1/DAC_REF/Null/IF_ADC2",
1081 "IF_ADC1/Null/DAC_REF/IF_ADC2",
1082 "IF_ADC1/Null/IF_ADC2/DAC_REF",
1084 "IF_ADC2/IF_ADC1/DAC_REF/Null",
1085 "IF_ADC2/IF_ADC1/Null/DAC_REF",
1086 "IF_ADC2/DAC_REF/IF_ADC1/Null",
1087 "IF_ADC2/DAC_REF/Null/IF_ADC1",
1088 "IF_ADC2/Null/DAC_REF/IF_ADC1",
1089 "IF_ADC2/Null/IF_ADC1/DAC_REF",
1091 "DAC_REF/IF_ADC1/IF_ADC2/Null",
1092 "DAC_REF/IF_ADC1/Null/IF_ADC2",
1093 "DAC_REF/IF_ADC2/IF_ADC1/Null",
1094 "DAC_REF/IF_ADC2/Null/IF_ADC1",
1095 "DAC_REF/Null/IF_ADC1/IF_ADC2",
1096 "DAC_REF/Null/IF_ADC2/IF_ADC1",
1098 "Null/IF_ADC1/IF_ADC2/DAC_REF",
1099 "Null/IF_ADC1/DAC_REF/IF_ADC2",
1100 "Null/IF_ADC2/IF_ADC1/DAC_REF",
1101 "Null/IF_ADC2/DAC_REF/IF_ADC1",
1102 "Null/DAC_REF/IF_ADC1/IF_ADC2",
1103 "Null/DAC_REF/IF_ADC2/IF_ADC1",
1106 static SOC_ENUM_SINGLE_DECL(
1107 rt5650_if1_adc_in_enum
, RT5645_TDM_CTRL_2
,
1108 0, rt5650_if1_adc_in_src
);
1110 static const struct snd_kcontrol_new rt5650_if1_adc_in_mux
=
1111 SOC_DAPM_ENUM("IF1 ADC IN source", rt5650_if1_adc_in_enum
);
1113 /* MX-78 [15:14][13:12][11:10] */
1114 static const char * const rt5645_tdm_adc_swap_select
[] = {
1115 "L/R", "R/L", "L/L", "R/R"
1118 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot0_1_enum
,
1119 RT5645_TDM_CTRL_2
, 14, rt5645_tdm_adc_swap_select
);
1121 static const struct snd_kcontrol_new rt5650_if1_adc1_in_mux
=
1122 SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5650_tdm_adc_slot0_1_enum
);
1124 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot2_3_enum
,
1125 RT5645_TDM_CTRL_2
, 12, rt5645_tdm_adc_swap_select
);
1127 static const struct snd_kcontrol_new rt5650_if1_adc2_in_mux
=
1128 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5650_tdm_adc_slot2_3_enum
);
1130 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot4_5_enum
,
1131 RT5645_TDM_CTRL_2
, 10, rt5645_tdm_adc_swap_select
);
1133 static const struct snd_kcontrol_new rt5650_if1_adc3_in_mux
=
1134 SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5650_tdm_adc_slot4_5_enum
);
1136 /* MX-77 [7:6][5:4][3:2] */
1137 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum
,
1138 RT5645_TDM_CTRL_1
, 6, rt5645_tdm_adc_swap_select
);
1140 static const struct snd_kcontrol_new rt5645_if1_adc1_in_mux
=
1141 SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5645_tdm_adc_slot0_1_enum
);
1143 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum
,
1144 RT5645_TDM_CTRL_1
, 4, rt5645_tdm_adc_swap_select
);
1146 static const struct snd_kcontrol_new rt5645_if1_adc2_in_mux
=
1147 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5645_tdm_adc_slot2_3_enum
);
1149 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum
,
1150 RT5645_TDM_CTRL_1
, 2, rt5645_tdm_adc_swap_select
);
1152 static const struct snd_kcontrol_new rt5645_if1_adc3_in_mux
=
1153 SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5645_tdm_adc_slot4_5_enum
);
1155 /* MX-79 [14:12][10:8][6:4][2:0] */
1156 static const char * const rt5645_tdm_dac_swap_select
[] = {
1157 "Slot0", "Slot1", "Slot2", "Slot3"
1160 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac0_enum
,
1161 RT5645_TDM_CTRL_3
, 12, rt5645_tdm_dac_swap_select
);
1163 static const struct snd_kcontrol_new rt5645_if1_dac0_tdm_sel_mux
=
1164 SOC_DAPM_ENUM("IF1 DAC0 source", rt5645_tdm_dac0_enum
);
1166 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac1_enum
,
1167 RT5645_TDM_CTRL_3
, 8, rt5645_tdm_dac_swap_select
);
1169 static const struct snd_kcontrol_new rt5645_if1_dac1_tdm_sel_mux
=
1170 SOC_DAPM_ENUM("IF1 DAC1 source", rt5645_tdm_dac1_enum
);
1172 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac2_enum
,
1173 RT5645_TDM_CTRL_3
, 4, rt5645_tdm_dac_swap_select
);
1175 static const struct snd_kcontrol_new rt5645_if1_dac2_tdm_sel_mux
=
1176 SOC_DAPM_ENUM("IF1 DAC2 source", rt5645_tdm_dac2_enum
);
1178 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac3_enum
,
1179 RT5645_TDM_CTRL_3
, 0, rt5645_tdm_dac_swap_select
);
1181 static const struct snd_kcontrol_new rt5645_if1_dac3_tdm_sel_mux
=
1182 SOC_DAPM_ENUM("IF1 DAC3 source", rt5645_tdm_dac3_enum
);
1184 /* MX-7a [14:12][10:8][6:4][2:0] */
1185 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac0_enum
,
1186 RT5650_TDM_CTRL_4
, 12, rt5645_tdm_dac_swap_select
);
1188 static const struct snd_kcontrol_new rt5650_if1_dac0_tdm_sel_mux
=
1189 SOC_DAPM_ENUM("IF1 DAC0 source", rt5650_tdm_dac0_enum
);
1191 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac1_enum
,
1192 RT5650_TDM_CTRL_4
, 8, rt5645_tdm_dac_swap_select
);
1194 static const struct snd_kcontrol_new rt5650_if1_dac1_tdm_sel_mux
=
1195 SOC_DAPM_ENUM("IF1 DAC1 source", rt5650_tdm_dac1_enum
);
1197 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac2_enum
,
1198 RT5650_TDM_CTRL_4
, 4, rt5645_tdm_dac_swap_select
);
1200 static const struct snd_kcontrol_new rt5650_if1_dac2_tdm_sel_mux
=
1201 SOC_DAPM_ENUM("IF1 DAC2 source", rt5650_tdm_dac2_enum
);
1203 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac3_enum
,
1204 RT5650_TDM_CTRL_4
, 0, rt5645_tdm_dac_swap_select
);
1206 static const struct snd_kcontrol_new rt5650_if1_dac3_tdm_sel_mux
=
1207 SOC_DAPM_ENUM("IF1 DAC3 source", rt5650_tdm_dac3_enum
);
1210 static const char * const rt5650_a_dac1_src
[] = {
1211 "DAC1", "Stereo DAC Mixer"
1214 static SOC_ENUM_SINGLE_DECL(
1215 rt5650_a_dac1_l_enum
, RT5650_A_DAC_SOUR
,
1216 RT5650_A_DAC1_L_IN_SFT
, rt5650_a_dac1_src
);
1218 static const struct snd_kcontrol_new rt5650_a_dac1_l_mux
=
1219 SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum
);
1221 static SOC_ENUM_SINGLE_DECL(
1222 rt5650_a_dac1_r_enum
, RT5650_A_DAC_SOUR
,
1223 RT5650_A_DAC1_R_IN_SFT
, rt5650_a_dac1_src
);
1225 static const struct snd_kcontrol_new rt5650_a_dac1_r_mux
=
1226 SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum
);
1229 static const char * const rt5650_a_dac2_src
[] = {
1230 "Stereo DAC Mixer", "Mono DAC Mixer"
1233 static SOC_ENUM_SINGLE_DECL(
1234 rt5650_a_dac2_l_enum
, RT5650_A_DAC_SOUR
,
1235 RT5650_A_DAC2_L_IN_SFT
, rt5650_a_dac2_src
);
1237 static const struct snd_kcontrol_new rt5650_a_dac2_l_mux
=
1238 SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum
);
1240 static SOC_ENUM_SINGLE_DECL(
1241 rt5650_a_dac2_r_enum
, RT5650_A_DAC_SOUR
,
1242 RT5650_A_DAC2_R_IN_SFT
, rt5650_a_dac2_src
);
1244 static const struct snd_kcontrol_new rt5650_a_dac2_r_mux
=
1245 SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum
);
1248 static const char * const rt5645_if2_adc_in_src
[] = {
1249 "IF_ADC1", "IF_ADC2", "VAD_ADC"
1252 static SOC_ENUM_SINGLE_DECL(
1253 rt5645_if2_adc_in_enum
, RT5645_DIG_INF1_DATA
,
1254 RT5645_IF2_ADC_IN_SFT
, rt5645_if2_adc_in_src
);
1256 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux
=
1257 SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum
);
1260 static const char * const rt5645_if3_adc_in_src
[] = {
1261 "IF_ADC1", "IF_ADC2", "VAD_ADC"
1264 static SOC_ENUM_SINGLE_DECL(
1265 rt5645_if3_adc_in_enum
, RT5645_DIG_INF1_DATA
,
1266 RT5645_IF3_ADC_IN_SFT
, rt5645_if3_adc_in_src
);
1268 static const struct snd_kcontrol_new rt5645_if3_adc_in_mux
=
1269 SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum
);
1271 /* MX-31 [15] [13] [11] [9] */
1272 static const char * const rt5645_pdm_src
[] = {
1273 "Mono DAC", "Stereo DAC"
1276 static SOC_ENUM_SINGLE_DECL(
1277 rt5645_pdm1_l_enum
, RT5645_PDM_OUT_CTRL
,
1278 RT5645_PDM1_L_SFT
, rt5645_pdm_src
);
1280 static const struct snd_kcontrol_new rt5645_pdm1_l_mux
=
1281 SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum
);
1283 static SOC_ENUM_SINGLE_DECL(
1284 rt5645_pdm1_r_enum
, RT5645_PDM_OUT_CTRL
,
1285 RT5645_PDM1_R_SFT
, rt5645_pdm_src
);
1287 static const struct snd_kcontrol_new rt5645_pdm1_r_mux
=
1288 SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum
);
1291 static const char * const rt5645_vad_adc_src
[] = {
1292 "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1295 static SOC_ENUM_SINGLE_DECL(
1296 rt5645_vad_adc_enum
, RT5645_VAD_CTRL4
,
1297 RT5645_VAD_SEL_SFT
, rt5645_vad_adc_src
);
1299 static const struct snd_kcontrol_new rt5645_vad_adc_mux
=
1300 SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum
);
1302 static const struct snd_kcontrol_new spk_l_vol_control
=
1303 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL
,
1304 RT5645_L_MUTE_SFT
, 1, 1);
1306 static const struct snd_kcontrol_new spk_r_vol_control
=
1307 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL
,
1308 RT5645_R_MUTE_SFT
, 1, 1);
1310 static const struct snd_kcontrol_new hp_l_vol_control
=
1311 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL
,
1312 RT5645_L_MUTE_SFT
, 1, 1);
1314 static const struct snd_kcontrol_new hp_r_vol_control
=
1315 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL
,
1316 RT5645_R_MUTE_SFT
, 1, 1);
1318 static const struct snd_kcontrol_new pdm1_l_vol_control
=
1319 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL
,
1320 RT5645_M_PDM1_L
, 1, 1);
1322 static const struct snd_kcontrol_new pdm1_r_vol_control
=
1323 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL
,
1324 RT5645_M_PDM1_R
, 1, 1);
1326 static void hp_amp_power(struct snd_soc_codec
*codec
, int on
)
1328 static int hp_amp_power_count
;
1329 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
1332 if (hp_amp_power_count
<= 0) {
1333 if (rt5645
->codec_type
== CODEC_TYPE_RT5650
) {
1334 snd_soc_write(codec
, RT5645_CHARGE_PUMP
,
1336 snd_soc_write(codec
, RT5645_DEPOP_M1
, 0x001d);
1337 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1339 snd_soc_write(codec
, RT5645_DEPOP_M3
, 0x0737);
1340 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1341 RT5645_MAMP_INT_REG2
, 0xfc00);
1342 snd_soc_write(codec
, RT5645_DEPOP_M2
, 0x1140);
1344 /* depop parameters */
1345 snd_soc_update_bits(codec
, RT5645_DEPOP_M2
,
1346 RT5645_DEPOP_MASK
, RT5645_DEPOP_MAN
);
1347 snd_soc_write(codec
, RT5645_DEPOP_M1
, 0x000d);
1348 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1349 RT5645_HP_DCC_INT1
, 0x9f01);
1351 /* headphone amp power on */
1352 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1353 RT5645_PWR_FV1
| RT5645_PWR_FV2
, 0);
1354 snd_soc_update_bits(codec
, RT5645_PWR_VOL
,
1355 RT5645_PWR_HV_L
| RT5645_PWR_HV_R
,
1356 RT5645_PWR_HV_L
| RT5645_PWR_HV_R
);
1357 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1358 RT5645_PWR_HP_L
| RT5645_PWR_HP_R
|
1360 RT5645_PWR_HP_L
| RT5645_PWR_HP_R
|
1363 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1364 RT5645_PWR_FV1
| RT5645_PWR_FV2
,
1365 RT5645_PWR_FV1
| RT5645_PWR_FV2
);
1367 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1368 RT5645_HP_CO_MASK
| RT5645_HP_SG_MASK
,
1369 RT5645_HP_CO_EN
| RT5645_HP_SG_EN
);
1370 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1372 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1376 hp_amp_power_count
++;
1378 hp_amp_power_count
--;
1379 if (hp_amp_power_count
<= 0) {
1380 if (rt5645
->codec_type
== CODEC_TYPE_RT5650
) {
1381 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1383 snd_soc_write(codec
, RT5645_DEPOP_M3
, 0x0737);
1384 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1385 RT5645_MAMP_INT_REG2
, 0xfc00);
1386 snd_soc_write(codec
, RT5645_DEPOP_M2
, 0x1140);
1388 snd_soc_write(codec
, RT5645_DEPOP_M1
, 0x0001);
1391 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1393 RT5645_HP_L_SMT_MASK
|
1394 RT5645_HP_R_SMT_MASK
,
1396 RT5645_HP_L_SMT_DIS
|
1397 RT5645_HP_R_SMT_DIS
);
1398 /* headphone amp power down */
1399 snd_soc_write(codec
, RT5645_DEPOP_M1
, 0x0000);
1400 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1401 RT5645_PWR_HP_L
| RT5645_PWR_HP_R
|
1403 snd_soc_update_bits(codec
, RT5645_DEPOP_M2
,
1404 RT5645_DEPOP_MASK
, 0);
1410 static int rt5645_hp_event(struct snd_soc_dapm_widget
*w
,
1411 struct snd_kcontrol
*kcontrol
, int event
)
1413 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
1414 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
1417 case SND_SOC_DAPM_POST_PMU
:
1418 hp_amp_power(codec
, 1);
1419 /* headphone unmute sequence */
1420 if (rt5645
->codec_type
== CODEC_TYPE_RT5645
) {
1421 snd_soc_update_bits(codec
, RT5645_DEPOP_M3
,
1422 RT5645_CP_FQ1_MASK
| RT5645_CP_FQ2_MASK
|
1424 (RT5645_CP_FQ_192_KHZ
<< RT5645_CP_FQ1_SFT
) |
1425 (RT5645_CP_FQ_12_KHZ
<< RT5645_CP_FQ2_SFT
) |
1426 (RT5645_CP_FQ_192_KHZ
<< RT5645_CP_FQ3_SFT
));
1427 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1428 RT5645_MAMP_INT_REG2
, 0xfc00);
1429 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1430 RT5645_SMT_TRIG_MASK
, RT5645_SMT_TRIG_EN
);
1431 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1432 RT5645_RSTN_MASK
, RT5645_RSTN_EN
);
1433 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1434 RT5645_RSTN_MASK
| RT5645_HP_L_SMT_MASK
|
1435 RT5645_HP_R_SMT_MASK
, RT5645_RSTN_DIS
|
1436 RT5645_HP_L_SMT_EN
| RT5645_HP_R_SMT_EN
);
1438 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1439 RT5645_HP_SG_MASK
| RT5645_HP_L_SMT_MASK
|
1440 RT5645_HP_R_SMT_MASK
, RT5645_HP_SG_DIS
|
1441 RT5645_HP_L_SMT_DIS
| RT5645_HP_R_SMT_DIS
);
1445 case SND_SOC_DAPM_PRE_PMD
:
1446 /* headphone mute sequence */
1447 if (rt5645
->codec_type
== CODEC_TYPE_RT5645
) {
1448 snd_soc_update_bits(codec
, RT5645_DEPOP_M3
,
1449 RT5645_CP_FQ1_MASK
| RT5645_CP_FQ2_MASK
|
1451 (RT5645_CP_FQ_96_KHZ
<< RT5645_CP_FQ1_SFT
) |
1452 (RT5645_CP_FQ_12_KHZ
<< RT5645_CP_FQ2_SFT
) |
1453 (RT5645_CP_FQ_96_KHZ
<< RT5645_CP_FQ3_SFT
));
1454 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1455 RT5645_MAMP_INT_REG2
, 0xfc00);
1456 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1457 RT5645_HP_SG_MASK
, RT5645_HP_SG_EN
);
1458 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1459 RT5645_RSTP_MASK
, RT5645_RSTP_EN
);
1460 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1461 RT5645_RSTP_MASK
| RT5645_HP_L_SMT_MASK
|
1462 RT5645_HP_R_SMT_MASK
, RT5645_RSTP_DIS
|
1463 RT5645_HP_L_SMT_EN
| RT5645_HP_R_SMT_EN
);
1466 hp_amp_power(codec
, 0);
1476 static int rt5645_spk_event(struct snd_soc_dapm_widget
*w
,
1477 struct snd_kcontrol
*kcontrol
, int event
)
1479 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
1482 case SND_SOC_DAPM_POST_PMU
:
1483 snd_soc_update_bits(codec
, RT5645_PWR_DIG1
,
1484 RT5645_PWR_CLS_D
| RT5645_PWR_CLS_D_R
|
1486 RT5645_PWR_CLS_D
| RT5645_PWR_CLS_D_R
|
1487 RT5645_PWR_CLS_D_L
);
1490 case SND_SOC_DAPM_PRE_PMD
:
1491 snd_soc_update_bits(codec
, RT5645_PWR_DIG1
,
1492 RT5645_PWR_CLS_D
| RT5645_PWR_CLS_D_R
|
1493 RT5645_PWR_CLS_D_L
, 0);
1503 static int rt5645_lout_event(struct snd_soc_dapm_widget
*w
,
1504 struct snd_kcontrol
*kcontrol
, int event
)
1506 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
1509 case SND_SOC_DAPM_POST_PMU
:
1510 hp_amp_power(codec
, 1);
1511 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1512 RT5645_PWR_LM
, RT5645_PWR_LM
);
1513 snd_soc_update_bits(codec
, RT5645_LOUT1
,
1514 RT5645_L_MUTE
| RT5645_R_MUTE
, 0);
1517 case SND_SOC_DAPM_PRE_PMD
:
1518 snd_soc_update_bits(codec
, RT5645_LOUT1
,
1519 RT5645_L_MUTE
| RT5645_R_MUTE
,
1520 RT5645_L_MUTE
| RT5645_R_MUTE
);
1521 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1523 hp_amp_power(codec
, 0);
1533 static int rt5645_bst2_event(struct snd_soc_dapm_widget
*w
,
1534 struct snd_kcontrol
*kcontrol
, int event
)
1536 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
1539 case SND_SOC_DAPM_POST_PMU
:
1540 snd_soc_update_bits(codec
, RT5645_PWR_ANLG2
,
1541 RT5645_PWR_BST2_P
, RT5645_PWR_BST2_P
);
1544 case SND_SOC_DAPM_PRE_PMD
:
1545 snd_soc_update_bits(codec
, RT5645_PWR_ANLG2
,
1546 RT5645_PWR_BST2_P
, 0);
1556 static const struct snd_soc_dapm_widget rt5645_dapm_widgets
[] = {
1557 SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER
,
1558 RT5645_PWR_LDO2_BIT
, 0, NULL
, 0),
1559 SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2
,
1560 RT5645_PWR_PLL_BIT
, 0, NULL
, 0),
1562 SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2
,
1563 RT5645_PWR_JD1_BIT
, 0, NULL
, 0),
1564 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL
,
1565 RT5645_PWR_MIC_DET_BIT
, 0, NULL
, 0),
1568 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1
,
1570 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1
,
1572 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1
,
1574 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1
,
1576 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1
,
1578 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1
,
1580 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1
,
1582 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1
,
1584 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1
,
1586 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1
,
1588 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1
,
1593 SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2
,
1594 RT5645_PWR_MB1_BIT
, 0),
1595 SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2
,
1596 RT5645_PWR_MB2_BIT
, 0),
1598 SND_SOC_DAPM_INPUT("DMIC L1"),
1599 SND_SOC_DAPM_INPUT("DMIC R1"),
1600 SND_SOC_DAPM_INPUT("DMIC L2"),
1601 SND_SOC_DAPM_INPUT("DMIC R2"),
1603 SND_SOC_DAPM_INPUT("IN1P"),
1604 SND_SOC_DAPM_INPUT("IN1N"),
1605 SND_SOC_DAPM_INPUT("IN2P"),
1606 SND_SOC_DAPM_INPUT("IN2N"),
1608 SND_SOC_DAPM_INPUT("Haptic Generator"),
1610 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1611 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1612 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM
, 0, 0,
1613 set_dmic_clk
, SND_SOC_DAPM_PRE_PMU
),
1614 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1
,
1615 RT5645_DMIC_1_EN_SFT
, 0, NULL
, 0),
1616 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1
,
1617 RT5645_DMIC_2_EN_SFT
, 0, NULL
, 0),
1619 SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2
,
1620 RT5645_PWR_BST1_BIT
, 0, NULL
, 0),
1621 SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2
,
1622 RT5645_PWR_BST2_BIT
, 0, NULL
, 0, rt5645_bst2_event
,
1623 SND_SOC_DAPM_PRE_PMD
| SND_SOC_DAPM_POST_PMU
),
1625 SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL
,
1626 RT5645_PWR_IN_L_BIT
, 0, NULL
, 0),
1627 SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL
,
1628 RT5645_PWR_IN_R_BIT
, 0, NULL
, 0),
1630 SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER
, RT5645_PWR_RM_L_BIT
,
1631 0, rt5645_rec_l_mix
, ARRAY_SIZE(rt5645_rec_l_mix
)),
1632 SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER
, RT5645_PWR_RM_R_BIT
,
1633 0, rt5645_rec_r_mix
, ARRAY_SIZE(rt5645_rec_r_mix
)),
1635 SND_SOC_DAPM_ADC("ADC L", NULL
, SND_SOC_NOPM
, 0, 0),
1636 SND_SOC_DAPM_ADC("ADC R", NULL
, SND_SOC_NOPM
, 0, 0),
1638 SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1
,
1639 RT5645_PWR_ADC_L_BIT
, 0, NULL
, 0),
1640 SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1
,
1641 RT5645_PWR_ADC_R_BIT
, 0, NULL
, 0),
1644 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM
, 0, 0,
1645 &rt5645_sto1_dmic_mux
),
1646 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM
, 0, 0,
1647 &rt5645_sto_adc2_mux
),
1648 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM
, 0, 0,
1649 &rt5645_sto_adc2_mux
),
1650 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM
, 0, 0,
1651 &rt5645_sto_adc1_mux
),
1652 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM
, 0, 0,
1653 &rt5645_sto_adc1_mux
),
1654 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM
, 0, 0,
1655 &rt5645_mono_dmic_l_mux
),
1656 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM
, 0, 0,
1657 &rt5645_mono_dmic_r_mux
),
1658 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM
, 0, 0,
1659 &rt5645_mono_adc_l2_mux
),
1660 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM
, 0, 0,
1661 &rt5645_mono_adc_l1_mux
),
1662 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM
, 0, 0,
1663 &rt5645_mono_adc_r1_mux
),
1664 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM
, 0, 0,
1665 &rt5645_mono_adc_r2_mux
),
1668 SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2
,
1669 RT5645_PWR_ADC_S1F_BIT
, 0, NULL
, 0),
1670 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM
, 0, 0,
1671 rt5645_sto1_adc_l_mix
, ARRAY_SIZE(rt5645_sto1_adc_l_mix
),
1673 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM
, 0, 0,
1674 rt5645_sto1_adc_r_mix
, ARRAY_SIZE(rt5645_sto1_adc_r_mix
),
1676 SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2
,
1677 RT5645_PWR_ADC_MF_L_BIT
, 0, NULL
, 0),
1678 SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM
, 0, 0,
1679 rt5645_mono_adc_l_mix
, ARRAY_SIZE(rt5645_mono_adc_l_mix
),
1681 SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2
,
1682 RT5645_PWR_ADC_MF_R_BIT
, 0, NULL
, 0),
1683 SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM
, 0, 0,
1684 rt5645_mono_adc_r_mix
, ARRAY_SIZE(rt5645_mono_adc_r_mix
),
1688 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1689 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1690 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1691 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1692 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1693 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1694 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1695 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1696 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1697 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1700 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM
,
1701 0, 0, &rt5645_if2_adc_in_mux
),
1703 /* Digital Interface */
1704 SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1
,
1705 RT5645_PWR_I2S1_BIT
, 0, NULL
, 0),
1706 SND_SOC_DAPM_PGA("IF1 DAC0", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1707 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1708 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1709 SND_SOC_DAPM_PGA("IF1 DAC3", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1710 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1711 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1712 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1713 SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1
,
1714 RT5645_PWR_I2S2_BIT
, 0, NULL
, 0),
1715 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1716 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1717 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1718 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1720 /* Digital Interface Select */
1721 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM
,
1722 0, 0, &rt5645_vad_adc_mux
),
1724 /* Audio Interface */
1725 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM
, 0, 0),
1726 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM
, 0, 0),
1727 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM
, 0, 0),
1728 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM
, 0, 0),
1731 /* DAC mixer before sound effect */
1732 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM
, 0, 0,
1733 rt5645_dac_l_mix
, ARRAY_SIZE(rt5645_dac_l_mix
)),
1734 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM
, 0, 0,
1735 rt5645_dac_r_mix
, ARRAY_SIZE(rt5645_dac_r_mix
)),
1737 /* DAC2 channel Mux */
1738 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM
, 0, 0, &rt5645_dac_l2_mux
),
1739 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM
, 0, 0, &rt5645_dac_r2_mux
),
1740 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1
,
1741 RT5645_PWR_DAC_L2_BIT
, 0, NULL
, 0),
1742 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1
,
1743 RT5645_PWR_DAC_R2_BIT
, 0, NULL
, 0),
1745 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM
, 0, 0, &rt5645_dac1l_mux
),
1746 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM
, 0, 0, &rt5645_dac1r_mux
),
1749 SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2
,
1750 RT5645_PWR_DAC_S1F_BIT
, 0, NULL
, 0),
1751 SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2
,
1752 RT5645_PWR_DAC_MF_L_BIT
, 0, NULL
, 0),
1753 SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2
,
1754 RT5645_PWR_DAC_MF_R_BIT
, 0, NULL
, 0),
1755 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM
, 0, 0,
1756 rt5645_sto_dac_l_mix
, ARRAY_SIZE(rt5645_sto_dac_l_mix
)),
1757 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM
, 0, 0,
1758 rt5645_sto_dac_r_mix
, ARRAY_SIZE(rt5645_sto_dac_r_mix
)),
1759 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM
, 0, 0,
1760 rt5645_mono_dac_l_mix
, ARRAY_SIZE(rt5645_mono_dac_l_mix
)),
1761 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM
, 0, 0,
1762 rt5645_mono_dac_r_mix
, ARRAY_SIZE(rt5645_mono_dac_r_mix
)),
1763 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM
, 0, 0,
1764 rt5645_dig_l_mix
, ARRAY_SIZE(rt5645_dig_l_mix
)),
1765 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM
, 0, 0,
1766 rt5645_dig_r_mix
, ARRAY_SIZE(rt5645_dig_r_mix
)),
1769 SND_SOC_DAPM_DAC("DAC L1", NULL
, RT5645_PWR_DIG1
, RT5645_PWR_DAC_L1_BIT
,
1771 SND_SOC_DAPM_DAC("DAC L2", NULL
, RT5645_PWR_DIG1
, RT5645_PWR_DAC_L2_BIT
,
1773 SND_SOC_DAPM_DAC("DAC R1", NULL
, RT5645_PWR_DIG1
, RT5645_PWR_DAC_R1_BIT
,
1775 SND_SOC_DAPM_DAC("DAC R2", NULL
, RT5645_PWR_DIG1
, RT5645_PWR_DAC_R2_BIT
,
1778 SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER
, RT5645_PWR_SM_L_BIT
,
1779 0, rt5645_spk_l_mix
, ARRAY_SIZE(rt5645_spk_l_mix
)),
1780 SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER
, RT5645_PWR_SM_R_BIT
,
1781 0, rt5645_spk_r_mix
, ARRAY_SIZE(rt5645_spk_r_mix
)),
1782 SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER
, RT5645_PWR_OM_L_BIT
,
1783 0, rt5645_out_l_mix
, ARRAY_SIZE(rt5645_out_l_mix
)),
1784 SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER
, RT5645_PWR_OM_R_BIT
,
1785 0, rt5645_out_r_mix
, ARRAY_SIZE(rt5645_out_r_mix
)),
1787 SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL
, RT5645_PWR_SV_L_BIT
, 0,
1788 &spk_l_vol_control
),
1789 SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL
, RT5645_PWR_SV_R_BIT
, 0,
1790 &spk_r_vol_control
),
1791 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL
, RT5645_PWR_HV_L_BIT
,
1792 0, rt5645_hpvoll_mix
, ARRAY_SIZE(rt5645_hpvoll_mix
)),
1793 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL
, RT5645_PWR_HV_R_BIT
,
1794 0, rt5645_hpvolr_mix
, ARRAY_SIZE(rt5645_hpvolr_mix
)),
1795 SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER
,
1796 RT5645_PWR_HM_L_BIT
, 0, NULL
, 0),
1797 SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER
,
1798 RT5645_PWR_HM_R_BIT
, 0, NULL
, 0),
1799 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1800 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1801 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1802 SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM
, 0, 0, &hp_l_vol_control
),
1803 SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM
, 0, 0, &hp_r_vol_control
),
1805 /* HPO/LOUT/Mono Mixer */
1806 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM
, 0, 0, rt5645_spo_l_mix
,
1807 ARRAY_SIZE(rt5645_spo_l_mix
)),
1808 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM
, 0, 0, rt5645_spo_r_mix
,
1809 ARRAY_SIZE(rt5645_spo_r_mix
)),
1810 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM
, 0, 0, rt5645_hpo_mix
,
1811 ARRAY_SIZE(rt5645_hpo_mix
)),
1812 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM
, 0, 0, rt5645_lout_mix
,
1813 ARRAY_SIZE(rt5645_lout_mix
)),
1815 SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM
, 0, 0, rt5645_hp_event
,
1816 SND_SOC_DAPM_PRE_PMD
| SND_SOC_DAPM_POST_PMU
),
1817 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM
, 0, 0, rt5645_lout_event
,
1818 SND_SOC_DAPM_PRE_PMD
| SND_SOC_DAPM_POST_PMU
),
1819 SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM
, 0, 0, rt5645_spk_event
,
1820 SND_SOC_DAPM_PRE_PMD
| SND_SOC_DAPM_POST_PMU
),
1823 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2
, RT5645_PWR_PDM1_BIT
,
1825 SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM
, 0, 0, &rt5645_pdm1_l_mux
),
1826 SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM
, 0, 0, &rt5645_pdm1_r_mux
),
1828 SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM
, 0, 0, &pdm1_l_vol_control
),
1829 SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM
, 0, 0, &pdm1_r_vol_control
),
1832 SND_SOC_DAPM_OUTPUT("HPOL"),
1833 SND_SOC_DAPM_OUTPUT("HPOR"),
1834 SND_SOC_DAPM_OUTPUT("LOUTL"),
1835 SND_SOC_DAPM_OUTPUT("LOUTR"),
1836 SND_SOC_DAPM_OUTPUT("PDM1L"),
1837 SND_SOC_DAPM_OUTPUT("PDM1R"),
1838 SND_SOC_DAPM_OUTPUT("SPOL"),
1839 SND_SOC_DAPM_OUTPUT("SPOR"),
1842 static const struct snd_soc_dapm_widget rt5645_specific_dapm_widgets
[] = {
1843 SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 L Mux", SND_SOC_NOPM
, 0, 0,
1844 &rt5645_if1_dac0_tdm_sel_mux
),
1845 SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 R Mux", SND_SOC_NOPM
, 0, 0,
1846 &rt5645_if1_dac1_tdm_sel_mux
),
1847 SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 L Mux", SND_SOC_NOPM
, 0, 0,
1848 &rt5645_if1_dac2_tdm_sel_mux
),
1849 SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 R Mux", SND_SOC_NOPM
, 0, 0,
1850 &rt5645_if1_dac3_tdm_sel_mux
),
1851 SND_SOC_DAPM_MUX("RT5645 IF1 ADC Mux", SND_SOC_NOPM
,
1852 0, 0, &rt5645_if1_adc_in_mux
),
1853 SND_SOC_DAPM_MUX("RT5645 IF1 ADC1 Swap Mux", SND_SOC_NOPM
,
1854 0, 0, &rt5645_if1_adc1_in_mux
),
1855 SND_SOC_DAPM_MUX("RT5645 IF1 ADC2 Swap Mux", SND_SOC_NOPM
,
1856 0, 0, &rt5645_if1_adc2_in_mux
),
1857 SND_SOC_DAPM_MUX("RT5645 IF1 ADC3 Swap Mux", SND_SOC_NOPM
,
1858 0, 0, &rt5645_if1_adc3_in_mux
),
1861 static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets
[] = {
1862 SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM
,
1863 0, 0, &rt5650_a_dac1_l_mux
),
1864 SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM
,
1865 0, 0, &rt5650_a_dac1_r_mux
),
1866 SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM
,
1867 0, 0, &rt5650_a_dac2_l_mux
),
1868 SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM
,
1869 0, 0, &rt5650_a_dac2_r_mux
),
1871 SND_SOC_DAPM_MUX("RT5650 IF1 ADC1 Swap Mux", SND_SOC_NOPM
,
1872 0, 0, &rt5650_if1_adc1_in_mux
),
1873 SND_SOC_DAPM_MUX("RT5650 IF1 ADC2 Swap Mux", SND_SOC_NOPM
,
1874 0, 0, &rt5650_if1_adc2_in_mux
),
1875 SND_SOC_DAPM_MUX("RT5650 IF1 ADC3 Swap Mux", SND_SOC_NOPM
,
1876 0, 0, &rt5650_if1_adc3_in_mux
),
1877 SND_SOC_DAPM_MUX("RT5650 IF1 ADC Mux", SND_SOC_NOPM
,
1878 0, 0, &rt5650_if1_adc_in_mux
),
1880 SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 L Mux", SND_SOC_NOPM
, 0, 0,
1881 &rt5650_if1_dac0_tdm_sel_mux
),
1882 SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 R Mux", SND_SOC_NOPM
, 0, 0,
1883 &rt5650_if1_dac1_tdm_sel_mux
),
1884 SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 L Mux", SND_SOC_NOPM
, 0, 0,
1885 &rt5650_if1_dac2_tdm_sel_mux
),
1886 SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 R Mux", SND_SOC_NOPM
, 0, 0,
1887 &rt5650_if1_dac3_tdm_sel_mux
),
1890 static const struct snd_soc_dapm_route rt5645_dapm_routes
[] = {
1891 { "adc stereo1 filter", NULL
, "ADC STO1 ASRC", is_using_asrc
},
1892 { "adc mono left filter", NULL
, "ADC MONO L ASRC", is_using_asrc
},
1893 { "adc mono right filter", NULL
, "ADC MONO R ASRC", is_using_asrc
},
1894 { "dac mono left filter", NULL
, "DAC MONO L ASRC", is_using_asrc
},
1895 { "dac mono right filter", NULL
, "DAC MONO R ASRC", is_using_asrc
},
1896 { "dac stereo1 filter", NULL
, "DAC STO ASRC", is_using_asrc
},
1898 { "I2S1", NULL
, "I2S1 ASRC" },
1899 { "I2S2", NULL
, "I2S2 ASRC" },
1901 { "IN1P", NULL
, "LDO2" },
1902 { "IN2P", NULL
, "LDO2" },
1904 { "DMIC1", NULL
, "DMIC L1" },
1905 { "DMIC1", NULL
, "DMIC R1" },
1906 { "DMIC2", NULL
, "DMIC L2" },
1907 { "DMIC2", NULL
, "DMIC R2" },
1909 { "BST1", NULL
, "IN1P" },
1910 { "BST1", NULL
, "IN1N" },
1911 { "BST1", NULL
, "JD Power" },
1912 { "BST1", NULL
, "Mic Det Power" },
1913 { "BST2", NULL
, "IN2P" },
1914 { "BST2", NULL
, "IN2N" },
1916 { "INL VOL", NULL
, "IN2P" },
1917 { "INR VOL", NULL
, "IN2N" },
1919 { "RECMIXL", "HPOL Switch", "HPOL" },
1920 { "RECMIXL", "INL Switch", "INL VOL" },
1921 { "RECMIXL", "BST2 Switch", "BST2" },
1922 { "RECMIXL", "BST1 Switch", "BST1" },
1923 { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
1925 { "RECMIXR", "HPOR Switch", "HPOR" },
1926 { "RECMIXR", "INR Switch", "INR VOL" },
1927 { "RECMIXR", "BST2 Switch", "BST2" },
1928 { "RECMIXR", "BST1 Switch", "BST1" },
1929 { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
1931 { "ADC L", NULL
, "RECMIXL" },
1932 { "ADC L", NULL
, "ADC L power" },
1933 { "ADC R", NULL
, "RECMIXR" },
1934 { "ADC R", NULL
, "ADC R power" },
1936 {"DMIC L1", NULL
, "DMIC CLK"},
1937 {"DMIC L1", NULL
, "DMIC1 Power"},
1938 {"DMIC R1", NULL
, "DMIC CLK"},
1939 {"DMIC R1", NULL
, "DMIC1 Power"},
1940 {"DMIC L2", NULL
, "DMIC CLK"},
1941 {"DMIC L2", NULL
, "DMIC2 Power"},
1942 {"DMIC R2", NULL
, "DMIC CLK"},
1943 {"DMIC R2", NULL
, "DMIC2 Power"},
1945 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1946 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1947 { "Stereo1 DMIC Mux", NULL
, "DMIC STO1 ASRC" },
1949 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1950 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1951 { "Mono DMIC L Mux", NULL
, "DMIC MONO L ASRC" },
1953 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1954 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1955 { "Mono DMIC R Mux", NULL
, "DMIC MONO R ASRC" },
1957 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1958 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1959 { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
1960 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1962 { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
1963 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1964 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1965 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1967 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1968 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1969 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1970 { "Mono ADC L1 Mux", "ADC", "ADC L" },
1972 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1973 { "Mono ADC R1 Mux", "ADC", "ADC R" },
1974 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
1975 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1977 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
1978 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
1979 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
1980 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
1982 { "Stereo1 ADC MIXL", NULL
, "Sto1 ADC MIXL" },
1983 { "Stereo1 ADC MIXL", NULL
, "adc stereo1 filter" },
1984 { "adc stereo1 filter", NULL
, "PLL1", is_sys_clk_from_pll
},
1986 { "Stereo1 ADC MIXR", NULL
, "Sto1 ADC MIXR" },
1987 { "Stereo1 ADC MIXR", NULL
, "adc stereo1 filter" },
1988 { "adc stereo1 filter", NULL
, "PLL1", is_sys_clk_from_pll
},
1990 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
1991 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
1992 { "Mono ADC MIXL", NULL
, "adc mono left filter" },
1993 { "adc mono left filter", NULL
, "PLL1", is_sys_clk_from_pll
},
1995 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
1996 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
1997 { "Mono ADC MIXR", NULL
, "adc mono right filter" },
1998 { "adc mono right filter", NULL
, "PLL1", is_sys_clk_from_pll
},
2000 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2001 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2002 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2004 { "IF_ADC1", NULL
, "Stereo1 ADC MIXL" },
2005 { "IF_ADC1", NULL
, "Stereo1 ADC MIXR" },
2006 { "IF_ADC2", NULL
, "Mono ADC MIXL" },
2007 { "IF_ADC2", NULL
, "Mono ADC MIXR" },
2008 { "VAD_ADC", NULL
, "VAD ADC Mux" },
2010 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2011 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2012 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2014 { "IF1 ADC", NULL
, "I2S1" },
2015 { "IF2 ADC", NULL
, "I2S2" },
2016 { "IF2 ADC", NULL
, "IF2 ADC Mux" },
2018 { "AIF2TX", NULL
, "IF2 ADC" },
2020 { "IF1 DAC0", NULL
, "AIF1RX" },
2021 { "IF1 DAC1", NULL
, "AIF1RX" },
2022 { "IF1 DAC2", NULL
, "AIF1RX" },
2023 { "IF1 DAC3", NULL
, "AIF1RX" },
2024 { "IF2 DAC", NULL
, "AIF2RX" },
2026 { "IF1 DAC0", NULL
, "I2S1" },
2027 { "IF1 DAC1", NULL
, "I2S1" },
2028 { "IF1 DAC2", NULL
, "I2S1" },
2029 { "IF1 DAC3", NULL
, "I2S1" },
2030 { "IF2 DAC", NULL
, "I2S2" },
2032 { "IF2 DAC L", NULL
, "IF2 DAC" },
2033 { "IF2 DAC R", NULL
, "IF2 DAC" },
2035 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2036 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2038 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2039 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2040 { "DAC1 MIXL", NULL
, "dac stereo1 filter" },
2041 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2042 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2043 { "DAC1 MIXR", NULL
, "dac stereo1 filter" },
2045 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2046 { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
2047 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2048 { "DAC L2 Volume", NULL
, "DAC L2 Mux" },
2049 { "DAC L2 Volume", NULL
, "dac mono left filter" },
2051 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2052 { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
2053 { "DAC R2 Mux", "Haptic", "Haptic Generator" },
2054 { "DAC R2 Volume", NULL
, "DAC R2 Mux" },
2055 { "DAC R2 Volume", NULL
, "dac mono right filter" },
2057 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2058 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2059 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2060 { "Stereo DAC MIXL", NULL
, "dac stereo1 filter" },
2061 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2062 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2063 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2064 { "Stereo DAC MIXR", NULL
, "dac stereo1 filter" },
2066 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2067 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2068 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2069 { "Mono DAC MIXL", NULL
, "dac mono left filter" },
2070 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2071 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2072 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2073 { "Mono DAC MIXR", NULL
, "dac mono right filter" },
2075 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2076 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2077 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2078 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2079 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2080 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2082 { "DAC L1", NULL
, "PLL1", is_sys_clk_from_pll
},
2083 { "DAC R1", NULL
, "PLL1", is_sys_clk_from_pll
},
2084 { "DAC L2", NULL
, "PLL1", is_sys_clk_from_pll
},
2085 { "DAC R2", NULL
, "PLL1", is_sys_clk_from_pll
},
2087 { "SPK MIXL", "BST1 Switch", "BST1" },
2088 { "SPK MIXL", "INL Switch", "INL VOL" },
2089 { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
2090 { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
2091 { "SPK MIXR", "BST2 Switch", "BST2" },
2092 { "SPK MIXR", "INR Switch", "INR VOL" },
2093 { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
2094 { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
2096 { "OUT MIXL", "BST1 Switch", "BST1" },
2097 { "OUT MIXL", "INL Switch", "INL VOL" },
2098 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2099 { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2101 { "OUT MIXR", "BST2 Switch", "BST2" },
2102 { "OUT MIXR", "INR Switch", "INR VOL" },
2103 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2104 { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2106 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2107 { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
2108 { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2109 { "HPOVOL MIXL", "BST1 Switch", "BST1" },
2110 { "HPOVOL MIXL", NULL
, "HPOVOL MIXL Power" },
2111 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2112 { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
2113 { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2114 { "HPOVOL MIXR", "BST2 Switch", "BST2" },
2115 { "HPOVOL MIXR", NULL
, "HPOVOL MIXR Power" },
2117 { "DAC 2", NULL
, "DAC L2" },
2118 { "DAC 2", NULL
, "DAC R2" },
2119 { "DAC 1", NULL
, "DAC L1" },
2120 { "DAC 1", NULL
, "DAC R1" },
2121 { "HPOVOL L", "Switch", "HPOVOL MIXL" },
2122 { "HPOVOL R", "Switch", "HPOVOL MIXR" },
2123 { "HPOVOL", NULL
, "HPOVOL L" },
2124 { "HPOVOL", NULL
, "HPOVOL R" },
2125 { "HPO MIX", "DAC1 Switch", "DAC 1" },
2126 { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2128 { "SPKVOL L", "Switch", "SPK MIXL" },
2129 { "SPKVOL R", "Switch", "SPK MIXR" },
2131 { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
2132 { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
2133 { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
2134 { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
2135 { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
2136 { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
2138 { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2139 { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2140 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2141 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2143 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2144 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2145 { "PDM1 L Mux", NULL
, "PDM1 Power" },
2146 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2147 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2148 { "PDM1 R Mux", NULL
, "PDM1 Power" },
2150 { "HP amp", NULL
, "HPO MIX" },
2151 { "HP amp", NULL
, "JD Power" },
2152 { "HP amp", NULL
, "Mic Det Power" },
2153 { "HP amp", NULL
, "LDO2" },
2154 { "HPOL", NULL
, "HP amp" },
2155 { "HPOR", NULL
, "HP amp" },
2157 { "LOUT amp", NULL
, "LOUT MIX" },
2158 { "LOUTL", NULL
, "LOUT amp" },
2159 { "LOUTR", NULL
, "LOUT amp" },
2161 { "PDM1 L", "Switch", "PDM1 L Mux" },
2162 { "PDM1 R", "Switch", "PDM1 R Mux" },
2164 { "PDM1L", NULL
, "PDM1 L" },
2165 { "PDM1R", NULL
, "PDM1 R" },
2167 { "SPK amp", NULL
, "SPOL MIX" },
2168 { "SPK amp", NULL
, "SPOR MIX" },
2169 { "SPOL", NULL
, "SPK amp" },
2170 { "SPOR", NULL
, "SPK amp" },
2173 static const struct snd_soc_dapm_route rt5650_specific_dapm_routes
[] = {
2174 { "A DAC1 L Mux", "DAC1", "DAC1 MIXL"},
2175 { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2176 { "A DAC1 R Mux", "DAC1", "DAC1 MIXR"},
2177 { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2179 { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2180 { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2181 { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2182 { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2184 { "DAC L1", NULL
, "A DAC1 L Mux" },
2185 { "DAC R1", NULL
, "A DAC1 R Mux" },
2186 { "DAC L2", NULL
, "A DAC2 L Mux" },
2187 { "DAC R2", NULL
, "A DAC2 R Mux" },
2189 { "RT5650 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2190 { "RT5650 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2191 { "RT5650 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2192 { "RT5650 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2194 { "RT5650 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2195 { "RT5650 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2196 { "RT5650 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2197 { "RT5650 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2199 { "RT5650 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2200 { "RT5650 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2201 { "RT5650 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2202 { "RT5650 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2204 { "IF1 ADC", NULL
, "RT5650 IF1 ADC1 Swap Mux" },
2205 { "IF1 ADC", NULL
, "RT5650 IF1 ADC2 Swap Mux" },
2206 { "IF1 ADC", NULL
, "RT5650 IF1 ADC3 Swap Mux" },
2208 { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/DAC_REF/Null", "IF1 ADC" },
2209 { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/Null/DAC_REF", "IF1 ADC" },
2210 { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/IF_ADC2/Null", "IF1 ADC" },
2211 { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/Null/IF_ADC2", "IF1 ADC" },
2212 { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/DAC_REF/IF_ADC2", "IF1 ADC" },
2213 { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/IF_ADC2/DAC_REF", "IF1 ADC" },
2215 { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/DAC_REF/Null", "IF1 ADC" },
2216 { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/Null/DAC_REF", "IF1 ADC" },
2217 { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/IF_ADC1/Null", "IF1 ADC" },
2218 { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/Null/IF_ADC1", "IF1 ADC" },
2219 { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/DAC_REF/IF_ADC1", "IF1 ADC" },
2220 { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/IF_ADC1/DAC_REF", "IF1 ADC" },
2222 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/IF_ADC2/Null", "IF1 ADC" },
2223 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/Null/IF_ADC2", "IF1 ADC" },
2224 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/IF_ADC1/Null", "IF1 ADC" },
2225 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/Null/IF_ADC1", "IF1 ADC" },
2226 { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC1/IF_ADC2", "IF1 ADC" },
2227 { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC2/IF_ADC1", "IF1 ADC" },
2229 { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/IF_ADC2/DAC_REF", "IF1 ADC" },
2230 { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/DAC_REF/IF_ADC2", "IF1 ADC" },
2231 { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/IF_ADC1/DAC_REF", "IF1 ADC" },
2232 { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/DAC_REF/IF_ADC1", "IF1 ADC" },
2233 { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC1/IF_ADC2", "IF1 ADC" },
2234 { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC2/IF_ADC1", "IF1 ADC" },
2235 { "AIF1TX", NULL
, "RT5650 IF1 ADC Mux" },
2237 { "RT5650 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2238 { "RT5650 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2239 { "RT5650 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2240 { "RT5650 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2242 { "RT5650 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2243 { "RT5650 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2244 { "RT5650 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2245 { "RT5650 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2247 { "RT5650 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2248 { "RT5650 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2249 { "RT5650 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2250 { "RT5650 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2252 { "RT5650 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2253 { "RT5650 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2254 { "RT5650 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2255 { "RT5650 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2257 { "DAC1 L Mux", "IF1 DAC", "RT5650 IF1 DAC1 L Mux" },
2258 { "DAC1 R Mux", "IF1 DAC", "RT5650 IF1 DAC1 R Mux" },
2260 { "DAC L2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 L Mux" },
2261 { "DAC R2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 R Mux" },
2264 static const struct snd_soc_dapm_route rt5645_specific_dapm_routes
[] = {
2265 { "DAC L1", NULL
, "Stereo DAC MIXL" },
2266 { "DAC R1", NULL
, "Stereo DAC MIXR" },
2267 { "DAC L2", NULL
, "Mono DAC MIXL" },
2268 { "DAC R2", NULL
, "Mono DAC MIXR" },
2270 { "RT5645 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2271 { "RT5645 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2272 { "RT5645 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2273 { "RT5645 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2275 { "RT5645 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2276 { "RT5645 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2277 { "RT5645 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2278 { "RT5645 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2280 { "RT5645 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2281 { "RT5645 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2282 { "RT5645 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2283 { "RT5645 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2285 { "IF1 ADC", NULL
, "RT5645 IF1 ADC1 Swap Mux" },
2286 { "IF1 ADC", NULL
, "RT5645 IF1 ADC2 Swap Mux" },
2287 { "IF1 ADC", NULL
, "RT5645 IF1 ADC3 Swap Mux" },
2289 { "RT5645 IF1 ADC Mux", "IF_ADC1/IF_ADC2/VAD_ADC", "IF1 ADC" },
2290 { "RT5645 IF1 ADC Mux", "IF_ADC2/IF_ADC1/VAD_ADC", "IF1 ADC" },
2291 { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC1/IF_ADC2", "IF1 ADC" },
2292 { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC2/IF_ADC1", "IF1 ADC" },
2293 { "AIF1TX", NULL
, "RT5645 IF1 ADC Mux" },
2295 { "RT5645 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2296 { "RT5645 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2297 { "RT5645 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2298 { "RT5645 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2300 { "RT5645 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2301 { "RT5645 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2302 { "RT5645 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2303 { "RT5645 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2305 { "RT5645 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2306 { "RT5645 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2307 { "RT5645 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2308 { "RT5645 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2310 { "RT5645 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2311 { "RT5645 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2312 { "RT5645 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2313 { "RT5645 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2315 { "DAC1 L Mux", "IF1 DAC", "RT5645 IF1 DAC1 L Mux" },
2316 { "DAC1 R Mux", "IF1 DAC", "RT5645 IF1 DAC1 R Mux" },
2318 { "DAC L2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 L Mux" },
2319 { "DAC R2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 R Mux" },
2322 static int rt5645_hw_params(struct snd_pcm_substream
*substream
,
2323 struct snd_pcm_hw_params
*params
, struct snd_soc_dai
*dai
)
2325 struct snd_soc_codec
*codec
= dai
->codec
;
2326 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2327 unsigned int val_len
= 0, val_clk
, mask_clk
, dl_sft
;
2328 int pre_div
, bclk_ms
, frame_size
;
2330 rt5645
->lrck
[dai
->id
] = params_rate(params
);
2331 pre_div
= rl6231_get_clk_info(rt5645
->sysclk
, rt5645
->lrck
[dai
->id
]);
2333 dev_err(codec
->dev
, "Unsupported clock setting\n");
2336 frame_size
= snd_soc_params_to_frame_size(params
);
2337 if (frame_size
< 0) {
2338 dev_err(codec
->dev
, "Unsupported frame size: %d\n", frame_size
);
2342 switch (rt5645
->codec_type
) {
2343 case CODEC_TYPE_RT5650
:
2351 bclk_ms
= frame_size
> 32;
2352 rt5645
->bclk
[dai
->id
] = rt5645
->lrck
[dai
->id
] * (32 << bclk_ms
);
2354 dev_dbg(dai
->dev
, "bclk is %dHz and lrck is %dHz\n",
2355 rt5645
->bclk
[dai
->id
], rt5645
->lrck
[dai
->id
]);
2356 dev_dbg(dai
->dev
, "bclk_ms is %d and pre_div is %d for iis %d\n",
2357 bclk_ms
, pre_div
, dai
->id
);
2359 switch (params_width(params
)) {
2377 mask_clk
= RT5645_I2S_PD1_MASK
;
2378 val_clk
= pre_div
<< RT5645_I2S_PD1_SFT
;
2379 snd_soc_update_bits(codec
, RT5645_I2S1_SDP
,
2380 (0x3 << dl_sft
), (val_len
<< dl_sft
));
2381 snd_soc_update_bits(codec
, RT5645_ADDA_CLK1
, mask_clk
, val_clk
);
2384 mask_clk
= RT5645_I2S_BCLK_MS2_MASK
| RT5645_I2S_PD2_MASK
;
2385 val_clk
= bclk_ms
<< RT5645_I2S_BCLK_MS2_SFT
|
2386 pre_div
<< RT5645_I2S_PD2_SFT
;
2387 snd_soc_update_bits(codec
, RT5645_I2S2_SDP
,
2388 (0x3 << dl_sft
), (val_len
<< dl_sft
));
2389 snd_soc_update_bits(codec
, RT5645_ADDA_CLK1
, mask_clk
, val_clk
);
2392 dev_err(codec
->dev
, "Invalid dai->id: %d\n", dai
->id
);
2399 static int rt5645_set_dai_fmt(struct snd_soc_dai
*dai
, unsigned int fmt
)
2401 struct snd_soc_codec
*codec
= dai
->codec
;
2402 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2403 unsigned int reg_val
= 0, pol_sft
;
2405 switch (rt5645
->codec_type
) {
2406 case CODEC_TYPE_RT5650
:
2414 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
2415 case SND_SOC_DAIFMT_CBM_CFM
:
2416 rt5645
->master
[dai
->id
] = 1;
2418 case SND_SOC_DAIFMT_CBS_CFS
:
2419 reg_val
|= RT5645_I2S_MS_S
;
2420 rt5645
->master
[dai
->id
] = 0;
2426 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
2427 case SND_SOC_DAIFMT_NB_NF
:
2429 case SND_SOC_DAIFMT_IB_NF
:
2430 reg_val
|= (1 << pol_sft
);
2436 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
2437 case SND_SOC_DAIFMT_I2S
:
2439 case SND_SOC_DAIFMT_LEFT_J
:
2440 reg_val
|= RT5645_I2S_DF_LEFT
;
2442 case SND_SOC_DAIFMT_DSP_A
:
2443 reg_val
|= RT5645_I2S_DF_PCM_A
;
2445 case SND_SOC_DAIFMT_DSP_B
:
2446 reg_val
|= RT5645_I2S_DF_PCM_B
;
2453 snd_soc_update_bits(codec
, RT5645_I2S1_SDP
,
2454 RT5645_I2S_MS_MASK
| (1 << pol_sft
) |
2455 RT5645_I2S_DF_MASK
, reg_val
);
2458 snd_soc_update_bits(codec
, RT5645_I2S2_SDP
,
2459 RT5645_I2S_MS_MASK
| (1 << pol_sft
) |
2460 RT5645_I2S_DF_MASK
, reg_val
);
2463 dev_err(codec
->dev
, "Invalid dai->id: %d\n", dai
->id
);
2469 static int rt5645_set_dai_sysclk(struct snd_soc_dai
*dai
,
2470 int clk_id
, unsigned int freq
, int dir
)
2472 struct snd_soc_codec
*codec
= dai
->codec
;
2473 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2474 unsigned int reg_val
= 0;
2476 if (freq
== rt5645
->sysclk
&& clk_id
== rt5645
->sysclk_src
)
2480 case RT5645_SCLK_S_MCLK
:
2481 reg_val
|= RT5645_SCLK_SRC_MCLK
;
2483 case RT5645_SCLK_S_PLL1
:
2484 reg_val
|= RT5645_SCLK_SRC_PLL1
;
2486 case RT5645_SCLK_S_RCCLK
:
2487 reg_val
|= RT5645_SCLK_SRC_RCCLK
;
2490 dev_err(codec
->dev
, "Invalid clock id (%d)\n", clk_id
);
2493 snd_soc_update_bits(codec
, RT5645_GLB_CLK
,
2494 RT5645_SCLK_SRC_MASK
, reg_val
);
2495 rt5645
->sysclk
= freq
;
2496 rt5645
->sysclk_src
= clk_id
;
2498 dev_dbg(dai
->dev
, "Sysclk is %dHz and clock id is %d\n", freq
, clk_id
);
2503 static int rt5645_set_dai_pll(struct snd_soc_dai
*dai
, int pll_id
, int source
,
2504 unsigned int freq_in
, unsigned int freq_out
)
2506 struct snd_soc_codec
*codec
= dai
->codec
;
2507 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2508 struct rl6231_pll_code pll_code
;
2511 if (source
== rt5645
->pll_src
&& freq_in
== rt5645
->pll_in
&&
2512 freq_out
== rt5645
->pll_out
)
2515 if (!freq_in
|| !freq_out
) {
2516 dev_dbg(codec
->dev
, "PLL disabled\n");
2519 rt5645
->pll_out
= 0;
2520 snd_soc_update_bits(codec
, RT5645_GLB_CLK
,
2521 RT5645_SCLK_SRC_MASK
, RT5645_SCLK_SRC_MCLK
);
2526 case RT5645_PLL1_S_MCLK
:
2527 snd_soc_update_bits(codec
, RT5645_GLB_CLK
,
2528 RT5645_PLL1_SRC_MASK
, RT5645_PLL1_SRC_MCLK
);
2530 case RT5645_PLL1_S_BCLK1
:
2531 case RT5645_PLL1_S_BCLK2
:
2534 snd_soc_update_bits(codec
, RT5645_GLB_CLK
,
2535 RT5645_PLL1_SRC_MASK
, RT5645_PLL1_SRC_BCLK1
);
2538 snd_soc_update_bits(codec
, RT5645_GLB_CLK
,
2539 RT5645_PLL1_SRC_MASK
, RT5645_PLL1_SRC_BCLK2
);
2542 dev_err(codec
->dev
, "Invalid dai->id: %d\n", dai
->id
);
2547 dev_err(codec
->dev
, "Unknown PLL source %d\n", source
);
2551 ret
= rl6231_pll_calc(freq_in
, freq_out
, &pll_code
);
2553 dev_err(codec
->dev
, "Unsupport input clock %d\n", freq_in
);
2557 dev_dbg(codec
->dev
, "bypass=%d m=%d n=%d k=%d\n",
2558 pll_code
.m_bp
, (pll_code
.m_bp
? 0 : pll_code
.m_code
),
2559 pll_code
.n_code
, pll_code
.k_code
);
2561 snd_soc_write(codec
, RT5645_PLL_CTRL1
,
2562 pll_code
.n_code
<< RT5645_PLL_N_SFT
| pll_code
.k_code
);
2563 snd_soc_write(codec
, RT5645_PLL_CTRL2
,
2564 (pll_code
.m_bp
? 0 : pll_code
.m_code
) << RT5645_PLL_M_SFT
|
2565 pll_code
.m_bp
<< RT5645_PLL_M_BP_SFT
);
2567 rt5645
->pll_in
= freq_in
;
2568 rt5645
->pll_out
= freq_out
;
2569 rt5645
->pll_src
= source
;
2574 static int rt5645_set_tdm_slot(struct snd_soc_dai
*dai
, unsigned int tx_mask
,
2575 unsigned int rx_mask
, int slots
, int slot_width
)
2577 struct snd_soc_codec
*codec
= dai
->codec
;
2578 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2579 unsigned int i_slot_sft
, o_slot_sft
, i_width_sht
, o_width_sht
, en_sft
;
2580 unsigned int mask
, val
= 0;
2582 switch (rt5645
->codec_type
) {
2583 case CODEC_TYPE_RT5650
:
2593 i_slot_sft
= o_slot_sft
= 12;
2594 i_width_sht
= o_width_sht
= 10;
2598 if (rx_mask
|| tx_mask
) {
2599 val
|= (1 << en_sft
);
2600 if (rt5645
->codec_type
== CODEC_TYPE_RT5645
)
2601 snd_soc_update_bits(codec
, RT5645_BASS_BACK
,
2602 RT5645_G_BB_BST_MASK
, RT5645_G_BB_BST_25DB
);
2607 val
|= (1 << i_slot_sft
) | (1 << o_slot_sft
);
2610 val
|= (2 << i_slot_sft
) | (2 << o_slot_sft
);
2613 val
|= (3 << i_slot_sft
) | (3 << o_slot_sft
);
2620 switch (slot_width
) {
2622 val
|= (1 << i_width_sht
) | (1 << o_width_sht
);
2625 val
|= (2 << i_width_sht
) | (2 << o_width_sht
);
2628 val
|= (3 << i_width_sht
) | (3 << o_width_sht
);
2635 snd_soc_update_bits(codec
, RT5645_TDM_CTRL_1
, mask
, val
);
2640 static int rt5645_set_bias_level(struct snd_soc_codec
*codec
,
2641 enum snd_soc_bias_level level
)
2643 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2646 case SND_SOC_BIAS_PREPARE
:
2647 if (SND_SOC_BIAS_STANDBY
== snd_soc_codec_get_bias_level(codec
)) {
2648 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
2649 RT5645_PWR_VREF1
| RT5645_PWR_MB
|
2650 RT5645_PWR_BG
| RT5645_PWR_VREF2
,
2651 RT5645_PWR_VREF1
| RT5645_PWR_MB
|
2652 RT5645_PWR_BG
| RT5645_PWR_VREF2
);
2654 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
2655 RT5645_PWR_FV1
| RT5645_PWR_FV2
,
2656 RT5645_PWR_FV1
| RT5645_PWR_FV2
);
2657 snd_soc_update_bits(codec
, RT5645_GEN_CTRL1
,
2658 RT5645_DIG_GATE_CTRL
, RT5645_DIG_GATE_CTRL
);
2662 case SND_SOC_BIAS_STANDBY
:
2663 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
2664 RT5645_PWR_VREF1
| RT5645_PWR_MB
|
2665 RT5645_PWR_BG
| RT5645_PWR_VREF2
,
2666 RT5645_PWR_VREF1
| RT5645_PWR_MB
|
2667 RT5645_PWR_BG
| RT5645_PWR_VREF2
);
2668 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
2669 RT5645_PWR_FV1
| RT5645_PWR_FV2
,
2670 RT5645_PWR_FV1
| RT5645_PWR_FV2
);
2673 case SND_SOC_BIAS_OFF
:
2674 snd_soc_write(codec
, RT5645_DEPOP_M2
, 0x1100);
2675 if (!rt5645
->en_button_func
)
2676 snd_soc_update_bits(codec
, RT5645_GEN_CTRL1
,
2677 RT5645_DIG_GATE_CTRL
, 0);
2678 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
2679 RT5645_PWR_VREF1
| RT5645_PWR_MB
|
2680 RT5645_PWR_BG
| RT5645_PWR_VREF2
|
2681 RT5645_PWR_FV1
| RT5645_PWR_FV2
, 0x0);
2691 static int rt5650_calibration(struct rt5645_priv
*rt5645
)
2696 regcache_cache_bypass(rt5645
->regmap
, true);
2697 regmap_write(rt5645
->regmap
, RT5645_RESET
, 0);
2698 regmap_write(rt5645
->regmap
, RT5645_GEN_CTRL3
, 0x0800);
2699 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+ RT5645_CHOP_DAC_ADC
,
2701 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+ 0x25, 0x7000);
2702 regmap_write(rt5645
->regmap
, RT5645_I2S1_SDP
, 0x8008);
2704 regmap_write(rt5645
->regmap
, RT5645_GEN_CTRL1
, 0x2061);
2705 regmap_write(rt5645
->regmap
, RT5645_CHARGE_PUMP
, 0x0006);
2706 regmap_write(rt5645
->regmap
, RT5645_PWR_ANLG1
, 0x2012);
2707 regmap_write(rt5645
->regmap
, RT5645_PWR_MIXER
, 0x0002);
2708 regmap_write(rt5645
->regmap
, RT5645_PWR_VOL
, 0x0020);
2709 regmap_write(rt5645
->regmap
, RT5645_JD_CTRL3
, 0x00f0);
2710 regmap_write(rt5645
->regmap
, RT5645_IN1_CTRL1
, 0x0006);
2711 regmap_write(rt5645
->regmap
, RT5645_IN1_CTRL2
, 0x1827);
2712 regmap_write(rt5645
->regmap
, RT5645_IN1_CTRL2
, 0x0827);
2714 /* Inline command */
2715 regmap_write(rt5645
->regmap
, RT5645_DEPOP_M1
, 0x0001);
2716 regmap_write(rt5645
->regmap
, RT5650_4BTN_IL_CMD2
, 0xc000);
2717 regmap_write(rt5645
->regmap
, RT5650_4BTN_IL_CMD1
, 0x0008);
2719 regmap_write(rt5645
->regmap
, RT5645_GLB_CLK
, 0x8000);
2720 regmap_write(rt5645
->regmap
, RT5645_DEPOP_M1
, 0x0000);
2721 regmap_write(rt5645
->regmap
, RT5650_4BTN_IL_CMD2
, 0xc000);
2722 regmap_write(rt5645
->regmap
, RT5650_4BTN_IL_CMD1
, 0x0008);
2723 regmap_write(rt5645
->regmap
, RT5645_PWR_DIG2
, 0x8800);
2724 regmap_write(rt5645
->regmap
, RT5645_PWR_ANLG1
, 0xe8fa);
2725 regmap_write(rt5645
->regmap
, RT5645_PWR_ANLG2
, 0x8c04);
2726 regmap_write(rt5645
->regmap
, RT5645_DEPOP_M2
, 0x3100);
2727 regmap_write(rt5645
->regmap
, RT5645_CHARGE_PUMP
, 0x0e06);
2728 regmap_write(rt5645
->regmap
, RT5645_BASS_BACK
, 0x8a13);
2729 regmap_write(rt5645
->regmap
, RT5645_GEN_CTRL3
, 0x0820);
2730 regmap_write(rt5645
->regmap
, RT5645_DEPOP_M1
, 0x000d);
2731 /* Power on and Calbration */
2732 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+ RT5645_HP_DCC_INT1
,
2735 for (i
= 0; i
< 5; i
++) {
2736 regmap_read(rt5645
->regmap
, RT5645_PR_BASE
+ 0x7a, &val
);
2737 if (val
!= 0 && val
!= 0x3f3f) {
2743 pr_debug("%s: PR-7A = 0x%x\n", __func__
, val
);
2746 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+ 0x3e, 0x7400);
2747 regmap_write(rt5645
->regmap
, RT5645_DEPOP_M3
, 0x0737);
2748 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+ RT5645_MAMP_INT_REG2
,
2750 regmap_write(rt5645
->regmap
, RT5645_DEPOP_M2
, 0x1140);
2751 regmap_write(rt5645
->regmap
, RT5645_DEPOP_M1
, 0x0000);
2752 regmap_write(rt5645
->regmap
, RT5645_GEN_CTRL2
, 0x4020);
2753 regmap_write(rt5645
->regmap
, RT5645_PWR_ANLG2
, 0x0006);
2754 regmap_write(rt5645
->regmap
, RT5645_PWR_DIG2
, 0x0000);
2757 regcache_cache_bypass(rt5645
->regmap
, false);
2762 static void rt5645_enable_push_button_irq(struct snd_soc_codec
*codec
,
2765 struct snd_soc_dapm_context
*dapm
= snd_soc_codec_get_dapm(codec
);
2766 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2769 snd_soc_dapm_force_enable_pin(dapm
, "ADC L power");
2770 snd_soc_dapm_force_enable_pin(dapm
, "ADC R power");
2771 snd_soc_dapm_sync(dapm
);
2773 snd_soc_update_bits(codec
,
2774 RT5645_INT_IRQ_ST
, 0x8, 0x8);
2775 snd_soc_update_bits(codec
,
2776 RT5650_4BTN_IL_CMD2
, 0x8000, 0x8000);
2777 snd_soc_read(codec
, RT5650_4BTN_IL_CMD1
);
2778 pr_debug("%s read %x = %x\n", __func__
, RT5650_4BTN_IL_CMD1
,
2779 snd_soc_read(codec
, RT5650_4BTN_IL_CMD1
));
2781 snd_soc_update_bits(codec
, RT5650_4BTN_IL_CMD2
, 0x8000, 0x0);
2782 snd_soc_update_bits(codec
, RT5645_INT_IRQ_ST
, 0x8, 0x0);
2784 snd_soc_dapm_disable_pin(dapm
, "ADC L power");
2785 snd_soc_dapm_disable_pin(dapm
, "ADC R power");
2786 snd_soc_dapm_sync(dapm
);
2790 static int rt5645_jack_detect(struct snd_soc_codec
*codec
, int jack_insert
)
2792 struct snd_soc_dapm_context
*dapm
= snd_soc_codec_get_dapm(codec
);
2793 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2797 regmap_write(rt5645
->regmap
, RT5645_CHARGE_PUMP
, 0x0006);
2799 /* for jack type detect */
2800 snd_soc_dapm_force_enable_pin(dapm
, "LDO2");
2801 snd_soc_dapm_force_enable_pin(dapm
, "Mic Det Power");
2802 snd_soc_dapm_sync(dapm
);
2803 if (!dapm
->card
->instantiated
) {
2804 /* Power up necessary bits for JD if dapm is
2806 regmap_update_bits(rt5645
->regmap
, RT5645_PWR_ANLG1
,
2807 RT5645_PWR_MB
| RT5645_PWR_VREF2
,
2808 RT5645_PWR_MB
| RT5645_PWR_VREF2
);
2809 regmap_update_bits(rt5645
->regmap
, RT5645_PWR_MIXER
,
2810 RT5645_PWR_LDO2
, RT5645_PWR_LDO2
);
2811 regmap_update_bits(rt5645
->regmap
, RT5645_PWR_VOL
,
2812 RT5645_PWR_MIC_DET
, RT5645_PWR_MIC_DET
);
2815 regmap_write(rt5645
->regmap
, RT5645_JD_CTRL3
, 0x00f0);
2816 regmap_write(rt5645
->regmap
, RT5645_IN1_CTRL1
, 0x0006);
2817 regmap_update_bits(rt5645
->regmap
,
2818 RT5645_IN1_CTRL2
, 0x1000, 0x1000);
2820 regmap_update_bits(rt5645
->regmap
,
2821 RT5645_IN1_CTRL2
, 0x1000, 0x0000);
2824 regmap_read(rt5645
->regmap
, RT5645_IN1_CTRL3
, &val
);
2826 dev_dbg(codec
->dev
, "val = %d\n", val
);
2828 if (val
== 1 || val
== 2) {
2829 rt5645
->jack_type
= SND_JACK_HEADSET
;
2830 if (rt5645
->en_button_func
) {
2831 rt5645_enable_push_button_irq(codec
, true);
2834 snd_soc_dapm_disable_pin(dapm
, "Mic Det Power");
2835 snd_soc_dapm_sync(dapm
);
2836 rt5645
->jack_type
= SND_JACK_HEADPHONE
;
2839 } else { /* jack out */
2840 rt5645
->jack_type
= 0;
2842 if (rt5645
->en_button_func
)
2843 rt5645_enable_push_button_irq(codec
, false);
2845 if (rt5645
->pdata
.jd_mode
== 0)
2846 snd_soc_dapm_disable_pin(dapm
, "LDO2");
2847 snd_soc_dapm_disable_pin(dapm
, "Mic Det Power");
2848 snd_soc_dapm_sync(dapm
);
2851 return rt5645
->jack_type
;
2854 static int rt5645_button_detect(struct snd_soc_codec
*codec
)
2858 val
= snd_soc_read(codec
, RT5650_4BTN_IL_CMD1
);
2859 pr_debug("val=0x%x\n", val
);
2860 btn_type
= val
& 0xfff0;
2861 snd_soc_write(codec
, RT5650_4BTN_IL_CMD1
, val
);
2866 static irqreturn_t
rt5645_irq(int irq
, void *data
);
2868 int rt5645_set_jack_detect(struct snd_soc_codec
*codec
,
2869 struct snd_soc_jack
*hp_jack
, struct snd_soc_jack
*mic_jack
,
2870 struct snd_soc_jack
*btn_jack
)
2872 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2874 rt5645
->hp_jack
= hp_jack
;
2875 rt5645
->mic_jack
= mic_jack
;
2876 rt5645
->btn_jack
= btn_jack
;
2877 if (rt5645
->btn_jack
&& rt5645
->codec_type
== CODEC_TYPE_RT5650
) {
2878 rt5645
->en_button_func
= true;
2879 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
2880 RT5645_GP1_PIN_IRQ
, RT5645_GP1_PIN_IRQ
);
2881 regmap_update_bits(rt5645
->regmap
, RT5645_DEPOP_M1
,
2882 RT5645_HP_CB_MASK
, RT5645_HP_CB_PU
);
2883 regmap_update_bits(rt5645
->regmap
, RT5645_GEN_CTRL1
,
2884 RT5645_DIG_GATE_CTRL
, RT5645_DIG_GATE_CTRL
);
2886 rt5645_irq(0, rt5645
);
2890 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect
);
2892 static void rt5645_jack_detect_work(struct work_struct
*work
)
2894 struct rt5645_priv
*rt5645
=
2895 container_of(work
, struct rt5645_priv
, jack_detect_work
.work
);
2896 int val
, btn_type
, gpio_state
= 0, report
= 0;
2898 switch (rt5645
->pdata
.jd_mode
) {
2899 case 0: /* Not using rt5645 JD */
2900 if (rt5645
->gpiod_hp_det
) {
2901 gpio_state
= gpiod_get_value(rt5645
->gpiod_hp_det
);
2902 dev_dbg(rt5645
->codec
->dev
, "gpio_state = %d\n",
2904 report
= rt5645_jack_detect(rt5645
->codec
, gpio_state
);
2906 snd_soc_jack_report(rt5645
->hp_jack
,
2907 report
, SND_JACK_HEADPHONE
);
2908 snd_soc_jack_report(rt5645
->mic_jack
,
2909 report
, SND_JACK_MICROPHONE
);
2911 case 1: /* 2 port */
2912 val
= snd_soc_read(rt5645
->codec
, RT5645_A_JD_CTRL1
) & 0x0070;
2914 default: /* 1 port */
2915 val
= snd_soc_read(rt5645
->codec
, RT5645_A_JD_CTRL1
) & 0x0020;
2922 case 0x30: /* 2 port */
2923 case 0x0: /* 1 port or 2 port */
2924 if (rt5645
->jack_type
== 0) {
2925 report
= rt5645_jack_detect(rt5645
->codec
, 1);
2926 /* for push button and jack out */
2930 if (snd_soc_read(rt5645
->codec
, RT5645_INT_IRQ_ST
) & 0x4) {
2931 /* button pressed */
2932 report
= SND_JACK_HEADSET
;
2933 btn_type
= rt5645_button_detect(rt5645
->codec
);
2934 /* rt5650 can report three kinds of button behavior,
2935 one click, double click and hold. However,
2936 currently we will report button pressed/released
2937 event. So all the three button behaviors are
2938 treated as button pressed. */
2943 report
|= SND_JACK_BTN_0
;
2948 report
|= SND_JACK_BTN_1
;
2953 report
|= SND_JACK_BTN_2
;
2958 report
|= SND_JACK_BTN_3
;
2960 case 0x0000: /* unpressed */
2963 dev_err(rt5645
->codec
->dev
,
2964 "Unexpected button code 0x%04x\n",
2969 if (btn_type
== 0)/* button release */
2970 report
= rt5645
->jack_type
;
2974 case 0x70: /* 2 port */
2975 case 0x10: /* 2 port */
2976 case 0x20: /* 1 port */
2978 snd_soc_update_bits(rt5645
->codec
,
2979 RT5645_INT_IRQ_ST
, 0x1, 0x0);
2980 rt5645_jack_detect(rt5645
->codec
, 0);
2986 snd_soc_jack_report(rt5645
->hp_jack
, report
, SND_JACK_HEADPHONE
);
2987 snd_soc_jack_report(rt5645
->mic_jack
, report
, SND_JACK_MICROPHONE
);
2988 if (rt5645
->en_button_func
)
2989 snd_soc_jack_report(rt5645
->btn_jack
,
2990 report
, SND_JACK_BTN_0
| SND_JACK_BTN_1
|
2991 SND_JACK_BTN_2
| SND_JACK_BTN_3
);
2994 static irqreturn_t
rt5645_irq(int irq
, void *data
)
2996 struct rt5645_priv
*rt5645
= data
;
2998 queue_delayed_work(system_power_efficient_wq
,
2999 &rt5645
->jack_detect_work
, msecs_to_jiffies(250));
3004 static int rt5645_probe(struct snd_soc_codec
*codec
)
3006 struct snd_soc_dapm_context
*dapm
= snd_soc_codec_get_dapm(codec
);
3007 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
3009 rt5645
->codec
= codec
;
3011 switch (rt5645
->codec_type
) {
3012 case CODEC_TYPE_RT5645
:
3013 snd_soc_dapm_new_controls(dapm
,
3014 rt5645_specific_dapm_widgets
,
3015 ARRAY_SIZE(rt5645_specific_dapm_widgets
));
3016 snd_soc_dapm_add_routes(dapm
,
3017 rt5645_specific_dapm_routes
,
3018 ARRAY_SIZE(rt5645_specific_dapm_routes
));
3020 case CODEC_TYPE_RT5650
:
3021 snd_soc_dapm_new_controls(dapm
,
3022 rt5650_specific_dapm_widgets
,
3023 ARRAY_SIZE(rt5650_specific_dapm_widgets
));
3024 snd_soc_dapm_add_routes(dapm
,
3025 rt5650_specific_dapm_routes
,
3026 ARRAY_SIZE(rt5650_specific_dapm_routes
));
3030 snd_soc_codec_force_bias_level(codec
, SND_SOC_BIAS_OFF
);
3032 /* for JD function */
3033 if (rt5645
->pdata
.jd_mode
) {
3034 snd_soc_dapm_force_enable_pin(dapm
, "JD Power");
3035 snd_soc_dapm_force_enable_pin(dapm
, "LDO2");
3036 snd_soc_dapm_sync(dapm
);
3042 static int rt5645_remove(struct snd_soc_codec
*codec
)
3044 rt5645_reset(codec
);
3049 static int rt5645_suspend(struct snd_soc_codec
*codec
)
3051 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
3053 regcache_cache_only(rt5645
->regmap
, true);
3054 regcache_mark_dirty(rt5645
->regmap
);
3059 static int rt5645_resume(struct snd_soc_codec
*codec
)
3061 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
3063 regcache_cache_only(rt5645
->regmap
, false);
3064 regcache_sync(rt5645
->regmap
);
3069 #define rt5645_suspend NULL
3070 #define rt5645_resume NULL
3073 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
3074 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3075 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3077 static struct snd_soc_dai_ops rt5645_aif_dai_ops
= {
3078 .hw_params
= rt5645_hw_params
,
3079 .set_fmt
= rt5645_set_dai_fmt
,
3080 .set_sysclk
= rt5645_set_dai_sysclk
,
3081 .set_tdm_slot
= rt5645_set_tdm_slot
,
3082 .set_pll
= rt5645_set_dai_pll
,
3085 static struct snd_soc_dai_driver rt5645_dai
[] = {
3087 .name
= "rt5645-aif1",
3090 .stream_name
= "AIF1 Playback",
3093 .rates
= RT5645_STEREO_RATES
,
3094 .formats
= RT5645_FORMATS
,
3097 .stream_name
= "AIF1 Capture",
3100 .rates
= RT5645_STEREO_RATES
,
3101 .formats
= RT5645_FORMATS
,
3103 .ops
= &rt5645_aif_dai_ops
,
3106 .name
= "rt5645-aif2",
3109 .stream_name
= "AIF2 Playback",
3112 .rates
= RT5645_STEREO_RATES
,
3113 .formats
= RT5645_FORMATS
,
3116 .stream_name
= "AIF2 Capture",
3119 .rates
= RT5645_STEREO_RATES
,
3120 .formats
= RT5645_FORMATS
,
3122 .ops
= &rt5645_aif_dai_ops
,
3126 static struct snd_soc_codec_driver soc_codec_dev_rt5645
= {
3127 .probe
= rt5645_probe
,
3128 .remove
= rt5645_remove
,
3129 .suspend
= rt5645_suspend
,
3130 .resume
= rt5645_resume
,
3131 .set_bias_level
= rt5645_set_bias_level
,
3132 .idle_bias_off
= true,
3133 .controls
= rt5645_snd_controls
,
3134 .num_controls
= ARRAY_SIZE(rt5645_snd_controls
),
3135 .dapm_widgets
= rt5645_dapm_widgets
,
3136 .num_dapm_widgets
= ARRAY_SIZE(rt5645_dapm_widgets
),
3137 .dapm_routes
= rt5645_dapm_routes
,
3138 .num_dapm_routes
= ARRAY_SIZE(rt5645_dapm_routes
),
3141 static const struct regmap_config rt5645_regmap
= {
3144 .use_single_rw
= true,
3145 .max_register
= RT5645_VENDOR_ID2
+ 1 + (ARRAY_SIZE(rt5645_ranges
) *
3147 .volatile_reg
= rt5645_volatile_register
,
3148 .readable_reg
= rt5645_readable_register
,
3150 .cache_type
= REGCACHE_RBTREE
,
3151 .reg_defaults
= rt5645_reg
,
3152 .num_reg_defaults
= ARRAY_SIZE(rt5645_reg
),
3153 .ranges
= rt5645_ranges
,
3154 .num_ranges
= ARRAY_SIZE(rt5645_ranges
),
3157 static const struct i2c_device_id rt5645_i2c_id
[] = {
3162 MODULE_DEVICE_TABLE(i2c
, rt5645_i2c_id
);
3165 static struct acpi_device_id rt5645_acpi_match
[] = {
3170 MODULE_DEVICE_TABLE(acpi
, rt5645_acpi_match
);
3173 static struct rt5645_platform_data
*rt5645_pdata
;
3175 static struct rt5645_platform_data strago_platform_data
= {
3176 .dmic1_data_pin
= RT5645_DMIC1_DISABLE
,
3177 .dmic2_data_pin
= RT5645_DMIC_DATA_IN2P
,
3181 static int strago_quirk_cb(const struct dmi_system_id
*id
)
3183 rt5645_pdata
= &strago_platform_data
;
3188 static const struct dmi_system_id dmi_platform_intel_braswell
[] = {
3190 .ident
= "Intel Strago",
3191 .callback
= strago_quirk_cb
,
3193 DMI_MATCH(DMI_PRODUCT_NAME
, "Strago"),
3199 static int rt5645_parse_dt(struct rt5645_priv
*rt5645
, struct device
*dev
)
3201 rt5645
->pdata
.in2_diff
= device_property_read_bool(dev
,
3202 "realtek,in2-differential");
3203 device_property_read_u32(dev
,
3204 "realtek,dmic1-data-pin", &rt5645
->pdata
.dmic1_data_pin
);
3205 device_property_read_u32(dev
,
3206 "realtek,dmic2-data-pin", &rt5645
->pdata
.dmic2_data_pin
);
3207 device_property_read_u32(dev
,
3208 "realtek,jd-mode", &rt5645
->pdata
.jd_mode
);
3213 static int rt5645_i2c_probe(struct i2c_client
*i2c
,
3214 const struct i2c_device_id
*id
)
3216 struct rt5645_platform_data
*pdata
= dev_get_platdata(&i2c
->dev
);
3217 struct rt5645_priv
*rt5645
;
3221 rt5645
= devm_kzalloc(&i2c
->dev
, sizeof(struct rt5645_priv
),
3227 i2c_set_clientdata(i2c
, rt5645
);
3230 rt5645
->pdata
= *pdata
;
3231 else if (dmi_check_system(dmi_platform_intel_braswell
))
3232 rt5645
->pdata
= *rt5645_pdata
;
3234 rt5645_parse_dt(rt5645
, &i2c
->dev
);
3236 rt5645
->gpiod_hp_det
= devm_gpiod_get_optional(&i2c
->dev
, "hp-detect",
3239 if (IS_ERR(rt5645
->gpiod_hp_det
)) {
3240 dev_err(&i2c
->dev
, "failed to initialize gpiod\n");
3241 return PTR_ERR(rt5645
->gpiod_hp_det
);
3244 rt5645
->regmap
= devm_regmap_init_i2c(i2c
, &rt5645_regmap
);
3245 if (IS_ERR(rt5645
->regmap
)) {
3246 ret
= PTR_ERR(rt5645
->regmap
);
3247 dev_err(&i2c
->dev
, "Failed to allocate register map: %d\n",
3252 regmap_read(rt5645
->regmap
, RT5645_VENDOR_ID2
, &val
);
3255 case RT5645_DEVICE_ID
:
3256 rt5645
->codec_type
= CODEC_TYPE_RT5645
;
3258 case RT5650_DEVICE_ID
:
3259 rt5645
->codec_type
= CODEC_TYPE_RT5650
;
3263 "Device with ID register %#x is not rt5645 or rt5650\n",
3268 if (rt5645
->codec_type
== CODEC_TYPE_RT5650
) {
3269 ret
= rt5650_calibration(rt5645
);
3272 pr_err("calibration failed!\n");
3275 regmap_write(rt5645
->regmap
, RT5645_RESET
, 0);
3277 ret
= regmap_register_patch(rt5645
->regmap
, init_list
,
3278 ARRAY_SIZE(init_list
));
3280 dev_warn(&i2c
->dev
, "Failed to apply regmap patch: %d\n", ret
);
3282 if (rt5645
->codec_type
== CODEC_TYPE_RT5650
) {
3283 ret
= regmap_register_patch(rt5645
->regmap
, rt5650_init_list
,
3284 ARRAY_SIZE(rt5650_init_list
));
3286 dev_warn(&i2c
->dev
, "Apply rt5650 patch failed: %d\n",
3290 if (rt5645
->pdata
.in2_diff
)
3291 regmap_update_bits(rt5645
->regmap
, RT5645_IN2_CTRL
,
3292 RT5645_IN_DF2
, RT5645_IN_DF2
);
3294 if (rt5645
->pdata
.dmic1_data_pin
|| rt5645
->pdata
.dmic2_data_pin
) {
3295 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3296 RT5645_GP2_PIN_MASK
, RT5645_GP2_PIN_DMIC1_SCL
);
3298 switch (rt5645
->pdata
.dmic1_data_pin
) {
3299 case RT5645_DMIC_DATA_IN2N
:
3300 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3301 RT5645_DMIC_1_DP_MASK
, RT5645_DMIC_1_DP_IN2N
);
3304 case RT5645_DMIC_DATA_GPIO5
:
3305 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3306 RT5645_DMIC_1_DP_MASK
, RT5645_DMIC_1_DP_GPIO5
);
3307 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3308 RT5645_GP5_PIN_MASK
, RT5645_GP5_PIN_DMIC1_SDA
);
3311 case RT5645_DMIC_DATA_GPIO11
:
3312 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3313 RT5645_DMIC_1_DP_MASK
, RT5645_DMIC_1_DP_GPIO11
);
3314 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3315 RT5645_GP11_PIN_MASK
,
3316 RT5645_GP11_PIN_DMIC1_SDA
);
3323 switch (rt5645
->pdata
.dmic2_data_pin
) {
3324 case RT5645_DMIC_DATA_IN2P
:
3325 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3326 RT5645_DMIC_2_DP_MASK
, RT5645_DMIC_2_DP_IN2P
);
3329 case RT5645_DMIC_DATA_GPIO6
:
3330 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3331 RT5645_DMIC_2_DP_MASK
, RT5645_DMIC_2_DP_GPIO6
);
3332 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3333 RT5645_GP6_PIN_MASK
, RT5645_GP6_PIN_DMIC2_SDA
);
3336 case RT5645_DMIC_DATA_GPIO10
:
3337 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3338 RT5645_DMIC_2_DP_MASK
, RT5645_DMIC_2_DP_GPIO10
);
3339 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3340 RT5645_GP10_PIN_MASK
,
3341 RT5645_GP10_PIN_DMIC2_SDA
);
3344 case RT5645_DMIC_DATA_GPIO12
:
3345 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3346 RT5645_DMIC_2_DP_MASK
, RT5645_DMIC_2_DP_GPIO12
);
3347 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3348 RT5645_GP12_PIN_MASK
,
3349 RT5645_GP12_PIN_DMIC2_SDA
);
3356 if (rt5645
->pdata
.jd_mode
) {
3357 regmap_update_bits(rt5645
->regmap
, RT5645_GEN_CTRL3
,
3358 RT5645_IRQ_CLK_GATE_CTRL
,
3359 RT5645_IRQ_CLK_GATE_CTRL
);
3360 regmap_update_bits(rt5645
->regmap
, RT5645_IN1_CTRL1
,
3361 RT5645_CBJ_BST1_EN
, RT5645_CBJ_BST1_EN
);
3362 regmap_update_bits(rt5645
->regmap
, RT5645_MICBIAS
,
3363 RT5645_IRQ_CLK_INT
, RT5645_IRQ_CLK_INT
);
3364 regmap_update_bits(rt5645
->regmap
, RT5645_IRQ_CTRL2
,
3365 RT5645_IRQ_JD_1_1_EN
, RT5645_IRQ_JD_1_1_EN
);
3366 regmap_update_bits(rt5645
->regmap
, RT5645_GEN_CTRL3
,
3367 RT5645_JD_PSV_MODE
, RT5645_JD_PSV_MODE
);
3368 regmap_update_bits(rt5645
->regmap
, RT5645_HPO_MIXER
,
3369 RT5645_IRQ_PSV_MODE
, RT5645_IRQ_PSV_MODE
);
3370 regmap_update_bits(rt5645
->regmap
, RT5645_MICBIAS
,
3371 RT5645_MIC2_OVCD_EN
, RT5645_MIC2_OVCD_EN
);
3372 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3373 RT5645_GP1_PIN_IRQ
, RT5645_GP1_PIN_IRQ
);
3374 switch (rt5645
->pdata
.jd_mode
) {
3376 regmap_update_bits(rt5645
->regmap
, RT5645_A_JD_CTRL1
,
3377 RT5645_JD1_MODE_MASK
,
3381 regmap_update_bits(rt5645
->regmap
, RT5645_A_JD_CTRL1
,
3382 RT5645_JD1_MODE_MASK
,
3386 regmap_update_bits(rt5645
->regmap
, RT5645_A_JD_CTRL1
,
3387 RT5645_JD1_MODE_MASK
,
3395 INIT_DELAYED_WORK(&rt5645
->jack_detect_work
, rt5645_jack_detect_work
);
3397 if (rt5645
->i2c
->irq
) {
3398 ret
= request_threaded_irq(rt5645
->i2c
->irq
, NULL
, rt5645_irq
,
3399 IRQF_TRIGGER_RISING
| IRQF_TRIGGER_FALLING
3400 | IRQF_ONESHOT
, "rt5645", rt5645
);
3402 dev_err(&i2c
->dev
, "Failed to reguest IRQ: %d\n", ret
);
3405 return snd_soc_register_codec(&i2c
->dev
, &soc_codec_dev_rt5645
,
3406 rt5645_dai
, ARRAY_SIZE(rt5645_dai
));
3409 static int rt5645_i2c_remove(struct i2c_client
*i2c
)
3411 struct rt5645_priv
*rt5645
= i2c_get_clientdata(i2c
);
3414 free_irq(i2c
->irq
, rt5645
);
3416 cancel_delayed_work_sync(&rt5645
->jack_detect_work
);
3418 snd_soc_unregister_codec(&i2c
->dev
);
3423 static struct i2c_driver rt5645_i2c_driver
= {
3426 .owner
= THIS_MODULE
,
3427 .acpi_match_table
= ACPI_PTR(rt5645_acpi_match
),
3429 .probe
= rt5645_i2c_probe
,
3430 .remove
= rt5645_i2c_remove
,
3431 .id_table
= rt5645_i2c_id
,
3433 module_i2c_driver(rt5645_i2c_driver
);
3435 MODULE_DESCRIPTION("ASoC RT5645 driver");
3436 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
3437 MODULE_LICENSE("GPL v2");