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bcma: register watchdog driver
[linux-2.6/btrfs-unstable.git] / drivers / watchdog / omap_wdt.c
blobf5db18dbc0f9e5e9092462142aa805a87239d696
1 /*
2 * omap_wdt.c
3 *
4 * Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
5 *
6 * Author: MontaVista Software, Inc.
7 * <gdavis@mvista.com> or <source@mvista.com>
8 *
9 * 2003 (c) MontaVista Software, Inc. This file is licensed under the
10 * terms of the GNU General Public License version 2. This program is
11 * licensed "as is" without any warranty of any kind, whether express
12 * or implied.
13 *
14 * History:
15 *
16 * 20030527: George G. Davis <gdavis@mvista.com>
17 * Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
18 * (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
19 * Based on SoftDog driver by Alan Cox <alan@lxorguk.ukuu.org.uk>
20 *
21 * Copyright (c) 2004 Texas Instruments.
22 * 1. Modified to support OMAP1610 32-KHz watchdog timer
23 * 2. Ported to 2.6 kernel
24 *
25 * Copyright (c) 2005 David Brownell
26 * Use the driver model and standard identifiers; handle bigger timeouts.
27 */
28
29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
31 #include <linux/module.h>
32 #include <linux/types.h>
33 #include <linux/kernel.h>
34 #include <linux/fs.h>
35 #include <linux/mm.h>
36 #include <linux/miscdevice.h>
37 #include <linux/watchdog.h>
38 #include <linux/reboot.h>
39 #include <linux/init.h>
40 #include <linux/err.h>
41 #include <linux/platform_device.h>
42 #include <linux/moduleparam.h>
43 #include <linux/bitops.h>
44 #include <linux/io.h>
45 #include <linux/uaccess.h>
46 #include <linux/slab.h>
47 #include <linux/pm_runtime.h>
48 #include <mach/hardware.h>
49 #include <plat/cpu.h>
50 #include <plat/prcm.h>
51
52 #include "omap_wdt.h"
53
54 static struct platform_device *omap_wdt_dev;
55
56 static unsigned timer_margin;
57 module_param(timer_margin, uint, 0);
58 MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
59
60 static unsigned int wdt_trgr_pattern = 0x1234;
61 static DEFINE_SPINLOCK(wdt_lock);
62
63 struct omap_wdt_dev {
64 void __iomem *base; /* physical */
65 struct device *dev;
66 int omap_wdt_users;
67 struct resource *mem;
68 struct miscdevice omap_wdt_miscdev;
69 };
70
71 static void omap_wdt_ping(struct omap_wdt_dev *wdev)
72 {
73 void __iomem *base = wdev->base;
74
75 /* wait for posted write to complete */
76 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
77 cpu_relax();
78
79 wdt_trgr_pattern = ~wdt_trgr_pattern;
80 __raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
81
82 /* wait for posted write to complete */
83 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
84 cpu_relax();
85 /* reloaded WCRR from WLDR */
86 }
87
88 static void omap_wdt_enable(struct omap_wdt_dev *wdev)
89 {
90 void __iomem *base = wdev->base;
91
92 /* Sequence to enable the watchdog */
93 __raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
94 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
95 cpu_relax();
96
97 __raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
98 while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
99 cpu_relax();
100 }
101
102 static void omap_wdt_disable(struct omap_wdt_dev *wdev)
103 {
104 void __iomem *base = wdev->base;
105
106 /* sequence required to disable watchdog */
107 __raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
108 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
109 cpu_relax();
110
111 __raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
112 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
113 cpu_relax();
114 }
115
116 static void omap_wdt_adjust_timeout(unsigned new_timeout)
117 {
118 if (new_timeout < TIMER_MARGIN_MIN)
119 new_timeout = TIMER_MARGIN_DEFAULT;
120 if (new_timeout > TIMER_MARGIN_MAX)
121 new_timeout = TIMER_MARGIN_MAX;
122 timer_margin = new_timeout;
123 }
124
125 static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
126 {
127 u32 pre_margin = GET_WLDR_VAL(timer_margin);
128 void __iomem *base = wdev->base;
129
130 /* just count up at 32 KHz */
131 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
132 cpu_relax();
133
134 __raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
135 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
136 cpu_relax();
137 }
138
139 /*
140 * Allow only one task to hold it open
141 */
142 static int omap_wdt_open(struct inode *inode, struct file *file)
143 {
144 struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev);
145 void __iomem *base = wdev->base;
146
147 if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
148 return -EBUSY;
149
150 pm_runtime_get_sync(wdev->dev);
151
152 /* initialize prescaler */
153 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
154 cpu_relax();
155
156 __raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
157 while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
158 cpu_relax();
159
160 file->private_data = (void *) wdev;
161
162 omap_wdt_set_timeout(wdev);
163 omap_wdt_ping(wdev); /* trigger loading of new timeout value */
164 omap_wdt_enable(wdev);
165
166 return nonseekable_open(inode, file);
167 }
168
169 static int omap_wdt_release(struct inode *inode, struct file *file)
170 {
171 struct omap_wdt_dev *wdev = file->private_data;
172
173 /*
174 * Shut off the timer unless NOWAYOUT is defined.
175 */
176 #ifndef CONFIG_WATCHDOG_NOWAYOUT
177 omap_wdt_disable(wdev);
178
179 pm_runtime_put_sync(wdev->dev);
180 #else
181 pr_crit("Unexpected close, not stopping!\n");
182 #endif
183 wdev->omap_wdt_users = 0;
184
185 return 0;
186 }
187
188 static ssize_t omap_wdt_write(struct file *file, const char __user *data,
189 size_t len, loff_t *ppos)
190 {
191 struct omap_wdt_dev *wdev = file->private_data;
192
193 /* Refresh LOAD_TIME. */
194 if (len) {
195 spin_lock(&wdt_lock);
196 omap_wdt_ping(wdev);
197 spin_unlock(&wdt_lock);
198 }
199 return len;
200 }
201
202 static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
203 unsigned long arg)
204 {
205 struct omap_wdt_dev *wdev;
206 int new_margin;
207 static const struct watchdog_info ident = {
208 .identity = "OMAP Watchdog",
209 .options = WDIOF_SETTIMEOUT,
210 .firmware_version = 0,
211 };
212
213 wdev = file->private_data;
214
215 switch (cmd) {
216 case WDIOC_GETSUPPORT:
217 return copy_to_user((struct watchdog_info __user *)arg, &ident,
218 sizeof(ident));
219 case WDIOC_GETSTATUS:
220 return put_user(0, (int __user *)arg);
221 case WDIOC_GETBOOTSTATUS:
222 #ifdef CONFIG_ARCH_OMAP1
223 if (cpu_is_omap16xx())
224 return put_user(__raw_readw(ARM_SYSST),
225 (int __user *)arg);
226 #endif
227 #ifdef CONFIG_ARCH_OMAP2PLUS
228 if (cpu_is_omap24xx())
229 return put_user(omap_prcm_get_reset_sources(),
230 (int __user *)arg);
231 #endif
232 return put_user(0, (int __user *)arg);
233 case WDIOC_KEEPALIVE:
234 spin_lock(&wdt_lock);
235 omap_wdt_ping(wdev);
236 spin_unlock(&wdt_lock);
237 return 0;
238 case WDIOC_SETTIMEOUT:
239 if (get_user(new_margin, (int __user *)arg))
240 return -EFAULT;
241 omap_wdt_adjust_timeout(new_margin);
242
243 spin_lock(&wdt_lock);
244 omap_wdt_disable(wdev);
245 omap_wdt_set_timeout(wdev);
246 omap_wdt_enable(wdev);
247
248 omap_wdt_ping(wdev);
249 spin_unlock(&wdt_lock);
250 /* Fall */
251 case WDIOC_GETTIMEOUT:
252 return put_user(timer_margin, (int __user *)arg);
253 default:
254 return -ENOTTY;
255 }
256 }
257
258 static const struct file_operations omap_wdt_fops = {
259 .owner = THIS_MODULE,
260 .write = omap_wdt_write,
261 .unlocked_ioctl = omap_wdt_ioctl,
262 .open = omap_wdt_open,
263 .release = omap_wdt_release,
264 .llseek = no_llseek,
265 };
266
267 static int __devinit omap_wdt_probe(struct platform_device *pdev)
268 {
269 struct resource *res, *mem;
270 struct omap_wdt_dev *wdev;
271 int ret;
272
273 /* reserve static register mappings */
274 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
275 if (!res) {
276 ret = -ENOENT;
277 goto err_get_resource;
278 }
279
280 if (omap_wdt_dev) {
281 ret = -EBUSY;
282 goto err_busy;
283 }
284
285 mem = request_mem_region(res->start, resource_size(res), pdev->name);
286 if (!mem) {
287 ret = -EBUSY;
288 goto err_busy;
289 }
290
291 wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
292 if (!wdev) {
293 ret = -ENOMEM;
294 goto err_kzalloc;
295 }
296
297 wdev->omap_wdt_users = 0;
298 wdev->mem = mem;
299 wdev->dev = &pdev->dev;
300
301 wdev->base = ioremap(res->start, resource_size(res));
302 if (!wdev->base) {
303 ret = -ENOMEM;
304 goto err_ioremap;
305 }
306
307 platform_set_drvdata(pdev, wdev);
308
309 pm_runtime_enable(wdev->dev);
310 pm_runtime_get_sync(wdev->dev);
311
312 omap_wdt_disable(wdev);
313 omap_wdt_adjust_timeout(timer_margin);
314
315 wdev->omap_wdt_miscdev.parent = &pdev->dev;
316 wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
317 wdev->omap_wdt_miscdev.name = "watchdog";
318 wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
319
320 ret = misc_register(&(wdev->omap_wdt_miscdev));
321 if (ret)
322 goto err_misc;
323
324 pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
325 __raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
326 timer_margin);
327
328 pm_runtime_put_sync(wdev->dev);
329
330 omap_wdt_dev = pdev;
331
332 return 0;
333
334 err_misc:
335 pm_runtime_disable(wdev->dev);
336 platform_set_drvdata(pdev, NULL);
337 iounmap(wdev->base);
338
339 err_ioremap:
340 wdev->base = NULL;
341 kfree(wdev);
342
343 err_kzalloc:
344 release_mem_region(res->start, resource_size(res));
345
346 err_busy:
347 err_get_resource:
348
349 return ret;
350 }
351
352 static void omap_wdt_shutdown(struct platform_device *pdev)
353 {
354 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
355
356 if (wdev->omap_wdt_users) {
357 omap_wdt_disable(wdev);
358 pm_runtime_put_sync(wdev->dev);
359 }
360 }
361
362 static int __devexit omap_wdt_remove(struct platform_device *pdev)
363 {
364 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
365 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
366
367 pm_runtime_disable(wdev->dev);
368 if (!res)
369 return -ENOENT;
370
371 misc_deregister(&(wdev->omap_wdt_miscdev));
372 release_mem_region(res->start, resource_size(res));
373 platform_set_drvdata(pdev, NULL);
374
375 iounmap(wdev->base);
376
377 kfree(wdev);
378 omap_wdt_dev = NULL;
379
380 return 0;
381 }
382
383 #ifdef CONFIG_PM
384
385 /* REVISIT ... not clear this is the best way to handle system suspend; and
386 * it's very inappropriate for selective device suspend (e.g. suspending this
387 * through sysfs rather than by stopping the watchdog daemon). Also, this
388 * may not play well enough with NOWAYOUT...
389 */
390
391 static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
392 {
393 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
394
395 if (wdev->omap_wdt_users) {
396 omap_wdt_disable(wdev);
397 pm_runtime_put_sync(wdev->dev);
398 }
399
400 return 0;
401 }
402
403 static int omap_wdt_resume(struct platform_device *pdev)
404 {
405 struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
406
407 if (wdev->omap_wdt_users) {
408 pm_runtime_get_sync(wdev->dev);
409 omap_wdt_enable(wdev);
410 omap_wdt_ping(wdev);
411 }
412
413 return 0;
414 }
415
416 #else
417 #define omap_wdt_suspend NULL
418 #define omap_wdt_resume NULL
419 #endif
420
421 static const struct of_device_id omap_wdt_of_match[] = {
422 { .compatible = "ti,omap3-wdt", },
423 {},
424 };
425 MODULE_DEVICE_TABLE(of, omap_wdt_of_match);
426
427 static struct platform_driver omap_wdt_driver = {
428 .probe = omap_wdt_probe,
429 .remove = __devexit_p(omap_wdt_remove),
430 .shutdown = omap_wdt_shutdown,
431 .suspend = omap_wdt_suspend,
432 .resume = omap_wdt_resume,
433 .driver = {
434 .owner = THIS_MODULE,
435 .name = "omap_wdt",
436 .of_match_table = omap_wdt_of_match,
437 },
438 };
439
440 module_platform_driver(omap_wdt_driver);
441
442 MODULE_AUTHOR("George G. Davis");
443 MODULE_LICENSE("GPL");
444 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
445 MODULE_ALIAS("platform:omap_wdt");
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