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[MMC] Fix sdhci PIO routines
[linux-2.6/btrfs-unstable.git] / drivers / mmc / sdhci.c
blob8e480140cd289d1bb9550bae7a6682cb89ed77d2
1 /*
2 * linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
3 *
4 * Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #include <linux/delay.h>
12 #include <linux/highmem.h>
13 #include <linux/pci.h>
14 #include <linux/dma-mapping.h>
15
16 #include <linux/mmc/host.h>
17 #include <linux/mmc/protocol.h>
18
19 #include <asm/scatterlist.h>
20
21 #include "sdhci.h"
22
23 #define DRIVER_NAME "sdhci"
24 #define DRIVER_VERSION "0.11"
25
26 #define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
27
28 #define DBG(f, x...) \
29 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
30
31 static const struct pci_device_id pci_ids[] __devinitdata = {
32 /* handle any SD host controller */
33 {PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)},
34 { /* end: all zeroes */ },
35 };
36
37 MODULE_DEVICE_TABLE(pci, pci_ids);
38
39 static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
40 static void sdhci_finish_data(struct sdhci_host *);
41
42 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
43 static void sdhci_finish_command(struct sdhci_host *);
44
45 static void sdhci_dumpregs(struct sdhci_host *host)
46 {
47 printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
48
49 printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
50 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
51 readw(host->ioaddr + SDHCI_HOST_VERSION));
52 printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
53 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
54 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
55 printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
56 readl(host->ioaddr + SDHCI_ARGUMENT),
57 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
58 printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
59 readl(host->ioaddr + SDHCI_PRESENT_STATE),
60 readb(host->ioaddr + SDHCI_HOST_CONTROL));
61 printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
62 readb(host->ioaddr + SDHCI_POWER_CONTROL),
63 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
64 printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
65 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
66 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
67 printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
68 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
69 readl(host->ioaddr + SDHCI_INT_STATUS));
70 printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
71 readl(host->ioaddr + SDHCI_INT_ENABLE),
72 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
73 printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
74 readw(host->ioaddr + SDHCI_ACMD12_ERR),
75 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
76 printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n",
77 readl(host->ioaddr + SDHCI_CAPABILITIES),
78 readl(host->ioaddr + SDHCI_MAX_CURRENT));
79
80 printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
81 }
82
83 /*****************************************************************************\
84 * *
85 * Low level functions *
86 * *
87 \*****************************************************************************/
88
89 static void sdhci_reset(struct sdhci_host *host, u8 mask)
90 {
91 unsigned long timeout;
92
93 writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
94
95 if (mask & SDHCI_RESET_ALL)
96 host->clock = 0;
97
98 /* Wait max 100 ms */
99 timeout = 100;
100
101 /* hw clears the bit when it's done */
102 while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
103 if (timeout == 0) {
104 printk(KERN_ERR "%s: Reset 0x%x never completed. "
105 "Please report this to " BUGMAIL ".\n",
106 mmc_hostname(host->mmc), (int)mask);
107 sdhci_dumpregs(host);
108 return;
109 }
110 timeout--;
111 mdelay(1);
112 }
113 }
114
115 static void sdhci_init(struct sdhci_host *host)
116 {
117 u32 intmask;
118
119 sdhci_reset(host, SDHCI_RESET_ALL);
120
121 intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
122 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
123 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
124 SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
125 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL |
126 SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
127
128 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
129 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
130 }
131
132 static void sdhci_activate_led(struct sdhci_host *host)
133 {
134 u8 ctrl;
135
136 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
137 ctrl |= SDHCI_CTRL_LED;
138 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
139 }
140
141 static void sdhci_deactivate_led(struct sdhci_host *host)
142 {
143 u8 ctrl;
144
145 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
146 ctrl &= ~SDHCI_CTRL_LED;
147 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
148 }
149
150 /*****************************************************************************\
151 * *
152 * Core functions *
153 * *
154 \*****************************************************************************/
155
156 static inline char* sdhci_kmap_sg(struct sdhci_host* host)
157 {
158 host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ);
159 return host->mapped_sg + host->cur_sg->offset;
160 }
161
162 static inline void sdhci_kunmap_sg(struct sdhci_host* host)
163 {
164 kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
165 }
166
167 static inline int sdhci_next_sg(struct sdhci_host* host)
168 {
169 /*
170 * Skip to next SG entry.
171 */
172 host->cur_sg++;
173 host->num_sg--;
174
175 /*
176 * Any entries left?
177 */
178 if (host->num_sg > 0) {
179 host->offset = 0;
180 host->remain = host->cur_sg->length;
181 }
182
183 return host->num_sg;
184 }
185
186 static void sdhci_read_block_pio(struct sdhci_host *host)
187 {
188 int blksize, chunk_remain;
189 u32 data;
190 char *buffer;
191 int size;
192
193 DBG("PIO reading\n");
194
195 blksize = host->data->blksz;
196 chunk_remain = 0;
197 data = 0;
198
199 buffer = sdhci_kmap_sg(host) + host->offset;
200
201 while (blksize) {
202 if (chunk_remain == 0) {
203 data = readl(host->ioaddr + SDHCI_BUFFER);
204 chunk_remain = min(blksize, 4);
205 }
206
207 size = min(host->size, host->remain);
208 size = min(size, chunk_remain);
209
210 chunk_remain -= size;
211 blksize -= size;
212 host->offset += size;
213 host->remain -= size;
214 host->size -= size;
215 while (size) {
216 *buffer = data & 0xFF;
217 buffer++;
218 data >>= 8;
219 size--;
220 }
221
222 if (host->remain == 0) {
223 sdhci_kunmap_sg(host);
224 if (sdhci_next_sg(host) == 0) {
225 BUG_ON(blksize != 0);
226 return;
227 }
228 buffer = sdhci_kmap_sg(host);
229 }
230 }
231
232 sdhci_kunmap_sg(host);
233 }
234
235 static void sdhci_write_block_pio(struct sdhci_host *host)
236 {
237 int blksize, chunk_remain;
238 u32 data;
239 char *buffer;
240 int bytes, size;
241
242 DBG("PIO writing\n");
243
244 blksize = host->data->blksz;
245 chunk_remain = 4;
246 data = 0;
247
248 bytes = 0;
249 buffer = sdhci_kmap_sg(host) + host->offset;
250
251 while (blksize) {
252 size = min(host->size, host->remain);
253 size = min(size, chunk_remain);
254
255 chunk_remain -= size;
256 blksize -= size;
257 host->offset += size;
258 host->remain -= size;
259 host->size -= size;
260 while (size) {
261 data >>= 8;
262 data |= (u32)*buffer << 24;
263 buffer++;
264 size--;
265 }
266
267 if (chunk_remain == 0) {
268 writel(data, host->ioaddr + SDHCI_BUFFER);
269 chunk_remain = min(blksize, 4);
270 }
271
272 if (host->remain == 0) {
273 sdhci_kunmap_sg(host);
274 if (sdhci_next_sg(host) == 0) {
275 BUG_ON(blksize != 0);
276 return;
277 }
278 buffer = sdhci_kmap_sg(host);
279 }
280 }
281
282 sdhci_kunmap_sg(host);
283 }
284
285 static void sdhci_transfer_pio(struct sdhci_host *host)
286 {
287 u32 mask;
288
289 BUG_ON(!host->data);
290
291 if (host->size == 0)
292 return;
293
294 if (host->data->flags & MMC_DATA_READ)
295 mask = SDHCI_DATA_AVAILABLE;
296 else
297 mask = SDHCI_SPACE_AVAILABLE;
298
299 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
300 if (host->data->flags & MMC_DATA_READ)
301 sdhci_read_block_pio(host);
302 else
303 sdhci_write_block_pio(host);
304
305 if (host->size == 0)
306 break;
307
308 BUG_ON(host->num_sg == 0);
309 }
310
311 DBG("PIO transfer complete.\n");
312 }
313
314 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
315 {
316 u8 count;
317 unsigned target_timeout, current_timeout;
318
319 WARN_ON(host->data);
320
321 if (data == NULL)
322 return;
323
324 DBG("blksz %04x blks %04x flags %08x\n",
325 data->blksz, data->blocks, data->flags);
326 DBG("tsac %d ms nsac %d clk\n",
327 data->timeout_ns / 1000000, data->timeout_clks);
328
329 /* timeout in us */
330 target_timeout = data->timeout_ns / 1000 +
331 data->timeout_clks / host->clock;
332
333 /*
334 * Figure out needed cycles.
335 * We do this in steps in order to fit inside a 32 bit int.
336 * The first step is the minimum timeout, which will have a
337 * minimum resolution of 6 bits:
338 * (1) 2^13*1000 > 2^22,
339 * (2) host->timeout_clk < 2^16
340 * =>
341 * (1) / (2) > 2^6
342 */
343 count = 0;
344 current_timeout = (1 << 13) * 1000 / host->timeout_clk;
345 while (current_timeout < target_timeout) {
346 count++;
347 current_timeout <<= 1;
348 if (count >= 0xF)
349 break;
350 }
351
352 if (count >= 0xF) {
353 printk(KERN_WARNING "%s: Too large timeout requested!\n",
354 mmc_hostname(host->mmc));
355 count = 0xE;
356 }
357
358 writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
359
360 if (host->flags & SDHCI_USE_DMA) {
361 int count;
362
363 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
364 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
365 BUG_ON(count != 1);
366
367 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
368 } else {
369 host->size = data->blksz * data->blocks;
370
371 host->cur_sg = data->sg;
372 host->num_sg = data->sg_len;
373
374 host->offset = 0;
375 host->remain = host->cur_sg->length;
376 }
377
378 writew(data->blksz, host->ioaddr + SDHCI_BLOCK_SIZE);
379 writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
380 }
381
382 static void sdhci_set_transfer_mode(struct sdhci_host *host,
383 struct mmc_data *data)
384 {
385 u16 mode;
386
387 WARN_ON(host->data);
388
389 if (data == NULL)
390 return;
391
392 mode = SDHCI_TRNS_BLK_CNT_EN;
393 if (data->blocks > 1)
394 mode |= SDHCI_TRNS_MULTI;
395 if (data->flags & MMC_DATA_READ)
396 mode |= SDHCI_TRNS_READ;
397 if (host->flags & SDHCI_USE_DMA)
398 mode |= SDHCI_TRNS_DMA;
399
400 writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
401 }
402
403 static void sdhci_finish_data(struct sdhci_host *host)
404 {
405 struct mmc_data *data;
406 u16 blocks;
407
408 BUG_ON(!host->data);
409
410 data = host->data;
411 host->data = NULL;
412
413 if (host->flags & SDHCI_USE_DMA) {
414 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
415 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
416 }
417
418 /*
419 * Controller doesn't count down when in single block mode.
420 */
421 if ((data->blocks == 1) && (data->error == MMC_ERR_NONE))
422 blocks = 0;
423 else
424 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
425 data->bytes_xfered = data->blksz * (data->blocks - blocks);
426
427 if ((data->error == MMC_ERR_NONE) && blocks) {
428 printk(KERN_ERR "%s: Controller signalled completion even "
429 "though there were blocks left. Please report this "
430 "to " BUGMAIL ".\n", mmc_hostname(host->mmc));
431 data->error = MMC_ERR_FAILED;
432 }
433
434 if (host->size != 0) {
435 printk(KERN_ERR "%s: %d bytes were left untransferred. "
436 "Please report this to " BUGMAIL ".\n",
437 mmc_hostname(host->mmc), host->size);
438 data->error = MMC_ERR_FAILED;
439 }
440
441 DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered);
442
443 if (data->stop) {
444 /*
445 * The controller needs a reset of internal state machines
446 * upon error conditions.
447 */
448 if (data->error != MMC_ERR_NONE) {
449 sdhci_reset(host, SDHCI_RESET_CMD);
450 sdhci_reset(host, SDHCI_RESET_DATA);
451 }
452
453 sdhci_send_command(host, data->stop);
454 } else
455 tasklet_schedule(&host->finish_tasklet);
456 }
457
458 static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
459 {
460 int flags;
461 unsigned long timeout;
462
463 WARN_ON(host->cmd);
464
465 DBG("Sending cmd (%x)\n", cmd->opcode);
466
467 /* Wait max 10 ms */
468 timeout = 10;
469 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) &
470 (SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT)) {
471 if (timeout == 0) {
472 printk(KERN_ERR "%s: Controller never released "
473 "inhibit bits. Please report this to "
474 BUGMAIL ".\n", mmc_hostname(host->mmc));
475 sdhci_dumpregs(host);
476 cmd->error = MMC_ERR_FAILED;
477 tasklet_schedule(&host->finish_tasklet);
478 return;
479 }
480 timeout--;
481 mdelay(1);
482 }
483
484 mod_timer(&host->timer, jiffies + 10 * HZ);
485
486 host->cmd = cmd;
487
488 sdhci_prepare_data(host, cmd->data);
489
490 writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
491
492 sdhci_set_transfer_mode(host, cmd->data);
493
494 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
495 printk(KERN_ERR "%s: Unsupported response type! "
496 "Please report this to " BUGMAIL ".\n",
497 mmc_hostname(host->mmc));
498 cmd->error = MMC_ERR_INVALID;
499 tasklet_schedule(&host->finish_tasklet);
500 return;
501 }
502
503 if (!(cmd->flags & MMC_RSP_PRESENT))
504 flags = SDHCI_CMD_RESP_NONE;
505 else if (cmd->flags & MMC_RSP_136)
506 flags = SDHCI_CMD_RESP_LONG;
507 else if (cmd->flags & MMC_RSP_BUSY)
508 flags = SDHCI_CMD_RESP_SHORT_BUSY;
509 else
510 flags = SDHCI_CMD_RESP_SHORT;
511
512 if (cmd->flags & MMC_RSP_CRC)
513 flags |= SDHCI_CMD_CRC;
514 if (cmd->flags & MMC_RSP_OPCODE)
515 flags |= SDHCI_CMD_INDEX;
516 if (cmd->data)
517 flags |= SDHCI_CMD_DATA;
518
519 writel(SDHCI_MAKE_CMD(cmd->opcode, flags),
520 host->ioaddr + SDHCI_COMMAND);
521 }
522
523 static void sdhci_finish_command(struct sdhci_host *host)
524 {
525 int i;
526
527 BUG_ON(host->cmd == NULL);
528
529 if (host->cmd->flags & MMC_RSP_PRESENT) {
530 if (host->cmd->flags & MMC_RSP_136) {
531 /* CRC is stripped so we need to do some shifting. */
532 for (i = 0;i < 4;i++) {
533 host->cmd->resp[i] = readl(host->ioaddr +
534 SDHCI_RESPONSE + (3-i)*4) << 8;
535 if (i != 3)
536 host->cmd->resp[i] |=
537 readb(host->ioaddr +
538 SDHCI_RESPONSE + (3-i)*4-1);
539 }
540 } else {
541 host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
542 }
543 }
544
545 host->cmd->error = MMC_ERR_NONE;
546
547 DBG("Ending cmd (%x)\n", host->cmd->opcode);
548
549 if (host->cmd->data)
550 host->data = host->cmd->data;
551 else
552 tasklet_schedule(&host->finish_tasklet);
553
554 host->cmd = NULL;
555 }
556
557 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
558 {
559 int div;
560 u16 clk;
561 unsigned long timeout;
562
563 if (clock == host->clock)
564 return;
565
566 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
567
568 if (clock == 0)
569 goto out;
570
571 for (div = 1;div < 256;div *= 2) {
572 if ((host->max_clk / div) <= clock)
573 break;
574 }
575 div >>= 1;
576
577 clk = div << SDHCI_DIVIDER_SHIFT;
578 clk |= SDHCI_CLOCK_INT_EN;
579 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
580
581 /* Wait max 10 ms */
582 timeout = 10;
583 while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
584 & SDHCI_CLOCK_INT_STABLE)) {
585 if (timeout == 0) {
586 printk(KERN_ERR "%s: Internal clock never stabilised. "
587 "Please report this to " BUGMAIL ".\n",
588 mmc_hostname(host->mmc));
589 sdhci_dumpregs(host);
590 return;
591 }
592 timeout--;
593 mdelay(1);
594 }
595
596 clk |= SDHCI_CLOCK_CARD_EN;
597 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
598
599 out:
600 host->clock = clock;
601 }
602
603 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
604 {
605 u8 pwr;
606
607 if (host->power == power)
608 return;
609
610 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
611
612 if (power == (unsigned short)-1)
613 goto out;
614
615 pwr = SDHCI_POWER_ON;
616
617 switch (power) {
618 case MMC_VDD_170:
619 case MMC_VDD_180:
620 case MMC_VDD_190:
621 pwr |= SDHCI_POWER_180;
622 break;
623 case MMC_VDD_290:
624 case MMC_VDD_300:
625 case MMC_VDD_310:
626 pwr |= SDHCI_POWER_300;
627 break;
628 case MMC_VDD_320:
629 case MMC_VDD_330:
630 case MMC_VDD_340:
631 pwr |= SDHCI_POWER_330;
632 break;
633 default:
634 BUG();
635 }
636
637 writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
638
639 out:
640 host->power = power;
641 }
642
643 /*****************************************************************************\
644 * *
645 * MMC callbacks *
646 * *
647 \*****************************************************************************/
648
649 static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
650 {
651 struct sdhci_host *host;
652 unsigned long flags;
653
654 host = mmc_priv(mmc);
655
656 spin_lock_irqsave(&host->lock, flags);
657
658 WARN_ON(host->mrq != NULL);
659
660 sdhci_activate_led(host);
661
662 host->mrq = mrq;
663
664 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
665 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
666 tasklet_schedule(&host->finish_tasklet);
667 } else
668 sdhci_send_command(host, mrq->cmd);
669
670 spin_unlock_irqrestore(&host->lock, flags);
671 }
672
673 static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
674 {
675 struct sdhci_host *host;
676 unsigned long flags;
677 u8 ctrl;
678
679 host = mmc_priv(mmc);
680
681 spin_lock_irqsave(&host->lock, flags);
682
683 /*
684 * Reset the chip on each power off.
685 * Should clear out any weird states.
686 */
687 if (ios->power_mode == MMC_POWER_OFF) {
688 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
689 sdhci_init(host);
690 }
691
692 sdhci_set_clock(host, ios->clock);
693
694 if (ios->power_mode == MMC_POWER_OFF)
695 sdhci_set_power(host, -1);
696 else
697 sdhci_set_power(host, ios->vdd);
698
699 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
700 if (ios->bus_width == MMC_BUS_WIDTH_4)
701 ctrl |= SDHCI_CTRL_4BITBUS;
702 else
703 ctrl &= ~SDHCI_CTRL_4BITBUS;
704 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
705
706 spin_unlock_irqrestore(&host->lock, flags);
707 }
708
709 static int sdhci_get_ro(struct mmc_host *mmc)
710 {
711 struct sdhci_host *host;
712 unsigned long flags;
713 int present;
714
715 host = mmc_priv(mmc);
716
717 spin_lock_irqsave(&host->lock, flags);
718
719 present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
720
721 spin_unlock_irqrestore(&host->lock, flags);
722
723 return !(present & SDHCI_WRITE_PROTECT);
724 }
725
726 static struct mmc_host_ops sdhci_ops = {
727 .request = sdhci_request,
728 .set_ios = sdhci_set_ios,
729 .get_ro = sdhci_get_ro,
730 };
731
732 /*****************************************************************************\
733 * *
734 * Tasklets *
735 * *
736 \*****************************************************************************/
737
738 static void sdhci_tasklet_card(unsigned long param)
739 {
740 struct sdhci_host *host;
741 unsigned long flags;
742
743 host = (struct sdhci_host*)param;
744
745 spin_lock_irqsave(&host->lock, flags);
746
747 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
748 if (host->mrq) {
749 printk(KERN_ERR "%s: Card removed during transfer!\n",
750 mmc_hostname(host->mmc));
751 printk(KERN_ERR "%s: Resetting controller.\n",
752 mmc_hostname(host->mmc));
753
754 sdhci_reset(host, SDHCI_RESET_CMD);
755 sdhci_reset(host, SDHCI_RESET_DATA);
756
757 host->mrq->cmd->error = MMC_ERR_FAILED;
758 tasklet_schedule(&host->finish_tasklet);
759 }
760 }
761
762 spin_unlock_irqrestore(&host->lock, flags);
763
764 mmc_detect_change(host->mmc, msecs_to_jiffies(500));
765 }
766
767 static void sdhci_tasklet_finish(unsigned long param)
768 {
769 struct sdhci_host *host;
770 unsigned long flags;
771 struct mmc_request *mrq;
772
773 host = (struct sdhci_host*)param;
774
775 spin_lock_irqsave(&host->lock, flags);
776
777 del_timer(&host->timer);
778
779 mrq = host->mrq;
780
781 DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode);
782
783 /*
784 * The controller needs a reset of internal state machines
785 * upon error conditions.
786 */
787 if ((mrq->cmd->error != MMC_ERR_NONE) ||
788 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) ||
789 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) {
790 sdhci_reset(host, SDHCI_RESET_CMD);
791 sdhci_reset(host, SDHCI_RESET_DATA);
792 }
793
794 host->mrq = NULL;
795 host->cmd = NULL;
796 host->data = NULL;
797
798 sdhci_deactivate_led(host);
799
800 spin_unlock_irqrestore(&host->lock, flags);
801
802 mmc_request_done(host->mmc, mrq);
803 }
804
805 static void sdhci_timeout_timer(unsigned long data)
806 {
807 struct sdhci_host *host;
808 unsigned long flags;
809
810 host = (struct sdhci_host*)data;
811
812 spin_lock_irqsave(&host->lock, flags);
813
814 if (host->mrq) {
815 printk(KERN_ERR "%s: Timeout waiting for hardware interrupt. "
816 "Please report this to " BUGMAIL ".\n",
817 mmc_hostname(host->mmc));
818 sdhci_dumpregs(host);
819
820 if (host->data) {
821 host->data->error = MMC_ERR_TIMEOUT;
822 sdhci_finish_data(host);
823 } else {
824 if (host->cmd)
825 host->cmd->error = MMC_ERR_TIMEOUT;
826 else
827 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
828
829 tasklet_schedule(&host->finish_tasklet);
830 }
831 }
832
833 spin_unlock_irqrestore(&host->lock, flags);
834 }
835
836 /*****************************************************************************\
837 * *
838 * Interrupt handling *
839 * *
840 \*****************************************************************************/
841
842 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
843 {
844 BUG_ON(intmask == 0);
845
846 if (!host->cmd) {
847 printk(KERN_ERR "%s: Got command interrupt even though no "
848 "command operation was in progress.\n",
849 mmc_hostname(host->mmc));
850 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
851 mmc_hostname(host->mmc));
852 sdhci_dumpregs(host);
853 return;
854 }
855
856 if (intmask & SDHCI_INT_RESPONSE)
857 sdhci_finish_command(host);
858 else {
859 if (intmask & SDHCI_INT_TIMEOUT)
860 host->cmd->error = MMC_ERR_TIMEOUT;
861 else if (intmask & SDHCI_INT_CRC)
862 host->cmd->error = MMC_ERR_BADCRC;
863 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX))
864 host->cmd->error = MMC_ERR_FAILED;
865 else
866 host->cmd->error = MMC_ERR_INVALID;
867
868 tasklet_schedule(&host->finish_tasklet);
869 }
870 }
871
872 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
873 {
874 BUG_ON(intmask == 0);
875
876 if (!host->data) {
877 /*
878 * A data end interrupt is sent together with the response
879 * for the stop command.
880 */
881 if (intmask & SDHCI_INT_DATA_END)
882 return;
883
884 printk(KERN_ERR "%s: Got data interrupt even though no "
885 "data operation was in progress.\n",
886 mmc_hostname(host->mmc));
887 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
888 mmc_hostname(host->mmc));
889 sdhci_dumpregs(host);
890
891 return;
892 }
893
894 if (intmask & SDHCI_INT_DATA_TIMEOUT)
895 host->data->error = MMC_ERR_TIMEOUT;
896 else if (intmask & SDHCI_INT_DATA_CRC)
897 host->data->error = MMC_ERR_BADCRC;
898 else if (intmask & SDHCI_INT_DATA_END_BIT)
899 host->data->error = MMC_ERR_FAILED;
900
901 if (host->data->error != MMC_ERR_NONE)
902 sdhci_finish_data(host);
903 else {
904 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
905 sdhci_transfer_pio(host);
906
907 if (intmask & SDHCI_INT_DATA_END)
908 sdhci_finish_data(host);
909 }
910 }
911
912 static irqreturn_t sdhci_irq(int irq, void *dev_id, struct pt_regs *regs)
913 {
914 irqreturn_t result;
915 struct sdhci_host* host = dev_id;
916 u32 intmask;
917
918 spin_lock(&host->lock);
919
920 intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
921
922 if (!intmask) {
923 result = IRQ_NONE;
924 goto out;
925 }
926
927 DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
928
929 if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
930 writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE),
931 host->ioaddr + SDHCI_INT_STATUS);
932 tasklet_schedule(&host->card_tasklet);
933 }
934
935 intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
936
937 if (intmask & SDHCI_INT_CMD_MASK) {
938 writel(intmask & SDHCI_INT_CMD_MASK,
939 host->ioaddr + SDHCI_INT_STATUS);
940 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
941 }
942
943 if (intmask & SDHCI_INT_DATA_MASK) {
944 writel(intmask & SDHCI_INT_DATA_MASK,
945 host->ioaddr + SDHCI_INT_STATUS);
946 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
947 }
948
949 intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
950
951 if (intmask & SDHCI_INT_BUS_POWER) {
952 printk(KERN_ERR "%s: Card is consuming too much power!\n",
953 mmc_hostname(host->mmc));
954 writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS);
955 }
956
957 intmask &= SDHCI_INT_BUS_POWER;
958
959 if (intmask) {
960 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x. Please "
961 "report this to " BUGMAIL ".\n",
962 mmc_hostname(host->mmc), intmask);
963 sdhci_dumpregs(host);
964
965 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
966 }
967
968 result = IRQ_HANDLED;
969
970 out:
971 spin_unlock(&host->lock);
972
973 return result;
974 }
975
976 /*****************************************************************************\
977 * *
978 * Suspend/resume *
979 * *
980 \*****************************************************************************/
981
982 #ifdef CONFIG_PM
983
984 static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
985 {
986 struct sdhci_chip *chip;
987 int i, ret;
988
989 chip = pci_get_drvdata(pdev);
990 if (!chip)
991 return 0;
992
993 DBG("Suspending...\n");
994
995 for (i = 0;i < chip->num_slots;i++) {
996 if (!chip->hosts[i])
997 continue;
998 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
999 if (ret) {
1000 for (i--;i >= 0;i--)
1001 mmc_resume_host(chip->hosts[i]->mmc);
1002 return ret;
1003 }
1004 }
1005
1006 pci_save_state(pdev);
1007 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1008 pci_disable_device(pdev);
1009 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1010
1011 return 0;
1012 }
1013
1014 static int sdhci_resume (struct pci_dev *pdev)
1015 {
1016 struct sdhci_chip *chip;
1017 int i, ret;
1018
1019 chip = pci_get_drvdata(pdev);
1020 if (!chip)
1021 return 0;
1022
1023 DBG("Resuming...\n");
1024
1025 pci_set_power_state(pdev, PCI_D0);
1026 pci_restore_state(pdev);
1027 pci_enable_device(pdev);
1028
1029 for (i = 0;i < chip->num_slots;i++) {
1030 if (!chip->hosts[i])
1031 continue;
1032 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
1033 pci_set_master(pdev);
1034 sdhci_init(chip->hosts[i]);
1035 ret = mmc_resume_host(chip->hosts[i]->mmc);
1036 if (ret)
1037 return ret;
1038 }
1039
1040 return 0;
1041 }
1042
1043 #else /* CONFIG_PM */
1044
1045 #define sdhci_suspend NULL
1046 #define sdhci_resume NULL
1047
1048 #endif /* CONFIG_PM */
1049
1050 /*****************************************************************************\
1051 * *
1052 * Device probing/removal *
1053 * *
1054 \*****************************************************************************/
1055
1056 static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1057 {
1058 int ret;
1059 struct sdhci_chip *chip;
1060 struct mmc_host *mmc;
1061 struct sdhci_host *host;
1062
1063 u8 first_bar;
1064 unsigned int caps;
1065
1066 chip = pci_get_drvdata(pdev);
1067 BUG_ON(!chip);
1068
1069 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1070 if (ret)
1071 return ret;
1072
1073 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1074
1075 if (first_bar > 5) {
1076 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
1077 return -ENODEV;
1078 }
1079
1080 if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
1081 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
1082 return -ENODEV;
1083 }
1084
1085 if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
1086 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. Aborting.\n");
1087 return -ENODEV;
1088 }
1089
1090 mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
1091 if (!mmc)
1092 return -ENOMEM;
1093
1094 host = mmc_priv(mmc);
1095 host->mmc = mmc;
1096
1097 host->bar = first_bar + slot;
1098
1099 host->addr = pci_resource_start(pdev, host->bar);
1100 host->irq = pdev->irq;
1101
1102 DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1103
1104 snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1105
1106 ret = pci_request_region(pdev, host->bar, host->slot_descr);
1107 if (ret)
1108 goto free;
1109
1110 host->ioaddr = ioremap_nocache(host->addr,
1111 pci_resource_len(pdev, host->bar));
1112 if (!host->ioaddr) {
1113 ret = -ENOMEM;
1114 goto release;
1115 }
1116
1117 caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1118
1119 if ((caps & SDHCI_CAN_DO_DMA) && ((pdev->class & 0x0000FF) == 0x01))
1120 host->flags |= SDHCI_USE_DMA;
1121
1122 if (host->flags & SDHCI_USE_DMA) {
1123 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1124 printk(KERN_WARNING "%s: No suitable DMA available. "
1125 "Falling back to PIO.\n", host->slot_descr);
1126 host->flags &= ~SDHCI_USE_DMA;
1127 }
1128 }
1129
1130 if (host->flags & SDHCI_USE_DMA)
1131 pci_set_master(pdev);
1132 else /* XXX: Hack to get MMC layer to avoid highmem */
1133 pdev->dma_mask = 0;
1134
1135 host->max_clk =
1136 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1137 if (host->max_clk == 0) {
1138 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1139 "frequency.\n", host->slot_descr);
1140 ret = -ENODEV;
1141 goto unmap;
1142 }
1143 host->max_clk *= 1000000;
1144
1145 host->timeout_clk =
1146 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1147 if (host->timeout_clk == 0) {
1148 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1149 "frequency.\n", host->slot_descr);
1150 ret = -ENODEV;
1151 goto unmap;
1152 }
1153 if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1154 host->timeout_clk *= 1000;
1155
1156 /*
1157 * Set host parameters.
1158 */
1159 mmc->ops = &sdhci_ops;
1160 mmc->f_min = host->max_clk / 256;
1161 mmc->f_max = host->max_clk;
1162 mmc->caps = MMC_CAP_4_BIT_DATA;
1163
1164 mmc->ocr_avail = 0;
1165 if (caps & SDHCI_CAN_VDD_330)
1166 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1167 else if (caps & SDHCI_CAN_VDD_300)
1168 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1169 else if (caps & SDHCI_CAN_VDD_180)
1170 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19;
1171
1172 if (mmc->ocr_avail == 0) {
1173 printk(KERN_ERR "%s: Hardware doesn't report any "
1174 "support voltages.\n", host->slot_descr);
1175 ret = -ENODEV;
1176 goto unmap;
1177 }
1178
1179 spin_lock_init(&host->lock);
1180
1181 /*
1182 * Maximum number of segments. Hardware cannot do scatter lists.
1183 */
1184 if (host->flags & SDHCI_USE_DMA)
1185 mmc->max_hw_segs = 1;
1186 else
1187 mmc->max_hw_segs = 16;
1188 mmc->max_phys_segs = 16;
1189
1190 /*
1191 * Maximum number of sectors in one transfer. Limited by sector
1192 * count register.
1193 */
1194 mmc->max_sectors = 0x3FFF;
1195
1196 /*
1197 * Maximum segment size. Could be one segment with the maximum number
1198 * of sectors.
1199 */
1200 mmc->max_seg_size = mmc->max_sectors * 512;
1201
1202 /*
1203 * Init tasklets.
1204 */
1205 tasklet_init(&host->card_tasklet,
1206 sdhci_tasklet_card, (unsigned long)host);
1207 tasklet_init(&host->finish_tasklet,
1208 sdhci_tasklet_finish, (unsigned long)host);
1209
1210 setup_timer(&host->timer, sdhci_timeout_timer, (long)host);
1211
1212 ret = request_irq(host->irq, sdhci_irq, SA_SHIRQ,
1213 host->slot_descr, host);
1214 if (ret)
1215 goto untasklet;
1216
1217 sdhci_init(host);
1218
1219 #ifdef CONFIG_MMC_DEBUG
1220 sdhci_dumpregs(host);
1221 #endif
1222
1223 host->chip = chip;
1224 chip->hosts[slot] = host;
1225
1226 mmc_add_host(mmc);
1227
1228 printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1229 host->addr, host->irq,
1230 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1231
1232 return 0;
1233
1234 untasklet:
1235 tasklet_kill(&host->card_tasklet);
1236 tasklet_kill(&host->finish_tasklet);
1237 unmap:
1238 iounmap(host->ioaddr);
1239 release:
1240 pci_release_region(pdev, host->bar);
1241 free:
1242 mmc_free_host(mmc);
1243
1244 return ret;
1245 }
1246
1247 static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1248 {
1249 struct sdhci_chip *chip;
1250 struct mmc_host *mmc;
1251 struct sdhci_host *host;
1252
1253 chip = pci_get_drvdata(pdev);
1254 host = chip->hosts[slot];
1255 mmc = host->mmc;
1256
1257 chip->hosts[slot] = NULL;
1258
1259 mmc_remove_host(mmc);
1260
1261 sdhci_reset(host, SDHCI_RESET_ALL);
1262
1263 free_irq(host->irq, host);
1264
1265 del_timer_sync(&host->timer);
1266
1267 tasklet_kill(&host->card_tasklet);
1268 tasklet_kill(&host->finish_tasklet);
1269
1270 iounmap(host->ioaddr);
1271
1272 pci_release_region(pdev, host->bar);
1273
1274 mmc_free_host(mmc);
1275 }
1276
1277 static int __devinit sdhci_probe(struct pci_dev *pdev,
1278 const struct pci_device_id *ent)
1279 {
1280 int ret, i;
1281 u8 slots, rev;
1282 struct sdhci_chip *chip;
1283
1284 BUG_ON(pdev == NULL);
1285 BUG_ON(ent == NULL);
1286
1287 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1288
1289 printk(KERN_INFO DRIVER_NAME
1290 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1291 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
1292 (int)rev);
1293
1294 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1295 if (ret)
1296 return ret;
1297
1298 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1299 DBG("found %d slot(s)\n", slots);
1300 if (slots == 0)
1301 return -ENODEV;
1302
1303 ret = pci_enable_device(pdev);
1304 if (ret)
1305 return ret;
1306
1307 chip = kzalloc(sizeof(struct sdhci_chip) +
1308 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1309 if (!chip) {
1310 ret = -ENOMEM;
1311 goto err;
1312 }
1313
1314 chip->pdev = pdev;
1315
1316 chip->num_slots = slots;
1317 pci_set_drvdata(pdev, chip);
1318
1319 for (i = 0;i < slots;i++) {
1320 ret = sdhci_probe_slot(pdev, i);
1321 if (ret) {
1322 for (i--;i >= 0;i--)
1323 sdhci_remove_slot(pdev, i);
1324 goto free;
1325 }
1326 }
1327
1328 return 0;
1329
1330 free:
1331 pci_set_drvdata(pdev, NULL);
1332 kfree(chip);
1333
1334 err:
1335 pci_disable_device(pdev);
1336 return ret;
1337 }
1338
1339 static void __devexit sdhci_remove(struct pci_dev *pdev)
1340 {
1341 int i;
1342 struct sdhci_chip *chip;
1343
1344 chip = pci_get_drvdata(pdev);
1345
1346 if (chip) {
1347 for (i = 0;i < chip->num_slots;i++)
1348 sdhci_remove_slot(pdev, i);
1349
1350 pci_set_drvdata(pdev, NULL);
1351
1352 kfree(chip);
1353 }
1354
1355 pci_disable_device(pdev);
1356 }
1357
1358 static struct pci_driver sdhci_driver = {
1359 .name = DRIVER_NAME,
1360 .id_table = pci_ids,
1361 .probe = sdhci_probe,
1362 .remove = __devexit_p(sdhci_remove),
1363 .suspend = sdhci_suspend,
1364 .resume = sdhci_resume,
1365 };
1366
1367 /*****************************************************************************\
1368 * *
1369 * Driver init/exit *
1370 * *
1371 \*****************************************************************************/
1372
1373 static int __init sdhci_drv_init(void)
1374 {
1375 printk(KERN_INFO DRIVER_NAME
1376 ": Secure Digital Host Controller Interface driver, "
1377 DRIVER_VERSION "\n");
1378 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1379
1380 return pci_register_driver(&sdhci_driver);
1381 }
1382
1383 static void __exit sdhci_drv_exit(void)
1384 {
1385 DBG("Exiting\n");
1386
1387 pci_unregister_driver(&sdhci_driver);
1388 }
1389
1390 module_init(sdhci_drv_init);
1391 module_exit(sdhci_drv_exit);
1392
1393 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1394 MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1395 MODULE_VERSION(DRIVER_VERSION);
1396 MODULE_LICENSE("GPL");
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