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mwl8k: don't return zero on failure paths in mwl8k_probe[_hw]()
[linux-2.6/btrfs-unstable.git] / drivers / net / wireless / mwl8k.c
blob68357641c4147367ac4d9bbf3e986b215165dcf1
1 /*
2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards
4 *
5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/sched.h>
17 #include <linux/spinlock.h>
18 #include <linux/list.h>
19 #include <linux/pci.h>
20 #include <linux/delay.h>
21 #include <linux/completion.h>
22 #include <linux/etherdevice.h>
23 #include <linux/slab.h>
24 #include <net/mac80211.h>
25 #include <linux/moduleparam.h>
26 #include <linux/firmware.h>
27 #include <linux/workqueue.h>
28
29 #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
30 #define MWL8K_NAME KBUILD_MODNAME
31 #define MWL8K_VERSION "0.13"
32
33 /* Module parameters */
34 static bool ap_mode_default;
35 module_param(ap_mode_default, bool, 0);
36 MODULE_PARM_DESC(ap_mode_default,
37 "Set to 1 to make ap mode the default instead of sta mode");
38
39 /* Register definitions */
40 #define MWL8K_HIU_GEN_PTR 0x00000c10
41 #define MWL8K_MODE_STA 0x0000005a
42 #define MWL8K_MODE_AP 0x000000a5
43 #define MWL8K_HIU_INT_CODE 0x00000c14
44 #define MWL8K_FWSTA_READY 0xf0f1f2f4
45 #define MWL8K_FWAP_READY 0xf1f2f4a5
46 #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
47 #define MWL8K_HIU_SCRATCH 0x00000c40
48
49 /* Host->device communications */
50 #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
51 #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
52 #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
53 #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
54 #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
55 #define MWL8K_H2A_INT_DUMMY (1 << 20)
56 #define MWL8K_H2A_INT_RESET (1 << 15)
57 #define MWL8K_H2A_INT_DOORBELL (1 << 1)
58 #define MWL8K_H2A_INT_PPA_READY (1 << 0)
59
60 /* Device->host communications */
61 #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
62 #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
63 #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
64 #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
65 #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
66 #define MWL8K_A2H_INT_DUMMY (1 << 20)
67 #define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14)
68 #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
69 #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
70 #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
71 #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
72 #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
73 #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
74 #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
75 #define MWL8K_A2H_INT_RX_READY (1 << 1)
76 #define MWL8K_A2H_INT_TX_DONE (1 << 0)
77
78 /* HW micro second timer register
79 * located at offset 0xA600. This
80 * will be used to timestamp tx
81 * packets.
82 */
83
84 #define MWL8K_HW_TIMER_REGISTER 0x0000a600
85
86 #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
87 MWL8K_A2H_INT_CHNL_SWITCHED | \
88 MWL8K_A2H_INT_QUEUE_EMPTY | \
89 MWL8K_A2H_INT_RADAR_DETECT | \
90 MWL8K_A2H_INT_RADIO_ON | \
91 MWL8K_A2H_INT_RADIO_OFF | \
92 MWL8K_A2H_INT_MAC_EVENT | \
93 MWL8K_A2H_INT_OPC_DONE | \
94 MWL8K_A2H_INT_RX_READY | \
95 MWL8K_A2H_INT_TX_DONE | \
96 MWL8K_A2H_INT_BA_WATCHDOG)
97
98 #define MWL8K_RX_QUEUES 1
99 #define MWL8K_TX_WMM_QUEUES 4
100 #define MWL8K_MAX_AMPDU_QUEUES 8
101 #define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES)
102 #define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues)
103
104 /* txpriorities are mapped with hw queues.
105 * Each hw queue has a txpriority.
106 */
107 #define TOTAL_HW_TX_QUEUES 8
108
109 /* Each HW queue can have one AMPDU stream.
110 * But, because one of the hw queue is reserved,
111 * maximum AMPDU queues that can be created are
112 * one short of total tx queues.
113 */
114 #define MWL8K_NUM_AMPDU_STREAMS (TOTAL_HW_TX_QUEUES - 1)
115
116 struct rxd_ops {
117 int rxd_size;
118 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
119 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
120 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
121 __le16 *qos, s8 *noise);
122 };
123
124 struct mwl8k_device_info {
125 char *part_name;
126 char *helper_image;
127 char *fw_image_sta;
128 char *fw_image_ap;
129 struct rxd_ops *ap_rxd_ops;
130 u32 fw_api_ap;
131 };
132
133 struct mwl8k_rx_queue {
134 int rxd_count;
135
136 /* hw receives here */
137 int head;
138
139 /* refill descs here */
140 int tail;
141
142 void *rxd;
143 dma_addr_t rxd_dma;
144 struct {
145 struct sk_buff *skb;
146 DEFINE_DMA_UNMAP_ADDR(dma);
147 } *buf;
148 };
149
150 struct mwl8k_tx_queue {
151 /* hw transmits here */
152 int head;
153
154 /* sw appends here */
155 int tail;
156
157 unsigned int len;
158 struct mwl8k_tx_desc *txd;
159 dma_addr_t txd_dma;
160 struct sk_buff **skb;
161 };
162
163 enum {
164 AMPDU_NO_STREAM,
165 AMPDU_STREAM_NEW,
166 AMPDU_STREAM_IN_PROGRESS,
167 AMPDU_STREAM_ACTIVE,
168 };
169
170 struct mwl8k_ampdu_stream {
171 struct ieee80211_sta *sta;
172 u8 tid;
173 u8 state;
174 u8 idx;
175 };
176
177 struct mwl8k_priv {
178 struct ieee80211_hw *hw;
179 struct pci_dev *pdev;
180 int irq;
181
182 struct mwl8k_device_info *device_info;
183
184 void __iomem *sram;
185 void __iomem *regs;
186
187 /* firmware */
188 const struct firmware *fw_helper;
189 const struct firmware *fw_ucode;
190
191 /* hardware/firmware parameters */
192 bool ap_fw;
193 struct rxd_ops *rxd_ops;
194 struct ieee80211_supported_band band_24;
195 struct ieee80211_channel channels_24[14];
196 struct ieee80211_rate rates_24[14];
197 struct ieee80211_supported_band band_50;
198 struct ieee80211_channel channels_50[4];
199 struct ieee80211_rate rates_50[9];
200 u32 ap_macids_supported;
201 u32 sta_macids_supported;
202
203 /* Ampdu stream information */
204 u8 num_ampdu_queues;
205 spinlock_t stream_lock;
206 struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES];
207 struct work_struct watchdog_ba_handle;
208
209 /* firmware access */
210 struct mutex fw_mutex;
211 struct task_struct *fw_mutex_owner;
212 struct task_struct *hw_restart_owner;
213 int fw_mutex_depth;
214 struct completion *hostcmd_wait;
215
216 atomic_t watchdog_event_pending;
217
218 /* lock held over TX and TX reap */
219 spinlock_t tx_lock;
220
221 /* TX quiesce completion, protected by fw_mutex and tx_lock */
222 struct completion *tx_wait;
223
224 /* List of interfaces. */
225 u32 macids_used;
226 struct list_head vif_list;
227
228 /* power management status cookie from firmware */
229 u32 *cookie;
230 dma_addr_t cookie_dma;
231
232 u16 num_mcaddrs;
233 u8 hw_rev;
234 u32 fw_rev;
235
236 /*
237 * Running count of TX packets in flight, to avoid
238 * iterating over the transmit rings each time.
239 */
240 int pending_tx_pkts;
241
242 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
243 struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES];
244 u32 txq_offset[MWL8K_MAX_TX_QUEUES];
245
246 bool radio_on;
247 bool radio_short_preamble;
248 bool sniffer_enabled;
249 bool wmm_enabled;
250
251 /* XXX need to convert this to handle multiple interfaces */
252 bool capture_beacon;
253 u8 capture_bssid[ETH_ALEN];
254 struct sk_buff *beacon_skb;
255
256 /*
257 * This FJ worker has to be global as it is scheduled from the
258 * RX handler. At this point we don't know which interface it
259 * belongs to until the list of bssids waiting to complete join
260 * is checked.
261 */
262 struct work_struct finalize_join_worker;
263
264 /* Tasklet to perform TX reclaim. */
265 struct tasklet_struct poll_tx_task;
266
267 /* Tasklet to perform RX. */
268 struct tasklet_struct poll_rx_task;
269
270 /* Most recently reported noise in dBm */
271 s8 noise;
272
273 /*
274 * preserve the queue configurations so they can be restored if/when
275 * the firmware image is swapped.
276 */
277 struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES];
278
279 /* To perform the task of reloading the firmware */
280 struct work_struct fw_reload;
281 bool hw_restart_in_progress;
282
283 /* async firmware loading state */
284 unsigned fw_state;
285 char *fw_pref;
286 char *fw_alt;
287 struct completion firmware_loading_complete;
288 };
289
290 #define MAX_WEP_KEY_LEN 13
291 #define NUM_WEP_KEYS 4
292
293 /* Per interface specific private data */
294 struct mwl8k_vif {
295 struct list_head list;
296 struct ieee80211_vif *vif;
297
298 /* Firmware macid for this vif. */
299 int macid;
300
301 /* Non AMPDU sequence number assigned by driver. */
302 u16 seqno;
303
304 /* Saved WEP keys */
305 struct {
306 u8 enabled;
307 u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
308 } wep_key_conf[NUM_WEP_KEYS];
309
310 /* BSSID */
311 u8 bssid[ETH_ALEN];
312
313 /* A flag to indicate is HW crypto is enabled for this bssid */
314 bool is_hw_crypto_enabled;
315 };
316 #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
317 #define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
318
319 struct tx_traffic_info {
320 u32 start_time;
321 u32 pkts;
322 };
323
324 #define MWL8K_MAX_TID 8
325 struct mwl8k_sta {
326 /* Index into station database. Returned by UPDATE_STADB. */
327 u8 peer_id;
328 u8 is_ampdu_allowed;
329 struct tx_traffic_info tx_stats[MWL8K_MAX_TID];
330 };
331 #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
332
333 static const struct ieee80211_channel mwl8k_channels_24[] = {
334 { .center_freq = 2412, .hw_value = 1, },
335 { .center_freq = 2417, .hw_value = 2, },
336 { .center_freq = 2422, .hw_value = 3, },
337 { .center_freq = 2427, .hw_value = 4, },
338 { .center_freq = 2432, .hw_value = 5, },
339 { .center_freq = 2437, .hw_value = 6, },
340 { .center_freq = 2442, .hw_value = 7, },
341 { .center_freq = 2447, .hw_value = 8, },
342 { .center_freq = 2452, .hw_value = 9, },
343 { .center_freq = 2457, .hw_value = 10, },
344 { .center_freq = 2462, .hw_value = 11, },
345 { .center_freq = 2467, .hw_value = 12, },
346 { .center_freq = 2472, .hw_value = 13, },
347 { .center_freq = 2484, .hw_value = 14, },
348 };
349
350 static const struct ieee80211_rate mwl8k_rates_24[] = {
351 { .bitrate = 10, .hw_value = 2, },
352 { .bitrate = 20, .hw_value = 4, },
353 { .bitrate = 55, .hw_value = 11, },
354 { .bitrate = 110, .hw_value = 22, },
355 { .bitrate = 220, .hw_value = 44, },
356 { .bitrate = 60, .hw_value = 12, },
357 { .bitrate = 90, .hw_value = 18, },
358 { .bitrate = 120, .hw_value = 24, },
359 { .bitrate = 180, .hw_value = 36, },
360 { .bitrate = 240, .hw_value = 48, },
361 { .bitrate = 360, .hw_value = 72, },
362 { .bitrate = 480, .hw_value = 96, },
363 { .bitrate = 540, .hw_value = 108, },
364 { .bitrate = 720, .hw_value = 144, },
365 };
366
367 static const struct ieee80211_channel mwl8k_channels_50[] = {
368 { .center_freq = 5180, .hw_value = 36, },
369 { .center_freq = 5200, .hw_value = 40, },
370 { .center_freq = 5220, .hw_value = 44, },
371 { .center_freq = 5240, .hw_value = 48, },
372 };
373
374 static const struct ieee80211_rate mwl8k_rates_50[] = {
375 { .bitrate = 60, .hw_value = 12, },
376 { .bitrate = 90, .hw_value = 18, },
377 { .bitrate = 120, .hw_value = 24, },
378 { .bitrate = 180, .hw_value = 36, },
379 { .bitrate = 240, .hw_value = 48, },
380 { .bitrate = 360, .hw_value = 72, },
381 { .bitrate = 480, .hw_value = 96, },
382 { .bitrate = 540, .hw_value = 108, },
383 { .bitrate = 720, .hw_value = 144, },
384 };
385
386 /* Set or get info from Firmware */
387 #define MWL8K_CMD_GET 0x0000
388 #define MWL8K_CMD_SET 0x0001
389 #define MWL8K_CMD_SET_LIST 0x0002
390
391 /* Firmware command codes */
392 #define MWL8K_CMD_CODE_DNLD 0x0001
393 #define MWL8K_CMD_GET_HW_SPEC 0x0003
394 #define MWL8K_CMD_SET_HW_SPEC 0x0004
395 #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
396 #define MWL8K_CMD_GET_STAT 0x0014
397 #define MWL8K_CMD_RADIO_CONTROL 0x001c
398 #define MWL8K_CMD_RF_TX_POWER 0x001e
399 #define MWL8K_CMD_TX_POWER 0x001f
400 #define MWL8K_CMD_RF_ANTENNA 0x0020
401 #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
402 #define MWL8K_CMD_SET_PRE_SCAN 0x0107
403 #define MWL8K_CMD_SET_POST_SCAN 0x0108
404 #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
405 #define MWL8K_CMD_SET_AID 0x010d
406 #define MWL8K_CMD_SET_RATE 0x0110
407 #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
408 #define MWL8K_CMD_RTS_THRESHOLD 0x0113
409 #define MWL8K_CMD_SET_SLOT 0x0114
410 #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
411 #define MWL8K_CMD_SET_WMM_MODE 0x0123
412 #define MWL8K_CMD_MIMO_CONFIG 0x0125
413 #define MWL8K_CMD_USE_FIXED_RATE 0x0126
414 #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
415 #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
416 #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
417 #define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205
418 #define MWL8K_CMD_DEL_MAC_ADDR 0x0206 /* per-vif */
419 #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
420 #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
421 #define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
422 #define MWL8K_CMD_UPDATE_STADB 0x1123
423 #define MWL8K_CMD_BASTREAM 0x1125
424
425 static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
426 {
427 u16 command = le16_to_cpu(cmd);
428
429 #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
430 snprintf(buf, bufsize, "%s", #x);\
431 return buf;\
432 } while (0)
433 switch (command & ~0x8000) {
434 MWL8K_CMDNAME(CODE_DNLD);
435 MWL8K_CMDNAME(GET_HW_SPEC);
436 MWL8K_CMDNAME(SET_HW_SPEC);
437 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
438 MWL8K_CMDNAME(GET_STAT);
439 MWL8K_CMDNAME(RADIO_CONTROL);
440 MWL8K_CMDNAME(RF_TX_POWER);
441 MWL8K_CMDNAME(TX_POWER);
442 MWL8K_CMDNAME(RF_ANTENNA);
443 MWL8K_CMDNAME(SET_BEACON);
444 MWL8K_CMDNAME(SET_PRE_SCAN);
445 MWL8K_CMDNAME(SET_POST_SCAN);
446 MWL8K_CMDNAME(SET_RF_CHANNEL);
447 MWL8K_CMDNAME(SET_AID);
448 MWL8K_CMDNAME(SET_RATE);
449 MWL8K_CMDNAME(SET_FINALIZE_JOIN);
450 MWL8K_CMDNAME(RTS_THRESHOLD);
451 MWL8K_CMDNAME(SET_SLOT);
452 MWL8K_CMDNAME(SET_EDCA_PARAMS);
453 MWL8K_CMDNAME(SET_WMM_MODE);
454 MWL8K_CMDNAME(MIMO_CONFIG);
455 MWL8K_CMDNAME(USE_FIXED_RATE);
456 MWL8K_CMDNAME(ENABLE_SNIFFER);
457 MWL8K_CMDNAME(SET_MAC_ADDR);
458 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
459 MWL8K_CMDNAME(BSS_START);
460 MWL8K_CMDNAME(SET_NEW_STN);
461 MWL8K_CMDNAME(UPDATE_ENCRYPTION);
462 MWL8K_CMDNAME(UPDATE_STADB);
463 MWL8K_CMDNAME(BASTREAM);
464 MWL8K_CMDNAME(GET_WATCHDOG_BITMAP);
465 default:
466 snprintf(buf, bufsize, "0x%x", cmd);
467 }
468 #undef MWL8K_CMDNAME
469
470 return buf;
471 }
472
473 /* Hardware and firmware reset */
474 static void mwl8k_hw_reset(struct mwl8k_priv *priv)
475 {
476 iowrite32(MWL8K_H2A_INT_RESET,
477 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
478 iowrite32(MWL8K_H2A_INT_RESET,
479 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
480 msleep(20);
481 }
482
483 /* Release fw image */
484 static void mwl8k_release_fw(const struct firmware **fw)
485 {
486 if (*fw == NULL)
487 return;
488 release_firmware(*fw);
489 *fw = NULL;
490 }
491
492 static void mwl8k_release_firmware(struct mwl8k_priv *priv)
493 {
494 mwl8k_release_fw(&priv->fw_ucode);
495 mwl8k_release_fw(&priv->fw_helper);
496 }
497
498 /* states for asynchronous f/w loading */
499 static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
500 enum {
501 FW_STATE_INIT = 0,
502 FW_STATE_LOADING_PREF,
503 FW_STATE_LOADING_ALT,
504 FW_STATE_ERROR,
505 };
506
507 /* Request fw image */
508 static int mwl8k_request_fw(struct mwl8k_priv *priv,
509 const char *fname, const struct firmware **fw,
510 bool nowait)
511 {
512 /* release current image */
513 if (*fw != NULL)
514 mwl8k_release_fw(fw);
515
516 if (nowait)
517 return request_firmware_nowait(THIS_MODULE, 1, fname,
518 &priv->pdev->dev, GFP_KERNEL,
519 priv, mwl8k_fw_state_machine);
520 else
521 return request_firmware(fw, fname, &priv->pdev->dev);
522 }
523
524 static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
525 bool nowait)
526 {
527 struct mwl8k_device_info *di = priv->device_info;
528 int rc;
529
530 if (di->helper_image != NULL) {
531 if (nowait)
532 rc = mwl8k_request_fw(priv, di->helper_image,
533 &priv->fw_helper, true);
534 else
535 rc = mwl8k_request_fw(priv, di->helper_image,
536 &priv->fw_helper, false);
537 if (rc)
538 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
539 pci_name(priv->pdev), di->helper_image);
540
541 if (rc || nowait)
542 return rc;
543 }
544
545 if (nowait) {
546 /*
547 * if we get here, no helper image is needed. Skip the
548 * FW_STATE_INIT state.
549 */
550 priv->fw_state = FW_STATE_LOADING_PREF;
551 rc = mwl8k_request_fw(priv, fw_image,
552 &priv->fw_ucode,
553 true);
554 } else
555 rc = mwl8k_request_fw(priv, fw_image,
556 &priv->fw_ucode, false);
557 if (rc) {
558 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
559 pci_name(priv->pdev), fw_image);
560 mwl8k_release_fw(&priv->fw_helper);
561 return rc;
562 }
563
564 return 0;
565 }
566
567 struct mwl8k_cmd_pkt {
568 __le16 code;
569 __le16 length;
570 __u8 seq_num;
571 __u8 macid;
572 __le16 result;
573 char payload[0];
574 } __packed;
575
576 /*
577 * Firmware loading.
578 */
579 static int
580 mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
581 {
582 void __iomem *regs = priv->regs;
583 dma_addr_t dma_addr;
584 int loops;
585
586 dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
587 if (pci_dma_mapping_error(priv->pdev, dma_addr))
588 return -ENOMEM;
589
590 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
591 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
592 iowrite32(MWL8K_H2A_INT_DOORBELL,
593 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
594 iowrite32(MWL8K_H2A_INT_DUMMY,
595 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
596
597 loops = 1000;
598 do {
599 u32 int_code;
600
601 int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
602 if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
603 iowrite32(0, regs + MWL8K_HIU_INT_CODE);
604 break;
605 }
606
607 cond_resched();
608 udelay(1);
609 } while (--loops);
610
611 pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
612
613 return loops ? 0 : -ETIMEDOUT;
614 }
615
616 static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
617 const u8 *data, size_t length)
618 {
619 struct mwl8k_cmd_pkt *cmd;
620 int done;
621 int rc = 0;
622
623 cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
624 if (cmd == NULL)
625 return -ENOMEM;
626
627 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
628 cmd->seq_num = 0;
629 cmd->macid = 0;
630 cmd->result = 0;
631
632 done = 0;
633 while (length) {
634 int block_size = length > 256 ? 256 : length;
635
636 memcpy(cmd->payload, data + done, block_size);
637 cmd->length = cpu_to_le16(block_size);
638
639 rc = mwl8k_send_fw_load_cmd(priv, cmd,
640 sizeof(*cmd) + block_size);
641 if (rc)
642 break;
643
644 done += block_size;
645 length -= block_size;
646 }
647
648 if (!rc) {
649 cmd->length = 0;
650 rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
651 }
652
653 kfree(cmd);
654
655 return rc;
656 }
657
658 static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
659 const u8 *data, size_t length)
660 {
661 unsigned char *buffer;
662 int may_continue, rc = 0;
663 u32 done, prev_block_size;
664
665 buffer = kmalloc(1024, GFP_KERNEL);
666 if (buffer == NULL)
667 return -ENOMEM;
668
669 done = 0;
670 prev_block_size = 0;
671 may_continue = 1000;
672 while (may_continue > 0) {
673 u32 block_size;
674
675 block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
676 if (block_size & 1) {
677 block_size &= ~1;
678 may_continue--;
679 } else {
680 done += prev_block_size;
681 length -= prev_block_size;
682 }
683
684 if (block_size > 1024 || block_size > length) {
685 rc = -EOVERFLOW;
686 break;
687 }
688
689 if (length == 0) {
690 rc = 0;
691 break;
692 }
693
694 if (block_size == 0) {
695 rc = -EPROTO;
696 may_continue--;
697 udelay(1);
698 continue;
699 }
700
701 prev_block_size = block_size;
702 memcpy(buffer, data + done, block_size);
703
704 rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
705 if (rc)
706 break;
707 }
708
709 if (!rc && length != 0)
710 rc = -EREMOTEIO;
711
712 kfree(buffer);
713
714 return rc;
715 }
716
717 static int mwl8k_load_firmware(struct ieee80211_hw *hw)
718 {
719 struct mwl8k_priv *priv = hw->priv;
720 const struct firmware *fw = priv->fw_ucode;
721 int rc;
722 int loops;
723
724 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
725 const struct firmware *helper = priv->fw_helper;
726
727 if (helper == NULL) {
728 printk(KERN_ERR "%s: helper image needed but none "
729 "given\n", pci_name(priv->pdev));
730 return -EINVAL;
731 }
732
733 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
734 if (rc) {
735 printk(KERN_ERR "%s: unable to load firmware "
736 "helper image\n", pci_name(priv->pdev));
737 return rc;
738 }
739 msleep(20);
740
741 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
742 } else {
743 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
744 }
745
746 if (rc) {
747 printk(KERN_ERR "%s: unable to load firmware image\n",
748 pci_name(priv->pdev));
749 return rc;
750 }
751
752 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
753
754 loops = 500000;
755 do {
756 u32 ready_code;
757
758 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
759 if (ready_code == MWL8K_FWAP_READY) {
760 priv->ap_fw = true;
761 break;
762 } else if (ready_code == MWL8K_FWSTA_READY) {
763 priv->ap_fw = false;
764 break;
765 }
766
767 cond_resched();
768 udelay(1);
769 } while (--loops);
770
771 return loops ? 0 : -ETIMEDOUT;
772 }
773
774
775 /* DMA header used by firmware and hardware. */
776 struct mwl8k_dma_data {
777 __le16 fwlen;
778 struct ieee80211_hdr wh;
779 char data[0];
780 } __packed;
781
782 /* Routines to add/remove DMA header from skb. */
783 static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
784 {
785 struct mwl8k_dma_data *tr;
786 int hdrlen;
787
788 tr = (struct mwl8k_dma_data *)skb->data;
789 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
790
791 if (hdrlen != sizeof(tr->wh)) {
792 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
793 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
794 *((__le16 *)(tr->data - 2)) = qos;
795 } else {
796 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
797 }
798 }
799
800 if (hdrlen != sizeof(*tr))
801 skb_pull(skb, sizeof(*tr) - hdrlen);
802 }
803
804 #define REDUCED_TX_HEADROOM 8
805
806 static void
807 mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb,
808 int head_pad, int tail_pad)
809 {
810 struct ieee80211_hdr *wh;
811 int hdrlen;
812 int reqd_hdrlen;
813 struct mwl8k_dma_data *tr;
814
815 /*
816 * Add a firmware DMA header; the firmware requires that we
817 * present a 2-byte payload length followed by a 4-address
818 * header (without QoS field), followed (optionally) by any
819 * WEP/ExtIV header (but only filled in for CCMP).
820 */
821 wh = (struct ieee80211_hdr *)skb->data;
822
823 hdrlen = ieee80211_hdrlen(wh->frame_control);
824
825 /*
826 * Check if skb_resize is required because of
827 * tx_headroom adjustment.
828 */
829 if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts)
830 + REDUCED_TX_HEADROOM))) {
831 if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) {
832
833 wiphy_err(priv->hw->wiphy,
834 "Failed to reallocate TX buffer\n");
835 return;
836 }
837 skb->truesize += REDUCED_TX_HEADROOM;
838 }
839
840 reqd_hdrlen = sizeof(*tr) + head_pad;
841
842 if (hdrlen != reqd_hdrlen)
843 skb_push(skb, reqd_hdrlen - hdrlen);
844
845 if (ieee80211_is_data_qos(wh->frame_control))
846 hdrlen -= IEEE80211_QOS_CTL_LEN;
847
848 tr = (struct mwl8k_dma_data *)skb->data;
849 if (wh != &tr->wh)
850 memmove(&tr->wh, wh, hdrlen);
851 if (hdrlen != sizeof(tr->wh))
852 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
853
854 /*
855 * Firmware length is the length of the fully formed "802.11
856 * payload". That is, everything except for the 802.11 header.
857 * This includes all crypto material including the MIC.
858 */
859 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
860 }
861
862 static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv,
863 struct sk_buff *skb)
864 {
865 struct ieee80211_hdr *wh;
866 struct ieee80211_tx_info *tx_info;
867 struct ieee80211_key_conf *key_conf;
868 int data_pad;
869 int head_pad = 0;
870
871 wh = (struct ieee80211_hdr *)skb->data;
872
873 tx_info = IEEE80211_SKB_CB(skb);
874
875 key_conf = NULL;
876 if (ieee80211_is_data(wh->frame_control))
877 key_conf = tx_info->control.hw_key;
878
879 /*
880 * Make sure the packet header is in the DMA header format (4-address
881 * without QoS), and add head & tail padding when HW crypto is enabled.
882 *
883 * We have the following trailer padding requirements:
884 * - WEP: 4 trailer bytes (ICV)
885 * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
886 * - CCMP: 8 trailer bytes (MIC)
887 */
888 data_pad = 0;
889 if (key_conf != NULL) {
890 head_pad = key_conf->iv_len;
891 switch (key_conf->cipher) {
892 case WLAN_CIPHER_SUITE_WEP40:
893 case WLAN_CIPHER_SUITE_WEP104:
894 data_pad = 4;
895 break;
896 case WLAN_CIPHER_SUITE_TKIP:
897 data_pad = 12;
898 break;
899 case WLAN_CIPHER_SUITE_CCMP:
900 data_pad = 8;
901 break;
902 }
903 }
904 mwl8k_add_dma_header(priv, skb, head_pad, data_pad);
905 }
906
907 /*
908 * Packet reception for 88w8366 AP firmware.
909 */
910 struct mwl8k_rxd_8366_ap {
911 __le16 pkt_len;
912 __u8 sq2;
913 __u8 rate;
914 __le32 pkt_phys_addr;
915 __le32 next_rxd_phys_addr;
916 __le16 qos_control;
917 __le16 htsig2;
918 __le32 hw_rssi_info;
919 __le32 hw_noise_floor_info;
920 __u8 noise_floor;
921 __u8 pad0[3];
922 __u8 rssi;
923 __u8 rx_status;
924 __u8 channel;
925 __u8 rx_ctrl;
926 } __packed;
927
928 #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
929 #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
930 #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
931
932 #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
933
934 /* 8366 AP rx_status bits */
935 #define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
936 #define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
937 #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
938 #define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
939 #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
940
941 static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
942 {
943 struct mwl8k_rxd_8366_ap *rxd = _rxd;
944
945 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
946 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
947 }
948
949 static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
950 {
951 struct mwl8k_rxd_8366_ap *rxd = _rxd;
952
953 rxd->pkt_len = cpu_to_le16(len);
954 rxd->pkt_phys_addr = cpu_to_le32(addr);
955 wmb();
956 rxd->rx_ctrl = 0;
957 }
958
959 static int
960 mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
961 __le16 *qos, s8 *noise)
962 {
963 struct mwl8k_rxd_8366_ap *rxd = _rxd;
964
965 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
966 return -1;
967 rmb();
968
969 memset(status, 0, sizeof(*status));
970
971 status->signal = -rxd->rssi;
972 *noise = -rxd->noise_floor;
973
974 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
975 status->flag |= RX_FLAG_HT;
976 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
977 status->flag |= RX_FLAG_40MHZ;
978 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
979 } else {
980 int i;
981
982 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
983 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
984 status->rate_idx = i;
985 break;
986 }
987 }
988 }
989
990 if (rxd->channel > 14) {
991 status->band = IEEE80211_BAND_5GHZ;
992 if (!(status->flag & RX_FLAG_HT))
993 status->rate_idx -= 5;
994 } else {
995 status->band = IEEE80211_BAND_2GHZ;
996 }
997 status->freq = ieee80211_channel_to_frequency(rxd->channel,
998 status->band);
999
1000 *qos = rxd->qos_control;
1001
1002 if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
1003 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
1004 (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
1005 status->flag |= RX_FLAG_MMIC_ERROR;
1006
1007 return le16_to_cpu(rxd->pkt_len);
1008 }
1009
1010 static struct rxd_ops rxd_8366_ap_ops = {
1011 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
1012 .rxd_init = mwl8k_rxd_8366_ap_init,
1013 .rxd_refill = mwl8k_rxd_8366_ap_refill,
1014 .rxd_process = mwl8k_rxd_8366_ap_process,
1015 };
1016
1017 /*
1018 * Packet reception for STA firmware.
1019 */
1020 struct mwl8k_rxd_sta {
1021 __le16 pkt_len;
1022 __u8 link_quality;
1023 __u8 noise_level;
1024 __le32 pkt_phys_addr;
1025 __le32 next_rxd_phys_addr;
1026 __le16 qos_control;
1027 __le16 rate_info;
1028 __le32 pad0[4];
1029 __u8 rssi;
1030 __u8 channel;
1031 __le16 pad1;
1032 __u8 rx_ctrl;
1033 __u8 rx_status;
1034 __u8 pad2[2];
1035 } __packed;
1036
1037 #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
1038 #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
1039 #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
1040 #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
1041 #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
1042 #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
1043
1044 #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
1045 #define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
1046 /* ICV=0 or MIC=1 */
1047 #define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
1048 /* Key is uploaded only in failure case */
1049 #define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
1050
1051 static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
1052 {
1053 struct mwl8k_rxd_sta *rxd = _rxd;
1054
1055 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
1056 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
1057 }
1058
1059 static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
1060 {
1061 struct mwl8k_rxd_sta *rxd = _rxd;
1062
1063 rxd->pkt_len = cpu_to_le16(len);
1064 rxd->pkt_phys_addr = cpu_to_le32(addr);
1065 wmb();
1066 rxd->rx_ctrl = 0;
1067 }
1068
1069 static int
1070 mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
1071 __le16 *qos, s8 *noise)
1072 {
1073 struct mwl8k_rxd_sta *rxd = _rxd;
1074 u16 rate_info;
1075
1076 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
1077 return -1;
1078 rmb();
1079
1080 rate_info = le16_to_cpu(rxd->rate_info);
1081
1082 memset(status, 0, sizeof(*status));
1083
1084 status->signal = -rxd->rssi;
1085 *noise = -rxd->noise_level;
1086 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
1087 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
1088
1089 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
1090 status->flag |= RX_FLAG_SHORTPRE;
1091 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
1092 status->flag |= RX_FLAG_40MHZ;
1093 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
1094 status->flag |= RX_FLAG_SHORT_GI;
1095 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
1096 status->flag |= RX_FLAG_HT;
1097
1098 if (rxd->channel > 14) {
1099 status->band = IEEE80211_BAND_5GHZ;
1100 if (!(status->flag & RX_FLAG_HT))
1101 status->rate_idx -= 5;
1102 } else {
1103 status->band = IEEE80211_BAND_2GHZ;
1104 }
1105 status->freq = ieee80211_channel_to_frequency(rxd->channel,
1106 status->band);
1107
1108 *qos = rxd->qos_control;
1109 if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
1110 (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
1111 status->flag |= RX_FLAG_MMIC_ERROR;
1112
1113 return le16_to_cpu(rxd->pkt_len);
1114 }
1115
1116 static struct rxd_ops rxd_sta_ops = {
1117 .rxd_size = sizeof(struct mwl8k_rxd_sta),
1118 .rxd_init = mwl8k_rxd_sta_init,
1119 .rxd_refill = mwl8k_rxd_sta_refill,
1120 .rxd_process = mwl8k_rxd_sta_process,
1121 };
1122
1123
1124 #define MWL8K_RX_DESCS 256
1125 #define MWL8K_RX_MAXSZ 3800
1126
1127 static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
1128 {
1129 struct mwl8k_priv *priv = hw->priv;
1130 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1131 int size;
1132 int i;
1133
1134 rxq->rxd_count = 0;
1135 rxq->head = 0;
1136 rxq->tail = 0;
1137
1138 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
1139
1140 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
1141 if (rxq->rxd == NULL) {
1142 wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
1143 return -ENOMEM;
1144 }
1145 memset(rxq->rxd, 0, size);
1146
1147 rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL);
1148 if (rxq->buf == NULL) {
1149 wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
1150 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
1151 return -ENOMEM;
1152 }
1153
1154 for (i = 0; i < MWL8K_RX_DESCS; i++) {
1155 int desc_size;
1156 void *rxd;
1157 int nexti;
1158 dma_addr_t next_dma_addr;
1159
1160 desc_size = priv->rxd_ops->rxd_size;
1161 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
1162
1163 nexti = i + 1;
1164 if (nexti == MWL8K_RX_DESCS)
1165 nexti = 0;
1166 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
1167
1168 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
1169 }
1170
1171 return 0;
1172 }
1173
1174 static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
1175 {
1176 struct mwl8k_priv *priv = hw->priv;
1177 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1178 int refilled;
1179
1180 refilled = 0;
1181 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
1182 struct sk_buff *skb;
1183 dma_addr_t addr;
1184 int rx;
1185 void *rxd;
1186
1187 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
1188 if (skb == NULL)
1189 break;
1190
1191 addr = pci_map_single(priv->pdev, skb->data,
1192 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
1193
1194 rxq->rxd_count++;
1195 rx = rxq->tail++;
1196 if (rxq->tail == MWL8K_RX_DESCS)
1197 rxq->tail = 0;
1198 rxq->buf[rx].skb = skb;
1199 dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
1200
1201 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
1202 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
1203
1204 refilled++;
1205 }
1206
1207 return refilled;
1208 }
1209
1210 /* Must be called only when the card's reception is completely halted */
1211 static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
1212 {
1213 struct mwl8k_priv *priv = hw->priv;
1214 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1215 int i;
1216
1217 if (rxq->rxd == NULL)
1218 return;
1219
1220 for (i = 0; i < MWL8K_RX_DESCS; i++) {
1221 if (rxq->buf[i].skb != NULL) {
1222 pci_unmap_single(priv->pdev,
1223 dma_unmap_addr(&rxq->buf[i], dma),
1224 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1225 dma_unmap_addr_set(&rxq->buf[i], dma, 0);
1226
1227 kfree_skb(rxq->buf[i].skb);
1228 rxq->buf[i].skb = NULL;
1229 }
1230 }
1231
1232 kfree(rxq->buf);
1233 rxq->buf = NULL;
1234
1235 pci_free_consistent(priv->pdev,
1236 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
1237 rxq->rxd, rxq->rxd_dma);
1238 rxq->rxd = NULL;
1239 }
1240
1241
1242 /*
1243 * Scan a list of BSSIDs to process for finalize join.
1244 * Allows for extension to process multiple BSSIDs.
1245 */
1246 static inline int
1247 mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
1248 {
1249 return priv->capture_beacon &&
1250 ieee80211_is_beacon(wh->frame_control) &&
1251 ether_addr_equal(wh->addr3, priv->capture_bssid);
1252 }
1253
1254 static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
1255 struct sk_buff *skb)
1256 {
1257 struct mwl8k_priv *priv = hw->priv;
1258
1259 priv->capture_beacon = false;
1260 memset(priv->capture_bssid, 0, ETH_ALEN);
1261
1262 /*
1263 * Use GFP_ATOMIC as rxq_process is called from
1264 * the primary interrupt handler, memory allocation call
1265 * must not sleep.
1266 */
1267 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
1268 if (priv->beacon_skb != NULL)
1269 ieee80211_queue_work(hw, &priv->finalize_join_worker);
1270 }
1271
1272 static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
1273 u8 *bssid)
1274 {
1275 struct mwl8k_vif *mwl8k_vif;
1276
1277 list_for_each_entry(mwl8k_vif,
1278 vif_list, list) {
1279 if (memcmp(bssid, mwl8k_vif->bssid,
1280 ETH_ALEN) == 0)
1281 return mwl8k_vif;
1282 }
1283
1284 return NULL;
1285 }
1286
1287 static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
1288 {
1289 struct mwl8k_priv *priv = hw->priv;
1290 struct mwl8k_vif *mwl8k_vif = NULL;
1291 struct mwl8k_rx_queue *rxq = priv->rxq + index;
1292 int processed;
1293
1294 processed = 0;
1295 while (rxq->rxd_count && limit--) {
1296 struct sk_buff *skb;
1297 void *rxd;
1298 int pkt_len;
1299 struct ieee80211_rx_status status;
1300 struct ieee80211_hdr *wh;
1301 __le16 qos;
1302
1303 skb = rxq->buf[rxq->head].skb;
1304 if (skb == NULL)
1305 break;
1306
1307 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
1308
1309 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
1310 &priv->noise);
1311 if (pkt_len < 0)
1312 break;
1313
1314 rxq->buf[rxq->head].skb = NULL;
1315
1316 pci_unmap_single(priv->pdev,
1317 dma_unmap_addr(&rxq->buf[rxq->head], dma),
1318 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1319 dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
1320
1321 rxq->head++;
1322 if (rxq->head == MWL8K_RX_DESCS)
1323 rxq->head = 0;
1324
1325 rxq->rxd_count--;
1326
1327 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1328
1329 /*
1330 * Check for a pending join operation. Save a
1331 * copy of the beacon and schedule a tasklet to
1332 * send a FINALIZE_JOIN command to the firmware.
1333 */
1334 if (mwl8k_capture_bssid(priv, (void *)skb->data))
1335 mwl8k_save_beacon(hw, skb);
1336
1337 if (ieee80211_has_protected(wh->frame_control)) {
1338
1339 /* Check if hw crypto has been enabled for
1340 * this bss. If yes, set the status flags
1341 * accordingly
1342 */
1343 mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
1344 wh->addr1);
1345
1346 if (mwl8k_vif != NULL &&
1347 mwl8k_vif->is_hw_crypto_enabled) {
1348 /*
1349 * When MMIC ERROR is encountered
1350 * by the firmware, payload is
1351 * dropped and only 32 bytes of
1352 * mwl8k Firmware header is sent
1353 * to the host.
1354 *
1355 * We need to add four bytes of
1356 * key information. In it
1357 * MAC80211 expects keyidx set to
1358 * 0 for triggering Counter
1359 * Measure of MMIC failure.
1360 */
1361 if (status.flag & RX_FLAG_MMIC_ERROR) {
1362 struct mwl8k_dma_data *tr;
1363 tr = (struct mwl8k_dma_data *)skb->data;
1364 memset((void *)&(tr->data), 0, 4);
1365 pkt_len += 4;
1366 }
1367
1368 if (!ieee80211_is_auth(wh->frame_control))
1369 status.flag |= RX_FLAG_IV_STRIPPED |
1370 RX_FLAG_DECRYPTED |
1371 RX_FLAG_MMIC_STRIPPED;
1372 }
1373 }
1374
1375 skb_put(skb, pkt_len);
1376 mwl8k_remove_dma_header(skb, qos);
1377 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1378 ieee80211_rx_irqsafe(hw, skb);
1379
1380 processed++;
1381 }
1382
1383 return processed;
1384 }
1385
1386
1387 /*
1388 * Packet transmission.
1389 */
1390
1391 #define MWL8K_TXD_STATUS_OK 0x00000001
1392 #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
1393 #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
1394 #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
1395 #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
1396
1397 #define MWL8K_QOS_QLEN_UNSPEC 0xff00
1398 #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1399 #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1400 #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1401 #define MWL8K_QOS_EOSP 0x0010
1402
1403 struct mwl8k_tx_desc {
1404 __le32 status;
1405 __u8 data_rate;
1406 __u8 tx_priority;
1407 __le16 qos_control;
1408 __le32 pkt_phys_addr;
1409 __le16 pkt_len;
1410 __u8 dest_MAC_addr[ETH_ALEN];
1411 __le32 next_txd_phys_addr;
1412 __le32 timestamp;
1413 __le16 rate_info;
1414 __u8 peer_id;
1415 __u8 tx_frag_cnt;
1416 } __packed;
1417
1418 #define MWL8K_TX_DESCS 128
1419
1420 static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1421 {
1422 struct mwl8k_priv *priv = hw->priv;
1423 struct mwl8k_tx_queue *txq = priv->txq + index;
1424 int size;
1425 int i;
1426
1427 txq->len = 0;
1428 txq->head = 0;
1429 txq->tail = 0;
1430
1431 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1432
1433 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1434 if (txq->txd == NULL) {
1435 wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
1436 return -ENOMEM;
1437 }
1438 memset(txq->txd, 0, size);
1439
1440 txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL);
1441 if (txq->skb == NULL) {
1442 wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
1443 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1444 return -ENOMEM;
1445 }
1446
1447 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1448 struct mwl8k_tx_desc *tx_desc;
1449 int nexti;
1450
1451 tx_desc = txq->txd + i;
1452 nexti = (i + 1) % MWL8K_TX_DESCS;
1453
1454 tx_desc->status = 0;
1455 tx_desc->next_txd_phys_addr =
1456 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1457 }
1458
1459 return 0;
1460 }
1461
1462 static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1463 {
1464 iowrite32(MWL8K_H2A_INT_PPA_READY,
1465 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1466 iowrite32(MWL8K_H2A_INT_DUMMY,
1467 priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
1468 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1469 }
1470
1471 static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1472 {
1473 struct mwl8k_priv *priv = hw->priv;
1474 int i;
1475
1476 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
1477 struct mwl8k_tx_queue *txq = priv->txq + i;
1478 int fw_owned = 0;
1479 int drv_owned = 0;
1480 int unused = 0;
1481 int desc;
1482
1483 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1484 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1485 u32 status;
1486
1487 status = le32_to_cpu(tx_desc->status);
1488 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1489 fw_owned++;
1490 else
1491 drv_owned++;
1492
1493 if (tx_desc->pkt_len == 0)
1494 unused++;
1495 }
1496
1497 wiphy_err(hw->wiphy,
1498 "txq[%d] len=%d head=%d tail=%d "
1499 "fw_owned=%d drv_owned=%d unused=%d\n",
1500 i,
1501 txq->len, txq->head, txq->tail,
1502 fw_owned, drv_owned, unused);
1503 }
1504 }
1505
1506 /*
1507 * Must be called with priv->fw_mutex held and tx queues stopped.
1508 */
1509 #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1510
1511 static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1512 {
1513 struct mwl8k_priv *priv = hw->priv;
1514 DECLARE_COMPLETION_ONSTACK(tx_wait);
1515 int retry;
1516 int rc;
1517
1518 might_sleep();
1519
1520 /* Since fw restart is in progress, allow only the firmware
1521 * commands from the restart code and block the other
1522 * commands since they are going to fail in any case since
1523 * the firmware has crashed
1524 */
1525 if (priv->hw_restart_in_progress) {
1526 if (priv->hw_restart_owner == current)
1527 return 0;
1528 else
1529 return -EBUSY;
1530 }
1531
1532 if (atomic_read(&priv->watchdog_event_pending))
1533 return 0;
1534
1535 /*
1536 * The TX queues are stopped at this point, so this test
1537 * doesn't need to take ->tx_lock.
1538 */
1539 if (!priv->pending_tx_pkts)
1540 return 0;
1541
1542 retry = 0;
1543 rc = 0;
1544
1545 spin_lock_bh(&priv->tx_lock);
1546 priv->tx_wait = &tx_wait;
1547 while (!rc) {
1548 int oldcount;
1549 unsigned long timeout;
1550
1551 oldcount = priv->pending_tx_pkts;
1552
1553 spin_unlock_bh(&priv->tx_lock);
1554 timeout = wait_for_completion_timeout(&tx_wait,
1555 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1556
1557 if (atomic_read(&priv->watchdog_event_pending)) {
1558 spin_lock_bh(&priv->tx_lock);
1559 priv->tx_wait = NULL;
1560 spin_unlock_bh(&priv->tx_lock);
1561 return 0;
1562 }
1563
1564 spin_lock_bh(&priv->tx_lock);
1565
1566 if (timeout) {
1567 WARN_ON(priv->pending_tx_pkts);
1568 if (retry)
1569 wiphy_notice(hw->wiphy, "tx rings drained\n");
1570 break;
1571 }
1572
1573 if (priv->pending_tx_pkts < oldcount) {
1574 wiphy_notice(hw->wiphy,
1575 "waiting for tx rings to drain (%d -> %d pkts)\n",
1576 oldcount, priv->pending_tx_pkts);
1577 retry = 1;
1578 continue;
1579 }
1580
1581 priv->tx_wait = NULL;
1582
1583 wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
1584 MWL8K_TX_WAIT_TIMEOUT_MS);
1585 mwl8k_dump_tx_rings(hw);
1586 priv->hw_restart_in_progress = true;
1587 ieee80211_queue_work(hw, &priv->fw_reload);
1588
1589 rc = -ETIMEDOUT;
1590 }
1591 priv->tx_wait = NULL;
1592 spin_unlock_bh(&priv->tx_lock);
1593
1594 return rc;
1595 }
1596
1597 #define MWL8K_TXD_SUCCESS(status) \
1598 ((status) & (MWL8K_TXD_STATUS_OK | \
1599 MWL8K_TXD_STATUS_OK_RETRY | \
1600 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1601
1602 static int mwl8k_tid_queue_mapping(u8 tid)
1603 {
1604 BUG_ON(tid > 7);
1605
1606 switch (tid) {
1607 case 0:
1608 case 3:
1609 return IEEE80211_AC_BE;
1610 break;
1611 case 1:
1612 case 2:
1613 return IEEE80211_AC_BK;
1614 break;
1615 case 4:
1616 case 5:
1617 return IEEE80211_AC_VI;
1618 break;
1619 case 6:
1620 case 7:
1621 return IEEE80211_AC_VO;
1622 break;
1623 default:
1624 return -1;
1625 break;
1626 }
1627 }
1628
1629 /* The firmware will fill in the rate information
1630 * for each packet that gets queued in the hardware
1631 * and these macros will interpret that info.
1632 */
1633
1634 #define RI_FORMAT(a) (a & 0x0001)
1635 #define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3)
1636
1637 static int
1638 mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
1639 {
1640 struct mwl8k_priv *priv = hw->priv;
1641 struct mwl8k_tx_queue *txq = priv->txq + index;
1642 int processed;
1643
1644 processed = 0;
1645 while (txq->len > 0 && limit--) {
1646 int tx;
1647 struct mwl8k_tx_desc *tx_desc;
1648 unsigned long addr;
1649 int size;
1650 struct sk_buff *skb;
1651 struct ieee80211_tx_info *info;
1652 u32 status;
1653 struct ieee80211_sta *sta;
1654 struct mwl8k_sta *sta_info = NULL;
1655 u16 rate_info;
1656 struct ieee80211_hdr *wh;
1657
1658 tx = txq->head;
1659 tx_desc = txq->txd + tx;
1660
1661 status = le32_to_cpu(tx_desc->status);
1662
1663 if (status & MWL8K_TXD_STATUS_FW_OWNED) {
1664 if (!force)
1665 break;
1666 tx_desc->status &=
1667 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1668 }
1669
1670 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1671 BUG_ON(txq->len == 0);
1672 txq->len--;
1673 priv->pending_tx_pkts--;
1674
1675 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1676 size = le16_to_cpu(tx_desc->pkt_len);
1677 skb = txq->skb[tx];
1678 txq->skb[tx] = NULL;
1679
1680 BUG_ON(skb == NULL);
1681 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1682
1683 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1684
1685 wh = (struct ieee80211_hdr *) skb->data;
1686
1687 /* Mark descriptor as unused */
1688 tx_desc->pkt_phys_addr = 0;
1689 tx_desc->pkt_len = 0;
1690
1691 info = IEEE80211_SKB_CB(skb);
1692 if (ieee80211_is_data(wh->frame_control)) {
1693 rcu_read_lock();
1694 sta = ieee80211_find_sta_by_ifaddr(hw, wh->addr1,
1695 wh->addr2);
1696 if (sta) {
1697 sta_info = MWL8K_STA(sta);
1698 BUG_ON(sta_info == NULL);
1699 rate_info = le16_to_cpu(tx_desc->rate_info);
1700 /* If rate is < 6.5 Mpbs for an ht station
1701 * do not form an ampdu. If the station is a
1702 * legacy station (format = 0), do not form an
1703 * ampdu
1704 */
1705 if (RI_RATE_ID_MCS(rate_info) < 1 ||
1706 RI_FORMAT(rate_info) == 0) {
1707 sta_info->is_ampdu_allowed = false;
1708 } else {
1709 sta_info->is_ampdu_allowed = true;
1710 }
1711 }
1712 rcu_read_unlock();
1713 }
1714
1715 ieee80211_tx_info_clear_status(info);
1716
1717 /* Rate control is happening in the firmware.
1718 * Ensure no tx rate is being reported.
1719 */
1720 info->status.rates[0].idx = -1;
1721 info->status.rates[0].count = 1;
1722
1723 if (MWL8K_TXD_SUCCESS(status))
1724 info->flags |= IEEE80211_TX_STAT_ACK;
1725
1726 ieee80211_tx_status_irqsafe(hw, skb);
1727
1728 processed++;
1729 }
1730
1731 return processed;
1732 }
1733
1734 /* must be called only when the card's transmit is completely halted */
1735 static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1736 {
1737 struct mwl8k_priv *priv = hw->priv;
1738 struct mwl8k_tx_queue *txq = priv->txq + index;
1739
1740 if (txq->txd == NULL)
1741 return;
1742
1743 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
1744
1745 kfree(txq->skb);
1746 txq->skb = NULL;
1747
1748 pci_free_consistent(priv->pdev,
1749 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1750 txq->txd, txq->txd_dma);
1751 txq->txd = NULL;
1752 }
1753
1754 /* caller must hold priv->stream_lock when calling the stream functions */
1755 static struct mwl8k_ampdu_stream *
1756 mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid)
1757 {
1758 struct mwl8k_ampdu_stream *stream;
1759 struct mwl8k_priv *priv = hw->priv;
1760 int i;
1761
1762 for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
1763 stream = &priv->ampdu[i];
1764 if (stream->state == AMPDU_NO_STREAM) {
1765 stream->sta = sta;
1766 stream->state = AMPDU_STREAM_NEW;
1767 stream->tid = tid;
1768 stream->idx = i;
1769 wiphy_debug(hw->wiphy, "Added a new stream for %pM %d",
1770 sta->addr, tid);
1771 return stream;
1772 }
1773 }
1774 return NULL;
1775 }
1776
1777 static int
1778 mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1779 {
1780 int ret;
1781
1782 /* if the stream has already been started, don't start it again */
1783 if (stream->state != AMPDU_STREAM_NEW)
1784 return 0;
1785 ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0);
1786 if (ret)
1787 wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: "
1788 "%d\n", stream->sta->addr, stream->tid, ret);
1789 else
1790 wiphy_debug(hw->wiphy, "Started stream for %pM %d\n",
1791 stream->sta->addr, stream->tid);
1792 return ret;
1793 }
1794
1795 static void
1796 mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
1797 {
1798 wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr,
1799 stream->tid);
1800 memset(stream, 0, sizeof(*stream));
1801 }
1802
1803 static struct mwl8k_ampdu_stream *
1804 mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid)
1805 {
1806 struct mwl8k_priv *priv = hw->priv;
1807 int i;
1808
1809 for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
1810 struct mwl8k_ampdu_stream *stream;
1811 stream = &priv->ampdu[i];
1812 if (stream->state == AMPDU_NO_STREAM)
1813 continue;
1814 if (!memcmp(stream->sta->addr, addr, ETH_ALEN) &&
1815 stream->tid == tid)
1816 return stream;
1817 }
1818 return NULL;
1819 }
1820
1821 #define MWL8K_AMPDU_PACKET_THRESHOLD 64
1822 static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid)
1823 {
1824 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
1825 struct tx_traffic_info *tx_stats;
1826
1827 BUG_ON(tid >= MWL8K_MAX_TID);
1828 tx_stats = &sta_info->tx_stats[tid];
1829
1830 return sta_info->is_ampdu_allowed &&
1831 tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD;
1832 }
1833
1834 static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid)
1835 {
1836 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
1837 struct tx_traffic_info *tx_stats;
1838
1839 BUG_ON(tid >= MWL8K_MAX_TID);
1840 tx_stats = &sta_info->tx_stats[tid];
1841
1842 if (tx_stats->start_time == 0)
1843 tx_stats->start_time = jiffies;
1844
1845 /* reset the packet count after each second elapses. If the number of
1846 * packets ever exceeds the ampdu_min_traffic threshold, we will allow
1847 * an ampdu stream to be started.
1848 */
1849 if (jiffies - tx_stats->start_time > HZ) {
1850 tx_stats->pkts = 0;
1851 tx_stats->start_time = 0;
1852 } else
1853 tx_stats->pkts++;
1854 }
1855
1856 /* The hardware ampdu queues start from 5.
1857 * txpriorities for ampdu queues are
1858 * 5 6 7 0 1 2 3 4 ie., queue 5 is highest
1859 * and queue 3 is lowest (queue 4 is reserved)
1860 */
1861 #define BA_QUEUE 5
1862
1863 static void
1864 mwl8k_txq_xmit(struct ieee80211_hw *hw,
1865 int index,
1866 struct ieee80211_sta *sta,
1867 struct sk_buff *skb)
1868 {
1869 struct mwl8k_priv *priv = hw->priv;
1870 struct ieee80211_tx_info *tx_info;
1871 struct mwl8k_vif *mwl8k_vif;
1872 struct ieee80211_hdr *wh;
1873 struct mwl8k_tx_queue *txq;
1874 struct mwl8k_tx_desc *tx;
1875 dma_addr_t dma;
1876 u32 txstatus;
1877 u8 txdatarate;
1878 u16 qos;
1879 int txpriority;
1880 u8 tid = 0;
1881 struct mwl8k_ampdu_stream *stream = NULL;
1882 bool start_ba_session = false;
1883 bool mgmtframe = false;
1884 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
1885 bool eapol_frame = false;
1886
1887 wh = (struct ieee80211_hdr *)skb->data;
1888 if (ieee80211_is_data_qos(wh->frame_control))
1889 qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
1890 else
1891 qos = 0;
1892
1893 if (skb->protocol == cpu_to_be16(ETH_P_PAE))
1894 eapol_frame = true;
1895
1896 if (ieee80211_is_mgmt(wh->frame_control))
1897 mgmtframe = true;
1898
1899 if (priv->ap_fw)
1900 mwl8k_encapsulate_tx_frame(priv, skb);
1901 else
1902 mwl8k_add_dma_header(priv, skb, 0, 0);
1903
1904 wh = &((struct mwl8k_dma_data *)skb->data)->wh;
1905
1906 tx_info = IEEE80211_SKB_CB(skb);
1907 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1908
1909 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1910 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1911 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1912 mwl8k_vif->seqno += 0x10;
1913 }
1914
1915 /* Setup firmware control bit fields for each frame type. */
1916 txstatus = 0;
1917 txdatarate = 0;
1918 if (ieee80211_is_mgmt(wh->frame_control) ||
1919 ieee80211_is_ctl(wh->frame_control)) {
1920 txdatarate = 0;
1921 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1922 } else if (ieee80211_is_data(wh->frame_control)) {
1923 txdatarate = 1;
1924 if (is_multicast_ether_addr(wh->addr1))
1925 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1926
1927 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1928 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1929 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1930 else
1931 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1932 }
1933
1934 /* Queue ADDBA request in the respective data queue. While setting up
1935 * the ampdu stream, mac80211 queues further packets for that
1936 * particular ra/tid pair. However, packets piled up in the hardware
1937 * for that ra/tid pair will still go out. ADDBA request and the
1938 * related data packets going out from different queues asynchronously
1939 * will cause a shift in the receiver window which might result in
1940 * ampdu packets getting dropped at the receiver after the stream has
1941 * been setup.
1942 */
1943 if (unlikely(ieee80211_is_action(wh->frame_control) &&
1944 mgmt->u.action.category == WLAN_CATEGORY_BACK &&
1945 mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ &&
1946 priv->ap_fw)) {
1947 u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
1948 tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2;
1949 index = mwl8k_tid_queue_mapping(tid);
1950 }
1951
1952 txpriority = index;
1953
1954 if (priv->ap_fw && sta && sta->ht_cap.ht_supported && !eapol_frame &&
1955 ieee80211_is_data_qos(wh->frame_control)) {
1956 tid = qos & 0xf;
1957 mwl8k_tx_count_packet(sta, tid);
1958 spin_lock(&priv->stream_lock);
1959 stream = mwl8k_lookup_stream(hw, sta->addr, tid);
1960 if (stream != NULL) {
1961 if (stream->state == AMPDU_STREAM_ACTIVE) {
1962 WARN_ON(!(qos & MWL8K_QOS_ACK_POLICY_BLOCKACK));
1963 txpriority = (BA_QUEUE + stream->idx) %
1964 TOTAL_HW_TX_QUEUES;
1965 if (stream->idx <= 1)
1966 index = stream->idx +
1967 MWL8K_TX_WMM_QUEUES;
1968
1969 } else if (stream->state == AMPDU_STREAM_NEW) {
1970 /* We get here if the driver sends us packets
1971 * after we've initiated a stream, but before
1972 * our ampdu_action routine has been called
1973 * with IEEE80211_AMPDU_TX_START to get the SSN
1974 * for the ADDBA request. So this packet can
1975 * go out with no risk of sequence number
1976 * mismatch. No special handling is required.
1977 */
1978 } else {
1979 /* Drop packets that would go out after the
1980 * ADDBA request was sent but before the ADDBA
1981 * response is received. If we don't do this,
1982 * the recipient would probably receive it
1983 * after the ADDBA request with SSN 0. This
1984 * will cause the recipient's BA receive window
1985 * to shift, which would cause the subsequent
1986 * packets in the BA stream to be discarded.
1987 * mac80211 queues our packets for us in this
1988 * case, so this is really just a safety check.
1989 */
1990 wiphy_warn(hw->wiphy,
1991 "Cannot send packet while ADDBA "
1992 "dialog is underway.\n");
1993 spin_unlock(&priv->stream_lock);
1994 dev_kfree_skb(skb);
1995 return;
1996 }
1997 } else {
1998 /* Defer calling mwl8k_start_stream so that the current
1999 * skb can go out before the ADDBA request. This
2000 * prevents sequence number mismatch at the recepient
2001 * as described above.
2002 */
2003 if (mwl8k_ampdu_allowed(sta, tid)) {
2004 stream = mwl8k_add_stream(hw, sta, tid);
2005 if (stream != NULL)
2006 start_ba_session = true;
2007 }
2008 }
2009 spin_unlock(&priv->stream_lock);
2010 } else {
2011 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
2012 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
2013 }
2014
2015 dma = pci_map_single(priv->pdev, skb->data,
2016 skb->len, PCI_DMA_TODEVICE);
2017
2018 if (pci_dma_mapping_error(priv->pdev, dma)) {
2019 wiphy_debug(hw->wiphy,
2020 "failed to dma map skb, dropping TX frame.\n");
2021 if (start_ba_session) {
2022 spin_lock(&priv->stream_lock);
2023 mwl8k_remove_stream(hw, stream);
2024 spin_unlock(&priv->stream_lock);
2025 }
2026 dev_kfree_skb(skb);
2027 return;
2028 }
2029
2030 spin_lock_bh(&priv->tx_lock);
2031
2032 txq = priv->txq + index;
2033
2034 /* Mgmt frames that go out frequently are probe
2035 * responses. Other mgmt frames got out relatively
2036 * infrequently. Hence reserve 2 buffers so that
2037 * other mgmt frames do not get dropped due to an
2038 * already queued probe response in one of the
2039 * reserved buffers.
2040 */
2041
2042 if (txq->len >= MWL8K_TX_DESCS - 2) {
2043 if (!mgmtframe || txq->len == MWL8K_TX_DESCS) {
2044 if (start_ba_session) {
2045 spin_lock(&priv->stream_lock);
2046 mwl8k_remove_stream(hw, stream);
2047 spin_unlock(&priv->stream_lock);
2048 }
2049 spin_unlock_bh(&priv->tx_lock);
2050 pci_unmap_single(priv->pdev, dma, skb->len,
2051 PCI_DMA_TODEVICE);
2052 dev_kfree_skb(skb);
2053 return;
2054 }
2055 }
2056
2057 BUG_ON(txq->skb[txq->tail] != NULL);
2058 txq->skb[txq->tail] = skb;
2059
2060 tx = txq->txd + txq->tail;
2061 tx->data_rate = txdatarate;
2062 tx->tx_priority = txpriority;
2063 tx->qos_control = cpu_to_le16(qos);
2064 tx->pkt_phys_addr = cpu_to_le32(dma);
2065 tx->pkt_len = cpu_to_le16(skb->len);
2066 tx->rate_info = 0;
2067 if (!priv->ap_fw && sta != NULL)
2068 tx->peer_id = MWL8K_STA(sta)->peer_id;
2069 else
2070 tx->peer_id = 0;
2071
2072 if (priv->ap_fw && ieee80211_is_data(wh->frame_control) && !eapol_frame)
2073 tx->timestamp = cpu_to_le32(ioread32(priv->regs +
2074 MWL8K_HW_TIMER_REGISTER));
2075 else
2076 tx->timestamp = 0;
2077
2078 wmb();
2079 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
2080
2081 txq->len++;
2082 priv->pending_tx_pkts++;
2083
2084 txq->tail++;
2085 if (txq->tail == MWL8K_TX_DESCS)
2086 txq->tail = 0;
2087
2088 mwl8k_tx_start(priv);
2089
2090 spin_unlock_bh(&priv->tx_lock);
2091
2092 /* Initiate the ampdu session here */
2093 if (start_ba_session) {
2094 spin_lock(&priv->stream_lock);
2095 if (mwl8k_start_stream(hw, stream))
2096 mwl8k_remove_stream(hw, stream);
2097 spin_unlock(&priv->stream_lock);
2098 }
2099 }
2100
2101
2102 /*
2103 * Firmware access.
2104 *
2105 * We have the following requirements for issuing firmware commands:
2106 * - Some commands require that the packet transmit path is idle when
2107 * the command is issued. (For simplicity, we'll just quiesce the
2108 * transmit path for every command.)
2109 * - There are certain sequences of commands that need to be issued to
2110 * the hardware sequentially, with no other intervening commands.
2111 *
2112 * This leads to an implementation of a "firmware lock" as a mutex that
2113 * can be taken recursively, and which is taken by both the low-level
2114 * command submission function (mwl8k_post_cmd) as well as any users of
2115 * that function that require issuing of an atomic sequence of commands,
2116 * and quiesces the transmit path whenever it's taken.
2117 */
2118 static int mwl8k_fw_lock(struct ieee80211_hw *hw)
2119 {
2120 struct mwl8k_priv *priv = hw->priv;
2121
2122 if (priv->fw_mutex_owner != current) {
2123 int rc;
2124
2125 mutex_lock(&priv->fw_mutex);
2126 ieee80211_stop_queues(hw);
2127
2128 rc = mwl8k_tx_wait_empty(hw);
2129 if (rc) {
2130 if (!priv->hw_restart_in_progress)
2131 ieee80211_wake_queues(hw);
2132
2133 mutex_unlock(&priv->fw_mutex);
2134
2135 return rc;
2136 }
2137
2138 priv->fw_mutex_owner = current;
2139 }
2140
2141 priv->fw_mutex_depth++;
2142
2143 return 0;
2144 }
2145
2146 static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
2147 {
2148 struct mwl8k_priv *priv = hw->priv;
2149
2150 if (!--priv->fw_mutex_depth) {
2151 if (!priv->hw_restart_in_progress)
2152 ieee80211_wake_queues(hw);
2153
2154 priv->fw_mutex_owner = NULL;
2155 mutex_unlock(&priv->fw_mutex);
2156 }
2157 }
2158
2159
2160 /*
2161 * Command processing.
2162 */
2163
2164 /* Timeout firmware commands after 10s */
2165 #define MWL8K_CMD_TIMEOUT_MS 10000
2166
2167 static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
2168 {
2169 DECLARE_COMPLETION_ONSTACK(cmd_wait);
2170 struct mwl8k_priv *priv = hw->priv;
2171 void __iomem *regs = priv->regs;
2172 dma_addr_t dma_addr;
2173 unsigned int dma_size;
2174 int rc;
2175 unsigned long timeout = 0;
2176 u8 buf[32];
2177
2178 cmd->result = (__force __le16) 0xffff;
2179 dma_size = le16_to_cpu(cmd->length);
2180 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
2181 PCI_DMA_BIDIRECTIONAL);
2182 if (pci_dma_mapping_error(priv->pdev, dma_addr))
2183 return -ENOMEM;
2184
2185 rc = mwl8k_fw_lock(hw);
2186 if (rc) {
2187 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2188 PCI_DMA_BIDIRECTIONAL);
2189 return rc;
2190 }
2191
2192 priv->hostcmd_wait = &cmd_wait;
2193 iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
2194 iowrite32(MWL8K_H2A_INT_DOORBELL,
2195 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
2196 iowrite32(MWL8K_H2A_INT_DUMMY,
2197 regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
2198
2199 timeout = wait_for_completion_timeout(&cmd_wait,
2200 msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
2201
2202 priv->hostcmd_wait = NULL;
2203
2204 mwl8k_fw_unlock(hw);
2205
2206 pci_unmap_single(priv->pdev, dma_addr, dma_size,
2207 PCI_DMA_BIDIRECTIONAL);
2208
2209 if (!timeout) {
2210 wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
2211 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2212 MWL8K_CMD_TIMEOUT_MS);
2213 rc = -ETIMEDOUT;
2214 } else {
2215 int ms;
2216
2217 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
2218
2219 rc = cmd->result ? -EINVAL : 0;
2220 if (rc)
2221 wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
2222 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
2223 le16_to_cpu(cmd->result));
2224 else if (ms > 2000)
2225 wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
2226 mwl8k_cmd_name(cmd->code,
2227 buf, sizeof(buf)),
2228 ms);
2229 }
2230
2231 return rc;
2232 }
2233
2234 static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
2235 struct ieee80211_vif *vif,
2236 struct mwl8k_cmd_pkt *cmd)
2237 {
2238 if (vif != NULL)
2239 cmd->macid = MWL8K_VIF(vif)->macid;
2240 return mwl8k_post_cmd(hw, cmd);
2241 }
2242
2243 /*
2244 * Setup code shared between STA and AP firmware images.
2245 */
2246 static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
2247 {
2248 struct mwl8k_priv *priv = hw->priv;
2249
2250 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
2251 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
2252
2253 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
2254 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
2255
2256 priv->band_24.band = IEEE80211_BAND_2GHZ;
2257 priv->band_24.channels = priv->channels_24;
2258 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
2259 priv->band_24.bitrates = priv->rates_24;
2260 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
2261
2262 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
2263 }
2264
2265 static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
2266 {
2267 struct mwl8k_priv *priv = hw->priv;
2268
2269 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
2270 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
2271
2272 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
2273 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
2274
2275 priv->band_50.band = IEEE80211_BAND_5GHZ;
2276 priv->band_50.channels = priv->channels_50;
2277 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
2278 priv->band_50.bitrates = priv->rates_50;
2279 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
2280
2281 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
2282 }
2283
2284 /*
2285 * CMD_GET_HW_SPEC (STA version).
2286 */
2287 struct mwl8k_cmd_get_hw_spec_sta {
2288 struct mwl8k_cmd_pkt header;
2289 __u8 hw_rev;
2290 __u8 host_interface;
2291 __le16 num_mcaddrs;
2292 __u8 perm_addr[ETH_ALEN];
2293 __le16 region_code;
2294 __le32 fw_rev;
2295 __le32 ps_cookie;
2296 __le32 caps;
2297 __u8 mcs_bitmap[16];
2298 __le32 rx_queue_ptr;
2299 __le32 num_tx_queues;
2300 __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES];
2301 __le32 caps2;
2302 __le32 num_tx_desc_per_queue;
2303 __le32 total_rxd;
2304 } __packed;
2305
2306 #define MWL8K_CAP_MAX_AMSDU 0x20000000
2307 #define MWL8K_CAP_GREENFIELD 0x08000000
2308 #define MWL8K_CAP_AMPDU 0x04000000
2309 #define MWL8K_CAP_RX_STBC 0x01000000
2310 #define MWL8K_CAP_TX_STBC 0x00800000
2311 #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
2312 #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
2313 #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
2314 #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
2315 #define MWL8K_CAP_DELAY_BA 0x00003000
2316 #define MWL8K_CAP_MIMO 0x00000200
2317 #define MWL8K_CAP_40MHZ 0x00000100
2318 #define MWL8K_CAP_BAND_MASK 0x00000007
2319 #define MWL8K_CAP_5GHZ 0x00000004
2320 #define MWL8K_CAP_2GHZ4 0x00000001
2321
2322 static void
2323 mwl8k_set_ht_caps(struct ieee80211_hw *hw,
2324 struct ieee80211_supported_band *band, u32 cap)
2325 {
2326 int rx_streams;
2327 int tx_streams;
2328
2329 band->ht_cap.ht_supported = 1;
2330
2331 if (cap & MWL8K_CAP_MAX_AMSDU)
2332 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
2333 if (cap & MWL8K_CAP_GREENFIELD)
2334 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
2335 if (cap & MWL8K_CAP_AMPDU) {
2336 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
2337 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
2338 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
2339 }
2340 if (cap & MWL8K_CAP_RX_STBC)
2341 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
2342 if (cap & MWL8K_CAP_TX_STBC)
2343 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
2344 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
2345 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
2346 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
2347 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
2348 if (cap & MWL8K_CAP_DELAY_BA)
2349 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
2350 if (cap & MWL8K_CAP_40MHZ)
2351 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
2352
2353 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
2354 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
2355
2356 band->ht_cap.mcs.rx_mask[0] = 0xff;
2357 if (rx_streams >= 2)
2358 band->ht_cap.mcs.rx_mask[1] = 0xff;
2359 if (rx_streams >= 3)
2360 band->ht_cap.mcs.rx_mask[2] = 0xff;
2361 band->ht_cap.mcs.rx_mask[4] = 0x01;
2362 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
2363
2364 if (rx_streams != tx_streams) {
2365 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
2366 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
2367 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2368 }
2369 }
2370
2371 static void
2372 mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
2373 {
2374 struct mwl8k_priv *priv = hw->priv;
2375
2376 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
2377 mwl8k_setup_2ghz_band(hw);
2378 if (caps & MWL8K_CAP_MIMO)
2379 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
2380 }
2381
2382 if (caps & MWL8K_CAP_5GHZ) {
2383 mwl8k_setup_5ghz_band(hw);
2384 if (caps & MWL8K_CAP_MIMO)
2385 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
2386 }
2387 }
2388
2389 static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
2390 {
2391 struct mwl8k_priv *priv = hw->priv;
2392 struct mwl8k_cmd_get_hw_spec_sta *cmd;
2393 int rc;
2394 int i;
2395
2396 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2397 if (cmd == NULL)
2398 return -ENOMEM;
2399
2400 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2401 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2402
2403 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2404 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2405 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
2406 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
2407 for (i = 0; i < mwl8k_tx_queues(priv); i++)
2408 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
2409 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
2410 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
2411
2412 rc = mwl8k_post_cmd(hw, &cmd->header);
2413
2414 if (!rc) {
2415 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2416 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
2417 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
2418 priv->hw_rev = cmd->hw_rev;
2419 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
2420 priv->ap_macids_supported = 0x00000000;
2421 priv->sta_macids_supported = 0x00000001;
2422 }
2423
2424 kfree(cmd);
2425 return rc;
2426 }
2427
2428 /*
2429 * CMD_GET_HW_SPEC (AP version).
2430 */
2431 struct mwl8k_cmd_get_hw_spec_ap {
2432 struct mwl8k_cmd_pkt header;
2433 __u8 hw_rev;
2434 __u8 host_interface;
2435 __le16 num_wcb;
2436 __le16 num_mcaddrs;
2437 __u8 perm_addr[ETH_ALEN];
2438 __le16 region_code;
2439 __le16 num_antenna;
2440 __le32 fw_rev;
2441 __le32 wcbbase0;
2442 __le32 rxwrptr;
2443 __le32 rxrdptr;
2444 __le32 ps_cookie;
2445 __le32 wcbbase1;
2446 __le32 wcbbase2;
2447 __le32 wcbbase3;
2448 __le32 fw_api_version;
2449 __le32 caps;
2450 __le32 num_of_ampdu_queues;
2451 __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES];
2452 } __packed;
2453
2454 static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
2455 {
2456 struct mwl8k_priv *priv = hw->priv;
2457 struct mwl8k_cmd_get_hw_spec_ap *cmd;
2458 int rc, i;
2459 u32 api_version;
2460
2461 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2462 if (cmd == NULL)
2463 return -ENOMEM;
2464
2465 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
2466 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2467
2468 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
2469 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2470
2471 rc = mwl8k_post_cmd(hw, &cmd->header);
2472
2473 if (!rc) {
2474 int off;
2475
2476 api_version = le32_to_cpu(cmd->fw_api_version);
2477 if (priv->device_info->fw_api_ap != api_version) {
2478 printk(KERN_ERR "%s: Unsupported fw API version for %s."
2479 " Expected %d got %d.\n", MWL8K_NAME,
2480 priv->device_info->part_name,
2481 priv->device_info->fw_api_ap,
2482 api_version);
2483 rc = -EINVAL;
2484 goto done;
2485 }
2486 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
2487 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
2488 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
2489 priv->hw_rev = cmd->hw_rev;
2490 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
2491 priv->ap_macids_supported = 0x000000ff;
2492 priv->sta_macids_supported = 0x00000000;
2493 priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues);
2494 if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) {
2495 wiphy_warn(hw->wiphy, "fw reported %d ampdu queues"
2496 " but we only support %d.\n",
2497 priv->num_ampdu_queues,
2498 MWL8K_MAX_AMPDU_QUEUES);
2499 priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES;
2500 }
2501 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
2502 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
2503
2504 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
2505 iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
2506
2507 priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff;
2508 priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff;
2509 priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff;
2510 priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff;
2511
2512 for (i = 0; i < priv->num_ampdu_queues; i++)
2513 priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] =
2514 le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff;
2515 }
2516
2517 done:
2518 kfree(cmd);
2519 return rc;
2520 }
2521
2522 /*
2523 * CMD_SET_HW_SPEC.
2524 */
2525 struct mwl8k_cmd_set_hw_spec {
2526 struct mwl8k_cmd_pkt header;
2527 __u8 hw_rev;
2528 __u8 host_interface;
2529 __le16 num_mcaddrs;
2530 __u8 perm_addr[ETH_ALEN];
2531 __le16 region_code;
2532 __le32 fw_rev;
2533 __le32 ps_cookie;
2534 __le32 caps;
2535 __le32 rx_queue_ptr;
2536 __le32 num_tx_queues;
2537 __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES];
2538 __le32 flags;
2539 __le32 num_tx_desc_per_queue;
2540 __le32 total_rxd;
2541 } __packed;
2542
2543 /* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause
2544 * packets to expire 500 ms after the timestamp in the tx descriptor. That is,
2545 * the packets that are queued for more than 500ms, will be dropped in the
2546 * hardware. This helps minimizing the issues caused due to head-of-line
2547 * blocking where a slow client can hog the bandwidth and affect traffic to a
2548 * faster client.
2549 */
2550 #define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400
2551 #define MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR 0x00000200
2552 #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
2553 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
2554 #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
2555
2556 static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
2557 {
2558 struct mwl8k_priv *priv = hw->priv;
2559 struct mwl8k_cmd_set_hw_spec *cmd;
2560 int rc;
2561 int i;
2562
2563 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2564 if (cmd == NULL)
2565 return -ENOMEM;
2566
2567 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
2568 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2569
2570 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
2571 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
2572 cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
2573
2574 /*
2575 * Mac80211 stack has Q0 as highest priority and Q3 as lowest in
2576 * that order. Firmware has Q3 as highest priority and Q0 as lowest
2577 * in that order. Map Q3 of mac80211 to Q0 of firmware so that the
2578 * priority is interpreted the right way in firmware.
2579 */
2580 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
2581 int j = mwl8k_tx_queues(priv) - 1 - i;
2582 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma);
2583 }
2584
2585 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
2586 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
2587 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON |
2588 MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY |
2589 MWL8K_SET_HW_SPEC_FLAG_GENERATE_CCMP_HDR);
2590 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
2591 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
2592
2593 rc = mwl8k_post_cmd(hw, &cmd->header);
2594 kfree(cmd);
2595
2596 return rc;
2597 }
2598
2599 /*
2600 * CMD_MAC_MULTICAST_ADR.
2601 */
2602 struct mwl8k_cmd_mac_multicast_adr {
2603 struct mwl8k_cmd_pkt header;
2604 __le16 action;
2605 __le16 numaddr;
2606 __u8 addr[0][ETH_ALEN];
2607 };
2608
2609 #define MWL8K_ENABLE_RX_DIRECTED 0x0001
2610 #define MWL8K_ENABLE_RX_MULTICAST 0x0002
2611 #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
2612 #define MWL8K_ENABLE_RX_BROADCAST 0x0008
2613
2614 static struct mwl8k_cmd_pkt *
2615 __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
2616 struct netdev_hw_addr_list *mc_list)
2617 {
2618 struct mwl8k_priv *priv = hw->priv;
2619 struct mwl8k_cmd_mac_multicast_adr *cmd;
2620 int size;
2621 int mc_count = 0;
2622
2623 if (mc_list)
2624 mc_count = netdev_hw_addr_list_count(mc_list);
2625
2626 if (allmulti || mc_count > priv->num_mcaddrs) {
2627 allmulti = 1;
2628 mc_count = 0;
2629 }
2630
2631 size = sizeof(*cmd) + mc_count * ETH_ALEN;
2632
2633 cmd = kzalloc(size, GFP_ATOMIC);
2634 if (cmd == NULL)
2635 return NULL;
2636
2637 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
2638 cmd->header.length = cpu_to_le16(size);
2639 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
2640 MWL8K_ENABLE_RX_BROADCAST);
2641
2642 if (allmulti) {
2643 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
2644 } else if (mc_count) {
2645 struct netdev_hw_addr *ha;
2646 int i = 0;
2647
2648 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
2649 cmd->numaddr = cpu_to_le16(mc_count);
2650 netdev_hw_addr_list_for_each(ha, mc_list) {
2651 memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
2652 }
2653 }
2654
2655 return &cmd->header;
2656 }
2657
2658 /*
2659 * CMD_GET_STAT.
2660 */
2661 struct mwl8k_cmd_get_stat {
2662 struct mwl8k_cmd_pkt header;
2663 __le32 stats[64];
2664 } __packed;
2665
2666 #define MWL8K_STAT_ACK_FAILURE 9
2667 #define MWL8K_STAT_RTS_FAILURE 12
2668 #define MWL8K_STAT_FCS_ERROR 24
2669 #define MWL8K_STAT_RTS_SUCCESS 11
2670
2671 static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
2672 struct ieee80211_low_level_stats *stats)
2673 {
2674 struct mwl8k_cmd_get_stat *cmd;
2675 int rc;
2676
2677 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2678 if (cmd == NULL)
2679 return -ENOMEM;
2680
2681 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
2682 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2683
2684 rc = mwl8k_post_cmd(hw, &cmd->header);
2685 if (!rc) {
2686 stats->dot11ACKFailureCount =
2687 le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
2688 stats->dot11RTSFailureCount =
2689 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
2690 stats->dot11FCSErrorCount =
2691 le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
2692 stats->dot11RTSSuccessCount =
2693 le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
2694 }
2695 kfree(cmd);
2696
2697 return rc;
2698 }
2699
2700 /*
2701 * CMD_RADIO_CONTROL.
2702 */
2703 struct mwl8k_cmd_radio_control {
2704 struct mwl8k_cmd_pkt header;
2705 __le16 action;
2706 __le16 control;
2707 __le16 radio_on;
2708 } __packed;
2709
2710 static int
2711 mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
2712 {
2713 struct mwl8k_priv *priv = hw->priv;
2714 struct mwl8k_cmd_radio_control *cmd;
2715 int rc;
2716
2717 if (enable == priv->radio_on && !force)
2718 return 0;
2719
2720 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2721 if (cmd == NULL)
2722 return -ENOMEM;
2723
2724 cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
2725 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2726 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2727 cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
2728 cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
2729
2730 rc = mwl8k_post_cmd(hw, &cmd->header);
2731 kfree(cmd);
2732
2733 if (!rc)
2734 priv->radio_on = enable;
2735
2736 return rc;
2737 }
2738
2739 static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
2740 {
2741 return mwl8k_cmd_radio_control(hw, 0, 0);
2742 }
2743
2744 static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
2745 {
2746 return mwl8k_cmd_radio_control(hw, 1, 0);
2747 }
2748
2749 static int
2750 mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
2751 {
2752 struct mwl8k_priv *priv = hw->priv;
2753
2754 priv->radio_short_preamble = short_preamble;
2755
2756 return mwl8k_cmd_radio_control(hw, 1, 1);
2757 }
2758
2759 /*
2760 * CMD_RF_TX_POWER.
2761 */
2762 #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
2763
2764 struct mwl8k_cmd_rf_tx_power {
2765 struct mwl8k_cmd_pkt header;
2766 __le16 action;
2767 __le16 support_level;
2768 __le16 current_level;
2769 __le16 reserved;
2770 __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
2771 } __packed;
2772
2773 static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
2774 {
2775 struct mwl8k_cmd_rf_tx_power *cmd;
2776 int rc;
2777
2778 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2779 if (cmd == NULL)
2780 return -ENOMEM;
2781
2782 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
2783 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2784 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2785 cmd->support_level = cpu_to_le16(dBm);
2786
2787 rc = mwl8k_post_cmd(hw, &cmd->header);
2788 kfree(cmd);
2789
2790 return rc;
2791 }
2792
2793 /*
2794 * CMD_TX_POWER.
2795 */
2796 #define MWL8K_TX_POWER_LEVEL_TOTAL 12
2797
2798 struct mwl8k_cmd_tx_power {
2799 struct mwl8k_cmd_pkt header;
2800 __le16 action;
2801 __le16 band;
2802 __le16 channel;
2803 __le16 bw;
2804 __le16 sub_ch;
2805 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
2806 } __packed;
2807
2808 static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
2809 struct ieee80211_conf *conf,
2810 unsigned short pwr)
2811 {
2812 struct ieee80211_channel *channel = conf->channel;
2813 struct mwl8k_cmd_tx_power *cmd;
2814 int rc;
2815 int i;
2816
2817 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2818 if (cmd == NULL)
2819 return -ENOMEM;
2820
2821 cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
2822 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2823 cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
2824
2825 if (channel->band == IEEE80211_BAND_2GHZ)
2826 cmd->band = cpu_to_le16(0x1);
2827 else if (channel->band == IEEE80211_BAND_5GHZ)
2828 cmd->band = cpu_to_le16(0x4);
2829
2830 cmd->channel = cpu_to_le16(channel->hw_value);
2831
2832 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2833 conf->channel_type == NL80211_CHAN_HT20) {
2834 cmd->bw = cpu_to_le16(0x2);
2835 } else {
2836 cmd->bw = cpu_to_le16(0x4);
2837 if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2838 cmd->sub_ch = cpu_to_le16(0x3);
2839 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2840 cmd->sub_ch = cpu_to_le16(0x1);
2841 }
2842
2843 for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
2844 cmd->power_level_list[i] = cpu_to_le16(pwr);
2845
2846 rc = mwl8k_post_cmd(hw, &cmd->header);
2847 kfree(cmd);
2848
2849 return rc;
2850 }
2851
2852 /*
2853 * CMD_RF_ANTENNA.
2854 */
2855 struct mwl8k_cmd_rf_antenna {
2856 struct mwl8k_cmd_pkt header;
2857 __le16 antenna;
2858 __le16 mode;
2859 } __packed;
2860
2861 #define MWL8K_RF_ANTENNA_RX 1
2862 #define MWL8K_RF_ANTENNA_TX 2
2863
2864 static int
2865 mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2866 {
2867 struct mwl8k_cmd_rf_antenna *cmd;
2868 int rc;
2869
2870 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2871 if (cmd == NULL)
2872 return -ENOMEM;
2873
2874 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2875 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2876 cmd->antenna = cpu_to_le16(antenna);
2877 cmd->mode = cpu_to_le16(mask);
2878
2879 rc = mwl8k_post_cmd(hw, &cmd->header);
2880 kfree(cmd);
2881
2882 return rc;
2883 }
2884
2885 /*
2886 * CMD_SET_BEACON.
2887 */
2888 struct mwl8k_cmd_set_beacon {
2889 struct mwl8k_cmd_pkt header;
2890 __le16 beacon_len;
2891 __u8 beacon[0];
2892 };
2893
2894 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2895 struct ieee80211_vif *vif, u8 *beacon, int len)
2896 {
2897 struct mwl8k_cmd_set_beacon *cmd;
2898 int rc;
2899
2900 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2901 if (cmd == NULL)
2902 return -ENOMEM;
2903
2904 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2905 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2906 cmd->beacon_len = cpu_to_le16(len);
2907 memcpy(cmd->beacon, beacon, len);
2908
2909 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2910 kfree(cmd);
2911
2912 return rc;
2913 }
2914
2915 /*
2916 * CMD_SET_PRE_SCAN.
2917 */
2918 struct mwl8k_cmd_set_pre_scan {
2919 struct mwl8k_cmd_pkt header;
2920 } __packed;
2921
2922 static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
2923 {
2924 struct mwl8k_cmd_set_pre_scan *cmd;
2925 int rc;
2926
2927 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2928 if (cmd == NULL)
2929 return -ENOMEM;
2930
2931 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
2932 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2933
2934 rc = mwl8k_post_cmd(hw, &cmd->header);
2935 kfree(cmd);
2936
2937 return rc;
2938 }
2939
2940 /*
2941 * CMD_SET_POST_SCAN.
2942 */
2943 struct mwl8k_cmd_set_post_scan {
2944 struct mwl8k_cmd_pkt header;
2945 __le32 isibss;
2946 __u8 bssid[ETH_ALEN];
2947 } __packed;
2948
2949 static int
2950 mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
2951 {
2952 struct mwl8k_cmd_set_post_scan *cmd;
2953 int rc;
2954
2955 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2956 if (cmd == NULL)
2957 return -ENOMEM;
2958
2959 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
2960 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2961 cmd->isibss = 0;
2962 memcpy(cmd->bssid, mac, ETH_ALEN);
2963
2964 rc = mwl8k_post_cmd(hw, &cmd->header);
2965 kfree(cmd);
2966
2967 return rc;
2968 }
2969
2970 /*
2971 * CMD_SET_RF_CHANNEL.
2972 */
2973 struct mwl8k_cmd_set_rf_channel {
2974 struct mwl8k_cmd_pkt header;
2975 __le16 action;
2976 __u8 current_channel;
2977 __le32 channel_flags;
2978 } __packed;
2979
2980 static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
2981 struct ieee80211_conf *conf)
2982 {
2983 struct ieee80211_channel *channel = conf->channel;
2984 struct mwl8k_cmd_set_rf_channel *cmd;
2985 int rc;
2986
2987 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2988 if (cmd == NULL)
2989 return -ENOMEM;
2990
2991 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
2992 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2993 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2994 cmd->current_channel = channel->hw_value;
2995
2996 if (channel->band == IEEE80211_BAND_2GHZ)
2997 cmd->channel_flags |= cpu_to_le32(0x00000001);
2998 else if (channel->band == IEEE80211_BAND_5GHZ)
2999 cmd->channel_flags |= cpu_to_le32(0x00000004);
3000
3001 if (conf->channel_type == NL80211_CHAN_NO_HT ||
3002 conf->channel_type == NL80211_CHAN_HT20)
3003 cmd->channel_flags |= cpu_to_le32(0x00000080);
3004 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
3005 cmd->channel_flags |= cpu_to_le32(0x000001900);
3006 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
3007 cmd->channel_flags |= cpu_to_le32(0x000000900);
3008
3009 rc = mwl8k_post_cmd(hw, &cmd->header);
3010 kfree(cmd);
3011
3012 return rc;
3013 }
3014
3015 /*
3016 * CMD_SET_AID.
3017 */
3018 #define MWL8K_FRAME_PROT_DISABLED 0x00
3019 #define MWL8K_FRAME_PROT_11G 0x07
3020 #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
3021 #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
3022
3023 struct mwl8k_cmd_update_set_aid {
3024 struct mwl8k_cmd_pkt header;
3025 __le16 aid;
3026
3027 /* AP's MAC address (BSSID) */
3028 __u8 bssid[ETH_ALEN];
3029 __le16 protection_mode;
3030 __u8 supp_rates[14];
3031 } __packed;
3032
3033 static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
3034 {
3035 int i;
3036 int j;
3037
3038 /*
3039 * Clear nonstandard rates 4 and 13.
3040 */
3041 mask &= 0x1fef;
3042
3043 for (i = 0, j = 0; i < 14; i++) {
3044 if (mask & (1 << i))
3045 rates[j++] = mwl8k_rates_24[i].hw_value;
3046 }
3047 }
3048
3049 static int
3050 mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
3051 struct ieee80211_vif *vif, u32 legacy_rate_mask)
3052 {
3053 struct mwl8k_cmd_update_set_aid *cmd;
3054 u16 prot_mode;
3055 int rc;
3056
3057 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3058 if (cmd == NULL)
3059 return -ENOMEM;
3060
3061 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
3062 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3063 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
3064 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
3065
3066 if (vif->bss_conf.use_cts_prot) {
3067 prot_mode = MWL8K_FRAME_PROT_11G;
3068 } else {
3069 switch (vif->bss_conf.ht_operation_mode &
3070 IEEE80211_HT_OP_MODE_PROTECTION) {
3071 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
3072 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
3073 break;
3074 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
3075 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
3076 break;
3077 default:
3078 prot_mode = MWL8K_FRAME_PROT_DISABLED;
3079 break;
3080 }
3081 }
3082 cmd->protection_mode = cpu_to_le16(prot_mode);
3083
3084 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
3085
3086 rc = mwl8k_post_cmd(hw, &cmd->header);
3087 kfree(cmd);
3088
3089 return rc;
3090 }
3091
3092 /*
3093 * CMD_SET_RATE.
3094 */
3095 struct mwl8k_cmd_set_rate {
3096 struct mwl8k_cmd_pkt header;
3097 __u8 legacy_rates[14];
3098
3099 /* Bitmap for supported MCS codes. */
3100 __u8 mcs_set[16];
3101 __u8 reserved[16];
3102 } __packed;
3103
3104 static int
3105 mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3106 u32 legacy_rate_mask, u8 *mcs_rates)
3107 {
3108 struct mwl8k_cmd_set_rate *cmd;
3109 int rc;
3110
3111 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3112 if (cmd == NULL)
3113 return -ENOMEM;
3114
3115 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
3116 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3117 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
3118 memcpy(cmd->mcs_set, mcs_rates, 16);
3119
3120 rc = mwl8k_post_cmd(hw, &cmd->header);
3121 kfree(cmd);
3122
3123 return rc;
3124 }
3125
3126 /*
3127 * CMD_FINALIZE_JOIN.
3128 */
3129 #define MWL8K_FJ_BEACON_MAXLEN 128
3130
3131 struct mwl8k_cmd_finalize_join {
3132 struct mwl8k_cmd_pkt header;
3133 __le32 sleep_interval; /* Number of beacon periods to sleep */
3134 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
3135 } __packed;
3136
3137 static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
3138 int framelen, int dtim)
3139 {
3140 struct mwl8k_cmd_finalize_join *cmd;
3141 struct ieee80211_mgmt *payload = frame;
3142 int payload_len;
3143 int rc;
3144
3145 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3146 if (cmd == NULL)
3147 return -ENOMEM;
3148
3149 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
3150 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3151 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
3152
3153 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
3154 if (payload_len < 0)
3155 payload_len = 0;
3156 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
3157 payload_len = MWL8K_FJ_BEACON_MAXLEN;
3158
3159 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
3160
3161 rc = mwl8k_post_cmd(hw, &cmd->header);
3162 kfree(cmd);
3163
3164 return rc;
3165 }
3166
3167 /*
3168 * CMD_SET_RTS_THRESHOLD.
3169 */
3170 struct mwl8k_cmd_set_rts_threshold {
3171 struct mwl8k_cmd_pkt header;
3172 __le16 action;
3173 __le16 threshold;
3174 } __packed;
3175
3176 static int
3177 mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
3178 {
3179 struct mwl8k_cmd_set_rts_threshold *cmd;
3180 int rc;
3181
3182 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3183 if (cmd == NULL)
3184 return -ENOMEM;
3185
3186 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
3187 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3188 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3189 cmd->threshold = cpu_to_le16(rts_thresh);
3190
3191 rc = mwl8k_post_cmd(hw, &cmd->header);
3192 kfree(cmd);
3193
3194 return rc;
3195 }
3196
3197 /*
3198 * CMD_SET_SLOT.
3199 */
3200 struct mwl8k_cmd_set_slot {
3201 struct mwl8k_cmd_pkt header;
3202 __le16 action;
3203 __u8 short_slot;
3204 } __packed;
3205
3206 static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
3207 {
3208 struct mwl8k_cmd_set_slot *cmd;
3209 int rc;
3210
3211 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3212 if (cmd == NULL)
3213 return -ENOMEM;
3214
3215 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
3216 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3217 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3218 cmd->short_slot = short_slot_time;
3219
3220 rc = mwl8k_post_cmd(hw, &cmd->header);
3221 kfree(cmd);
3222
3223 return rc;
3224 }
3225
3226 /*
3227 * CMD_SET_EDCA_PARAMS.
3228 */
3229 struct mwl8k_cmd_set_edca_params {
3230 struct mwl8k_cmd_pkt header;
3231
3232 /* See MWL8K_SET_EDCA_XXX below */
3233 __le16 action;
3234
3235 /* TX opportunity in units of 32 us */
3236 __le16 txop;
3237
3238 union {
3239 struct {
3240 /* Log exponent of max contention period: 0...15 */
3241 __le32 log_cw_max;
3242
3243 /* Log exponent of min contention period: 0...15 */
3244 __le32 log_cw_min;
3245
3246 /* Adaptive interframe spacing in units of 32us */
3247 __u8 aifs;
3248
3249 /* TX queue to configure */
3250 __u8 txq;
3251 } ap;
3252 struct {
3253 /* Log exponent of max contention period: 0...15 */
3254 __u8 log_cw_max;
3255
3256 /* Log exponent of min contention period: 0...15 */
3257 __u8 log_cw_min;
3258
3259 /* Adaptive interframe spacing in units of 32us */
3260 __u8 aifs;
3261
3262 /* TX queue to configure */
3263 __u8 txq;
3264 } sta;
3265 };
3266 } __packed;
3267
3268 #define MWL8K_SET_EDCA_CW 0x01
3269 #define MWL8K_SET_EDCA_TXOP 0x02
3270 #define MWL8K_SET_EDCA_AIFS 0x04
3271
3272 #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
3273 MWL8K_SET_EDCA_TXOP | \
3274 MWL8K_SET_EDCA_AIFS)
3275
3276 static int
3277 mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
3278 __u16 cw_min, __u16 cw_max,
3279 __u8 aifs, __u16 txop)
3280 {
3281 struct mwl8k_priv *priv = hw->priv;
3282 struct mwl8k_cmd_set_edca_params *cmd;
3283 int rc;
3284
3285 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3286 if (cmd == NULL)
3287 return -ENOMEM;
3288
3289 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
3290 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3291 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
3292 cmd->txop = cpu_to_le16(txop);
3293 if (priv->ap_fw) {
3294 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
3295 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
3296 cmd->ap.aifs = aifs;
3297 cmd->ap.txq = qnum;
3298 } else {
3299 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
3300 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
3301 cmd->sta.aifs = aifs;
3302 cmd->sta.txq = qnum;
3303 }
3304
3305 rc = mwl8k_post_cmd(hw, &cmd->header);
3306 kfree(cmd);
3307
3308 return rc;
3309 }
3310
3311 /*
3312 * CMD_SET_WMM_MODE.
3313 */
3314 struct mwl8k_cmd_set_wmm_mode {
3315 struct mwl8k_cmd_pkt header;
3316 __le16 action;
3317 } __packed;
3318
3319 static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
3320 {
3321 struct mwl8k_priv *priv = hw->priv;
3322 struct mwl8k_cmd_set_wmm_mode *cmd;
3323 int rc;
3324
3325 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3326 if (cmd == NULL)
3327 return -ENOMEM;
3328
3329 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
3330 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3331 cmd->action = cpu_to_le16(!!enable);
3332
3333 rc = mwl8k_post_cmd(hw, &cmd->header);
3334 kfree(cmd);
3335
3336 if (!rc)
3337 priv->wmm_enabled = enable;
3338
3339 return rc;
3340 }
3341
3342 /*
3343 * CMD_MIMO_CONFIG.
3344 */
3345 struct mwl8k_cmd_mimo_config {
3346 struct mwl8k_cmd_pkt header;
3347 __le32 action;
3348 __u8 rx_antenna_map;
3349 __u8 tx_antenna_map;
3350 } __packed;
3351
3352 static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
3353 {
3354 struct mwl8k_cmd_mimo_config *cmd;
3355 int rc;
3356
3357 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3358 if (cmd == NULL)
3359 return -ENOMEM;
3360
3361 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
3362 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3363 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
3364 cmd->rx_antenna_map = rx;
3365 cmd->tx_antenna_map = tx;
3366
3367 rc = mwl8k_post_cmd(hw, &cmd->header);
3368 kfree(cmd);
3369
3370 return rc;
3371 }
3372
3373 /*
3374 * CMD_USE_FIXED_RATE (STA version).
3375 */
3376 struct mwl8k_cmd_use_fixed_rate_sta {
3377 struct mwl8k_cmd_pkt header;
3378 __le32 action;
3379 __le32 allow_rate_drop;
3380 __le32 num_rates;
3381 struct {
3382 __le32 is_ht_rate;
3383 __le32 enable_retry;
3384 __le32 rate;
3385 __le32 retry_count;
3386 } rate_entry[8];
3387 __le32 rate_type;
3388 __le32 reserved1;
3389 __le32 reserved2;
3390 } __packed;
3391
3392 #define MWL8K_USE_AUTO_RATE 0x0002
3393 #define MWL8K_UCAST_RATE 0
3394
3395 static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
3396 {
3397 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
3398 int rc;
3399
3400 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3401 if (cmd == NULL)
3402 return -ENOMEM;
3403
3404 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3405 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3406 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3407 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
3408
3409 rc = mwl8k_post_cmd(hw, &cmd->header);
3410 kfree(cmd);
3411
3412 return rc;
3413 }
3414
3415 /*
3416 * CMD_USE_FIXED_RATE (AP version).
3417 */
3418 struct mwl8k_cmd_use_fixed_rate_ap {
3419 struct mwl8k_cmd_pkt header;
3420 __le32 action;
3421 __le32 allow_rate_drop;
3422 __le32 num_rates;
3423 struct mwl8k_rate_entry_ap {
3424 __le32 is_ht_rate;
3425 __le32 enable_retry;
3426 __le32 rate;
3427 __le32 retry_count;
3428 } rate_entry[4];
3429 u8 multicast_rate;
3430 u8 multicast_rate_type;
3431 u8 management_rate;
3432 } __packed;
3433
3434 static int
3435 mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
3436 {
3437 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
3438 int rc;
3439
3440 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3441 if (cmd == NULL)
3442 return -ENOMEM;
3443
3444 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
3445 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3446 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
3447 cmd->multicast_rate = mcast;
3448 cmd->management_rate = mgmt;
3449
3450 rc = mwl8k_post_cmd(hw, &cmd->header);
3451 kfree(cmd);
3452
3453 return rc;
3454 }
3455
3456 /*
3457 * CMD_ENABLE_SNIFFER.
3458 */
3459 struct mwl8k_cmd_enable_sniffer {
3460 struct mwl8k_cmd_pkt header;
3461 __le32 action;
3462 } __packed;
3463
3464 static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
3465 {
3466 struct mwl8k_cmd_enable_sniffer *cmd;
3467 int rc;
3468
3469 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3470 if (cmd == NULL)
3471 return -ENOMEM;
3472
3473 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
3474 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3475 cmd->action = cpu_to_le32(!!enable);
3476
3477 rc = mwl8k_post_cmd(hw, &cmd->header);
3478 kfree(cmd);
3479
3480 return rc;
3481 }
3482
3483 struct mwl8k_cmd_update_mac_addr {
3484 struct mwl8k_cmd_pkt header;
3485 union {
3486 struct {
3487 __le16 mac_type;
3488 __u8 mac_addr[ETH_ALEN];
3489 } mbss;
3490 __u8 mac_addr[ETH_ALEN];
3491 };
3492 } __packed;
3493
3494 #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
3495 #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
3496 #define MWL8K_MAC_TYPE_PRIMARY_AP 2
3497 #define MWL8K_MAC_TYPE_SECONDARY_AP 3
3498
3499 static int mwl8k_cmd_update_mac_addr(struct ieee80211_hw *hw,
3500 struct ieee80211_vif *vif, u8 *mac, bool set)
3501 {
3502 struct mwl8k_priv *priv = hw->priv;
3503 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
3504 struct mwl8k_cmd_update_mac_addr *cmd;
3505 int mac_type;
3506 int rc;
3507
3508 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3509 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
3510 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
3511 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
3512 else
3513 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
3514 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
3515 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
3516 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
3517 else
3518 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
3519 }
3520
3521 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3522 if (cmd == NULL)
3523 return -ENOMEM;
3524
3525 if (set)
3526 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
3527 else
3528 cmd->header.code = cpu_to_le16(MWL8K_CMD_DEL_MAC_ADDR);
3529
3530 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3531 if (priv->ap_fw) {
3532 cmd->mbss.mac_type = cpu_to_le16(mac_type);
3533 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
3534 } else {
3535 memcpy(cmd->mac_addr, mac, ETH_ALEN);
3536 }
3537
3538 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3539 kfree(cmd);
3540
3541 return rc;
3542 }
3543
3544 /*
3545 * MWL8K_CMD_SET_MAC_ADDR.
3546 */
3547 static inline int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
3548 struct ieee80211_vif *vif, u8 *mac)
3549 {
3550 return mwl8k_cmd_update_mac_addr(hw, vif, mac, true);
3551 }
3552
3553 /*
3554 * MWL8K_CMD_DEL_MAC_ADDR.
3555 */
3556 static inline int mwl8k_cmd_del_mac_addr(struct ieee80211_hw *hw,
3557 struct ieee80211_vif *vif, u8 *mac)
3558 {
3559 return mwl8k_cmd_update_mac_addr(hw, vif, mac, false);
3560 }
3561
3562 /*
3563 * CMD_SET_RATEADAPT_MODE.
3564 */
3565 struct mwl8k_cmd_set_rate_adapt_mode {
3566 struct mwl8k_cmd_pkt header;
3567 __le16 action;
3568 __le16 mode;
3569 } __packed;
3570
3571 static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
3572 {
3573 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
3574 int rc;
3575
3576 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3577 if (cmd == NULL)
3578 return -ENOMEM;
3579
3580 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
3581 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3582 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
3583 cmd->mode = cpu_to_le16(mode);
3584
3585 rc = mwl8k_post_cmd(hw, &cmd->header);
3586 kfree(cmd);
3587
3588 return rc;
3589 }
3590
3591 /*
3592 * CMD_GET_WATCHDOG_BITMAP.
3593 */
3594 struct mwl8k_cmd_get_watchdog_bitmap {
3595 struct mwl8k_cmd_pkt header;
3596 u8 bitmap;
3597 } __packed;
3598
3599 static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap)
3600 {
3601 struct mwl8k_cmd_get_watchdog_bitmap *cmd;
3602 int rc;
3603
3604 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3605 if (cmd == NULL)
3606 return -ENOMEM;
3607
3608 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP);
3609 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3610
3611 rc = mwl8k_post_cmd(hw, &cmd->header);
3612 if (!rc)
3613 *bitmap = cmd->bitmap;
3614
3615 kfree(cmd);
3616
3617 return rc;
3618 }
3619
3620 #define MWL8K_WMM_QUEUE_NUMBER 3
3621
3622 static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
3623 u8 idx);
3624
3625 static void mwl8k_watchdog_ba_events(struct work_struct *work)
3626 {
3627 int rc;
3628 u8 bitmap = 0, stream_index;
3629 struct mwl8k_ampdu_stream *streams;
3630 struct mwl8k_priv *priv =
3631 container_of(work, struct mwl8k_priv, watchdog_ba_handle);
3632 struct ieee80211_hw *hw = priv->hw;
3633 int i;
3634 u32 status = 0;
3635
3636 mwl8k_fw_lock(hw);
3637
3638 rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap);
3639 if (rc)
3640 goto done;
3641
3642 spin_lock(&priv->stream_lock);
3643
3644 /* the bitmap is the hw queue number. Map it to the ampdu queue. */
3645 for (i = 0; i < TOTAL_HW_TX_QUEUES; i++) {
3646 if (bitmap & (1 << i)) {
3647 stream_index = (i + MWL8K_WMM_QUEUE_NUMBER) %
3648 TOTAL_HW_TX_QUEUES;
3649 streams = &priv->ampdu[stream_index];
3650 if (streams->state == AMPDU_STREAM_ACTIVE) {
3651 ieee80211_stop_tx_ba_session(streams->sta,
3652 streams->tid);
3653 spin_unlock(&priv->stream_lock);
3654 mwl8k_destroy_ba(hw, stream_index);
3655 spin_lock(&priv->stream_lock);
3656 }
3657 }
3658 }
3659
3660 spin_unlock(&priv->stream_lock);
3661 done:
3662 atomic_dec(&priv->watchdog_event_pending);
3663 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3664 iowrite32((status | MWL8K_A2H_INT_BA_WATCHDOG),
3665 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
3666 mwl8k_fw_unlock(hw);
3667 return;
3668 }
3669
3670
3671 /*
3672 * CMD_BSS_START.
3673 */
3674 struct mwl8k_cmd_bss_start {
3675 struct mwl8k_cmd_pkt header;
3676 __le32 enable;
3677 } __packed;
3678
3679 static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
3680 struct ieee80211_vif *vif, int enable)
3681 {
3682 struct mwl8k_cmd_bss_start *cmd;
3683 int rc;
3684
3685 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3686 if (cmd == NULL)
3687 return -ENOMEM;
3688
3689 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
3690 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3691 cmd->enable = cpu_to_le32(enable);
3692
3693 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3694 kfree(cmd);
3695
3696 return rc;
3697 }
3698
3699 /*
3700 * CMD_BASTREAM.
3701 */
3702
3703 /*
3704 * UPSTREAM is tx direction
3705 */
3706 #define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00
3707 #define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01
3708
3709 enum ba_stream_action_type {
3710 MWL8K_BA_CREATE,
3711 MWL8K_BA_UPDATE,
3712 MWL8K_BA_DESTROY,
3713 MWL8K_BA_FLUSH,
3714 MWL8K_BA_CHECK,
3715 };
3716
3717
3718 struct mwl8k_create_ba_stream {
3719 __le32 flags;
3720 __le32 idle_thrs;
3721 __le32 bar_thrs;
3722 __le32 window_size;
3723 u8 peer_mac_addr[6];
3724 u8 dialog_token;
3725 u8 tid;
3726 u8 queue_id;
3727 u8 param_info;
3728 __le32 ba_context;
3729 u8 reset_seq_no_flag;
3730 __le16 curr_seq_no;
3731 u8 sta_src_mac_addr[6];
3732 } __packed;
3733
3734 struct mwl8k_destroy_ba_stream {
3735 __le32 flags;
3736 __le32 ba_context;
3737 } __packed;
3738
3739 struct mwl8k_cmd_bastream {
3740 struct mwl8k_cmd_pkt header;
3741 __le32 action;
3742 union {
3743 struct mwl8k_create_ba_stream create_params;
3744 struct mwl8k_destroy_ba_stream destroy_params;
3745 };
3746 } __packed;
3747
3748 static int
3749 mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
3750 struct ieee80211_vif *vif)
3751 {
3752 struct mwl8k_cmd_bastream *cmd;
3753 int rc;
3754
3755 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3756 if (cmd == NULL)
3757 return -ENOMEM;
3758
3759 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3760 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3761
3762 cmd->action = cpu_to_le32(MWL8K_BA_CHECK);
3763
3764 cmd->create_params.queue_id = stream->idx;
3765 memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr,
3766 ETH_ALEN);
3767 cmd->create_params.tid = stream->tid;
3768
3769 cmd->create_params.flags =
3770 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) |
3771 cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM);
3772
3773 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3774
3775 kfree(cmd);
3776
3777 return rc;
3778 }
3779
3780 static int
3781 mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
3782 u8 buf_size, struct ieee80211_vif *vif)
3783 {
3784 struct mwl8k_cmd_bastream *cmd;
3785 int rc;
3786
3787 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3788 if (cmd == NULL)
3789 return -ENOMEM;
3790
3791
3792 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3793 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3794
3795 cmd->action = cpu_to_le32(MWL8K_BA_CREATE);
3796
3797 cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size);
3798 cmd->create_params.window_size = cpu_to_le32((u32)buf_size);
3799 cmd->create_params.queue_id = stream->idx;
3800
3801 memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN);
3802 cmd->create_params.tid = stream->tid;
3803 cmd->create_params.curr_seq_no = cpu_to_le16(0);
3804 cmd->create_params.reset_seq_no_flag = 1;
3805
3806 cmd->create_params.param_info =
3807 (stream->sta->ht_cap.ampdu_factor &
3808 IEEE80211_HT_AMPDU_PARM_FACTOR) |
3809 ((stream->sta->ht_cap.ampdu_density << 2) &
3810 IEEE80211_HT_AMPDU_PARM_DENSITY);
3811
3812 cmd->create_params.flags =
3813 cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE |
3814 BASTREAM_FLAG_DIRECTION_UPSTREAM);
3815
3816 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3817
3818 wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n",
3819 stream->sta->addr, stream->tid);
3820 kfree(cmd);
3821
3822 return rc;
3823 }
3824
3825 static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
3826 u8 idx)
3827 {
3828 struct mwl8k_cmd_bastream *cmd;
3829
3830 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3831 if (cmd == NULL)
3832 return;
3833
3834 cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
3835 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3836 cmd->action = cpu_to_le32(MWL8K_BA_DESTROY);
3837
3838 cmd->destroy_params.ba_context = cpu_to_le32(idx);
3839 mwl8k_post_cmd(hw, &cmd->header);
3840
3841 wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", idx);
3842
3843 kfree(cmd);
3844 }
3845
3846 /*
3847 * CMD_SET_NEW_STN.
3848 */
3849 struct mwl8k_cmd_set_new_stn {
3850 struct mwl8k_cmd_pkt header;
3851 __le16 aid;
3852 __u8 mac_addr[6];
3853 __le16 stn_id;
3854 __le16 action;
3855 __le16 rsvd;
3856 __le32 legacy_rates;
3857 __u8 ht_rates[4];
3858 __le16 cap_info;
3859 __le16 ht_capabilities_info;
3860 __u8 mac_ht_param_info;
3861 __u8 rev;
3862 __u8 control_channel;
3863 __u8 add_channel;
3864 __le16 op_mode;
3865 __le16 stbc;
3866 __u8 add_qos_info;
3867 __u8 is_qos_sta;
3868 __le32 fw_sta_ptr;
3869 } __packed;
3870
3871 #define MWL8K_STA_ACTION_ADD 0
3872 #define MWL8K_STA_ACTION_REMOVE 2
3873
3874 static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
3875 struct ieee80211_vif *vif,
3876 struct ieee80211_sta *sta)
3877 {
3878 struct mwl8k_cmd_set_new_stn *cmd;
3879 u32 rates;
3880 int rc;
3881
3882 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3883 if (cmd == NULL)
3884 return -ENOMEM;
3885
3886 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3887 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3888 cmd->aid = cpu_to_le16(sta->aid);
3889 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
3890 cmd->stn_id = cpu_to_le16(sta->aid);
3891 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
3892 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3893 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3894 else
3895 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3896 cmd->legacy_rates = cpu_to_le32(rates);
3897 if (sta->ht_cap.ht_supported) {
3898 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
3899 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
3900 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
3901 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
3902 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
3903 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
3904 ((sta->ht_cap.ampdu_density & 7) << 2);
3905 cmd->is_qos_sta = 1;
3906 }
3907
3908 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3909 kfree(cmd);
3910
3911 return rc;
3912 }
3913
3914 static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
3915 struct ieee80211_vif *vif)
3916 {
3917 struct mwl8k_cmd_set_new_stn *cmd;
3918 int rc;
3919
3920 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3921 if (cmd == NULL)
3922 return -ENOMEM;
3923
3924 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3925 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3926 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
3927
3928 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3929 kfree(cmd);
3930
3931 return rc;
3932 }
3933
3934 static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
3935 struct ieee80211_vif *vif, u8 *addr)
3936 {
3937 struct mwl8k_cmd_set_new_stn *cmd;
3938 struct mwl8k_priv *priv = hw->priv;
3939 int rc, i;
3940 u8 idx;
3941
3942 spin_lock(&priv->stream_lock);
3943 /* Destroy any active ampdu streams for this sta */
3944 for (i = 0; i < MWL8K_NUM_AMPDU_STREAMS; i++) {
3945 struct mwl8k_ampdu_stream *s;
3946 s = &priv->ampdu[i];
3947 if (s->state != AMPDU_NO_STREAM) {
3948 if (memcmp(s->sta->addr, addr, ETH_ALEN) == 0) {
3949 if (s->state == AMPDU_STREAM_ACTIVE) {
3950 idx = s->idx;
3951 spin_unlock(&priv->stream_lock);
3952 mwl8k_destroy_ba(hw, idx);
3953 spin_lock(&priv->stream_lock);
3954 } else if (s->state == AMPDU_STREAM_NEW) {
3955 mwl8k_remove_stream(hw, s);
3956 }
3957 }
3958 }
3959 }
3960
3961 spin_unlock(&priv->stream_lock);
3962
3963 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
3964 if (cmd == NULL)
3965 return -ENOMEM;
3966
3967 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
3968 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3969 memcpy(cmd->mac_addr, addr, ETH_ALEN);
3970 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
3971
3972 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
3973 kfree(cmd);
3974
3975 return rc;
3976 }
3977
3978 /*
3979 * CMD_UPDATE_ENCRYPTION.
3980 */
3981
3982 #define MAX_ENCR_KEY_LENGTH 16
3983 #define MIC_KEY_LENGTH 8
3984
3985 struct mwl8k_cmd_update_encryption {
3986 struct mwl8k_cmd_pkt header;
3987
3988 __le32 action;
3989 __le32 reserved;
3990 __u8 mac_addr[6];
3991 __u8 encr_type;
3992
3993 } __packed;
3994
3995 struct mwl8k_cmd_set_key {
3996 struct mwl8k_cmd_pkt header;
3997
3998 __le32 action;
3999 __le32 reserved;
4000 __le16 length;
4001 __le16 key_type_id;
4002 __le32 key_info;
4003 __le32 key_id;
4004 __le16 key_len;
4005 __u8 key_material[MAX_ENCR_KEY_LENGTH];
4006 __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
4007 __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
4008 __le16 tkip_rsc_low;
4009 __le32 tkip_rsc_high;
4010 __le16 tkip_tsc_low;
4011 __le32 tkip_tsc_high;
4012 __u8 mac_addr[6];
4013 } __packed;
4014
4015 enum {
4016 MWL8K_ENCR_ENABLE,
4017 MWL8K_ENCR_SET_KEY,
4018 MWL8K_ENCR_REMOVE_KEY,
4019 MWL8K_ENCR_SET_GROUP_KEY,
4020 };
4021
4022 #define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
4023 #define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
4024 #define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
4025 #define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
4026 #define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
4027
4028 enum {
4029 MWL8K_ALG_WEP,
4030 MWL8K_ALG_TKIP,
4031 MWL8K_ALG_CCMP,
4032 };
4033
4034 #define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
4035 #define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
4036 #define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
4037 #define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
4038 #define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
4039
4040 static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
4041 struct ieee80211_vif *vif,
4042 u8 *addr,
4043 u8 encr_type)
4044 {
4045 struct mwl8k_cmd_update_encryption *cmd;
4046 int rc;
4047
4048 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4049 if (cmd == NULL)
4050 return -ENOMEM;
4051
4052 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
4053 cmd->header.length = cpu_to_le16(sizeof(*cmd));
4054 cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
4055 memcpy(cmd->mac_addr, addr, ETH_ALEN);
4056 cmd->encr_type = encr_type;
4057
4058 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
4059 kfree(cmd);
4060
4061 return rc;
4062 }
4063
4064 static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
4065 u8 *addr,
4066 struct ieee80211_key_conf *key)
4067 {
4068 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
4069 cmd->header.length = cpu_to_le16(sizeof(*cmd));
4070 cmd->length = cpu_to_le16(sizeof(*cmd) -
4071 offsetof(struct mwl8k_cmd_set_key, length));
4072 cmd->key_id = cpu_to_le32(key->keyidx);
4073 cmd->key_len = cpu_to_le16(key->keylen);
4074 memcpy(cmd->mac_addr, addr, ETH_ALEN);
4075
4076 switch (key->cipher) {
4077 case WLAN_CIPHER_SUITE_WEP40:
4078 case WLAN_CIPHER_SUITE_WEP104:
4079 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
4080 if (key->keyidx == 0)
4081 cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
4082
4083 break;
4084 case WLAN_CIPHER_SUITE_TKIP:
4085 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
4086 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
4087 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
4088 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
4089 cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
4090 | MWL8K_KEY_FLAG_TSC_VALID);
4091 break;
4092 case WLAN_CIPHER_SUITE_CCMP:
4093 cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
4094 cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
4095 ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
4096 : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
4097 break;
4098 default:
4099 return -ENOTSUPP;
4100 }
4101
4102 return 0;
4103 }
4104
4105 static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
4106 struct ieee80211_vif *vif,
4107 u8 *addr,
4108 struct ieee80211_key_conf *key)
4109 {
4110 struct mwl8k_cmd_set_key *cmd;
4111 int rc;
4112 int keymlen;
4113 u32 action;
4114 u8 idx;
4115 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4116
4117 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4118 if (cmd == NULL)
4119 return -ENOMEM;
4120
4121 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
4122 if (rc < 0)
4123 goto done;
4124
4125 idx = key->keyidx;
4126
4127 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
4128 action = MWL8K_ENCR_SET_KEY;
4129 else
4130 action = MWL8K_ENCR_SET_GROUP_KEY;
4131
4132 switch (key->cipher) {
4133 case WLAN_CIPHER_SUITE_WEP40:
4134 case WLAN_CIPHER_SUITE_WEP104:
4135 if (!mwl8k_vif->wep_key_conf[idx].enabled) {
4136 memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
4137 sizeof(*key) + key->keylen);
4138 mwl8k_vif->wep_key_conf[idx].enabled = 1;
4139 }
4140
4141 keymlen = key->keylen;
4142 action = MWL8K_ENCR_SET_KEY;
4143 break;
4144 case WLAN_CIPHER_SUITE_TKIP:
4145 keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
4146 break;
4147 case WLAN_CIPHER_SUITE_CCMP:
4148 keymlen = key->keylen;
4149 break;
4150 default:
4151 rc = -ENOTSUPP;
4152 goto done;
4153 }
4154
4155 memcpy(cmd->key_material, key->key, keymlen);
4156 cmd->action = cpu_to_le32(action);
4157
4158 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
4159 done:
4160 kfree(cmd);
4161
4162 return rc;
4163 }
4164
4165 static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
4166 struct ieee80211_vif *vif,
4167 u8 *addr,
4168 struct ieee80211_key_conf *key)
4169 {
4170 struct mwl8k_cmd_set_key *cmd;
4171 int rc;
4172 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4173
4174 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4175 if (cmd == NULL)
4176 return -ENOMEM;
4177
4178 rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
4179 if (rc < 0)
4180 goto done;
4181
4182 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
4183 key->cipher == WLAN_CIPHER_SUITE_WEP104)
4184 mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
4185
4186 cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
4187
4188 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
4189 done:
4190 kfree(cmd);
4191
4192 return rc;
4193 }
4194
4195 static int mwl8k_set_key(struct ieee80211_hw *hw,
4196 enum set_key_cmd cmd_param,
4197 struct ieee80211_vif *vif,
4198 struct ieee80211_sta *sta,
4199 struct ieee80211_key_conf *key)
4200 {
4201 int rc = 0;
4202 u8 encr_type;
4203 u8 *addr;
4204 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4205
4206 if (vif->type == NL80211_IFTYPE_STATION)
4207 return -EOPNOTSUPP;
4208
4209 if (sta == NULL)
4210 addr = vif->addr;
4211 else
4212 addr = sta->addr;
4213
4214 if (cmd_param == SET_KEY) {
4215 rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
4216 if (rc)
4217 goto out;
4218
4219 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
4220 || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
4221 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
4222 else
4223 encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
4224
4225 rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
4226 encr_type);
4227 if (rc)
4228 goto out;
4229
4230 mwl8k_vif->is_hw_crypto_enabled = true;
4231
4232 } else {
4233 rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
4234
4235 if (rc)
4236 goto out;
4237 }
4238 out:
4239 return rc;
4240 }
4241
4242 /*
4243 * CMD_UPDATE_STADB.
4244 */
4245 struct ewc_ht_info {
4246 __le16 control1;
4247 __le16 control2;
4248 __le16 control3;
4249 } __packed;
4250
4251 struct peer_capability_info {
4252 /* Peer type - AP vs. STA. */
4253 __u8 peer_type;
4254
4255 /* Basic 802.11 capabilities from assoc resp. */
4256 __le16 basic_caps;
4257
4258 /* Set if peer supports 802.11n high throughput (HT). */
4259 __u8 ht_support;
4260
4261 /* Valid if HT is supported. */
4262 __le16 ht_caps;
4263 __u8 extended_ht_caps;
4264 struct ewc_ht_info ewc_info;
4265
4266 /* Legacy rate table. Intersection of our rates and peer rates. */
4267 __u8 legacy_rates[12];
4268
4269 /* HT rate table. Intersection of our rates and peer rates. */
4270 __u8 ht_rates[16];
4271 __u8 pad[16];
4272
4273 /* If set, interoperability mode, no proprietary extensions. */
4274 __u8 interop;
4275 __u8 pad2;
4276 __u8 station_id;
4277 __le16 amsdu_enabled;
4278 } __packed;
4279
4280 struct mwl8k_cmd_update_stadb {
4281 struct mwl8k_cmd_pkt header;
4282
4283 /* See STADB_ACTION_TYPE */
4284 __le32 action;
4285
4286 /* Peer MAC address */
4287 __u8 peer_addr[ETH_ALEN];
4288
4289 __le32 reserved;
4290
4291 /* Peer info - valid during add/update. */
4292 struct peer_capability_info peer_info;
4293 } __packed;
4294
4295 #define MWL8K_STA_DB_MODIFY_ENTRY 1
4296 #define MWL8K_STA_DB_DEL_ENTRY 2
4297
4298 /* Peer Entry flags - used to define the type of the peer node */
4299 #define MWL8K_PEER_TYPE_ACCESSPOINT 2
4300
4301 static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
4302 struct ieee80211_vif *vif,
4303 struct ieee80211_sta *sta)
4304 {
4305 struct mwl8k_cmd_update_stadb *cmd;
4306 struct peer_capability_info *p;
4307 u32 rates;
4308 int rc;
4309
4310 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4311 if (cmd == NULL)
4312 return -ENOMEM;
4313
4314 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4315 cmd->header.length = cpu_to_le16(sizeof(*cmd));
4316 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
4317 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
4318
4319 p = &cmd->peer_info;
4320 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
4321 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
4322 p->ht_support = sta->ht_cap.ht_supported;
4323 p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
4324 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
4325 ((sta->ht_cap.ampdu_density & 7) << 2);
4326 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4327 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
4328 else
4329 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4330 legacy_rate_mask_to_array(p->legacy_rates, rates);
4331 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
4332 p->interop = 1;
4333 p->amsdu_enabled = 0;
4334
4335 rc = mwl8k_post_cmd(hw, &cmd->header);
4336 kfree(cmd);
4337
4338 return rc ? rc : p->station_id;
4339 }
4340
4341 static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
4342 struct ieee80211_vif *vif, u8 *addr)
4343 {
4344 struct mwl8k_cmd_update_stadb *cmd;
4345 int rc;
4346
4347 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
4348 if (cmd == NULL)
4349 return -ENOMEM;
4350
4351 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
4352 cmd->header.length = cpu_to_le16(sizeof(*cmd));
4353 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
4354 memcpy(cmd->peer_addr, addr, ETH_ALEN);
4355
4356 rc = mwl8k_post_cmd(hw, &cmd->header);
4357 kfree(cmd);
4358
4359 return rc;
4360 }
4361
4362
4363 /*
4364 * Interrupt handling.
4365 */
4366 static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
4367 {
4368 struct ieee80211_hw *hw = dev_id;
4369 struct mwl8k_priv *priv = hw->priv;
4370 u32 status;
4371
4372 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4373 if (!status)
4374 return IRQ_NONE;
4375
4376 if (status & MWL8K_A2H_INT_TX_DONE) {
4377 status &= ~MWL8K_A2H_INT_TX_DONE;
4378 tasklet_schedule(&priv->poll_tx_task);
4379 }
4380
4381 if (status & MWL8K_A2H_INT_RX_READY) {
4382 status &= ~MWL8K_A2H_INT_RX_READY;
4383 tasklet_schedule(&priv->poll_rx_task);
4384 }
4385
4386 if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
4387 iowrite32(~MWL8K_A2H_INT_BA_WATCHDOG,
4388 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
4389
4390 atomic_inc(&priv->watchdog_event_pending);
4391 status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
4392 ieee80211_queue_work(hw, &priv->watchdog_ba_handle);
4393 }
4394
4395 if (status)
4396 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4397
4398 if (status & MWL8K_A2H_INT_OPC_DONE) {
4399 if (priv->hostcmd_wait != NULL)
4400 complete(priv->hostcmd_wait);
4401 }
4402
4403 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
4404 if (!mutex_is_locked(&priv->fw_mutex) &&
4405 priv->radio_on && priv->pending_tx_pkts)
4406 mwl8k_tx_start(priv);
4407 }
4408
4409 return IRQ_HANDLED;
4410 }
4411
4412 static void mwl8k_tx_poll(unsigned long data)
4413 {
4414 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4415 struct mwl8k_priv *priv = hw->priv;
4416 int limit;
4417 int i;
4418
4419 limit = 32;
4420
4421 spin_lock_bh(&priv->tx_lock);
4422
4423 for (i = 0; i < mwl8k_tx_queues(priv); i++)
4424 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
4425
4426 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
4427 complete(priv->tx_wait);
4428 priv->tx_wait = NULL;
4429 }
4430
4431 spin_unlock_bh(&priv->tx_lock);
4432
4433 if (limit) {
4434 writel(~MWL8K_A2H_INT_TX_DONE,
4435 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4436 } else {
4437 tasklet_schedule(&priv->poll_tx_task);
4438 }
4439 }
4440
4441 static void mwl8k_rx_poll(unsigned long data)
4442 {
4443 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
4444 struct mwl8k_priv *priv = hw->priv;
4445 int limit;
4446
4447 limit = 32;
4448 limit -= rxq_process(hw, 0, limit);
4449 limit -= rxq_refill(hw, 0, limit);
4450
4451 if (limit) {
4452 writel(~MWL8K_A2H_INT_RX_READY,
4453 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
4454 } else {
4455 tasklet_schedule(&priv->poll_rx_task);
4456 }
4457 }
4458
4459
4460 /*
4461 * Core driver operations.
4462 */
4463 static void mwl8k_tx(struct ieee80211_hw *hw,
4464 struct ieee80211_tx_control *control,
4465 struct sk_buff *skb)
4466 {
4467 struct mwl8k_priv *priv = hw->priv;
4468 int index = skb_get_queue_mapping(skb);
4469
4470 if (!priv->radio_on) {
4471 wiphy_debug(hw->wiphy,
4472 "dropped TX frame since radio disabled\n");
4473 dev_kfree_skb(skb);
4474 return;
4475 }
4476
4477 mwl8k_txq_xmit(hw, index, control->sta, skb);
4478 }
4479
4480 static int mwl8k_start(struct ieee80211_hw *hw)
4481 {
4482 struct mwl8k_priv *priv = hw->priv;
4483 int rc;
4484
4485 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
4486 IRQF_SHARED, MWL8K_NAME, hw);
4487 if (rc) {
4488 priv->irq = -1;
4489 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
4490 return -EIO;
4491 }
4492 priv->irq = priv->pdev->irq;
4493
4494 /* Enable TX reclaim and RX tasklets. */
4495 tasklet_enable(&priv->poll_tx_task);
4496 tasklet_enable(&priv->poll_rx_task);
4497
4498 /* Enable interrupts */
4499 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4500 iowrite32(MWL8K_A2H_EVENTS,
4501 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
4502
4503 rc = mwl8k_fw_lock(hw);
4504 if (!rc) {
4505 rc = mwl8k_cmd_radio_enable(hw);
4506
4507 if (!priv->ap_fw) {
4508 if (!rc)
4509 rc = mwl8k_cmd_enable_sniffer(hw, 0);
4510
4511 if (!rc)
4512 rc = mwl8k_cmd_set_pre_scan(hw);
4513
4514 if (!rc)
4515 rc = mwl8k_cmd_set_post_scan(hw,
4516 "\x00\x00\x00\x00\x00\x00");
4517 }
4518
4519 if (!rc)
4520 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
4521
4522 if (!rc)
4523 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
4524
4525 mwl8k_fw_unlock(hw);
4526 }
4527
4528 if (rc) {
4529 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4530 free_irq(priv->pdev->irq, hw);
4531 priv->irq = -1;
4532 tasklet_disable(&priv->poll_tx_task);
4533 tasklet_disable(&priv->poll_rx_task);
4534 } else {
4535 ieee80211_wake_queues(hw);
4536 }
4537
4538 return rc;
4539 }
4540
4541 static void mwl8k_stop(struct ieee80211_hw *hw)
4542 {
4543 struct mwl8k_priv *priv = hw->priv;
4544 int i;
4545
4546 if (!priv->hw_restart_in_progress)
4547 mwl8k_cmd_radio_disable(hw);
4548
4549 ieee80211_stop_queues(hw);
4550
4551 /* Disable interrupts */
4552 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
4553 if (priv->irq != -1) {
4554 free_irq(priv->pdev->irq, hw);
4555 priv->irq = -1;
4556 }
4557
4558 /* Stop finalize join worker */
4559 cancel_work_sync(&priv->finalize_join_worker);
4560 cancel_work_sync(&priv->watchdog_ba_handle);
4561 if (priv->beacon_skb != NULL)
4562 dev_kfree_skb(priv->beacon_skb);
4563
4564 /* Stop TX reclaim and RX tasklets. */
4565 tasklet_disable(&priv->poll_tx_task);
4566 tasklet_disable(&priv->poll_rx_task);
4567
4568 /* Return all skbs to mac80211 */
4569 for (i = 0; i < mwl8k_tx_queues(priv); i++)
4570 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
4571 }
4572
4573 static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
4574
4575 static int mwl8k_add_interface(struct ieee80211_hw *hw,
4576 struct ieee80211_vif *vif)
4577 {
4578 struct mwl8k_priv *priv = hw->priv;
4579 struct mwl8k_vif *mwl8k_vif;
4580 u32 macids_supported;
4581 int macid, rc;
4582 struct mwl8k_device_info *di;
4583
4584 /*
4585 * Reject interface creation if sniffer mode is active, as
4586 * STA operation is mutually exclusive with hardware sniffer
4587 * mode. (Sniffer mode is only used on STA firmware.)
4588 */
4589 if (priv->sniffer_enabled) {
4590 wiphy_info(hw->wiphy,
4591 "unable to create STA interface because sniffer mode is enabled\n");
4592 return -EINVAL;
4593 }
4594
4595 di = priv->device_info;
4596 switch (vif->type) {
4597 case NL80211_IFTYPE_AP:
4598 if (!priv->ap_fw && di->fw_image_ap) {
4599 /* we must load the ap fw to meet this request */
4600 if (!list_empty(&priv->vif_list))
4601 return -EBUSY;
4602 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
4603 if (rc)
4604 return rc;
4605 }
4606 macids_supported = priv->ap_macids_supported;
4607 break;
4608 case NL80211_IFTYPE_STATION:
4609 if (priv->ap_fw && di->fw_image_sta) {
4610 /* we must load the sta fw to meet this request */
4611 if (!list_empty(&priv->vif_list))
4612 return -EBUSY;
4613 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
4614 if (rc)
4615 return rc;
4616 }
4617 macids_supported = priv->sta_macids_supported;
4618 break;
4619 default:
4620 return -EINVAL;
4621 }
4622
4623 macid = ffs(macids_supported & ~priv->macids_used);
4624 if (!macid--)
4625 return -EBUSY;
4626
4627 /* Setup driver private area. */
4628 mwl8k_vif = MWL8K_VIF(vif);
4629 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
4630 mwl8k_vif->vif = vif;
4631 mwl8k_vif->macid = macid;
4632 mwl8k_vif->seqno = 0;
4633 memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
4634 mwl8k_vif->is_hw_crypto_enabled = false;
4635
4636 /* Set the mac address. */
4637 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
4638
4639 if (priv->ap_fw)
4640 mwl8k_cmd_set_new_stn_add_self(hw, vif);
4641
4642 priv->macids_used |= 1 << mwl8k_vif->macid;
4643 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
4644
4645 return 0;
4646 }
4647
4648 static void mwl8k_remove_vif(struct mwl8k_priv *priv, struct mwl8k_vif *vif)
4649 {
4650 /* Has ieee80211_restart_hw re-added the removed interfaces? */
4651 if (!priv->macids_used)
4652 return;
4653
4654 priv->macids_used &= ~(1 << vif->macid);
4655 list_del(&vif->list);
4656 }
4657
4658 static void mwl8k_remove_interface(struct ieee80211_hw *hw,
4659 struct ieee80211_vif *vif)
4660 {
4661 struct mwl8k_priv *priv = hw->priv;
4662 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
4663
4664 if (priv->ap_fw)
4665 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
4666
4667 mwl8k_cmd_del_mac_addr(hw, vif, vif->addr);
4668
4669 mwl8k_remove_vif(priv, mwl8k_vif);
4670 }
4671
4672 static void mwl8k_hw_restart_work(struct work_struct *work)
4673 {
4674 struct mwl8k_priv *priv =
4675 container_of(work, struct mwl8k_priv, fw_reload);
4676 struct ieee80211_hw *hw = priv->hw;
4677 struct mwl8k_device_info *di;
4678 int rc;
4679
4680 /* If some command is waiting for a response, clear it */
4681 if (priv->hostcmd_wait != NULL) {
4682 complete(priv->hostcmd_wait);
4683 priv->hostcmd_wait = NULL;
4684 }
4685
4686 priv->hw_restart_owner = current;
4687 di = priv->device_info;
4688 mwl8k_fw_lock(hw);
4689
4690 if (priv->ap_fw)
4691 rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
4692 else
4693 rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
4694
4695 if (rc)
4696 goto fail;
4697
4698 priv->hw_restart_owner = NULL;
4699 priv->hw_restart_in_progress = false;
4700
4701 /*
4702 * This unlock will wake up the queues and
4703 * also opens the command path for other
4704 * commands
4705 */
4706 mwl8k_fw_unlock(hw);
4707
4708 ieee80211_restart_hw(hw);
4709
4710 wiphy_err(hw->wiphy, "Firmware restarted successfully\n");
4711
4712 return;
4713 fail:
4714 mwl8k_fw_unlock(hw);
4715
4716 wiphy_err(hw->wiphy, "Firmware restart failed\n");
4717 }
4718
4719 static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
4720 {
4721 struct ieee80211_conf *conf = &hw->conf;
4722 struct mwl8k_priv *priv = hw->priv;
4723 int rc;
4724
4725 if (conf->flags & IEEE80211_CONF_IDLE) {
4726 mwl8k_cmd_radio_disable(hw);
4727 return 0;
4728 }
4729
4730 rc = mwl8k_fw_lock(hw);
4731 if (rc)
4732 return rc;
4733
4734 rc = mwl8k_cmd_radio_enable(hw);
4735 if (rc)
4736 goto out;
4737
4738 rc = mwl8k_cmd_set_rf_channel(hw, conf);
4739 if (rc)
4740 goto out;
4741
4742 if (conf->power_level > 18)
4743 conf->power_level = 18;
4744
4745 if (priv->ap_fw) {
4746
4747 if (conf->flags & IEEE80211_CONF_CHANGE_POWER) {
4748 rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
4749 if (rc)
4750 goto out;
4751 }
4752
4753 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
4754 if (rc)
4755 wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
4756 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
4757 if (rc)
4758 wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
4759
4760 } else {
4761 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
4762 if (rc)
4763 goto out;
4764 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
4765 }
4766
4767 out:
4768 mwl8k_fw_unlock(hw);
4769
4770 return rc;
4771 }
4772
4773 static void
4774 mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4775 struct ieee80211_bss_conf *info, u32 changed)
4776 {
4777 struct mwl8k_priv *priv = hw->priv;
4778 u32 ap_legacy_rates = 0;
4779 u8 ap_mcs_rates[16];
4780 int rc;
4781
4782 if (mwl8k_fw_lock(hw))
4783 return;
4784
4785 /*
4786 * No need to capture a beacon if we're no longer associated.
4787 */
4788 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
4789 priv->capture_beacon = false;
4790
4791 /*
4792 * Get the AP's legacy and MCS rates.
4793 */
4794 if (vif->bss_conf.assoc) {
4795 struct ieee80211_sta *ap;
4796
4797 rcu_read_lock();
4798
4799 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
4800 if (ap == NULL) {
4801 rcu_read_unlock();
4802 goto out;
4803 }
4804
4805 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
4806 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
4807 } else {
4808 ap_legacy_rates =
4809 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
4810 }
4811 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
4812
4813 rcu_read_unlock();
4814 }
4815
4816 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
4817 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
4818 if (rc)
4819 goto out;
4820
4821 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
4822 if (rc)
4823 goto out;
4824 }
4825
4826 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
4827 rc = mwl8k_set_radio_preamble(hw,
4828 vif->bss_conf.use_short_preamble);
4829 if (rc)
4830 goto out;
4831 }
4832
4833 if (changed & BSS_CHANGED_ERP_SLOT) {
4834 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
4835 if (rc)
4836 goto out;
4837 }
4838
4839 if (vif->bss_conf.assoc &&
4840 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
4841 BSS_CHANGED_HT))) {
4842 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
4843 if (rc)
4844 goto out;
4845 }
4846
4847 if (vif->bss_conf.assoc &&
4848 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
4849 /*
4850 * Finalize the join. Tell rx handler to process
4851 * next beacon from our BSSID.
4852 */
4853 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
4854 priv->capture_beacon = true;
4855 }
4856
4857 out:
4858 mwl8k_fw_unlock(hw);
4859 }
4860
4861 static void
4862 mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4863 struct ieee80211_bss_conf *info, u32 changed)
4864 {
4865 int rc;
4866
4867 if (mwl8k_fw_lock(hw))
4868 return;
4869
4870 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
4871 rc = mwl8k_set_radio_preamble(hw,
4872 vif->bss_conf.use_short_preamble);
4873 if (rc)
4874 goto out;
4875 }
4876
4877 if (changed & BSS_CHANGED_BASIC_RATES) {
4878 int idx;
4879 int rate;
4880
4881 /*
4882 * Use lowest supported basic rate for multicasts
4883 * and management frames (such as probe responses --
4884 * beacons will always go out at 1 Mb/s).
4885 */
4886 idx = ffs(vif->bss_conf.basic_rates);
4887 if (idx)
4888 idx--;
4889
4890 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
4891 rate = mwl8k_rates_24[idx].hw_value;
4892 else
4893 rate = mwl8k_rates_50[idx].hw_value;
4894
4895 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
4896 }
4897
4898 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
4899 struct sk_buff *skb;
4900
4901 skb = ieee80211_beacon_get(hw, vif);
4902 if (skb != NULL) {
4903 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
4904 kfree_skb(skb);
4905 }
4906 }
4907
4908 if (changed & BSS_CHANGED_BEACON_ENABLED)
4909 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
4910
4911 out:
4912 mwl8k_fw_unlock(hw);
4913 }
4914
4915 static void
4916 mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4917 struct ieee80211_bss_conf *info, u32 changed)
4918 {
4919 struct mwl8k_priv *priv = hw->priv;
4920
4921 if (!priv->ap_fw)
4922 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
4923 else
4924 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
4925 }
4926
4927 static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
4928 struct netdev_hw_addr_list *mc_list)
4929 {
4930 struct mwl8k_cmd_pkt *cmd;
4931
4932 /*
4933 * Synthesize and return a command packet that programs the
4934 * hardware multicast address filter. At this point we don't
4935 * know whether FIF_ALLMULTI is being requested, but if it is,
4936 * we'll end up throwing this packet away and creating a new
4937 * one in mwl8k_configure_filter().
4938 */
4939 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
4940
4941 return (unsigned long)cmd;
4942 }
4943
4944 static int
4945 mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
4946 unsigned int changed_flags,
4947 unsigned int *total_flags)
4948 {
4949 struct mwl8k_priv *priv = hw->priv;
4950
4951 /*
4952 * Hardware sniffer mode is mutually exclusive with STA
4953 * operation, so refuse to enable sniffer mode if a STA
4954 * interface is active.
4955 */
4956 if (!list_empty(&priv->vif_list)) {
4957 if (net_ratelimit())
4958 wiphy_info(hw->wiphy,
4959 "not enabling sniffer mode because STA interface is active\n");
4960 return 0;
4961 }
4962
4963 if (!priv->sniffer_enabled) {
4964 if (mwl8k_cmd_enable_sniffer(hw, 1))
4965 return 0;
4966 priv->sniffer_enabled = true;
4967 }
4968
4969 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
4970 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
4971 FIF_OTHER_BSS;
4972
4973 return 1;
4974 }
4975
4976 static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
4977 {
4978 if (!list_empty(&priv->vif_list))
4979 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
4980
4981 return NULL;
4982 }
4983
4984 static void mwl8k_configure_filter(struct ieee80211_hw *hw,
4985 unsigned int changed_flags,
4986 unsigned int *total_flags,
4987 u64 multicast)
4988 {
4989 struct mwl8k_priv *priv = hw->priv;
4990 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
4991
4992 /*
4993 * AP firmware doesn't allow fine-grained control over
4994 * the receive filter.
4995 */
4996 if (priv->ap_fw) {
4997 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
4998 kfree(cmd);
4999 return;
5000 }
5001
5002 /*
5003 * Enable hardware sniffer mode if FIF_CONTROL or
5004 * FIF_OTHER_BSS is requested.
5005 */
5006 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
5007 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
5008 kfree(cmd);
5009 return;
5010 }
5011
5012 /* Clear unsupported feature flags */
5013 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
5014
5015 if (mwl8k_fw_lock(hw)) {
5016 kfree(cmd);
5017 return;
5018 }
5019
5020 if (priv->sniffer_enabled) {
5021 mwl8k_cmd_enable_sniffer(hw, 0);
5022 priv->sniffer_enabled = false;
5023 }
5024
5025 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
5026 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
5027 /*
5028 * Disable the BSS filter.
5029 */
5030 mwl8k_cmd_set_pre_scan(hw);
5031 } else {
5032 struct mwl8k_vif *mwl8k_vif;
5033 const u8 *bssid;
5034
5035 /*
5036 * Enable the BSS filter.
5037 *
5038 * If there is an active STA interface, use that
5039 * interface's BSSID, otherwise use a dummy one
5040 * (where the OUI part needs to be nonzero for
5041 * the BSSID to be accepted by POST_SCAN).
5042 */
5043 mwl8k_vif = mwl8k_first_vif(priv);
5044 if (mwl8k_vif != NULL)
5045 bssid = mwl8k_vif->vif->bss_conf.bssid;
5046 else
5047 bssid = "\x01\x00\x00\x00\x00\x00";
5048
5049 mwl8k_cmd_set_post_scan(hw, bssid);
5050 }
5051 }
5052
5053 /*
5054 * If FIF_ALLMULTI is being requested, throw away the command
5055 * packet that ->prepare_multicast() built and replace it with
5056 * a command packet that enables reception of all multicast
5057 * packets.
5058 */
5059 if (*total_flags & FIF_ALLMULTI) {
5060 kfree(cmd);
5061 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
5062 }
5063
5064 if (cmd != NULL) {
5065 mwl8k_post_cmd(hw, cmd);
5066 kfree(cmd);
5067 }
5068
5069 mwl8k_fw_unlock(hw);
5070 }
5071
5072 static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
5073 {
5074 return mwl8k_cmd_set_rts_threshold(hw, value);
5075 }
5076
5077 static int mwl8k_sta_remove(struct ieee80211_hw *hw,
5078 struct ieee80211_vif *vif,
5079 struct ieee80211_sta *sta)
5080 {
5081 struct mwl8k_priv *priv = hw->priv;
5082
5083 if (priv->ap_fw)
5084 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
5085 else
5086 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
5087 }
5088
5089 static int mwl8k_sta_add(struct ieee80211_hw *hw,
5090 struct ieee80211_vif *vif,
5091 struct ieee80211_sta *sta)
5092 {
5093 struct mwl8k_priv *priv = hw->priv;
5094 int ret;
5095 int i;
5096 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
5097 struct ieee80211_key_conf *key;
5098
5099 if (!priv->ap_fw) {
5100 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
5101 if (ret >= 0) {
5102 MWL8K_STA(sta)->peer_id = ret;
5103 if (sta->ht_cap.ht_supported)
5104 MWL8K_STA(sta)->is_ampdu_allowed = true;
5105 ret = 0;
5106 }
5107
5108 } else {
5109 ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
5110 }
5111
5112 for (i = 0; i < NUM_WEP_KEYS; i++) {
5113 key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
5114 if (mwl8k_vif->wep_key_conf[i].enabled)
5115 mwl8k_set_key(hw, SET_KEY, vif, sta, key);
5116 }
5117 return ret;
5118 }
5119
5120 static int mwl8k_conf_tx(struct ieee80211_hw *hw,
5121 struct ieee80211_vif *vif, u16 queue,
5122 const struct ieee80211_tx_queue_params *params)
5123 {
5124 struct mwl8k_priv *priv = hw->priv;
5125 int rc;
5126
5127 rc = mwl8k_fw_lock(hw);
5128 if (!rc) {
5129 BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1);
5130 memcpy(&priv->wmm_params[queue], params, sizeof(*params));
5131
5132 if (!priv->wmm_enabled)
5133 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
5134
5135 if (!rc) {
5136 int q = MWL8K_TX_WMM_QUEUES - 1 - queue;
5137 rc = mwl8k_cmd_set_edca_params(hw, q,
5138 params->cw_min,
5139 params->cw_max,
5140 params->aifs,
5141 params->txop);
5142 }
5143
5144 mwl8k_fw_unlock(hw);
5145 }
5146
5147 return rc;
5148 }
5149
5150 static int mwl8k_get_stats(struct ieee80211_hw *hw,
5151 struct ieee80211_low_level_stats *stats)
5152 {
5153 return mwl8k_cmd_get_stat(hw, stats);
5154 }
5155
5156 static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
5157 struct survey_info *survey)
5158 {
5159 struct mwl8k_priv *priv = hw->priv;
5160 struct ieee80211_conf *conf = &hw->conf;
5161
5162 if (idx != 0)
5163 return -ENOENT;
5164
5165 survey->channel = conf->channel;
5166 survey->filled = SURVEY_INFO_NOISE_DBM;
5167 survey->noise = priv->noise;
5168
5169 return 0;
5170 }
5171
5172 #define MAX_AMPDU_ATTEMPTS 5
5173
5174 static int
5175 mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5176 enum ieee80211_ampdu_mlme_action action,
5177 struct ieee80211_sta *sta, u16 tid, u16 *ssn,
5178 u8 buf_size)
5179 {
5180
5181 int i, rc = 0;
5182 struct mwl8k_priv *priv = hw->priv;
5183 struct mwl8k_ampdu_stream *stream;
5184 u8 *addr = sta->addr, idx;
5185 struct mwl8k_sta *sta_info = MWL8K_STA(sta);
5186
5187 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
5188 return -ENOTSUPP;
5189
5190 spin_lock(&priv->stream_lock);
5191 stream = mwl8k_lookup_stream(hw, addr, tid);
5192
5193 switch (action) {
5194 case IEEE80211_AMPDU_RX_START:
5195 case IEEE80211_AMPDU_RX_STOP:
5196 break;
5197 case IEEE80211_AMPDU_TX_START:
5198 /* By the time we get here the hw queues may contain outgoing
5199 * packets for this RA/TID that are not part of this BA
5200 * session. The hw will assign sequence numbers to these
5201 * packets as they go out. So if we query the hw for its next
5202 * sequence number and use that for the SSN here, it may end up
5203 * being wrong, which will lead to sequence number mismatch at
5204 * the recipient. To avoid this, we reset the sequence number
5205 * to O for the first MPDU in this BA stream.
5206 */
5207 *ssn = 0;
5208 if (stream == NULL) {
5209 /* This means that somebody outside this driver called
5210 * ieee80211_start_tx_ba_session. This is unexpected
5211 * because we do our own rate control. Just warn and
5212 * move on.
5213 */
5214 wiphy_warn(hw->wiphy, "Unexpected call to %s. "
5215 "Proceeding anyway.\n", __func__);
5216 stream = mwl8k_add_stream(hw, sta, tid);
5217 }
5218 if (stream == NULL) {
5219 wiphy_debug(hw->wiphy, "no free AMPDU streams\n");
5220 rc = -EBUSY;
5221 break;
5222 }
5223 stream->state = AMPDU_STREAM_IN_PROGRESS;
5224
5225 /* Release the lock before we do the time consuming stuff */
5226 spin_unlock(&priv->stream_lock);
5227 for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) {
5228
5229 /* Check if link is still valid */
5230 if (!sta_info->is_ampdu_allowed) {
5231 spin_lock(&priv->stream_lock);
5232 mwl8k_remove_stream(hw, stream);
5233 spin_unlock(&priv->stream_lock);
5234 return -EBUSY;
5235 }
5236
5237 rc = mwl8k_check_ba(hw, stream, vif);
5238
5239 /* If HW restart is in progress mwl8k_post_cmd will
5240 * return -EBUSY. Avoid retrying mwl8k_check_ba in
5241 * such cases
5242 */
5243 if (!rc || rc == -EBUSY)
5244 break;
5245 /*
5246 * HW queues take time to be flushed, give them
5247 * sufficient time
5248 */
5249
5250 msleep(1000);
5251 }
5252 spin_lock(&priv->stream_lock);
5253 if (rc) {
5254 wiphy_err(hw->wiphy, "Stream for tid %d busy after %d"
5255 " attempts\n", tid, MAX_AMPDU_ATTEMPTS);
5256 mwl8k_remove_stream(hw, stream);
5257 rc = -EBUSY;
5258 break;
5259 }
5260 ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
5261 break;
5262 case IEEE80211_AMPDU_TX_STOP_CONT:
5263 case IEEE80211_AMPDU_TX_STOP_FLUSH:
5264 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
5265 if (stream) {
5266 if (stream->state == AMPDU_STREAM_ACTIVE) {
5267 idx = stream->idx;
5268 spin_unlock(&priv->stream_lock);
5269 mwl8k_destroy_ba(hw, idx);
5270 spin_lock(&priv->stream_lock);
5271 }
5272 mwl8k_remove_stream(hw, stream);
5273 }
5274 ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
5275 break;
5276 case IEEE80211_AMPDU_TX_OPERATIONAL:
5277 BUG_ON(stream == NULL);
5278 BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS);
5279 spin_unlock(&priv->stream_lock);
5280 rc = mwl8k_create_ba(hw, stream, buf_size, vif);
5281 spin_lock(&priv->stream_lock);
5282 if (!rc)
5283 stream->state = AMPDU_STREAM_ACTIVE;
5284 else {
5285 idx = stream->idx;
5286 spin_unlock(&priv->stream_lock);
5287 mwl8k_destroy_ba(hw, idx);
5288 spin_lock(&priv->stream_lock);
5289 wiphy_debug(hw->wiphy,
5290 "Failed adding stream for sta %pM tid %d\n",
5291 addr, tid);
5292 mwl8k_remove_stream(hw, stream);
5293 }
5294 break;
5295
5296 default:
5297 rc = -ENOTSUPP;
5298 }
5299
5300 spin_unlock(&priv->stream_lock);
5301 return rc;
5302 }
5303
5304 static const struct ieee80211_ops mwl8k_ops = {
5305 .tx = mwl8k_tx,
5306 .start = mwl8k_start,
5307 .stop = mwl8k_stop,
5308 .add_interface = mwl8k_add_interface,
5309 .remove_interface = mwl8k_remove_interface,
5310 .config = mwl8k_config,
5311 .bss_info_changed = mwl8k_bss_info_changed,
5312 .prepare_multicast = mwl8k_prepare_multicast,
5313 .configure_filter = mwl8k_configure_filter,
5314 .set_key = mwl8k_set_key,
5315 .set_rts_threshold = mwl8k_set_rts_threshold,
5316 .sta_add = mwl8k_sta_add,
5317 .sta_remove = mwl8k_sta_remove,
5318 .conf_tx = mwl8k_conf_tx,
5319 .get_stats = mwl8k_get_stats,
5320 .get_survey = mwl8k_get_survey,
5321 .ampdu_action = mwl8k_ampdu_action,
5322 };
5323
5324 static void mwl8k_finalize_join_worker(struct work_struct *work)
5325 {
5326 struct mwl8k_priv *priv =
5327 container_of(work, struct mwl8k_priv, finalize_join_worker);
5328 struct sk_buff *skb = priv->beacon_skb;
5329 struct ieee80211_mgmt *mgmt = (void *)skb->data;
5330 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
5331 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
5332 mgmt->u.beacon.variable, len);
5333 int dtim_period = 1;
5334
5335 if (tim && tim[1] >= 2)
5336 dtim_period = tim[3];
5337
5338 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
5339
5340 dev_kfree_skb(skb);
5341 priv->beacon_skb = NULL;
5342 }
5343
5344 enum {
5345 MWL8363 = 0,
5346 MWL8687,
5347 MWL8366,
5348 };
5349
5350 #define MWL8K_8366_AP_FW_API 3
5351 #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
5352 #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
5353
5354 static struct mwl8k_device_info mwl8k_info_tbl[] = {
5355 [MWL8363] = {
5356 .part_name = "88w8363",
5357 .helper_image = "mwl8k/helper_8363.fw",
5358 .fw_image_sta = "mwl8k/fmimage_8363.fw",
5359 },
5360 [MWL8687] = {
5361 .part_name = "88w8687",
5362 .helper_image = "mwl8k/helper_8687.fw",
5363 .fw_image_sta = "mwl8k/fmimage_8687.fw",
5364 },
5365 [MWL8366] = {
5366 .part_name = "88w8366",
5367 .helper_image = "mwl8k/helper_8366.fw",
5368 .fw_image_sta = "mwl8k/fmimage_8366.fw",
5369 .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
5370 .fw_api_ap = MWL8K_8366_AP_FW_API,
5371 .ap_rxd_ops = &rxd_8366_ap_ops,
5372 },
5373 };
5374
5375 MODULE_FIRMWARE("mwl8k/helper_8363.fw");
5376 MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
5377 MODULE_FIRMWARE("mwl8k/helper_8687.fw");
5378 MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
5379 MODULE_FIRMWARE("mwl8k/helper_8366.fw");
5380 MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
5381 MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
5382
5383 static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
5384 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
5385 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
5386 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
5387 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
5388 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
5389 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
5390 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
5391 { },
5392 };
5393 MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
5394
5395 static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
5396 {
5397 int rc;
5398 printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
5399 "Trying alternative firmware %s\n", pci_name(priv->pdev),
5400 priv->fw_pref, priv->fw_alt);
5401 rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
5402 if (rc) {
5403 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5404 pci_name(priv->pdev), priv->fw_alt);
5405 return rc;
5406 }
5407 return 0;
5408 }
5409
5410 static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
5411 static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
5412 {
5413 struct mwl8k_priv *priv = context;
5414 struct mwl8k_device_info *di = priv->device_info;
5415 int rc;
5416
5417 switch (priv->fw_state) {
5418 case FW_STATE_INIT:
5419 if (!fw) {
5420 printk(KERN_ERR "%s: Error requesting helper fw %s\n",
5421 pci_name(priv->pdev), di->helper_image);
5422 goto fail;
5423 }
5424 priv->fw_helper = fw;
5425 rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
5426 true);
5427 if (rc && priv->fw_alt) {
5428 rc = mwl8k_request_alt_fw(priv);
5429 if (rc)
5430 goto fail;
5431 priv->fw_state = FW_STATE_LOADING_ALT;
5432 } else if (rc)
5433 goto fail;
5434 else
5435 priv->fw_state = FW_STATE_LOADING_PREF;
5436 break;
5437
5438 case FW_STATE_LOADING_PREF:
5439 if (!fw) {
5440 if (priv->fw_alt) {
5441 rc = mwl8k_request_alt_fw(priv);
5442 if (rc)
5443 goto fail;
5444 priv->fw_state = FW_STATE_LOADING_ALT;
5445 } else
5446 goto fail;
5447 } else {
5448 priv->fw_ucode = fw;
5449 rc = mwl8k_firmware_load_success(priv);
5450 if (rc)
5451 goto fail;
5452 else
5453 complete(&priv->firmware_loading_complete);
5454 }
5455 break;
5456
5457 case FW_STATE_LOADING_ALT:
5458 if (!fw) {
5459 printk(KERN_ERR "%s: Error requesting alt fw %s\n",
5460 pci_name(priv->pdev), di->helper_image);
5461 goto fail;
5462 }
5463 priv->fw_ucode = fw;
5464 rc = mwl8k_firmware_load_success(priv);
5465 if (rc)
5466 goto fail;
5467 else
5468 complete(&priv->firmware_loading_complete);
5469 break;
5470
5471 default:
5472 printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
5473 MWL8K_NAME, priv->fw_state);
5474 BUG_ON(1);
5475 }
5476
5477 return;
5478
5479 fail:
5480 priv->fw_state = FW_STATE_ERROR;
5481 complete(&priv->firmware_loading_complete);
5482 device_release_driver(&priv->pdev->dev);
5483 mwl8k_release_firmware(priv);
5484 }
5485
5486 #define MAX_RESTART_ATTEMPTS 1
5487 static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
5488 bool nowait)
5489 {
5490 struct mwl8k_priv *priv = hw->priv;
5491 int rc;
5492 int count = MAX_RESTART_ATTEMPTS;
5493
5494 retry:
5495 /* Reset firmware and hardware */
5496 mwl8k_hw_reset(priv);
5497
5498 /* Ask userland hotplug daemon for the device firmware */
5499 rc = mwl8k_request_firmware(priv, fw_image, nowait);
5500 if (rc) {
5501 wiphy_err(hw->wiphy, "Firmware files not found\n");
5502 return rc;
5503 }
5504
5505 if (nowait)
5506 return rc;
5507
5508 /* Load firmware into hardware */
5509 rc = mwl8k_load_firmware(hw);
5510 if (rc)
5511 wiphy_err(hw->wiphy, "Cannot start firmware\n");
5512
5513 /* Reclaim memory once firmware is successfully loaded */
5514 mwl8k_release_firmware(priv);
5515
5516 if (rc && count) {
5517 /* FW did not start successfully;
5518 * lets try one more time
5519 */
5520 count--;
5521 wiphy_err(hw->wiphy, "Trying to reload the firmware again\n");
5522 msleep(20);
5523 goto retry;
5524 }
5525
5526 return rc;
5527 }
5528
5529 static int mwl8k_init_txqs(struct ieee80211_hw *hw)
5530 {
5531 struct mwl8k_priv *priv = hw->priv;
5532 int rc = 0;
5533 int i;
5534
5535 for (i = 0; i < mwl8k_tx_queues(priv); i++) {
5536 rc = mwl8k_txq_init(hw, i);
5537 if (rc)
5538 break;
5539 if (priv->ap_fw)
5540 iowrite32(priv->txq[i].txd_dma,
5541 priv->sram + priv->txq_offset[i]);
5542 }
5543 return rc;
5544 }
5545
5546 /* initialize hw after successfully loading a firmware image */
5547 static int mwl8k_probe_hw(struct ieee80211_hw *hw)
5548 {
5549 struct mwl8k_priv *priv = hw->priv;
5550 int rc = 0;
5551 int i;
5552
5553 if (priv->ap_fw) {
5554 priv->rxd_ops = priv->device_info->ap_rxd_ops;
5555 if (priv->rxd_ops == NULL) {
5556 wiphy_err(hw->wiphy,
5557 "Driver does not have AP firmware image support for this hardware\n");
5558 rc = -ENOENT;
5559 goto err_stop_firmware;
5560 }
5561 } else {
5562 priv->rxd_ops = &rxd_sta_ops;
5563 }
5564
5565 priv->sniffer_enabled = false;
5566 priv->wmm_enabled = false;
5567 priv->pending_tx_pkts = 0;
5568 atomic_set(&priv->watchdog_event_pending, 0);
5569
5570 rc = mwl8k_rxq_init(hw, 0);
5571 if (rc)
5572 goto err_stop_firmware;
5573 rxq_refill(hw, 0, INT_MAX);
5574
5575 /* For the sta firmware, we need to know the dma addresses of tx queues
5576 * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them
5577 * prior to issuing this command. But for the AP case, we learn the
5578 * total number of queues from the result CMD_GET_HW_SPEC, so for this
5579 * case we must initialize the tx queues after.
5580 */
5581 priv->num_ampdu_queues = 0;
5582 if (!priv->ap_fw) {
5583 rc = mwl8k_init_txqs(hw);
5584 if (rc)
5585 goto err_free_queues;
5586 }
5587
5588 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
5589 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
5590 iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY|
5591 MWL8K_A2H_INT_BA_WATCHDOG,
5592 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
5593 iowrite32(MWL8K_A2H_INT_OPC_DONE,
5594 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
5595
5596 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
5597 IRQF_SHARED, MWL8K_NAME, hw);
5598 if (rc) {
5599 wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
5600 goto err_free_queues;
5601 }
5602
5603 /*
5604 * When hw restart is requested,
5605 * mac80211 will take care of clearing
5606 * the ampdu streams, so do not clear
5607 * the ampdu state here
5608 */
5609 if (!priv->hw_restart_in_progress)
5610 memset(priv->ampdu, 0, sizeof(priv->ampdu));
5611
5612 /*
5613 * Temporarily enable interrupts. Initial firmware host
5614 * commands use interrupts and avoid polling. Disable
5615 * interrupts when done.
5616 */
5617 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
5618
5619 /* Get config data, mac addrs etc */
5620 if (priv->ap_fw) {
5621 rc = mwl8k_cmd_get_hw_spec_ap(hw);
5622 if (!rc)
5623 rc = mwl8k_init_txqs(hw);
5624 if (!rc)
5625 rc = mwl8k_cmd_set_hw_spec(hw);
5626 } else {
5627 rc = mwl8k_cmd_get_hw_spec_sta(hw);
5628 }
5629 if (rc) {
5630 wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
5631 goto err_free_irq;
5632 }
5633
5634 /* Turn radio off */
5635 rc = mwl8k_cmd_radio_disable(hw);
5636 if (rc) {
5637 wiphy_err(hw->wiphy, "Cannot disable\n");
5638 goto err_free_irq;
5639 }
5640
5641 /* Clear MAC address */
5642 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
5643 if (rc) {
5644 wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
5645 goto err_free_irq;
5646 }
5647
5648 /* Disable interrupts */
5649 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
5650 free_irq(priv->pdev->irq, hw);
5651
5652 wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
5653 priv->device_info->part_name,
5654 priv->hw_rev, hw->wiphy->perm_addr,
5655 priv->ap_fw ? "AP" : "STA",
5656 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
5657 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
5658
5659 return 0;
5660
5661 err_free_irq:
5662 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
5663 free_irq(priv->pdev->irq, hw);
5664
5665 err_free_queues:
5666 for (i = 0; i < mwl8k_tx_queues(priv); i++)
5667 mwl8k_txq_deinit(hw, i);
5668 mwl8k_rxq_deinit(hw, 0);
5669
5670 err_stop_firmware:
5671 mwl8k_hw_reset(priv);
5672
5673 return rc;
5674 }
5675
5676 /*
5677 * invoke mwl8k_reload_firmware to change the firmware image after the device
5678 * has already been registered
5679 */
5680 static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
5681 {
5682 int i, rc = 0;
5683 struct mwl8k_priv *priv = hw->priv;
5684 struct mwl8k_vif *vif, *tmp_vif;
5685
5686 mwl8k_stop(hw);
5687 mwl8k_rxq_deinit(hw, 0);
5688
5689 /*
5690 * All the existing interfaces are re-added by the ieee80211_reconfig;
5691 * which means driver should remove existing interfaces before calling
5692 * ieee80211_restart_hw
5693 */
5694 if (priv->hw_restart_in_progress)
5695 list_for_each_entry_safe(vif, tmp_vif, &priv->vif_list, list)
5696 mwl8k_remove_vif(priv, vif);
5697
5698 for (i = 0; i < mwl8k_tx_queues(priv); i++)
5699 mwl8k_txq_deinit(hw, i);
5700
5701 rc = mwl8k_init_firmware(hw, fw_image, false);
5702 if (rc)
5703 goto fail;
5704
5705 rc = mwl8k_probe_hw(hw);
5706 if (rc)
5707 goto fail;
5708
5709 if (priv->hw_restart_in_progress)
5710 return rc;
5711
5712 rc = mwl8k_start(hw);
5713 if (rc)
5714 goto fail;
5715
5716 rc = mwl8k_config(hw, ~0);
5717 if (rc)
5718 goto fail;
5719
5720 for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) {
5721 rc = mwl8k_conf_tx(hw, NULL, i, &priv->wmm_params[i]);
5722 if (rc)
5723 goto fail;
5724 }
5725
5726 return rc;
5727
5728 fail:
5729 printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
5730 return rc;
5731 }
5732
5733 static const struct ieee80211_iface_limit ap_if_limits[] = {
5734 { .max = 8, .types = BIT(NL80211_IFTYPE_AP) },
5735 };
5736
5737 static const struct ieee80211_iface_combination ap_if_comb = {
5738 .limits = ap_if_limits,
5739 .n_limits = ARRAY_SIZE(ap_if_limits),
5740 .max_interfaces = 8,
5741 .num_different_channels = 1,
5742 };
5743
5744
5745 static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
5746 {
5747 struct ieee80211_hw *hw = priv->hw;
5748 int i, rc;
5749
5750 rc = mwl8k_load_firmware(hw);
5751 mwl8k_release_firmware(priv);
5752 if (rc) {
5753 wiphy_err(hw->wiphy, "Cannot start firmware\n");
5754 return rc;
5755 }
5756
5757 /*
5758 * Extra headroom is the size of the required DMA header
5759 * minus the size of the smallest 802.11 frame (CTS frame).
5760 */
5761 hw->extra_tx_headroom =
5762 sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
5763
5764 hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0;
5765
5766 hw->channel_change_time = 10;
5767
5768 hw->queues = MWL8K_TX_WMM_QUEUES;
5769
5770 /* Set rssi values to dBm */
5771 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL;
5772
5773 /*
5774 * Ask mac80211 to not to trigger PS mode
5775 * based on PM bit of incoming frames.
5776 */
5777 if (priv->ap_fw)
5778 hw->flags |= IEEE80211_HW_AP_LINK_PS;
5779
5780 hw->vif_data_size = sizeof(struct mwl8k_vif);
5781 hw->sta_data_size = sizeof(struct mwl8k_sta);
5782
5783 priv->macids_used = 0;
5784 INIT_LIST_HEAD(&priv->vif_list);
5785
5786 /* Set default radio state and preamble */
5787 priv->radio_on = false;
5788 priv->radio_short_preamble = false;
5789
5790 /* Finalize join worker */
5791 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
5792 /* Handle watchdog ba events */
5793 INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events);
5794 /* To reload the firmware if it crashes */
5795 INIT_WORK(&priv->fw_reload, mwl8k_hw_restart_work);
5796
5797 /* TX reclaim and RX tasklets. */
5798 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
5799 tasklet_disable(&priv->poll_tx_task);
5800 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
5801 tasklet_disable(&priv->poll_rx_task);
5802
5803 /* Power management cookie */
5804 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
5805 if (priv->cookie == NULL)
5806 return -ENOMEM;
5807
5808 mutex_init(&priv->fw_mutex);
5809 priv->fw_mutex_owner = NULL;
5810 priv->fw_mutex_depth = 0;
5811 priv->hostcmd_wait = NULL;
5812
5813 spin_lock_init(&priv->tx_lock);
5814
5815 spin_lock_init(&priv->stream_lock);
5816
5817 priv->tx_wait = NULL;
5818
5819 rc = mwl8k_probe_hw(hw);
5820 if (rc)
5821 goto err_free_cookie;
5822
5823 hw->wiphy->interface_modes = 0;
5824
5825 if (priv->ap_macids_supported || priv->device_info->fw_image_ap) {
5826 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
5827 hw->wiphy->iface_combinations = &ap_if_comb;
5828 hw->wiphy->n_iface_combinations = 1;
5829 }
5830
5831 if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
5832 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
5833
5834 rc = ieee80211_register_hw(hw);
5835 if (rc) {
5836 wiphy_err(hw->wiphy, "Cannot register device\n");
5837 goto err_unprobe_hw;
5838 }
5839
5840 return 0;
5841
5842 err_unprobe_hw:
5843 for (i = 0; i < mwl8k_tx_queues(priv); i++)
5844 mwl8k_txq_deinit(hw, i);
5845 mwl8k_rxq_deinit(hw, 0);
5846
5847 err_free_cookie:
5848 if (priv->cookie != NULL)
5849 pci_free_consistent(priv->pdev, 4,
5850 priv->cookie, priv->cookie_dma);
5851
5852 return rc;
5853 }
5854 static int mwl8k_probe(struct pci_dev *pdev,
5855 const struct pci_device_id *id)
5856 {
5857 static int printed_version;
5858 struct ieee80211_hw *hw;
5859 struct mwl8k_priv *priv;
5860 struct mwl8k_device_info *di;
5861 int rc;
5862
5863 if (!printed_version) {
5864 printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
5865 printed_version = 1;
5866 }
5867
5868
5869 rc = pci_enable_device(pdev);
5870 if (rc) {
5871 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
5872 MWL8K_NAME);
5873 return rc;
5874 }
5875
5876 rc = pci_request_regions(pdev, MWL8K_NAME);
5877 if (rc) {
5878 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
5879 MWL8K_NAME);
5880 goto err_disable_device;
5881 }
5882
5883 pci_set_master(pdev);
5884
5885
5886 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
5887 if (hw == NULL) {
5888 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
5889 rc = -ENOMEM;
5890 goto err_free_reg;
5891 }
5892
5893 SET_IEEE80211_DEV(hw, &pdev->dev);
5894 pci_set_drvdata(pdev, hw);
5895
5896 priv = hw->priv;
5897 priv->hw = hw;
5898 priv->pdev = pdev;
5899 priv->device_info = &mwl8k_info_tbl[id->driver_data];
5900
5901
5902 priv->sram = pci_iomap(pdev, 0, 0x10000);
5903 if (priv->sram == NULL) {
5904 wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
5905 rc = -EIO;
5906 goto err_iounmap;
5907 }
5908
5909 /*
5910 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
5911 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
5912 */
5913 priv->regs = pci_iomap(pdev, 1, 0x10000);
5914 if (priv->regs == NULL) {
5915 priv->regs = pci_iomap(pdev, 2, 0x10000);
5916 if (priv->regs == NULL) {
5917 wiphy_err(hw->wiphy, "Cannot map device registers\n");
5918 rc = -EIO;
5919 goto err_iounmap;
5920 }
5921 }
5922
5923 /*
5924 * Choose the initial fw image depending on user input. If a second
5925 * image is available, make it the alternative image that will be
5926 * loaded if the first one fails.
5927 */
5928 init_completion(&priv->firmware_loading_complete);
5929 di = priv->device_info;
5930 if (ap_mode_default && di->fw_image_ap) {
5931 priv->fw_pref = di->fw_image_ap;
5932 priv->fw_alt = di->fw_image_sta;
5933 } else if (!ap_mode_default && di->fw_image_sta) {
5934 priv->fw_pref = di->fw_image_sta;
5935 priv->fw_alt = di->fw_image_ap;
5936 } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
5937 printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
5938 priv->fw_pref = di->fw_image_sta;
5939 } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
5940 printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
5941 priv->fw_pref = di->fw_image_ap;
5942 }
5943 rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
5944 if (rc)
5945 goto err_stop_firmware;
5946
5947 priv->hw_restart_in_progress = false;
5948
5949 return rc;
5950
5951 err_stop_firmware:
5952 mwl8k_hw_reset(priv);
5953
5954 err_iounmap:
5955 if (priv->regs != NULL)
5956 pci_iounmap(pdev, priv->regs);
5957
5958 if (priv->sram != NULL)
5959 pci_iounmap(pdev, priv->sram);
5960
5961 pci_set_drvdata(pdev, NULL);
5962 ieee80211_free_hw(hw);
5963
5964 err_free_reg:
5965 pci_release_regions(pdev);
5966
5967 err_disable_device:
5968 pci_disable_device(pdev);
5969
5970 return rc;
5971 }
5972
5973 static void mwl8k_remove(struct pci_dev *pdev)
5974 {
5975 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
5976 struct mwl8k_priv *priv;
5977 int i;
5978
5979 if (hw == NULL)
5980 return;
5981 priv = hw->priv;
5982
5983 wait_for_completion(&priv->firmware_loading_complete);
5984
5985 if (priv->fw_state == FW_STATE_ERROR) {
5986 mwl8k_hw_reset(priv);
5987 goto unmap;
5988 }
5989
5990 ieee80211_stop_queues(hw);
5991
5992 ieee80211_unregister_hw(hw);
5993
5994 /* Remove TX reclaim and RX tasklets. */
5995 tasklet_kill(&priv->poll_tx_task);
5996 tasklet_kill(&priv->poll_rx_task);
5997
5998 /* Stop hardware */
5999 mwl8k_hw_reset(priv);
6000
6001 /* Return all skbs to mac80211 */
6002 for (i = 0; i < mwl8k_tx_queues(priv); i++)
6003 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
6004
6005 for (i = 0; i < mwl8k_tx_queues(priv); i++)
6006 mwl8k_txq_deinit(hw, i);
6007
6008 mwl8k_rxq_deinit(hw, 0);
6009
6010 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
6011
6012 unmap:
6013 pci_iounmap(pdev, priv->regs);
6014 pci_iounmap(pdev, priv->sram);
6015 pci_set_drvdata(pdev, NULL);
6016 ieee80211_free_hw(hw);
6017 pci_release_regions(pdev);
6018 pci_disable_device(pdev);
6019 }
6020
6021 static struct pci_driver mwl8k_driver = {
6022 .name = MWL8K_NAME,
6023 .id_table = mwl8k_pci_id_table,
6024 .probe = mwl8k_probe,
6025 .remove = mwl8k_remove,
6026 };
6027
6028 module_pci_driver(mwl8k_driver);
6029
6030 MODULE_DESCRIPTION(MWL8K_DESC);
6031 MODULE_VERSION(MWL8K_VERSION);
6032 MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
6033 MODULE_LICENSE("GPL");
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