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[ARM] 4157/2: S3C24XX: move arch/arch/mach-s3c2410 into cpu components
[linux-2.6/btrfs-unstable.git] / arch / arm / plat-s3c24xx / devs.c
blob6d46c4e2a4f77e6bde831570f1b942406ae77b06
1 /* linux/arch/arm/plat-s3c24xx/devs.c
2 *
3 * Copyright (c) 2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Base S3C24XX platform device definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/timer.h>
19 #include <linux/init.h>
20 #include <linux/serial_core.h>
21 #include <linux/platform_device.h>
22
23 #include <asm/mach/arch.h>
24 #include <asm/mach/map.h>
25 #include <asm/mach/irq.h>
26 #include <asm/arch/fb.h>
27 #include <asm/hardware.h>
28 #include <asm/io.h>
29 #include <asm/irq.h>
30
31 #include <asm/arch/regs-serial.h>
32
33 #include <asm/plat-s3c24xx/devs.h>
34 #include <asm/plat-s3c24xx/cpu.h>
35
36 /* Serial port registrations */
37
38 static struct resource s3c2410_uart0_resource[] = {
39 [0] = {
40 .start = S3C2410_PA_UART0,
41 .end = S3C2410_PA_UART0 + 0x3fff,
42 .flags = IORESOURCE_MEM,
43 },
44 [1] = {
45 .start = IRQ_S3CUART_RX0,
46 .end = IRQ_S3CUART_ERR0,
47 .flags = IORESOURCE_IRQ,
48 }
49 };
50
51 static struct resource s3c2410_uart1_resource[] = {
52 [0] = {
53 .start = S3C2410_PA_UART1,
54 .end = S3C2410_PA_UART1 + 0x3fff,
55 .flags = IORESOURCE_MEM,
56 },
57 [1] = {
58 .start = IRQ_S3CUART_RX1,
59 .end = IRQ_S3CUART_ERR1,
60 .flags = IORESOURCE_IRQ,
61 }
62 };
63
64 static struct resource s3c2410_uart2_resource[] = {
65 [0] = {
66 .start = S3C2410_PA_UART2,
67 .end = S3C2410_PA_UART2 + 0x3fff,
68 .flags = IORESOURCE_MEM,
69 },
70 [1] = {
71 .start = IRQ_S3CUART_RX2,
72 .end = IRQ_S3CUART_ERR2,
73 .flags = IORESOURCE_IRQ,
74 }
75 };
76
77 struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
78 [0] = {
79 .resources = s3c2410_uart0_resource,
80 .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
81 },
82 [1] = {
83 .resources = s3c2410_uart1_resource,
84 .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
85 },
86 [2] = {
87 .resources = s3c2410_uart2_resource,
88 .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
89 },
90 };
91
92 /* yart devices */
93
94 static struct platform_device s3c24xx_uart_device0 = {
95 .id = 0,
96 };
97
98 static struct platform_device s3c24xx_uart_device1 = {
99 .id = 1,
100 };
101
102 static struct platform_device s3c24xx_uart_device2 = {
103 .id = 2,
104 };
105
106 struct platform_device *s3c24xx_uart_src[3] = {
107 &s3c24xx_uart_device0,
108 &s3c24xx_uart_device1,
109 &s3c24xx_uart_device2,
110 };
111
112 struct platform_device *s3c24xx_uart_devs[3] = {
113 };
114
115 /* USB Host Controller */
116
117 static struct resource s3c_usb_resource[] = {
118 [0] = {
119 .start = S3C24XX_PA_USBHOST,
120 .end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1,
121 .flags = IORESOURCE_MEM,
122 },
123 [1] = {
124 .start = IRQ_USBH,
125 .end = IRQ_USBH,
126 .flags = IORESOURCE_IRQ,
127 }
128 };
129
130 static u64 s3c_device_usb_dmamask = 0xffffffffUL;
131
132 struct platform_device s3c_device_usb = {
133 .name = "s3c2410-ohci",
134 .id = -1,
135 .num_resources = ARRAY_SIZE(s3c_usb_resource),
136 .resource = s3c_usb_resource,
137 .dev = {
138 .dma_mask = &s3c_device_usb_dmamask,
139 .coherent_dma_mask = 0xffffffffUL
140 }
141 };
142
143 EXPORT_SYMBOL(s3c_device_usb);
144
145 /* LCD Controller */
146
147 static struct resource s3c_lcd_resource[] = {
148 [0] = {
149 .start = S3C24XX_PA_LCD,
150 .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
151 .flags = IORESOURCE_MEM,
152 },
153 [1] = {
154 .start = IRQ_LCD,
155 .end = IRQ_LCD,
156 .flags = IORESOURCE_IRQ,
157 }
158
159 };
160
161 static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
162
163 struct platform_device s3c_device_lcd = {
164 .name = "s3c2410-lcd",
165 .id = -1,
166 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
167 .resource = s3c_lcd_resource,
168 .dev = {
169 .dma_mask = &s3c_device_lcd_dmamask,
170 .coherent_dma_mask = 0xffffffffUL
171 }
172 };
173
174 EXPORT_SYMBOL(s3c_device_lcd);
175
176 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
177 {
178 struct s3c2410fb_mach_info *npd;
179
180 npd = kmalloc(sizeof(*npd), GFP_KERNEL);
181 if (npd) {
182 memcpy(npd, pd, sizeof(*npd));
183 s3c_device_lcd.dev.platform_data = npd;
184 } else {
185 printk(KERN_ERR "no memory for LCD platform data\n");
186 }
187 }
188
189 /* NAND Controller */
190
191 static struct resource s3c_nand_resource[] = {
192 [0] = {
193 .start = S3C2410_PA_NAND,
194 .end = S3C2410_PA_NAND + S3C24XX_SZ_NAND - 1,
195 .flags = IORESOURCE_MEM,
196 }
197 };
198
199 struct platform_device s3c_device_nand = {
200 .name = "s3c2410-nand",
201 .id = -1,
202 .num_resources = ARRAY_SIZE(s3c_nand_resource),
203 .resource = s3c_nand_resource,
204 };
205
206 EXPORT_SYMBOL(s3c_device_nand);
207
208 /* USB Device (Gadget)*/
209
210 static struct resource s3c_usbgadget_resource[] = {
211 [0] = {
212 .start = S3C24XX_PA_USBDEV,
213 .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
214 .flags = IORESOURCE_MEM,
215 },
216 [1] = {
217 .start = IRQ_USBD,
218 .end = IRQ_USBD,
219 .flags = IORESOURCE_IRQ,
220 }
221
222 };
223
224 struct platform_device s3c_device_usbgadget = {
225 .name = "s3c2410-usbgadget",
226 .id = -1,
227 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
228 .resource = s3c_usbgadget_resource,
229 };
230
231 EXPORT_SYMBOL(s3c_device_usbgadget);
232
233 /* Watchdog */
234
235 static struct resource s3c_wdt_resource[] = {
236 [0] = {
237 .start = S3C24XX_PA_WATCHDOG,
238 .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
239 .flags = IORESOURCE_MEM,
240 },
241 [1] = {
242 .start = IRQ_WDT,
243 .end = IRQ_WDT,
244 .flags = IORESOURCE_IRQ,
245 }
246
247 };
248
249 struct platform_device s3c_device_wdt = {
250 .name = "s3c2410-wdt",
251 .id = -1,
252 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
253 .resource = s3c_wdt_resource,
254 };
255
256 EXPORT_SYMBOL(s3c_device_wdt);
257
258 /* I2C */
259
260 static struct resource s3c_i2c_resource[] = {
261 [0] = {
262 .start = S3C24XX_PA_IIC,
263 .end = S3C24XX_PA_IIC + S3C24XX_SZ_IIC - 1,
264 .flags = IORESOURCE_MEM,
265 },
266 [1] = {
267 .start = IRQ_IIC,
268 .end = IRQ_IIC,
269 .flags = IORESOURCE_IRQ,
270 }
271
272 };
273
274 struct platform_device s3c_device_i2c = {
275 .name = "s3c2410-i2c",
276 .id = -1,
277 .num_resources = ARRAY_SIZE(s3c_i2c_resource),
278 .resource = s3c_i2c_resource,
279 };
280
281 EXPORT_SYMBOL(s3c_device_i2c);
282
283 /* IIS */
284
285 static struct resource s3c_iis_resource[] = {
286 [0] = {
287 .start = S3C24XX_PA_IIS,
288 .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
289 .flags = IORESOURCE_MEM,
290 }
291 };
292
293 static u64 s3c_device_iis_dmamask = 0xffffffffUL;
294
295 struct platform_device s3c_device_iis = {
296 .name = "s3c2410-iis",
297 .id = -1,
298 .num_resources = ARRAY_SIZE(s3c_iis_resource),
299 .resource = s3c_iis_resource,
300 .dev = {
301 .dma_mask = &s3c_device_iis_dmamask,
302 .coherent_dma_mask = 0xffffffffUL
303 }
304 };
305
306 EXPORT_SYMBOL(s3c_device_iis);
307
308 /* RTC */
309
310 static struct resource s3c_rtc_resource[] = {
311 [0] = {
312 .start = S3C24XX_PA_RTC,
313 .end = S3C24XX_PA_RTC + 0xff,
314 .flags = IORESOURCE_MEM,
315 },
316 [1] = {
317 .start = IRQ_RTC,
318 .end = IRQ_RTC,
319 .flags = IORESOURCE_IRQ,
320 },
321 [2] = {
322 .start = IRQ_TICK,
323 .end = IRQ_TICK,
324 .flags = IORESOURCE_IRQ
325 }
326 };
327
328 struct platform_device s3c_device_rtc = {
329 .name = "s3c2410-rtc",
330 .id = -1,
331 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
332 .resource = s3c_rtc_resource,
333 };
334
335 EXPORT_SYMBOL(s3c_device_rtc);
336
337 /* ADC */
338
339 static struct resource s3c_adc_resource[] = {
340 [0] = {
341 .start = S3C24XX_PA_ADC,
342 .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
343 .flags = IORESOURCE_MEM,
344 },
345 [1] = {
346 .start = IRQ_TC,
347 .end = IRQ_TC,
348 .flags = IORESOURCE_IRQ,
349 },
350 [2] = {
351 .start = IRQ_ADC,
352 .end = IRQ_ADC,
353 .flags = IORESOURCE_IRQ,
354 }
355
356 };
357
358 struct platform_device s3c_device_adc = {
359 .name = "s3c2410-adc",
360 .id = -1,
361 .num_resources = ARRAY_SIZE(s3c_adc_resource),
362 .resource = s3c_adc_resource,
363 };
364
365 /* SDI */
366
367 static struct resource s3c_sdi_resource[] = {
368 [0] = {
369 .start = S3C2410_PA_SDI,
370 .end = S3C2410_PA_SDI + S3C24XX_SZ_SDI - 1,
371 .flags = IORESOURCE_MEM,
372 },
373 [1] = {
374 .start = IRQ_SDI,
375 .end = IRQ_SDI,
376 .flags = IORESOURCE_IRQ,
377 }
378
379 };
380
381 struct platform_device s3c_device_sdi = {
382 .name = "s3c2410-sdi",
383 .id = -1,
384 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
385 .resource = s3c_sdi_resource,
386 };
387
388 EXPORT_SYMBOL(s3c_device_sdi);
389
390 /* SPI (0) */
391
392 static struct resource s3c_spi0_resource[] = {
393 [0] = {
394 .start = S3C24XX_PA_SPI,
395 .end = S3C24XX_PA_SPI + 0x1f,
396 .flags = IORESOURCE_MEM,
397 },
398 [1] = {
399 .start = IRQ_SPI0,
400 .end = IRQ_SPI0,
401 .flags = IORESOURCE_IRQ,
402 }
403
404 };
405
406 static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
407
408 struct platform_device s3c_device_spi0 = {
409 .name = "s3c2410-spi",
410 .id = 0,
411 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
412 .resource = s3c_spi0_resource,
413 .dev = {
414 .dma_mask = &s3c_device_spi0_dmamask,
415 .coherent_dma_mask = 0xffffffffUL
416 }
417 };
418
419 EXPORT_SYMBOL(s3c_device_spi0);
420
421 /* SPI (1) */
422
423 static struct resource s3c_spi1_resource[] = {
424 [0] = {
425 .start = S3C24XX_PA_SPI + 0x20,
426 .end = S3C24XX_PA_SPI + 0x20 + 0x1f,
427 .flags = IORESOURCE_MEM,
428 },
429 [1] = {
430 .start = IRQ_SPI1,
431 .end = IRQ_SPI1,
432 .flags = IORESOURCE_IRQ,
433 }
434
435 };
436
437 static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
438
439 struct platform_device s3c_device_spi1 = {
440 .name = "s3c2410-spi",
441 .id = 1,
442 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
443 .resource = s3c_spi1_resource,
444 .dev = {
445 .dma_mask = &s3c_device_spi1_dmamask,
446 .coherent_dma_mask = 0xffffffffUL
447 }
448 };
449
450 EXPORT_SYMBOL(s3c_device_spi1);
451
452 /* pwm timer blocks */
453
454 static struct resource s3c_timer0_resource[] = {
455 [0] = {
456 .start = S3C24XX_PA_TIMER + 0x0C,
457 .end = S3C24XX_PA_TIMER + 0x0C + 0xB,
458 .flags = IORESOURCE_MEM,
459 },
460 [1] = {
461 .start = IRQ_TIMER0,
462 .end = IRQ_TIMER0,
463 .flags = IORESOURCE_IRQ,
464 }
465
466 };
467
468 struct platform_device s3c_device_timer0 = {
469 .name = "s3c2410-timer",
470 .id = 0,
471 .num_resources = ARRAY_SIZE(s3c_timer0_resource),
472 .resource = s3c_timer0_resource,
473 };
474
475 EXPORT_SYMBOL(s3c_device_timer0);
476
477 /* timer 1 */
478
479 static struct resource s3c_timer1_resource[] = {
480 [0] = {
481 .start = S3C24XX_PA_TIMER + 0x18,
482 .end = S3C24XX_PA_TIMER + 0x23,
483 .flags = IORESOURCE_MEM,
484 },
485 [1] = {
486 .start = IRQ_TIMER1,
487 .end = IRQ_TIMER1,
488 .flags = IORESOURCE_IRQ,
489 }
490
491 };
492
493 struct platform_device s3c_device_timer1 = {
494 .name = "s3c2410-timer",
495 .id = 1,
496 .num_resources = ARRAY_SIZE(s3c_timer1_resource),
497 .resource = s3c_timer1_resource,
498 };
499
500 EXPORT_SYMBOL(s3c_device_timer1);
501
502 /* timer 2 */
503
504 static struct resource s3c_timer2_resource[] = {
505 [0] = {
506 .start = S3C24XX_PA_TIMER + 0x24,
507 .end = S3C24XX_PA_TIMER + 0x2F,
508 .flags = IORESOURCE_MEM,
509 },
510 [1] = {
511 .start = IRQ_TIMER2,
512 .end = IRQ_TIMER2,
513 .flags = IORESOURCE_IRQ,
514 }
515
516 };
517
518 struct platform_device s3c_device_timer2 = {
519 .name = "s3c2410-timer",
520 .id = 2,
521 .num_resources = ARRAY_SIZE(s3c_timer2_resource),
522 .resource = s3c_timer2_resource,
523 };
524
525 EXPORT_SYMBOL(s3c_device_timer2);
526
527 /* timer 3 */
528
529 static struct resource s3c_timer3_resource[] = {
530 [0] = {
531 .start = S3C24XX_PA_TIMER + 0x30,
532 .end = S3C24XX_PA_TIMER + 0x3B,
533 .flags = IORESOURCE_MEM,
534 },
535 [1] = {
536 .start = IRQ_TIMER3,
537 .end = IRQ_TIMER3,
538 .flags = IORESOURCE_IRQ,
539 }
540
541 };
542
543 struct platform_device s3c_device_timer3 = {
544 .name = "s3c2410-timer",
545 .id = 3,
546 .num_resources = ARRAY_SIZE(s3c_timer3_resource),
547 .resource = s3c_timer3_resource,
548 };
549
550 EXPORT_SYMBOL(s3c_device_timer3);
551
552 #ifdef CONFIG_CPU_S3C2440
553
554 /* Camif Controller */
555
556 static struct resource s3c_camif_resource[] = {
557 [0] = {
558 .start = S3C2440_PA_CAMIF,
559 .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
560 .flags = IORESOURCE_MEM,
561 },
562 [1] = {
563 .start = IRQ_CAM,
564 .end = IRQ_CAM,
565 .flags = IORESOURCE_IRQ,
566 }
567
568 };
569
570 static u64 s3c_device_camif_dmamask = 0xffffffffUL;
571
572 struct platform_device s3c_device_camif = {
573 .name = "s3c2440-camif",
574 .id = -1,
575 .num_resources = ARRAY_SIZE(s3c_camif_resource),
576 .resource = s3c_camif_resource,
577 .dev = {
578 .dma_mask = &s3c_device_camif_dmamask,
579 .coherent_dma_mask = 0xffffffffUL
580 }
581 };
582
583 EXPORT_SYMBOL(s3c_device_camif);
584
585 #endif // CONFIG_CPU_S32440
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