Linux 4.19-rc7
[linux-2.6/btrfs-unstable.git] / include / dt-bindings / reset / imx7-reset.h
blob63948170c7b2d3ae5b62a219c83770aaa05be8ef
1 /*
2 * Copyright (C) 2017 Impinj, Inc.
4 * Author: Andrey Smirnov <andrew.smirnov@gmail.com>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 #ifndef DT_BINDING_RESET_IMX7_H
20 #define DT_BINDING_RESET_IMX7_H
22 #define IMX7_RESET_A7_CORE_POR_RESET0 0
23 #define IMX7_RESET_A7_CORE_POR_RESET1 1
24 #define IMX7_RESET_A7_CORE_RESET0 2
25 #define IMX7_RESET_A7_CORE_RESET1 3
26 #define IMX7_RESET_A7_DBG_RESET0 4
27 #define IMX7_RESET_A7_DBG_RESET1 5
28 #define IMX7_RESET_A7_ETM_RESET0 6
29 #define IMX7_RESET_A7_ETM_RESET1 7
30 #define IMX7_RESET_A7_SOC_DBG_RESET 8
31 #define IMX7_RESET_A7_L2RESET 9
32 #define IMX7_RESET_SW_M4C_RST 10
33 #define IMX7_RESET_SW_M4P_RST 11
34 #define IMX7_RESET_EIM_RST 12
35 #define IMX7_RESET_HSICPHY_PORT_RST 13
36 #define IMX7_RESET_USBPHY1_POR 14
37 #define IMX7_RESET_USBPHY1_PORT_RST 15
38 #define IMX7_RESET_USBPHY2_POR 16
39 #define IMX7_RESET_USBPHY2_PORT_RST 17
40 #define IMX7_RESET_MIPI_PHY_MRST 18
41 #define IMX7_RESET_MIPI_PHY_SRST 19
44 * IMX7_RESET_PCIEPHY is a logical reset line combining PCIEPHY_BTN
45 * and PCIEPHY_G_RST
47 #define IMX7_RESET_PCIEPHY 20
48 #define IMX7_RESET_PCIEPHY_PERST 21
51 * IMX7_RESET_PCIE_CTRL_APPS_EN is not strictly a reset line, but it
52 * can be used to inhibit PCIe LTTSM, so, in a way, it can be thoguht
53 * of as one
55 #define IMX7_RESET_PCIE_CTRL_APPS_EN 22
56 #define IMX7_RESET_DDRC_PRST 23
57 #define IMX7_RESET_DDRC_CORE_RST 24
59 #define IMX7_RESET_NUM 25
61 #endif