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Linux 4.19-rc7
[linux-2.6/btrfs-unstable.git] / drivers / rtc / rtc-s5m.c
blob6495f84f74288cfda5e2a26274dbdedb152531b2
1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // Copyright (c) 2013-2014 Samsung Electronics Co., Ltd
4 // http://www.samsung.com
5 //
6 // Copyright (C) 2013 Google, Inc
7
8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9
10 #include <linux/module.h>
11 #include <linux/i2c.h>
12 #include <linux/bcd.h>
13 #include <linux/regmap.h>
14 #include <linux/rtc.h>
15 #include <linux/platform_device.h>
16 #include <linux/mfd/samsung/core.h>
17 #include <linux/mfd/samsung/irq.h>
18 #include <linux/mfd/samsung/rtc.h>
19 #include <linux/mfd/samsung/s2mps14.h>
20
21 /*
22 * Maximum number of retries for checking changes in UDR field
23 * of S5M_RTC_UDR_CON register (to limit possible endless loop).
24 *
25 * After writing to RTC registers (setting time or alarm) read the UDR field
26 * in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have
27 * been transferred.
28 */
29 #define UDR_READ_RETRY_CNT 5
30
31 enum {
32 RTC_SEC = 0,
33 RTC_MIN,
34 RTC_HOUR,
35 RTC_WEEKDAY,
36 RTC_DATE,
37 RTC_MONTH,
38 RTC_YEAR1,
39 RTC_YEAR2,
40 /* Make sure this is always the last enum name. */
41 RTC_MAX_NUM_TIME_REGS
42 };
43
44 /*
45 * Registers used by the driver which are different between chipsets.
46 *
47 * Operations like read time and write alarm/time require updating
48 * specific fields in UDR register. These fields usually are auto-cleared
49 * (with some exceptions).
50 *
51 * Table of operations per device:
52 *
53 * Device | Write time | Read time | Write alarm
54 * =================================================
55 * S5M8767 | UDR + TIME | | UDR
56 * S2MPS11/14 | WUDR | RUDR | WUDR + RUDR
57 * S2MPS13 | WUDR | RUDR | WUDR + AUDR
58 * S2MPS15 | WUDR | RUDR | AUDR
59 */
60 struct s5m_rtc_reg_config {
61 /* Number of registers used for setting time/alarm0/alarm1 */
62 unsigned int regs_count;
63 /* First register for time, seconds */
64 unsigned int time;
65 /* RTC control register */
66 unsigned int ctrl;
67 /* First register for alarm 0, seconds */
68 unsigned int alarm0;
69 /* First register for alarm 1, seconds */
70 unsigned int alarm1;
71 /*
72 * Register for update flag (UDR). Typically setting UDR field to 1
73 * will enable update of time or alarm register. Then it will be
74 * auto-cleared after successful update.
75 */
76 unsigned int udr_update;
77 /* Auto-cleared mask in UDR field for writing time and alarm */
78 unsigned int autoclear_udr_mask;
79 /*
80 * Masks in UDR field for time and alarm operations.
81 * The read time mask can be 0. Rest should not.
82 */
83 unsigned int read_time_udr_mask;
84 unsigned int write_time_udr_mask;
85 unsigned int write_alarm_udr_mask;
86 };
87
88 /* Register map for S5M8763 and S5M8767 */
89 static const struct s5m_rtc_reg_config s5m_rtc_regs = {
90 .regs_count = 8,
91 .time = S5M_RTC_SEC,
92 .ctrl = S5M_ALARM1_CONF,
93 .alarm0 = S5M_ALARM0_SEC,
94 .alarm1 = S5M_ALARM1_SEC,
95 .udr_update = S5M_RTC_UDR_CON,
96 .autoclear_udr_mask = S5M_RTC_UDR_MASK,
97 .read_time_udr_mask = 0, /* Not needed */
98 .write_time_udr_mask = S5M_RTC_UDR_MASK | S5M_RTC_TIME_EN_MASK,
99 .write_alarm_udr_mask = S5M_RTC_UDR_MASK,
100 };
101
102 /* Register map for S2MPS13 */
103 static const struct s5m_rtc_reg_config s2mps13_rtc_regs = {
104 .regs_count = 7,
105 .time = S2MPS_RTC_SEC,
106 .ctrl = S2MPS_RTC_CTRL,
107 .alarm0 = S2MPS_ALARM0_SEC,
108 .alarm1 = S2MPS_ALARM1_SEC,
109 .udr_update = S2MPS_RTC_UDR_CON,
110 .autoclear_udr_mask = S2MPS_RTC_WUDR_MASK,
111 .read_time_udr_mask = S2MPS_RTC_RUDR_MASK,
112 .write_time_udr_mask = S2MPS_RTC_WUDR_MASK,
113 .write_alarm_udr_mask = S2MPS_RTC_WUDR_MASK | S2MPS13_RTC_AUDR_MASK,
114 };
115
116 /* Register map for S2MPS11/14 */
117 static const struct s5m_rtc_reg_config s2mps14_rtc_regs = {
118 .regs_count = 7,
119 .time = S2MPS_RTC_SEC,
120 .ctrl = S2MPS_RTC_CTRL,
121 .alarm0 = S2MPS_ALARM0_SEC,
122 .alarm1 = S2MPS_ALARM1_SEC,
123 .udr_update = S2MPS_RTC_UDR_CON,
124 .autoclear_udr_mask = S2MPS_RTC_WUDR_MASK,
125 .read_time_udr_mask = S2MPS_RTC_RUDR_MASK,
126 .write_time_udr_mask = S2MPS_RTC_WUDR_MASK,
127 .write_alarm_udr_mask = S2MPS_RTC_WUDR_MASK | S2MPS_RTC_RUDR_MASK,
128 };
129
130 /*
131 * Register map for S2MPS15 - in comparison to S2MPS14 the WUDR and AUDR bits
132 * are swapped.
133 */
134 static const struct s5m_rtc_reg_config s2mps15_rtc_regs = {
135 .regs_count = 7,
136 .time = S2MPS_RTC_SEC,
137 .ctrl = S2MPS_RTC_CTRL,
138 .alarm0 = S2MPS_ALARM0_SEC,
139 .alarm1 = S2MPS_ALARM1_SEC,
140 .udr_update = S2MPS_RTC_UDR_CON,
141 .autoclear_udr_mask = S2MPS_RTC_WUDR_MASK,
142 .read_time_udr_mask = S2MPS_RTC_RUDR_MASK,
143 .write_time_udr_mask = S2MPS15_RTC_WUDR_MASK,
144 .write_alarm_udr_mask = S2MPS15_RTC_AUDR_MASK,
145 };
146
147 struct s5m_rtc_info {
148 struct device *dev;
149 struct i2c_client *i2c;
150 struct sec_pmic_dev *s5m87xx;
151 struct regmap *regmap;
152 struct rtc_device *rtc_dev;
153 int irq;
154 enum sec_device_type device_type;
155 int rtc_24hr_mode;
156 const struct s5m_rtc_reg_config *regs;
157 };
158
159 static const struct regmap_config s5m_rtc_regmap_config = {
160 .reg_bits = 8,
161 .val_bits = 8,
162
163 .max_register = S5M_RTC_REG_MAX,
164 };
165
166 static const struct regmap_config s2mps14_rtc_regmap_config = {
167 .reg_bits = 8,
168 .val_bits = 8,
169
170 .max_register = S2MPS_RTC_REG_MAX,
171 };
172
173 static void s5m8767_data_to_tm(u8 *data, struct rtc_time *tm,
174 int rtc_24hr_mode)
175 {
176 tm->tm_sec = data[RTC_SEC] & 0x7f;
177 tm->tm_min = data[RTC_MIN] & 0x7f;
178 if (rtc_24hr_mode) {
179 tm->tm_hour = data[RTC_HOUR] & 0x1f;
180 } else {
181 tm->tm_hour = data[RTC_HOUR] & 0x0f;
182 if (data[RTC_HOUR] & HOUR_PM_MASK)
183 tm->tm_hour += 12;
184 }
185
186 tm->tm_wday = ffs(data[RTC_WEEKDAY] & 0x7f);
187 tm->tm_mday = data[RTC_DATE] & 0x1f;
188 tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1;
189 tm->tm_year = (data[RTC_YEAR1] & 0x7f) + 100;
190 tm->tm_yday = 0;
191 tm->tm_isdst = 0;
192 }
193
194 static int s5m8767_tm_to_data(struct rtc_time *tm, u8 *data)
195 {
196 data[RTC_SEC] = tm->tm_sec;
197 data[RTC_MIN] = tm->tm_min;
198
199 if (tm->tm_hour >= 12)
200 data[RTC_HOUR] = tm->tm_hour | HOUR_PM_MASK;
201 else
202 data[RTC_HOUR] = tm->tm_hour & ~HOUR_PM_MASK;
203
204 data[RTC_WEEKDAY] = 1 << tm->tm_wday;
205 data[RTC_DATE] = tm->tm_mday;
206 data[RTC_MONTH] = tm->tm_mon + 1;
207 data[RTC_YEAR1] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
208
209 if (tm->tm_year < 100) {
210 pr_err("RTC cannot handle the year %d\n",
211 1900 + tm->tm_year);
212 return -EINVAL;
213 } else {
214 return 0;
215 }
216 }
217
218 /*
219 * Read RTC_UDR_CON register and wait till UDR field is cleared.
220 * This indicates that time/alarm update ended.
221 */
222 static int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info)
223 {
224 int ret, retry = UDR_READ_RETRY_CNT;
225 unsigned int data;
226
227 do {
228 ret = regmap_read(info->regmap, info->regs->udr_update, &data);
229 } while (--retry && (data & info->regs->autoclear_udr_mask) && !ret);
230
231 if (!retry)
232 dev_err(info->dev, "waiting for UDR update, reached max number of retries\n");
233
234 return ret;
235 }
236
237 static int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info,
238 struct rtc_wkalrm *alarm)
239 {
240 int ret;
241 unsigned int val;
242
243 switch (info->device_type) {
244 case S5M8767X:
245 case S5M8763X:
246 ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val);
247 val &= S5M_ALARM0_STATUS;
248 break;
249 case S2MPS15X:
250 case S2MPS14X:
251 case S2MPS13X:
252 ret = regmap_read(info->s5m87xx->regmap_pmic, S2MPS14_REG_ST2,
253 &val);
254 val &= S2MPS_ALARM0_STATUS;
255 break;
256 default:
257 return -EINVAL;
258 }
259 if (ret < 0)
260 return ret;
261
262 if (val)
263 alarm->pending = 1;
264 else
265 alarm->pending = 0;
266
267 return 0;
268 }
269
270 static int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info)
271 {
272 int ret;
273 unsigned int data;
274
275 ret = regmap_read(info->regmap, info->regs->udr_update, &data);
276 if (ret < 0) {
277 dev_err(info->dev, "failed to read update reg(%d)\n", ret);
278 return ret;
279 }
280
281 data |= info->regs->write_time_udr_mask;
282
283 ret = regmap_write(info->regmap, info->regs->udr_update, data);
284 if (ret < 0) {
285 dev_err(info->dev, "failed to write update reg(%d)\n", ret);
286 return ret;
287 }
288
289 ret = s5m8767_wait_for_udr_update(info);
290
291 return ret;
292 }
293
294 static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
295 {
296 int ret;
297 unsigned int data;
298
299 ret = regmap_read(info->regmap, info->regs->udr_update, &data);
300 if (ret < 0) {
301 dev_err(info->dev, "%s: fail to read update reg(%d)\n",
302 __func__, ret);
303 return ret;
304 }
305
306 data |= info->regs->write_alarm_udr_mask;
307 switch (info->device_type) {
308 case S5M8763X:
309 case S5M8767X:
310 data &= ~S5M_RTC_TIME_EN_MASK;
311 break;
312 case S2MPS15X:
313 case S2MPS14X:
314 case S2MPS13X:
315 /* No exceptions needed */
316 break;
317 default:
318 return -EINVAL;
319 }
320
321 ret = regmap_write(info->regmap, info->regs->udr_update, data);
322 if (ret < 0) {
323 dev_err(info->dev, "%s: fail to write update reg(%d)\n",
324 __func__, ret);
325 return ret;
326 }
327
328 ret = s5m8767_wait_for_udr_update(info);
329
330 /* On S2MPS13 the AUDR is not auto-cleared */
331 if (info->device_type == S2MPS13X)
332 regmap_update_bits(info->regmap, info->regs->udr_update,
333 S2MPS13_RTC_AUDR_MASK, 0);
334
335 return ret;
336 }
337
338 static void s5m8763_data_to_tm(u8 *data, struct rtc_time *tm)
339 {
340 tm->tm_sec = bcd2bin(data[RTC_SEC]);
341 tm->tm_min = bcd2bin(data[RTC_MIN]);
342
343 if (data[RTC_HOUR] & HOUR_12) {
344 tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x1f);
345 if (data[RTC_HOUR] & HOUR_PM)
346 tm->tm_hour += 12;
347 } else {
348 tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3f);
349 }
350
351 tm->tm_wday = data[RTC_WEEKDAY] & 0x07;
352 tm->tm_mday = bcd2bin(data[RTC_DATE]);
353 tm->tm_mon = bcd2bin(data[RTC_MONTH]);
354 tm->tm_year = bcd2bin(data[RTC_YEAR1]) + bcd2bin(data[RTC_YEAR2]) * 100;
355 tm->tm_year -= 1900;
356 }
357
358 static void s5m8763_tm_to_data(struct rtc_time *tm, u8 *data)
359 {
360 data[RTC_SEC] = bin2bcd(tm->tm_sec);
361 data[RTC_MIN] = bin2bcd(tm->tm_min);
362 data[RTC_HOUR] = bin2bcd(tm->tm_hour);
363 data[RTC_WEEKDAY] = tm->tm_wday;
364 data[RTC_DATE] = bin2bcd(tm->tm_mday);
365 data[RTC_MONTH] = bin2bcd(tm->tm_mon);
366 data[RTC_YEAR1] = bin2bcd(tm->tm_year % 100);
367 data[RTC_YEAR2] = bin2bcd((tm->tm_year + 1900) / 100);
368 }
369
370 static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm)
371 {
372 struct s5m_rtc_info *info = dev_get_drvdata(dev);
373 u8 data[RTC_MAX_NUM_TIME_REGS];
374 int ret;
375
376 if (info->regs->read_time_udr_mask) {
377 ret = regmap_update_bits(info->regmap,
378 info->regs->udr_update,
379 info->regs->read_time_udr_mask,
380 info->regs->read_time_udr_mask);
381 if (ret) {
382 dev_err(dev,
383 "Failed to prepare registers for time reading: %d\n",
384 ret);
385 return ret;
386 }
387 }
388 ret = regmap_bulk_read(info->regmap, info->regs->time, data,
389 info->regs->regs_count);
390 if (ret < 0)
391 return ret;
392
393 switch (info->device_type) {
394 case S5M8763X:
395 s5m8763_data_to_tm(data, tm);
396 break;
397
398 case S5M8767X:
399 case S2MPS15X:
400 case S2MPS14X:
401 case S2MPS13X:
402 s5m8767_data_to_tm(data, tm, info->rtc_24hr_mode);
403 break;
404
405 default:
406 return -EINVAL;
407 }
408
409 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
410 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
411 tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
412
413 return 0;
414 }
415
416 static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm)
417 {
418 struct s5m_rtc_info *info = dev_get_drvdata(dev);
419 u8 data[RTC_MAX_NUM_TIME_REGS];
420 int ret = 0;
421
422 switch (info->device_type) {
423 case S5M8763X:
424 s5m8763_tm_to_data(tm, data);
425 break;
426 case S5M8767X:
427 case S2MPS15X:
428 case S2MPS14X:
429 case S2MPS13X:
430 ret = s5m8767_tm_to_data(tm, data);
431 break;
432 default:
433 return -EINVAL;
434 }
435
436 if (ret < 0)
437 return ret;
438
439 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
440 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
441 tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
442
443 ret = regmap_raw_write(info->regmap, info->regs->time, data,
444 info->regs->regs_count);
445 if (ret < 0)
446 return ret;
447
448 ret = s5m8767_rtc_set_time_reg(info);
449
450 return ret;
451 }
452
453 static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
454 {
455 struct s5m_rtc_info *info = dev_get_drvdata(dev);
456 u8 data[RTC_MAX_NUM_TIME_REGS];
457 unsigned int val;
458 int ret, i;
459
460 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
461 info->regs->regs_count);
462 if (ret < 0)
463 return ret;
464
465 switch (info->device_type) {
466 case S5M8763X:
467 s5m8763_data_to_tm(data, &alrm->time);
468 ret = regmap_read(info->regmap, S5M_ALARM0_CONF, &val);
469 if (ret < 0)
470 return ret;
471
472 alrm->enabled = !!val;
473 break;
474
475 case S5M8767X:
476 case S2MPS15X:
477 case S2MPS14X:
478 case S2MPS13X:
479 s5m8767_data_to_tm(data, &alrm->time, info->rtc_24hr_mode);
480 alrm->enabled = 0;
481 for (i = 0; i < info->regs->regs_count; i++) {
482 if (data[i] & ALARM_ENABLE_MASK) {
483 alrm->enabled = 1;
484 break;
485 }
486 }
487 break;
488
489 default:
490 return -EINVAL;
491 }
492
493 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
494 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon,
495 alrm->time.tm_mday, alrm->time.tm_hour,
496 alrm->time.tm_min, alrm->time.tm_sec,
497 alrm->time.tm_wday);
498
499 ret = s5m_check_peding_alarm_interrupt(info, alrm);
500
501 return 0;
502 }
503
504 static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info)
505 {
506 u8 data[RTC_MAX_NUM_TIME_REGS];
507 int ret, i;
508 struct rtc_time tm;
509
510 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
511 info->regs->regs_count);
512 if (ret < 0)
513 return ret;
514
515 s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
516 dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
517 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday,
518 tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday);
519
520 switch (info->device_type) {
521 case S5M8763X:
522 ret = regmap_write(info->regmap, S5M_ALARM0_CONF, 0);
523 break;
524
525 case S5M8767X:
526 case S2MPS15X:
527 case S2MPS14X:
528 case S2MPS13X:
529 for (i = 0; i < info->regs->regs_count; i++)
530 data[i] &= ~ALARM_ENABLE_MASK;
531
532 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
533 info->regs->regs_count);
534 if (ret < 0)
535 return ret;
536
537 ret = s5m8767_rtc_set_alarm_reg(info);
538
539 break;
540
541 default:
542 return -EINVAL;
543 }
544
545 return ret;
546 }
547
548 static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
549 {
550 int ret;
551 u8 data[RTC_MAX_NUM_TIME_REGS];
552 u8 alarm0_conf;
553 struct rtc_time tm;
554
555 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
556 info->regs->regs_count);
557 if (ret < 0)
558 return ret;
559
560 s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
561 dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
562 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday,
563 tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday);
564
565 switch (info->device_type) {
566 case S5M8763X:
567 alarm0_conf = 0x77;
568 ret = regmap_write(info->regmap, S5M_ALARM0_CONF, alarm0_conf);
569 break;
570
571 case S5M8767X:
572 case S2MPS15X:
573 case S2MPS14X:
574 case S2MPS13X:
575 data[RTC_SEC] |= ALARM_ENABLE_MASK;
576 data[RTC_MIN] |= ALARM_ENABLE_MASK;
577 data[RTC_HOUR] |= ALARM_ENABLE_MASK;
578 data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK;
579 if (data[RTC_DATE] & 0x1f)
580 data[RTC_DATE] |= ALARM_ENABLE_MASK;
581 if (data[RTC_MONTH] & 0xf)
582 data[RTC_MONTH] |= ALARM_ENABLE_MASK;
583 if (data[RTC_YEAR1] & 0x7f)
584 data[RTC_YEAR1] |= ALARM_ENABLE_MASK;
585
586 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
587 info->regs->regs_count);
588 if (ret < 0)
589 return ret;
590 ret = s5m8767_rtc_set_alarm_reg(info);
591
592 break;
593
594 default:
595 return -EINVAL;
596 }
597
598 return ret;
599 }
600
601 static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
602 {
603 struct s5m_rtc_info *info = dev_get_drvdata(dev);
604 u8 data[RTC_MAX_NUM_TIME_REGS];
605 int ret;
606
607 switch (info->device_type) {
608 case S5M8763X:
609 s5m8763_tm_to_data(&alrm->time, data);
610 break;
611
612 case S5M8767X:
613 case S2MPS15X:
614 case S2MPS14X:
615 case S2MPS13X:
616 s5m8767_tm_to_data(&alrm->time, data);
617 break;
618
619 default:
620 return -EINVAL;
621 }
622
623 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
624 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon,
625 alrm->time.tm_mday, alrm->time.tm_hour, alrm->time.tm_min,
626 alrm->time.tm_sec, alrm->time.tm_wday);
627
628 ret = s5m_rtc_stop_alarm(info);
629 if (ret < 0)
630 return ret;
631
632 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
633 info->regs->regs_count);
634 if (ret < 0)
635 return ret;
636
637 ret = s5m8767_rtc_set_alarm_reg(info);
638 if (ret < 0)
639 return ret;
640
641 if (alrm->enabled)
642 ret = s5m_rtc_start_alarm(info);
643
644 return ret;
645 }
646
647 static int s5m_rtc_alarm_irq_enable(struct device *dev,
648 unsigned int enabled)
649 {
650 struct s5m_rtc_info *info = dev_get_drvdata(dev);
651
652 if (enabled)
653 return s5m_rtc_start_alarm(info);
654 else
655 return s5m_rtc_stop_alarm(info);
656 }
657
658 static irqreturn_t s5m_rtc_alarm_irq(int irq, void *data)
659 {
660 struct s5m_rtc_info *info = data;
661
662 rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF);
663
664 return IRQ_HANDLED;
665 }
666
667 static const struct rtc_class_ops s5m_rtc_ops = {
668 .read_time = s5m_rtc_read_time,
669 .set_time = s5m_rtc_set_time,
670 .read_alarm = s5m_rtc_read_alarm,
671 .set_alarm = s5m_rtc_set_alarm,
672 .alarm_irq_enable = s5m_rtc_alarm_irq_enable,
673 };
674
675 static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
676 {
677 u8 data[2];
678 int ret;
679
680 switch (info->device_type) {
681 case S5M8763X:
682 case S5M8767X:
683 /* UDR update time. Default of 7.32 ms is too long. */
684 ret = regmap_update_bits(info->regmap, S5M_RTC_UDR_CON,
685 S5M_RTC_UDR_T_MASK, S5M_RTC_UDR_T_450_US);
686 if (ret < 0)
687 dev_err(info->dev, "%s: fail to change UDR time: %d\n",
688 __func__, ret);
689
690 /* Set RTC control register : Binary mode, 24hour mode */
691 data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
692 data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
693
694 ret = regmap_raw_write(info->regmap, S5M_ALARM0_CONF, data, 2);
695 break;
696
697 case S2MPS15X:
698 case S2MPS14X:
699 case S2MPS13X:
700 data[0] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
701 ret = regmap_write(info->regmap, info->regs->ctrl, data[0]);
702 if (ret < 0)
703 break;
704
705 /*
706 * Should set WUDR & (RUDR or AUDR) bits to high after writing
707 * RTC_CTRL register like writing Alarm registers. We can't find
708 * the description from datasheet but vendor code does that
709 * really.
710 */
711 ret = s5m8767_rtc_set_alarm_reg(info);
712 break;
713
714 default:
715 return -EINVAL;
716 }
717
718 info->rtc_24hr_mode = 1;
719 if (ret < 0) {
720 dev_err(info->dev, "%s: fail to write controlm reg(%d)\n",
721 __func__, ret);
722 return ret;
723 }
724
725 return ret;
726 }
727
728 static int s5m_rtc_probe(struct platform_device *pdev)
729 {
730 struct sec_pmic_dev *s5m87xx = dev_get_drvdata(pdev->dev.parent);
731 struct sec_platform_data *pdata = s5m87xx->pdata;
732 struct s5m_rtc_info *info;
733 const struct regmap_config *regmap_cfg;
734 int ret, alarm_irq;
735
736 if (!pdata) {
737 dev_err(pdev->dev.parent, "Platform data not supplied\n");
738 return -ENODEV;
739 }
740
741 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
742 if (!info)
743 return -ENOMEM;
744
745 switch (platform_get_device_id(pdev)->driver_data) {
746 case S2MPS15X:
747 regmap_cfg = &s2mps14_rtc_regmap_config;
748 info->regs = &s2mps15_rtc_regs;
749 alarm_irq = S2MPS14_IRQ_RTCA0;
750 break;
751 case S2MPS14X:
752 regmap_cfg = &s2mps14_rtc_regmap_config;
753 info->regs = &s2mps14_rtc_regs;
754 alarm_irq = S2MPS14_IRQ_RTCA0;
755 break;
756 case S2MPS13X:
757 regmap_cfg = &s2mps14_rtc_regmap_config;
758 info->regs = &s2mps13_rtc_regs;
759 alarm_irq = S2MPS14_IRQ_RTCA0;
760 break;
761 case S5M8763X:
762 regmap_cfg = &s5m_rtc_regmap_config;
763 info->regs = &s5m_rtc_regs;
764 alarm_irq = S5M8763_IRQ_ALARM0;
765 break;
766 case S5M8767X:
767 regmap_cfg = &s5m_rtc_regmap_config;
768 info->regs = &s5m_rtc_regs;
769 alarm_irq = S5M8767_IRQ_RTCA1;
770 break;
771 default:
772 dev_err(&pdev->dev,
773 "Device type %lu is not supported by RTC driver\n",
774 platform_get_device_id(pdev)->driver_data);
775 return -ENODEV;
776 }
777
778 info->i2c = i2c_new_dummy(s5m87xx->i2c->adapter, RTC_I2C_ADDR);
779 if (!info->i2c) {
780 dev_err(&pdev->dev, "Failed to allocate I2C for RTC\n");
781 return -ENODEV;
782 }
783
784 info->regmap = devm_regmap_init_i2c(info->i2c, regmap_cfg);
785 if (IS_ERR(info->regmap)) {
786 ret = PTR_ERR(info->regmap);
787 dev_err(&pdev->dev, "Failed to allocate RTC register map: %d\n",
788 ret);
789 goto err;
790 }
791
792 info->dev = &pdev->dev;
793 info->s5m87xx = s5m87xx;
794 info->device_type = platform_get_device_id(pdev)->driver_data;
795
796 if (s5m87xx->irq_data) {
797 info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq);
798 if (info->irq <= 0) {
799 ret = -EINVAL;
800 dev_err(&pdev->dev, "Failed to get virtual IRQ %d\n",
801 alarm_irq);
802 goto err;
803 }
804 }
805
806 platform_set_drvdata(pdev, info);
807
808 ret = s5m8767_rtc_init_reg(info);
809
810 device_init_wakeup(&pdev->dev, 1);
811
812 info->rtc_dev = devm_rtc_device_register(&pdev->dev, "s5m-rtc",
813 &s5m_rtc_ops, THIS_MODULE);
814
815 if (IS_ERR(info->rtc_dev)) {
816 ret = PTR_ERR(info->rtc_dev);
817 goto err;
818 }
819
820 if (!info->irq) {
821 dev_info(&pdev->dev, "Alarm IRQ not available\n");
822 return 0;
823 }
824
825 ret = devm_request_threaded_irq(&pdev->dev, info->irq, NULL,
826 s5m_rtc_alarm_irq, 0, "rtc-alarm0",
827 info);
828 if (ret < 0) {
829 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
830 info->irq, ret);
831 goto err;
832 }
833
834 return 0;
835
836 err:
837 i2c_unregister_device(info->i2c);
838
839 return ret;
840 }
841
842 static int s5m_rtc_remove(struct platform_device *pdev)
843 {
844 struct s5m_rtc_info *info = platform_get_drvdata(pdev);
845
846 i2c_unregister_device(info->i2c);
847
848 return 0;
849 }
850
851 #ifdef CONFIG_PM_SLEEP
852 static int s5m_rtc_resume(struct device *dev)
853 {
854 struct s5m_rtc_info *info = dev_get_drvdata(dev);
855 int ret = 0;
856
857 if (info->irq && device_may_wakeup(dev))
858 ret = disable_irq_wake(info->irq);
859
860 return ret;
861 }
862
863 static int s5m_rtc_suspend(struct device *dev)
864 {
865 struct s5m_rtc_info *info = dev_get_drvdata(dev);
866 int ret = 0;
867
868 if (info->irq && device_may_wakeup(dev))
869 ret = enable_irq_wake(info->irq);
870
871 return ret;
872 }
873 #endif /* CONFIG_PM_SLEEP */
874
875 static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops, s5m_rtc_suspend, s5m_rtc_resume);
876
877 static const struct platform_device_id s5m_rtc_id[] = {
878 { "s5m-rtc", S5M8767X },
879 { "s2mps13-rtc", S2MPS13X },
880 { "s2mps14-rtc", S2MPS14X },
881 { "s2mps15-rtc", S2MPS15X },
882 { },
883 };
884 MODULE_DEVICE_TABLE(platform, s5m_rtc_id);
885
886 static struct platform_driver s5m_rtc_driver = {
887 .driver = {
888 .name = "s5m-rtc",
889 .pm = &s5m_rtc_pm_ops,
890 },
891 .probe = s5m_rtc_probe,
892 .remove = s5m_rtc_remove,
893 .id_table = s5m_rtc_id,
894 };
895
896 module_platform_driver(s5m_rtc_driver);
897
898 /* Module information */
899 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
900 MODULE_DESCRIPTION("Samsung S5M/S2MPS14 RTC driver");
901 MODULE_LICENSE("GPL");
902 MODULE_ALIAS("platform:s5m-rtc");
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