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Linux 4.19-rc7
[linux-2.6/btrfs-unstable.git] / drivers / media / pci / cx88 / cx88-dvb.c
blob90b208747e0fde3c51eb083e9367c8d19a01be16
1 /*
2 * device driver for Conexant 2388x based TV cards
3 * MPEG Transport Stream (DVB) routines
4 *
5 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
6 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19 #include "cx88.h"
20 #include "dvb-pll.h"
21
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/device.h>
25 #include <linux/fs.h>
26 #include <linux/kthread.h>
27 #include <linux/file.h>
28 #include <linux/suspend.h>
29
30 #include <media/v4l2-common.h>
31
32 #include "mt352.h"
33 #include "mt352_priv.h"
34 #include "cx88-vp3054-i2c.h"
35 #include "zl10353.h"
36 #include "cx22702.h"
37 #include "or51132.h"
38 #include "lgdt330x.h"
39 #include "s5h1409.h"
40 #include "xc4000.h"
41 #include "xc5000.h"
42 #include "nxt200x.h"
43 #include "cx24123.h"
44 #include "isl6421.h"
45 #include "tuner-simple.h"
46 #include "tda9887.h"
47 #include "s5h1411.h"
48 #include "stv0299.h"
49 #include "z0194a.h"
50 #include "stv0288.h"
51 #include "stb6000.h"
52 #include "cx24116.h"
53 #include "stv0900.h"
54 #include "stb6100.h"
55 #include "stb6100_proc.h"
56 #include "mb86a16.h"
57 #include "ts2020.h"
58 #include "ds3000.h"
59
60 MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
61 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
62 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
63 MODULE_LICENSE("GPL");
64 MODULE_VERSION(CX88_VERSION);
65
66 static unsigned int debug;
67 module_param(debug, int, 0644);
68 MODULE_PARM_DESC(debug, "enable debug messages [dvb]");
69
70 static unsigned int dvb_buf_tscnt = 32;
71 module_param(dvb_buf_tscnt, int, 0644);
72 MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]");
73
74 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
75
76 #define dprintk(level, fmt, arg...) do { \
77 if (debug >= level) \
78 printk(KERN_DEBUG pr_fmt("%s: dvb:" fmt), \
79 __func__, ##arg); \
80 } while (0)
81
82 /* ------------------------------------------------------------------ */
83
84 static int queue_setup(struct vb2_queue *q,
85 unsigned int *num_buffers, unsigned int *num_planes,
86 unsigned int sizes[], struct device *alloc_devs[])
87 {
88 struct cx8802_dev *dev = q->drv_priv;
89
90 *num_planes = 1;
91 dev->ts_packet_size = 188 * 4;
92 dev->ts_packet_count = dvb_buf_tscnt;
93 sizes[0] = dev->ts_packet_size * dev->ts_packet_count;
94 *num_buffers = dvb_buf_tscnt;
95 return 0;
96 }
97
98 static int buffer_prepare(struct vb2_buffer *vb)
99 {
100 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
101 struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
102 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
103
104 return cx8802_buf_prepare(vb->vb2_queue, dev, buf);
105 }
106
107 static void buffer_finish(struct vb2_buffer *vb)
108 {
109 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
110 struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
111 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
112 struct cx88_riscmem *risc = &buf->risc;
113
114 if (risc->cpu)
115 pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
116 memset(risc, 0, sizeof(*risc));
117 }
118
119 static void buffer_queue(struct vb2_buffer *vb)
120 {
121 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
122 struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
123 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
124
125 cx8802_buf_queue(dev, buf);
126 }
127
128 static int start_streaming(struct vb2_queue *q, unsigned int count)
129 {
130 struct cx8802_dev *dev = q->drv_priv;
131 struct cx88_dmaqueue *dmaq = &dev->mpegq;
132 struct cx88_buffer *buf;
133
134 buf = list_entry(dmaq->active.next, struct cx88_buffer, list);
135 cx8802_start_dma(dev, dmaq, buf);
136 return 0;
137 }
138
139 static void stop_streaming(struct vb2_queue *q)
140 {
141 struct cx8802_dev *dev = q->drv_priv;
142 struct cx88_dmaqueue *dmaq = &dev->mpegq;
143 unsigned long flags;
144
145 cx8802_cancel_buffers(dev);
146
147 spin_lock_irqsave(&dev->slock, flags);
148 while (!list_empty(&dmaq->active)) {
149 struct cx88_buffer *buf = list_entry(dmaq->active.next,
150 struct cx88_buffer, list);
151
152 list_del(&buf->list);
153 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
154 }
155 spin_unlock_irqrestore(&dev->slock, flags);
156 }
157
158 static const struct vb2_ops dvb_qops = {
159 .queue_setup = queue_setup,
160 .buf_prepare = buffer_prepare,
161 .buf_finish = buffer_finish,
162 .buf_queue = buffer_queue,
163 .wait_prepare = vb2_ops_wait_prepare,
164 .wait_finish = vb2_ops_wait_finish,
165 .start_streaming = start_streaming,
166 .stop_streaming = stop_streaming,
167 };
168
169 /* ------------------------------------------------------------------ */
170
171 static int cx88_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire)
172 {
173 struct cx8802_dev *dev = fe->dvb->priv;
174 struct cx8802_driver *drv = NULL;
175 int ret = 0;
176 int fe_id;
177
178 fe_id = vb2_dvb_find_frontend(&dev->frontends, fe);
179 if (!fe_id) {
180 pr_err("%s() No frontend found\n", __func__);
181 return -EINVAL;
182 }
183
184 mutex_lock(&dev->core->lock);
185 drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
186 if (drv) {
187 if (acquire) {
188 dev->frontends.active_fe_id = fe_id;
189 ret = drv->request_acquire(drv);
190 } else {
191 ret = drv->request_release(drv);
192 dev->frontends.active_fe_id = 0;
193 }
194 }
195 mutex_unlock(&dev->core->lock);
196
197 return ret;
198 }
199
200 static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
201 {
202 struct vb2_dvb_frontends *f;
203 struct vb2_dvb_frontend *fe;
204
205 if (!core->dvbdev)
206 return;
207
208 f = &core->dvbdev->frontends;
209
210 if (!f)
211 return;
212
213 if (f->gate <= 1) /* undefined or fe0 */
214 fe = vb2_dvb_get_frontend(f, 1);
215 else
216 fe = vb2_dvb_get_frontend(f, f->gate);
217
218 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
219 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
220 }
221
222 /* ------------------------------------------------------------------ */
223
224 static int dvico_fusionhdtv_demod_init(struct dvb_frontend *fe)
225 {
226 static const u8 clock_config[] = { CLOCK_CTL, 0x38, 0x39 };
227 static const u8 reset[] = { RESET, 0x80 };
228 static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 };
229 static const u8 agc_cfg[] = { AGC_TARGET, 0x24, 0x20 };
230 static const u8 gpp_ctl_cfg[] = { GPP_CTL, 0x33 };
231 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
232
233 mt352_write(fe, clock_config, sizeof(clock_config));
234 udelay(200);
235 mt352_write(fe, reset, sizeof(reset));
236 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
237
238 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
239 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
240 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
241 return 0;
242 }
243
244 static int dvico_dual_demod_init(struct dvb_frontend *fe)
245 {
246 static const u8 clock_config[] = { CLOCK_CTL, 0x38, 0x38 };
247 static const u8 reset[] = { RESET, 0x80 };
248 static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 };
249 static const u8 agc_cfg[] = { AGC_TARGET, 0x28, 0x20 };
250 static const u8 gpp_ctl_cfg[] = { GPP_CTL, 0x33 };
251 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
252
253 mt352_write(fe, clock_config, sizeof(clock_config));
254 udelay(200);
255 mt352_write(fe, reset, sizeof(reset));
256 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
257
258 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
259 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
260 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
261
262 return 0;
263 }
264
265 static int dntv_live_dvbt_demod_init(struct dvb_frontend *fe)
266 {
267 static const u8 clock_config[] = { 0x89, 0x38, 0x39 };
268 static const u8 reset[] = { 0x50, 0x80 };
269 static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 };
270 static const u8 agc_cfg[] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
271 0x00, 0xFF, 0x00, 0x40, 0x40 };
272 static const u8 dntv_extra[] = { 0xB5, 0x7A };
273 static const u8 capt_range_cfg[] = { 0x75, 0x32 };
274
275 mt352_write(fe, clock_config, sizeof(clock_config));
276 udelay(2000);
277 mt352_write(fe, reset, sizeof(reset));
278 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
279
280 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
281 udelay(2000);
282 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
283 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
284
285 return 0;
286 }
287
288 static const struct mt352_config dvico_fusionhdtv = {
289 .demod_address = 0x0f,
290 .demod_init = dvico_fusionhdtv_demod_init,
291 };
292
293 static const struct mt352_config dntv_live_dvbt_config = {
294 .demod_address = 0x0f,
295 .demod_init = dntv_live_dvbt_demod_init,
296 };
297
298 static const struct mt352_config dvico_fusionhdtv_dual = {
299 .demod_address = 0x0f,
300 .demod_init = dvico_dual_demod_init,
301 };
302
303 static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
304 .demod_address = (0x1e >> 1),
305 .no_tuner = 1,
306 .if2 = 45600,
307 };
308
309 static const struct mb86a16_config twinhan_vp1027 = {
310 .demod_address = 0x08,
311 };
312
313 #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
314 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend *fe)
315 {
316 static const u8 clock_config[] = { 0x89, 0x38, 0x38 };
317 static const u8 reset[] = { 0x50, 0x80 };
318 static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 };
319 static const u8 agc_cfg[] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
320 0x00, 0xFF, 0x00, 0x40, 0x40 };
321 static const u8 dntv_extra[] = { 0xB5, 0x7A };
322 static const u8 capt_range_cfg[] = { 0x75, 0x32 };
323
324 mt352_write(fe, clock_config, sizeof(clock_config));
325 udelay(2000);
326 mt352_write(fe, reset, sizeof(reset));
327 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
328
329 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
330 udelay(2000);
331 mt352_write(fe, dntv_extra, sizeof(dntv_extra));
332 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
333
334 return 0;
335 }
336
337 static const struct mt352_config dntv_live_dvbt_pro_config = {
338 .demod_address = 0x0f,
339 .no_tuner = 1,
340 .demod_init = dntv_live_dvbt_pro_demod_init,
341 };
342 #endif
343
344 static const struct zl10353_config dvico_fusionhdtv_hybrid = {
345 .demod_address = 0x0f,
346 .no_tuner = 1,
347 };
348
349 static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
350 .demod_address = 0x0f,
351 .if2 = 45600,
352 .no_tuner = 1,
353 };
354
355 static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
356 .demod_address = 0x0f,
357 .if2 = 4560,
358 .no_tuner = 1,
359 .demod_init = dvico_fusionhdtv_demod_init,
360 };
361
362 static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
363 .demod_address = 0x0f,
364 };
365
366 static const struct cx22702_config connexant_refboard_config = {
367 .demod_address = 0x43,
368 .output_mode = CX22702_SERIAL_OUTPUT,
369 };
370
371 static const struct cx22702_config hauppauge_hvr_config = {
372 .demod_address = 0x63,
373 .output_mode = CX22702_SERIAL_OUTPUT,
374 };
375
376 static int or51132_set_ts_param(struct dvb_frontend *fe, int is_punctured)
377 {
378 struct cx8802_dev *dev = fe->dvb->priv;
379
380 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
381 return 0;
382 }
383
384 static const struct or51132_config pchdtv_hd3000 = {
385 .demod_address = 0x15,
386 .set_ts_params = or51132_set_ts_param,
387 };
388
389 static int lgdt330x_pll_rf_set(struct dvb_frontend *fe, int index)
390 {
391 struct cx8802_dev *dev = fe->dvb->priv;
392 struct cx88_core *core = dev->core;
393
394 dprintk(1, "%s: index = %d\n", __func__, index);
395 if (index == 0)
396 cx_clear(MO_GP0_IO, 8);
397 else
398 cx_set(MO_GP0_IO, 8);
399 return 0;
400 }
401
402 static int lgdt330x_set_ts_param(struct dvb_frontend *fe, int is_punctured)
403 {
404 struct cx8802_dev *dev = fe->dvb->priv;
405
406 if (is_punctured)
407 dev->ts_gen_cntrl |= 0x04;
408 else
409 dev->ts_gen_cntrl &= ~0x04;
410 return 0;
411 }
412
413 static struct lgdt330x_config fusionhdtv_3_gold = {
414 .demod_chip = LGDT3302,
415 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
416 .set_ts_params = lgdt330x_set_ts_param,
417 };
418
419 static const struct lgdt330x_config fusionhdtv_5_gold = {
420 .demod_chip = LGDT3303,
421 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
422 .set_ts_params = lgdt330x_set_ts_param,
423 };
424
425 static const struct lgdt330x_config pchdtv_hd5500 = {
426 .demod_chip = LGDT3303,
427 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
428 .set_ts_params = lgdt330x_set_ts_param,
429 };
430
431 static int nxt200x_set_ts_param(struct dvb_frontend *fe, int is_punctured)
432 {
433 struct cx8802_dev *dev = fe->dvb->priv;
434
435 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
436 return 0;
437 }
438
439 static const struct nxt200x_config ati_hdtvwonder = {
440 .demod_address = 0x0a,
441 .set_ts_params = nxt200x_set_ts_param,
442 };
443
444 static int cx24123_set_ts_param(struct dvb_frontend *fe,
445 int is_punctured)
446 {
447 struct cx8802_dev *dev = fe->dvb->priv;
448
449 dev->ts_gen_cntrl = 0x02;
450 return 0;
451 }
452
453 static int kworld_dvbs_100_set_voltage(struct dvb_frontend *fe,
454 enum fe_sec_voltage voltage)
455 {
456 struct cx8802_dev *dev = fe->dvb->priv;
457 struct cx88_core *core = dev->core;
458
459 if (voltage == SEC_VOLTAGE_OFF)
460 cx_write(MO_GP0_IO, 0x000006fb);
461 else
462 cx_write(MO_GP0_IO, 0x000006f9);
463
464 if (core->prev_set_voltage)
465 return core->prev_set_voltage(fe, voltage);
466 return 0;
467 }
468
469 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
470 enum fe_sec_voltage voltage)
471 {
472 struct cx8802_dev *dev = fe->dvb->priv;
473 struct cx88_core *core = dev->core;
474
475 if (voltage == SEC_VOLTAGE_OFF) {
476 dprintk(1, "LNB Voltage OFF\n");
477 cx_write(MO_GP0_IO, 0x0000efff);
478 }
479
480 if (core->prev_set_voltage)
481 return core->prev_set_voltage(fe, voltage);
482 return 0;
483 }
484
485 static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
486 enum fe_sec_voltage voltage)
487 {
488 struct cx8802_dev *dev = fe->dvb->priv;
489 struct cx88_core *core = dev->core;
490
491 cx_set(MO_GP0_IO, 0x6040);
492 switch (voltage) {
493 case SEC_VOLTAGE_13:
494 cx_clear(MO_GP0_IO, 0x20);
495 break;
496 case SEC_VOLTAGE_18:
497 cx_set(MO_GP0_IO, 0x20);
498 break;
499 case SEC_VOLTAGE_OFF:
500 cx_clear(MO_GP0_IO, 0x20);
501 break;
502 }
503
504 if (core->prev_set_voltage)
505 return core->prev_set_voltage(fe, voltage);
506 return 0;
507 }
508
509 static int vp1027_set_voltage(struct dvb_frontend *fe,
510 enum fe_sec_voltage voltage)
511 {
512 struct cx8802_dev *dev = fe->dvb->priv;
513 struct cx88_core *core = dev->core;
514
515 switch (voltage) {
516 case SEC_VOLTAGE_13:
517 dprintk(1, "LNB SEC Voltage=13\n");
518 cx_write(MO_GP0_IO, 0x00001220);
519 break;
520 case SEC_VOLTAGE_18:
521 dprintk(1, "LNB SEC Voltage=18\n");
522 cx_write(MO_GP0_IO, 0x00001222);
523 break;
524 case SEC_VOLTAGE_OFF:
525 dprintk(1, "LNB Voltage OFF\n");
526 cx_write(MO_GP0_IO, 0x00001230);
527 break;
528 }
529
530 if (core->prev_set_voltage)
531 return core->prev_set_voltage(fe, voltage);
532 return 0;
533 }
534
535 static const struct cx24123_config geniatech_dvbs_config = {
536 .demod_address = 0x55,
537 .set_ts_params = cx24123_set_ts_param,
538 };
539
540 static const struct cx24123_config hauppauge_novas_config = {
541 .demod_address = 0x55,
542 .set_ts_params = cx24123_set_ts_param,
543 };
544
545 static const struct cx24123_config kworld_dvbs_100_config = {
546 .demod_address = 0x15,
547 .set_ts_params = cx24123_set_ts_param,
548 .lnb_polarity = 1,
549 };
550
551 static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
552 .demod_address = 0x32 >> 1,
553 .output_mode = S5H1409_PARALLEL_OUTPUT,
554 .gpio = S5H1409_GPIO_ON,
555 .qam_if = 44000,
556 .inversion = S5H1409_INVERSION_OFF,
557 .status_mode = S5H1409_DEMODLOCKING,
558 .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINUOUS_NONINVERTING_CLOCK,
559 };
560
561 static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
562 .demod_address = 0x32 >> 1,
563 .output_mode = S5H1409_SERIAL_OUTPUT,
564 .gpio = S5H1409_GPIO_OFF,
565 .inversion = S5H1409_INVERSION_OFF,
566 .status_mode = S5H1409_DEMODLOCKING,
567 .mpeg_timing = S5H1409_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK,
568 };
569
570 static const struct s5h1409_config kworld_atsc_120_config = {
571 .demod_address = 0x32 >> 1,
572 .output_mode = S5H1409_SERIAL_OUTPUT,
573 .gpio = S5H1409_GPIO_OFF,
574 .inversion = S5H1409_INVERSION_OFF,
575 .status_mode = S5H1409_DEMODLOCKING,
576 .mpeg_timing = S5H1409_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK,
577 };
578
579 static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
580 .i2c_address = 0x64,
581 .if_khz = 5380,
582 };
583
584 static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
585 .demod_address = (0x1e >> 1),
586 .no_tuner = 1,
587 .if2 = 45600,
588 };
589
590 static const struct zl10353_config cx88_geniatech_x8000_mt = {
591 .demod_address = (0x1e >> 1),
592 .no_tuner = 1,
593 .disable_i2c_gate_ctrl = 1,
594 };
595
596 static const struct s5h1411_config dvico_fusionhdtv7_config = {
597 .output_mode = S5H1411_SERIAL_OUTPUT,
598 .gpio = S5H1411_GPIO_ON,
599 .mpeg_timing = S5H1411_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK,
600 .qam_if = S5H1411_IF_44000,
601 .vsb_if = S5H1411_IF_44000,
602 .inversion = S5H1411_INVERSION_OFF,
603 .status_mode = S5H1411_DEMODLOCKING
604 };
605
606 static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
607 .i2c_address = 0xc2 >> 1,
608 .if_khz = 5380,
609 };
610
611 static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
612 {
613 struct dvb_frontend *fe;
614 struct vb2_dvb_frontend *fe0 = NULL;
615 struct xc2028_ctrl ctl;
616 struct xc2028_config cfg = {
617 .i2c_adap = &dev->core->i2c_adap,
618 .i2c_addr = addr,
619 .ctrl = &ctl,
620 };
621
622 /* Get the first frontend */
623 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
624 if (!fe0)
625 return -EINVAL;
626
627 if (!fe0->dvb.frontend) {
628 pr_err("dvb frontend not attached. Can't attach xc3028\n");
629 return -EINVAL;
630 }
631
632 /*
633 * Some xc3028 devices may be hidden by an I2C gate. This is known
634 * to happen with some s5h1409-based devices.
635 * Now that I2C gate is open, sets up xc3028 configuration
636 */
637 cx88_setup_xc3028(dev->core, &ctl);
638
639 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
640 if (!fe) {
641 pr_err("xc3028 attach failed\n");
642 dvb_frontend_detach(fe0->dvb.frontend);
643 dvb_unregister_frontend(fe0->dvb.frontend);
644 fe0->dvb.frontend = NULL;
645 return -EINVAL;
646 }
647
648 pr_info("xc3028 attached\n");
649
650 return 0;
651 }
652
653 static int attach_xc4000(struct cx8802_dev *dev, struct xc4000_config *cfg)
654 {
655 struct dvb_frontend *fe;
656 struct vb2_dvb_frontend *fe0 = NULL;
657
658 /* Get the first frontend */
659 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
660 if (!fe0)
661 return -EINVAL;
662
663 if (!fe0->dvb.frontend) {
664 pr_err("dvb frontend not attached. Can't attach xc4000\n");
665 return -EINVAL;
666 }
667
668 fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, &dev->core->i2c_adap,
669 cfg);
670 if (!fe) {
671 pr_err("xc4000 attach failed\n");
672 dvb_frontend_detach(fe0->dvb.frontend);
673 dvb_unregister_frontend(fe0->dvb.frontend);
674 fe0->dvb.frontend = NULL;
675 return -EINVAL;
676 }
677
678 pr_info("xc4000 attached\n");
679
680 return 0;
681 }
682
683 static int cx24116_set_ts_param(struct dvb_frontend *fe,
684 int is_punctured)
685 {
686 struct cx8802_dev *dev = fe->dvb->priv;
687
688 dev->ts_gen_cntrl = 0x2;
689
690 return 0;
691 }
692
693 static int stv0900_set_ts_param(struct dvb_frontend *fe,
694 int is_punctured)
695 {
696 struct cx8802_dev *dev = fe->dvb->priv;
697
698 dev->ts_gen_cntrl = 0;
699
700 return 0;
701 }
702
703 static int cx24116_reset_device(struct dvb_frontend *fe)
704 {
705 struct cx8802_dev *dev = fe->dvb->priv;
706 struct cx88_core *core = dev->core;
707
708 /* Reset the part */
709 /* Put the cx24116 into reset */
710 cx_write(MO_SRST_IO, 0);
711 usleep_range(10000, 20000);
712 /* Take the cx24116 out of reset */
713 cx_write(MO_SRST_IO, 1);
714 usleep_range(10000, 20000);
715
716 return 0;
717 }
718
719 static const struct cx24116_config hauppauge_hvr4000_config = {
720 .demod_address = 0x05,
721 .set_ts_params = cx24116_set_ts_param,
722 .reset_device = cx24116_reset_device,
723 };
724
725 static const struct cx24116_config tevii_s460_config = {
726 .demod_address = 0x55,
727 .set_ts_params = cx24116_set_ts_param,
728 .reset_device = cx24116_reset_device,
729 };
730
731 static int ds3000_set_ts_param(struct dvb_frontend *fe,
732 int is_punctured)
733 {
734 struct cx8802_dev *dev = fe->dvb->priv;
735
736 dev->ts_gen_cntrl = 4;
737
738 return 0;
739 }
740
741 static struct ds3000_config tevii_ds3000_config = {
742 .demod_address = 0x68,
743 .set_ts_params = ds3000_set_ts_param,
744 };
745
746 static struct ts2020_config tevii_ts2020_config = {
747 .tuner_address = 0x60,
748 .clk_out_div = 1,
749 };
750
751 static const struct stv0900_config prof_7301_stv0900_config = {
752 .demod_address = 0x6a,
753 /* demod_mode = 0,*/
754 .xtal = 27000000,
755 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
756 .diseqc_mode = 2,/* 2/3 PWM */
757 .tun1_maddress = 0,/* 0x60 */
758 .tun1_adc = 0,/* 2 Vpp */
759 .path1_mode = 3,
760 .set_ts_params = stv0900_set_ts_param,
761 };
762
763 static const struct stb6100_config prof_7301_stb6100_config = {
764 .tuner_address = 0x60,
765 .refclock = 27000000,
766 };
767
768 static const struct stv0299_config tevii_tuner_sharp_config = {
769 .demod_address = 0x68,
770 .inittab = sharp_z0194a_inittab,
771 .mclk = 88000000UL,
772 .invert = 1,
773 .skip_reinit = 0,
774 .lock_output = 1,
775 .volt13_op0_op1 = STV0299_VOLT13_OP1,
776 .min_delay_ms = 100,
777 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
778 .set_ts_params = cx24116_set_ts_param,
779 };
780
781 static const struct stv0288_config tevii_tuner_earda_config = {
782 .demod_address = 0x68,
783 .min_delay_ms = 100,
784 .set_ts_params = cx24116_set_ts_param,
785 };
786
787 static int cx8802_alloc_frontends(struct cx8802_dev *dev)
788 {
789 struct cx88_core *core = dev->core;
790 struct vb2_dvb_frontend *fe = NULL;
791 int i;
792
793 mutex_init(&dev->frontends.lock);
794 INIT_LIST_HEAD(&dev->frontends.felist);
795
796 if (!core->board.num_frontends)
797 return -ENODEV;
798
799 pr_info("%s: allocating %d frontend(s)\n", __func__,
800 core->board.num_frontends);
801 for (i = 1; i <= core->board.num_frontends; i++) {
802 fe = vb2_dvb_alloc_frontend(&dev->frontends, i);
803 if (!fe) {
804 pr_err("%s() failed to alloc\n", __func__);
805 vb2_dvb_dealloc_frontends(&dev->frontends);
806 return -ENOMEM;
807 }
808 }
809 return 0;
810 }
811
812 static const u8 samsung_smt_7020_inittab[] = {
813 0x01, 0x15,
814 0x02, 0x00,
815 0x03, 0x00,
816 0x04, 0x7D,
817 0x05, 0x0F,
818 0x06, 0x02,
819 0x07, 0x00,
820 0x08, 0x60,
821
822 0x0A, 0xC2,
823 0x0B, 0x00,
824 0x0C, 0x01,
825 0x0D, 0x81,
826 0x0E, 0x44,
827 0x0F, 0x09,
828 0x10, 0x3C,
829 0x11, 0x84,
830 0x12, 0xDA,
831 0x13, 0x99,
832 0x14, 0x8D,
833 0x15, 0xCE,
834 0x16, 0xE8,
835 0x17, 0x43,
836 0x18, 0x1C,
837 0x19, 0x1B,
838 0x1A, 0x1D,
839
840 0x1C, 0x12,
841 0x1D, 0x00,
842 0x1E, 0x00,
843 0x1F, 0x00,
844 0x20, 0x00,
845 0x21, 0x00,
846 0x22, 0x00,
847 0x23, 0x00,
848
849 0x28, 0x02,
850 0x29, 0x28,
851 0x2A, 0x14,
852 0x2B, 0x0F,
853 0x2C, 0x09,
854 0x2D, 0x05,
855
856 0x31, 0x1F,
857 0x32, 0x19,
858 0x33, 0xFC,
859 0x34, 0x13,
860 0xff, 0xff,
861 };
862
863 static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe)
864 {
865 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
866 struct cx8802_dev *dev = fe->dvb->priv;
867 u8 buf[4];
868 u32 div;
869 struct i2c_msg msg = {
870 .addr = 0x61,
871 .flags = 0,
872 .buf = buf,
873 .len = sizeof(buf) };
874
875 div = c->frequency / 125;
876
877 buf[0] = (div >> 8) & 0x7f;
878 buf[1] = div & 0xff;
879 buf[2] = 0x84; /* 0xC4 */
880 buf[3] = 0x00;
881
882 if (c->frequency < 1500000)
883 buf[3] |= 0x10;
884
885 if (fe->ops.i2c_gate_ctrl)
886 fe->ops.i2c_gate_ctrl(fe, 1);
887
888 if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
889 return -EIO;
890
891 return 0;
892 }
893
894 static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
895 enum fe_sec_tone_mode tone)
896 {
897 struct cx8802_dev *dev = fe->dvb->priv;
898 struct cx88_core *core = dev->core;
899
900 cx_set(MO_GP0_IO, 0x0800);
901
902 switch (tone) {
903 case SEC_TONE_ON:
904 cx_set(MO_GP0_IO, 0x08);
905 break;
906 case SEC_TONE_OFF:
907 cx_clear(MO_GP0_IO, 0x08);
908 break;
909 default:
910 return -EINVAL;
911 }
912
913 return 0;
914 }
915
916 static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
917 enum fe_sec_voltage voltage)
918 {
919 struct cx8802_dev *dev = fe->dvb->priv;
920 struct cx88_core *core = dev->core;
921
922 u8 data;
923 struct i2c_msg msg = {
924 .addr = 8,
925 .flags = 0,
926 .buf = &data,
927 .len = sizeof(data) };
928
929 cx_set(MO_GP0_IO, 0x8000);
930
931 switch (voltage) {
932 case SEC_VOLTAGE_OFF:
933 break;
934 case SEC_VOLTAGE_13:
935 data = ISL6421_EN1 | ISL6421_LLC1;
936 cx_clear(MO_GP0_IO, 0x80);
937 break;
938 case SEC_VOLTAGE_18:
939 data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
940 cx_clear(MO_GP0_IO, 0x80);
941 break;
942 default:
943 return -EINVAL;
944 }
945
946 return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
947 }
948
949 static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
950 u32 srate, u32 ratio)
951 {
952 u8 aclk = 0;
953 u8 bclk = 0;
954
955 if (srate < 1500000) {
956 aclk = 0xb7;
957 bclk = 0x47;
958 } else if (srate < 3000000) {
959 aclk = 0xb7;
960 bclk = 0x4b;
961 } else if (srate < 7000000) {
962 aclk = 0xb7;
963 bclk = 0x4f;
964 } else if (srate < 14000000) {
965 aclk = 0xb7;
966 bclk = 0x53;
967 } else if (srate < 30000000) {
968 aclk = 0xb6;
969 bclk = 0x53;
970 } else if (srate < 45000000) {
971 aclk = 0xb4;
972 bclk = 0x51;
973 }
974
975 stv0299_writereg(fe, 0x13, aclk);
976 stv0299_writereg(fe, 0x14, bclk);
977 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
978 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
979 stv0299_writereg(fe, 0x21, ratio & 0xf0);
980
981 return 0;
982 }
983
984 static const struct stv0299_config samsung_stv0299_config = {
985 .demod_address = 0x68,
986 .inittab = samsung_smt_7020_inittab,
987 .mclk = 88000000UL,
988 .invert = 0,
989 .skip_reinit = 0,
990 .lock_output = STV0299_LOCKOUTPUT_LK,
991 .volt13_op0_op1 = STV0299_VOLT13_OP1,
992 .min_delay_ms = 100,
993 .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
994 };
995
996 static int dvb_register(struct cx8802_dev *dev)
997 {
998 struct cx88_core *core = dev->core;
999 struct vb2_dvb_frontend *fe0, *fe1 = NULL;
1000 int mfe_shared = 0; /* bus not shared by default */
1001 int res = -EINVAL;
1002
1003 if (core->i2c_rc != 0) {
1004 pr_err("no i2c-bus available, cannot attach dvb drivers\n");
1005 goto frontend_detach;
1006 }
1007
1008 /* Get the first frontend */
1009 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
1010 if (!fe0)
1011 goto frontend_detach;
1012
1013 /* multi-frontend gate control is undefined or defaults to fe0 */
1014 dev->frontends.gate = 0;
1015
1016 /* Sets the gate control callback to be used by i2c command calls */
1017 core->gate_ctrl = cx88_dvb_gate_ctrl;
1018
1019 /* init frontend(s) */
1020 switch (core->boardnr) {
1021 case CX88_BOARD_HAUPPAUGE_DVB_T1:
1022 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1023 &connexant_refboard_config,
1024 &core->i2c_adap);
1025 if (fe0->dvb.frontend) {
1026 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1027 0x61, &core->i2c_adap,
1028 DVB_PLL_THOMSON_DTT759X))
1029 goto frontend_detach;
1030 }
1031 break;
1032 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
1033 case CX88_BOARD_CONEXANT_DVB_T1:
1034 case CX88_BOARD_KWORLD_DVB_T_CX22702:
1035 case CX88_BOARD_WINFAST_DTV1000:
1036 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1037 &connexant_refboard_config,
1038 &core->i2c_adap);
1039 if (fe0->dvb.frontend) {
1040 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1041 0x60, &core->i2c_adap,
1042 DVB_PLL_THOMSON_DTT7579))
1043 goto frontend_detach;
1044 }
1045 break;
1046 case CX88_BOARD_WINFAST_DTV2000H:
1047 case CX88_BOARD_HAUPPAUGE_HVR1100:
1048 case CX88_BOARD_HAUPPAUGE_HVR1100LP:
1049 case CX88_BOARD_HAUPPAUGE_HVR1300:
1050 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1051 &hauppauge_hvr_config,
1052 &core->i2c_adap);
1053 if (fe0->dvb.frontend) {
1054 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1055 &core->i2c_adap, 0x61,
1056 TUNER_PHILIPS_FMD1216ME_MK3))
1057 goto frontend_detach;
1058 }
1059 break;
1060 case CX88_BOARD_WINFAST_DTV2000H_J:
1061 fe0->dvb.frontend = dvb_attach(cx22702_attach,
1062 &hauppauge_hvr_config,
1063 &core->i2c_adap);
1064 if (fe0->dvb.frontend) {
1065 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1066 &core->i2c_adap, 0x61,
1067 TUNER_PHILIPS_FMD1216MEX_MK3))
1068 goto frontend_detach;
1069 }
1070 break;
1071 case CX88_BOARD_HAUPPAUGE_HVR3000:
1072 /* MFE frontend 1 */
1073 mfe_shared = 1;
1074 dev->frontends.gate = 2;
1075 /* DVB-S init */
1076 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1077 &hauppauge_novas_config,
1078 &dev->core->i2c_adap);
1079 if (fe0->dvb.frontend) {
1080 if (!dvb_attach(isl6421_attach,
1081 fe0->dvb.frontend,
1082 &dev->core->i2c_adap,
1083 0x08, ISL6421_DCL, 0x00, false))
1084 goto frontend_detach;
1085 }
1086 /* MFE frontend 2 */
1087 fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
1088 if (!fe1)
1089 goto frontend_detach;
1090 /* DVB-T init */
1091 fe1->dvb.frontend = dvb_attach(cx22702_attach,
1092 &hauppauge_hvr_config,
1093 &dev->core->i2c_adap);
1094 if (fe1->dvb.frontend) {
1095 fe1->dvb.frontend->id = 1;
1096 if (!dvb_attach(simple_tuner_attach,
1097 fe1->dvb.frontend,
1098 &dev->core->i2c_adap,
1099 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
1100 goto frontend_detach;
1101 }
1102 break;
1103 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
1104 fe0->dvb.frontend = dvb_attach(mt352_attach,
1105 &dvico_fusionhdtv,
1106 &core->i2c_adap);
1107 if (fe0->dvb.frontend) {
1108 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1109 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
1110 goto frontend_detach;
1111 break;
1112 }
1113 /* ZL10353 replaces MT352 on later cards */
1114 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1115 &dvico_fusionhdtv_plus_v1_1,
1116 &core->i2c_adap);
1117 if (fe0->dvb.frontend) {
1118 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1119 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
1120 goto frontend_detach;
1121 }
1122 break;
1123 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
1124 /*
1125 * The tin box says DEE1601, but it seems to be DTT7579
1126 * compatible, with a slightly different MT352 AGC gain.
1127 */
1128 fe0->dvb.frontend = dvb_attach(mt352_attach,
1129 &dvico_fusionhdtv_dual,
1130 &core->i2c_adap);
1131 if (fe0->dvb.frontend) {
1132 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1133 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
1134 goto frontend_detach;
1135 break;
1136 }
1137 /* ZL10353 replaces MT352 on later cards */
1138 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1139 &dvico_fusionhdtv_plus_v1_1,
1140 &core->i2c_adap);
1141 if (fe0->dvb.frontend) {
1142 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1143 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
1144 goto frontend_detach;
1145 }
1146 break;
1147 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
1148 fe0->dvb.frontend = dvb_attach(mt352_attach,
1149 &dvico_fusionhdtv,
1150 &core->i2c_adap);
1151 if (fe0->dvb.frontend) {
1152 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1153 0x61, NULL, DVB_PLL_LG_Z201))
1154 goto frontend_detach;
1155 }
1156 break;
1157 case CX88_BOARD_KWORLD_DVB_T:
1158 case CX88_BOARD_DNTV_LIVE_DVB_T:
1159 case CX88_BOARD_ADSTECH_DVB_T_PCI:
1160 fe0->dvb.frontend = dvb_attach(mt352_attach,
1161 &dntv_live_dvbt_config,
1162 &core->i2c_adap);
1163 if (fe0->dvb.frontend) {
1164 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
1165 0x61, NULL, DVB_PLL_UNKNOWN_1))
1166 goto frontend_detach;
1167 }
1168 break;
1169 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
1170 #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
1171 /* MT352 is on a secondary I2C bus made from some GPIO lines */
1172 fe0->dvb.frontend = dvb_attach(mt352_attach,
1173 &dntv_live_dvbt_pro_config,
1174 &dev->vp3054->adap);
1175 if (fe0->dvb.frontend) {
1176 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1177 &core->i2c_adap, 0x61,
1178 TUNER_PHILIPS_FMD1216ME_MK3))
1179 goto frontend_detach;
1180 }
1181 #else
1182 pr_err("built without vp3054 support\n");
1183 #endif
1184 break;
1185 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
1186 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1187 &dvico_fusionhdtv_hybrid,
1188 &core->i2c_adap);
1189 if (fe0->dvb.frontend) {
1190 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1191 &core->i2c_adap, 0x61,
1192 TUNER_THOMSON_FE6600))
1193 goto frontend_detach;
1194 }
1195 break;
1196 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
1197 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1198 &dvico_fusionhdtv_xc3028,
1199 &core->i2c_adap);
1200 if (!fe0->dvb.frontend)
1201 fe0->dvb.frontend = dvb_attach(mt352_attach,
1202 &dvico_fusionhdtv_mt352_xc3028,
1203 &core->i2c_adap);
1204 /*
1205 * On this board, the demod provides the I2C bus pullup.
1206 * We must not permit gate_ctrl to be performed, or
1207 * the xc3028 cannot communicate on the bus.
1208 */
1209 if (fe0->dvb.frontend)
1210 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1211 if (attach_xc3028(0x61, dev) < 0)
1212 goto frontend_detach;
1213 break;
1214 case CX88_BOARD_PCHDTV_HD3000:
1215 fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
1216 &core->i2c_adap);
1217 if (fe0->dvb.frontend) {
1218 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1219 &core->i2c_adap, 0x61,
1220 TUNER_THOMSON_DTT761X))
1221 goto frontend_detach;
1222 }
1223 break;
1224 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
1225 dev->ts_gen_cntrl = 0x08;
1226
1227 /* Do a hardware reset of chip before using it. */
1228 cx_clear(MO_GP0_IO, 1);
1229 msleep(100);
1230 cx_set(MO_GP0_IO, 1);
1231 msleep(200);
1232
1233 /* Select RF connector callback */
1234 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
1235 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1236 &fusionhdtv_3_gold,
1237 0x0e,
1238 &core->i2c_adap);
1239 if (fe0->dvb.frontend) {
1240 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1241 &core->i2c_adap, 0x61,
1242 TUNER_MICROTUNE_4042FI5))
1243 goto frontend_detach;
1244 }
1245 break;
1246 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
1247 dev->ts_gen_cntrl = 0x08;
1248
1249 /* Do a hardware reset of chip before using it. */
1250 cx_clear(MO_GP0_IO, 1);
1251 msleep(100);
1252 cx_set(MO_GP0_IO, 9);
1253 msleep(200);
1254 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1255 &fusionhdtv_3_gold,
1256 0x0e,
1257 &core->i2c_adap);
1258 if (fe0->dvb.frontend) {
1259 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1260 &core->i2c_adap, 0x61,
1261 TUNER_THOMSON_DTT761X))
1262 goto frontend_detach;
1263 }
1264 break;
1265 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
1266 dev->ts_gen_cntrl = 0x08;
1267
1268 /* Do a hardware reset of chip before using it. */
1269 cx_clear(MO_GP0_IO, 1);
1270 msleep(100);
1271 cx_set(MO_GP0_IO, 1);
1272 msleep(200);
1273 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1274 &fusionhdtv_5_gold,
1275 0x0e,
1276 &core->i2c_adap);
1277 if (fe0->dvb.frontend) {
1278 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1279 &core->i2c_adap, 0x61,
1280 TUNER_LG_TDVS_H06XF))
1281 goto frontend_detach;
1282 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
1283 &core->i2c_adap, 0x43))
1284 goto frontend_detach;
1285 }
1286 break;
1287 case CX88_BOARD_PCHDTV_HD5500:
1288 dev->ts_gen_cntrl = 0x08;
1289
1290 /* Do a hardware reset of chip before using it. */
1291 cx_clear(MO_GP0_IO, 1);
1292 msleep(100);
1293 cx_set(MO_GP0_IO, 1);
1294 msleep(200);
1295 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
1296 &pchdtv_hd5500,
1297 0x59,
1298 &core->i2c_adap);
1299 if (fe0->dvb.frontend) {
1300 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1301 &core->i2c_adap, 0x61,
1302 TUNER_LG_TDVS_H06XF))
1303 goto frontend_detach;
1304 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
1305 &core->i2c_adap, 0x43))
1306 goto frontend_detach;
1307 }
1308 break;
1309 case CX88_BOARD_ATI_HDTVWONDER:
1310 fe0->dvb.frontend = dvb_attach(nxt200x_attach,
1311 &ati_hdtvwonder,
1312 &core->i2c_adap);
1313 if (fe0->dvb.frontend) {
1314 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
1315 &core->i2c_adap, 0x61,
1316 TUNER_PHILIPS_TUV1236D))
1317 goto frontend_detach;
1318 }
1319 break;
1320 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
1321 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
1322 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1323 &hauppauge_novas_config,
1324 &core->i2c_adap);
1325 if (fe0->dvb.frontend) {
1326 bool override_tone;
1327
1328 if (core->model == 92001)
1329 override_tone = true;
1330 else
1331 override_tone = false;
1332
1333 if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
1334 &core->i2c_adap, 0x08, ISL6421_DCL,
1335 0x00, override_tone))
1336 goto frontend_detach;
1337 }
1338 break;
1339 case CX88_BOARD_KWORLD_DVBS_100:
1340 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1341 &kworld_dvbs_100_config,
1342 &core->i2c_adap);
1343 if (fe0->dvb.frontend) {
1344 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1345 fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
1346 }
1347 break;
1348 case CX88_BOARD_GENIATECH_DVBS:
1349 fe0->dvb.frontend = dvb_attach(cx24123_attach,
1350 &geniatech_dvbs_config,
1351 &core->i2c_adap);
1352 if (fe0->dvb.frontend) {
1353 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1354 fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
1355 }
1356 break;
1357 case CX88_BOARD_PINNACLE_PCTV_HD_800i:
1358 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1359 &pinnacle_pctv_hd_800i_config,
1360 &core->i2c_adap);
1361 if (fe0->dvb.frontend) {
1362 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1363 &core->i2c_adap,
1364 &pinnacle_pctv_hd_800i_tuner_config))
1365 goto frontend_detach;
1366 }
1367 break;
1368 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1369 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1370 &dvico_hdtv5_pci_nano_config,
1371 &core->i2c_adap);
1372 if (fe0->dvb.frontend) {
1373 struct dvb_frontend *fe;
1374 struct xc2028_config cfg = {
1375 .i2c_adap = &core->i2c_adap,
1376 .i2c_addr = 0x61,
1377 };
1378 static struct xc2028_ctrl ctl = {
1379 .fname = XC2028_DEFAULT_FIRMWARE,
1380 .max_len = 64,
1381 .scode_table = XC3028_FE_OREN538,
1382 };
1383
1384 fe = dvb_attach(xc2028_attach,
1385 fe0->dvb.frontend, &cfg);
1386 if (fe && fe->ops.tuner_ops.set_config)
1387 fe->ops.tuner_ops.set_config(fe, &ctl);
1388 }
1389 break;
1390 case CX88_BOARD_PINNACLE_HYBRID_PCTV:
1391 case CX88_BOARD_WINFAST_DTV1800H:
1392 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1393 &cx88_pinnacle_hybrid_pctv,
1394 &core->i2c_adap);
1395 if (fe0->dvb.frontend) {
1396 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1397 if (attach_xc3028(0x61, dev) < 0)
1398 goto frontend_detach;
1399 }
1400 break;
1401 case CX88_BOARD_WINFAST_DTV1800H_XC4000:
1402 case CX88_BOARD_WINFAST_DTV2000H_PLUS:
1403 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1404 &cx88_pinnacle_hybrid_pctv,
1405 &core->i2c_adap);
1406 if (fe0->dvb.frontend) {
1407 struct xc4000_config cfg = {
1408 .i2c_address = 0x61,
1409 .default_pm = 0,
1410 .dvb_amplitude = 134,
1411 .set_smoothedcvbs = 1,
1412 .if_khz = 4560
1413 };
1414 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1415 if (attach_xc4000(dev, &cfg) < 0)
1416 goto frontend_detach;
1417 }
1418 break;
1419 case CX88_BOARD_GENIATECH_X8000_MT:
1420 dev->ts_gen_cntrl = 0x00;
1421
1422 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1423 &cx88_geniatech_x8000_mt,
1424 &core->i2c_adap);
1425 if (attach_xc3028(0x61, dev) < 0)
1426 goto frontend_detach;
1427 break;
1428 case CX88_BOARD_KWORLD_ATSC_120:
1429 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
1430 &kworld_atsc_120_config,
1431 &core->i2c_adap);
1432 if (attach_xc3028(0x61, dev) < 0)
1433 goto frontend_detach;
1434 break;
1435 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
1436 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1437 &dvico_fusionhdtv7_config,
1438 &core->i2c_adap);
1439 if (fe0->dvb.frontend) {
1440 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
1441 &core->i2c_adap,
1442 &dvico_fusionhdtv7_tuner_config))
1443 goto frontend_detach;
1444 }
1445 break;
1446 case CX88_BOARD_HAUPPAUGE_HVR4000:
1447 /* MFE frontend 1 */
1448 mfe_shared = 1;
1449 dev->frontends.gate = 2;
1450 /* DVB-S/S2 Init */
1451 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1452 &hauppauge_hvr4000_config,
1453 &dev->core->i2c_adap);
1454 if (fe0->dvb.frontend) {
1455 if (!dvb_attach(isl6421_attach,
1456 fe0->dvb.frontend,
1457 &dev->core->i2c_adap,
1458 0x08, ISL6421_DCL, 0x00, false))
1459 goto frontend_detach;
1460 }
1461 /* MFE frontend 2 */
1462 fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
1463 if (!fe1)
1464 goto frontend_detach;
1465 /* DVB-T Init */
1466 fe1->dvb.frontend = dvb_attach(cx22702_attach,
1467 &hauppauge_hvr_config,
1468 &dev->core->i2c_adap);
1469 if (fe1->dvb.frontend) {
1470 fe1->dvb.frontend->id = 1;
1471 if (!dvb_attach(simple_tuner_attach,
1472 fe1->dvb.frontend,
1473 &dev->core->i2c_adap,
1474 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
1475 goto frontend_detach;
1476 }
1477 break;
1478 case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
1479 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1480 &hauppauge_hvr4000_config,
1481 &dev->core->i2c_adap);
1482 if (fe0->dvb.frontend) {
1483 if (!dvb_attach(isl6421_attach,
1484 fe0->dvb.frontend,
1485 &dev->core->i2c_adap,
1486 0x08, ISL6421_DCL, 0x00, false))
1487 goto frontend_detach;
1488 }
1489 break;
1490 case CX88_BOARD_PROF_6200:
1491 case CX88_BOARD_TBS_8910:
1492 case CX88_BOARD_TEVII_S420:
1493 fe0->dvb.frontend = dvb_attach(stv0299_attach,
1494 &tevii_tuner_sharp_config,
1495 &core->i2c_adap);
1496 if (fe0->dvb.frontend) {
1497 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
1498 &core->i2c_adap, DVB_PLL_OPERA1))
1499 goto frontend_detach;
1500 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1501 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1502
1503 } else {
1504 fe0->dvb.frontend = dvb_attach(stv0288_attach,
1505 &tevii_tuner_earda_config,
1506 &core->i2c_adap);
1507 if (fe0->dvb.frontend) {
1508 if (!dvb_attach(stb6000_attach,
1509 fe0->dvb.frontend, 0x61,
1510 &core->i2c_adap))
1511 goto frontend_detach;
1512 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
1513 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1514 }
1515 }
1516 break;
1517 case CX88_BOARD_TEVII_S460:
1518 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1519 &tevii_s460_config,
1520 &core->i2c_adap);
1521 if (fe0->dvb.frontend)
1522 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1523 break;
1524 case CX88_BOARD_TEVII_S464:
1525 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1526 &tevii_ds3000_config,
1527 &core->i2c_adap);
1528 if (fe0->dvb.frontend) {
1529 dvb_attach(ts2020_attach, fe0->dvb.frontend,
1530 &tevii_ts2020_config, &core->i2c_adap);
1531 fe0->dvb.frontend->ops.set_voltage =
1532 tevii_dvbs_set_voltage;
1533 }
1534 break;
1535 case CX88_BOARD_OMICOM_SS4_PCI:
1536 case CX88_BOARD_TBS_8920:
1537 case CX88_BOARD_PROF_7300:
1538 case CX88_BOARD_SATTRADE_ST4200:
1539 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1540 &hauppauge_hvr4000_config,
1541 &core->i2c_adap);
1542 if (fe0->dvb.frontend)
1543 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
1544 break;
1545 case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
1546 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1547 &cx88_terratec_cinergy_ht_pci_mkii_config,
1548 &core->i2c_adap);
1549 if (fe0->dvb.frontend) {
1550 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1551 if (attach_xc3028(0x61, dev) < 0)
1552 goto frontend_detach;
1553 }
1554 break;
1555 case CX88_BOARD_PROF_7301:{
1556 struct dvb_tuner_ops *tuner_ops = NULL;
1557
1558 fe0->dvb.frontend = dvb_attach(stv0900_attach,
1559 &prof_7301_stv0900_config,
1560 &core->i2c_adap, 0);
1561 if (fe0->dvb.frontend) {
1562 if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
1563 &prof_7301_stb6100_config,
1564 &core->i2c_adap))
1565 goto frontend_detach;
1566
1567 tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
1568 tuner_ops->set_frequency = stb6100_set_freq;
1569 tuner_ops->get_frequency = stb6100_get_freq;
1570 tuner_ops->set_bandwidth = stb6100_set_bandw;
1571 tuner_ops->get_bandwidth = stb6100_get_bandw;
1572
1573 core->prev_set_voltage =
1574 fe0->dvb.frontend->ops.set_voltage;
1575 fe0->dvb.frontend->ops.set_voltage =
1576 tevii_dvbs_set_voltage;
1577 }
1578 break;
1579 }
1580 case CX88_BOARD_SAMSUNG_SMT_7020:
1581 dev->ts_gen_cntrl = 0x08;
1582
1583 cx_set(MO_GP0_IO, 0x0101);
1584
1585 cx_clear(MO_GP0_IO, 0x01);
1586 msleep(100);
1587 cx_set(MO_GP0_IO, 0x01);
1588 msleep(200);
1589
1590 fe0->dvb.frontend = dvb_attach(stv0299_attach,
1591 &samsung_stv0299_config,
1592 &dev->core->i2c_adap);
1593 if (fe0->dvb.frontend) {
1594 fe0->dvb.frontend->ops.tuner_ops.set_params =
1595 samsung_smt_7020_tuner_set_params;
1596 fe0->dvb.frontend->tuner_priv =
1597 &dev->core->i2c_adap;
1598 fe0->dvb.frontend->ops.set_voltage =
1599 samsung_smt_7020_set_voltage;
1600 fe0->dvb.frontend->ops.set_tone =
1601 samsung_smt_7020_set_tone;
1602 }
1603
1604 break;
1605 case CX88_BOARD_TWINHAN_VP1027_DVBS:
1606 dev->ts_gen_cntrl = 0x00;
1607 fe0->dvb.frontend = dvb_attach(mb86a16_attach,
1608 &twinhan_vp1027,
1609 &core->i2c_adap);
1610 if (fe0->dvb.frontend) {
1611 core->prev_set_voltage =
1612 fe0->dvb.frontend->ops.set_voltage;
1613 fe0->dvb.frontend->ops.set_voltage =
1614 vp1027_set_voltage;
1615 }
1616 break;
1617
1618 default:
1619 pr_err("The frontend of your DVB/ATSC card isn't supported yet\n");
1620 break;
1621 }
1622
1623 if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
1624 pr_err("frontend initialization failed\n");
1625 goto frontend_detach;
1626 }
1627 /* define general-purpose callback pointer */
1628 fe0->dvb.frontend->callback = cx88_tuner_callback;
1629
1630 /* Ensure all frontends negotiate bus access */
1631 fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1632 if (fe1)
1633 fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
1634
1635 /* Put the tuner in standby to keep it quiet */
1636 call_all(core, tuner, standby);
1637
1638 /* register everything */
1639 res = vb2_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
1640 &dev->pci->dev, NULL, adapter_nr,
1641 mfe_shared);
1642 if (res)
1643 goto frontend_detach;
1644 return res;
1645
1646 frontend_detach:
1647 core->gate_ctrl = NULL;
1648 vb2_dvb_dealloc_frontends(&dev->frontends);
1649 return res;
1650 }
1651
1652 /* ----------------------------------------------------------- */
1653
1654 /* CX8802 MPEG -> mini driver - We have been given the hardware */
1655 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
1656 {
1657 struct cx88_core *core = drv->core;
1658 int err = 0;
1659
1660 dprintk(1, "%s\n", __func__);
1661
1662 switch (core->boardnr) {
1663 case CX88_BOARD_HAUPPAUGE_HVR1300:
1664 /* We arrive here with either the cx23416 or the cx22702
1665 * on the bus. Take the bus from the cx23416 and enable the
1666 * cx22702 demod
1667 */
1668 /* Toggle reset on cx22702 leaving i2c active */
1669 cx_set(MO_GP0_IO, 0x00000080);
1670 udelay(1000);
1671 cx_clear(MO_GP0_IO, 0x00000080);
1672 udelay(50);
1673 cx_set(MO_GP0_IO, 0x00000080);
1674 udelay(1000);
1675 /* enable the cx22702 pins */
1676 cx_clear(MO_GP0_IO, 0x00000004);
1677 udelay(1000);
1678 break;
1679
1680 case CX88_BOARD_HAUPPAUGE_HVR3000:
1681 case CX88_BOARD_HAUPPAUGE_HVR4000:
1682 /* Toggle reset on cx22702 leaving i2c active */
1683 cx_set(MO_GP0_IO, 0x00000080);
1684 udelay(1000);
1685 cx_clear(MO_GP0_IO, 0x00000080);
1686 udelay(50);
1687 cx_set(MO_GP0_IO, 0x00000080);
1688 udelay(1000);
1689 switch (core->dvbdev->frontends.active_fe_id) {
1690 case 1: /* DVB-S/S2 Enabled */
1691 /* tri-state the cx22702 pins */
1692 cx_set(MO_GP0_IO, 0x00000004);
1693 /* Take the cx24116/cx24123 out of reset */
1694 cx_write(MO_SRST_IO, 1);
1695 core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
1696 break;
1697 case 2: /* DVB-T Enabled */
1698 /* Put the cx24116/cx24123 into reset */
1699 cx_write(MO_SRST_IO, 0);
1700 /* enable the cx22702 pins */
1701 cx_clear(MO_GP0_IO, 0x00000004);
1702 core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
1703 break;
1704 }
1705 udelay(1000);
1706 break;
1707
1708 case CX88_BOARD_WINFAST_DTV2000H_PLUS:
1709 /* set RF input to AIR for DVB-T (GPIO 16) */
1710 cx_write(MO_GP2_IO, 0x0101);
1711 break;
1712
1713 default:
1714 err = -ENODEV;
1715 }
1716 return err;
1717 }
1718
1719 /* CX8802 MPEG -> mini driver - We no longer have the hardware */
1720 static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
1721 {
1722 struct cx88_core *core = drv->core;
1723 int err = 0;
1724
1725 dprintk(1, "%s\n", __func__);
1726
1727 switch (core->boardnr) {
1728 case CX88_BOARD_HAUPPAUGE_HVR1300:
1729 /* Do Nothing, leave the cx22702 on the bus. */
1730 break;
1731 case CX88_BOARD_HAUPPAUGE_HVR3000:
1732 case CX88_BOARD_HAUPPAUGE_HVR4000:
1733 break;
1734 default:
1735 err = -ENODEV;
1736 }
1737 return err;
1738 }
1739
1740 static int cx8802_dvb_probe(struct cx8802_driver *drv)
1741 {
1742 struct cx88_core *core = drv->core;
1743 struct cx8802_dev *dev = drv->core->dvbdev;
1744 int err;
1745 struct vb2_dvb_frontend *fe;
1746 int i;
1747
1748 dprintk(1, "%s\n", __func__);
1749 dprintk(1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
1750 core->boardnr,
1751 core->name,
1752 core->pci_bus,
1753 core->pci_slot);
1754
1755 err = -ENODEV;
1756 if (!(core->board.mpeg & CX88_MPEG_DVB))
1757 goto fail_core;
1758
1759 /* If vp3054 isn't enabled, a stub will just return 0 */
1760 err = vp3054_i2c_probe(dev);
1761 if (err != 0)
1762 goto fail_core;
1763
1764 /* dvb stuff */
1765 pr_info("cx2388x based DVB/ATSC card\n");
1766 dev->ts_gen_cntrl = 0x0c;
1767
1768 err = cx8802_alloc_frontends(dev);
1769 if (err)
1770 goto fail_core;
1771
1772 for (i = 1; i <= core->board.num_frontends; i++) {
1773 struct vb2_queue *q;
1774
1775 fe = vb2_dvb_get_frontend(&core->dvbdev->frontends, i);
1776 if (!fe) {
1777 pr_err("%s() failed to get frontend(%d)\n",
1778 __func__, i);
1779 err = -ENODEV;
1780 goto fail_probe;
1781 }
1782 q = &fe->dvb.dvbq;
1783 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1784 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1785 q->gfp_flags = GFP_DMA32;
1786 q->min_buffers_needed = 2;
1787 q->drv_priv = dev;
1788 q->buf_struct_size = sizeof(struct cx88_buffer);
1789 q->ops = &dvb_qops;
1790 q->mem_ops = &vb2_dma_sg_memops;
1791 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1792 q->lock = &core->lock;
1793 q->dev = &dev->pci->dev;
1794
1795 err = vb2_queue_init(q);
1796 if (err < 0)
1797 goto fail_probe;
1798
1799 /* init struct vb2_dvb */
1800 fe->dvb.name = dev->core->name;
1801 }
1802
1803 err = dvb_register(dev);
1804 if (err)
1805 /* frontends/adapter de-allocated in dvb_register */
1806 pr_err("dvb_register failed (err = %d)\n", err);
1807 return err;
1808 fail_probe:
1809 vb2_dvb_dealloc_frontends(&core->dvbdev->frontends);
1810 fail_core:
1811 return err;
1812 }
1813
1814 static int cx8802_dvb_remove(struct cx8802_driver *drv)
1815 {
1816 struct cx88_core *core = drv->core;
1817 struct cx8802_dev *dev = drv->core->dvbdev;
1818
1819 dprintk(1, "%s\n", __func__);
1820
1821 vb2_dvb_unregister_bus(&dev->frontends);
1822
1823 vp3054_i2c_remove(dev);
1824
1825 core->gate_ctrl = NULL;
1826
1827 return 0;
1828 }
1829
1830 static struct cx8802_driver cx8802_dvb_driver = {
1831 .type_id = CX88_MPEG_DVB,
1832 .hw_access = CX8802_DRVCTL_SHARED,
1833 .probe = cx8802_dvb_probe,
1834 .remove = cx8802_dvb_remove,
1835 .advise_acquire = cx8802_dvb_advise_acquire,
1836 .advise_release = cx8802_dvb_advise_release,
1837 };
1838
1839 static int __init dvb_init(void)
1840 {
1841 pr_info("cx2388x dvb driver version %s loaded\n", CX88_VERSION);
1842 return cx8802_register_driver(&cx8802_dvb_driver);
1843 }
1844
1845 static void __exit dvb_fini(void)
1846 {
1847 cx8802_unregister_driver(&cx8802_dvb_driver);
1848 }
1849
1850 module_init(dvb_init);
1851 module_exit(dvb_fini);
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