drivers/cpufreq/s3c24xx-cpufreq.c

   1 /*
   2  * Copyright (c) 2006-2008 Simtec Electronics
   3  *      http://armlinux.simtec.co.uk/
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * S3C24XX CPU Frequency scaling
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14
  15 #include <linux/init.h>
  16 #include <linux/module.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/ioport.h>
  19 #include <linux/cpufreq.h>
  20 #include <linux/cpu.h>
  21 #include <linux/clk.h>
  22 #include <linux/err.h>
  23 #include <linux/io.h>
  24 #include <linux/device.h>
  25 #include <linux/sysfs.h>
  26 #include <linux/slab.h>
  27
  28 #include <asm/mach/arch.h>
  29 #include <asm/mach/map.h>
  30
  31 #include <plat/cpu.h>
  32 #include <plat/cpu-freq-core.h>
  33
  34 #include <mach/regs-clock.h>
  35
  36 /* note, cpufreq support deals in kHz, no Hz */
  37
  38 static struct cpufreq_driver s3c24xx_driver;
  39 static struct s3c_cpufreq_config cpu_cur;
  40 static struct s3c_iotimings s3c24xx_iotiming;
  41 static struct cpufreq_frequency_table *pll_reg;
  42 static unsigned int last_target = ~0;
  43 static unsigned int ftab_size;
  44 static struct cpufreq_frequency_table *ftab;
  45
  46 static struct clk *_clk_mpll;
  47 static struct clk *_clk_xtal;
  48 static struct clk *clk_fclk;
  49 static struct clk *clk_hclk;
  50 static struct clk *clk_pclk;
  51 static struct clk *clk_arm;
  52
  53 #ifdef CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS
  54 struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void)
  55 {
  56         return &cpu_cur;
  57 }
  58
  59 struct s3c_iotimings *s3c_cpufreq_getiotimings(void)
  60 {
  61         return &s3c24xx_iotiming;
  62 }
  63 #endif /* CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS */
  64
  65 static void s3c_cpufreq_getcur(struct s3c_cpufreq_config *cfg)
  66 {
  67         unsigned long fclk, pclk, hclk, armclk;
  68
  69         cfg->freq.fclk = fclk = clk_get_rate(clk_fclk);
  70         cfg->freq.hclk = hclk = clk_get_rate(clk_hclk);
  71         cfg->freq.pclk = pclk = clk_get_rate(clk_pclk);
  72         cfg->freq.armclk = armclk = clk_get_rate(clk_arm);
  73
  74         cfg->pll.driver_data = __raw_readl(S3C2410_MPLLCON);
  75         cfg->pll.frequency = fclk;
  76
  77         cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10);
  78
  79         cfg->divs.h_divisor = fclk / hclk;
  80         cfg->divs.p_divisor = fclk / pclk;
  81 }
  82
  83 static inline void s3c_cpufreq_calc(struct s3c_cpufreq_config *cfg)
  84 {
  85         unsigned long pll = cfg->pll.frequency;
  86
  87         cfg->freq.fclk = pll;
  88         cfg->freq.hclk = pll / cfg->divs.h_divisor;
  89         cfg->freq.pclk = pll / cfg->divs.p_divisor;
  90
  91         /* convert hclk into 10ths of nanoseconds for io calcs */
  92         cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10);
  93 }
  94
  95 static inline int closer(unsigned int target, unsigned int n, unsigned int c)
  96 {
  97         int diff_cur = abs(target - c);
  98         int diff_new = abs(target - n);
  99
 100         return (diff_new < diff_cur);
 101 }
 102
 103 static void s3c_cpufreq_show(const char *pfx,
 104                                  struct s3c_cpufreq_config *cfg)
 105 {
 106         s3c_freq_dbg("%s: Fvco=%u, F=%lu, A=%lu, H=%lu (%u), P=%lu (%u)\n",
 107                      pfx, cfg->pll.frequency, cfg->freq.fclk, cfg->freq.armclk,
 108                      cfg->freq.hclk, cfg->divs.h_divisor,
 109                      cfg->freq.pclk, cfg->divs.p_divisor);
 110 }
 111
 112 /* functions to wrapper the driver info calls to do the cpu specific work */
 113
 114 static void s3c_cpufreq_setio(struct s3c_cpufreq_config *cfg)
 115 {
 116         if (cfg->info->set_iotiming)
 117                 (cfg->info->set_iotiming)(cfg, &s3c24xx_iotiming);
 118 }
 119
 120 static int s3c_cpufreq_calcio(struct s3c_cpufreq_config *cfg)
 121 {
 122         if (cfg->info->calc_iotiming)
 123                 return (cfg->info->calc_iotiming)(cfg, &s3c24xx_iotiming);
 124
 125         return 0;
 126 }
 127
 128 static void s3c_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)
 129 {
 130         (cfg->info->set_refresh)(cfg);
 131 }
 132
 133 static void s3c_cpufreq_setdivs(struct s3c_cpufreq_config *cfg)
 134 {
 135         (cfg->info->set_divs)(cfg);
 136 }
 137
 138 static int s3c_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg)
 139 {
 140         return (cfg->info->calc_divs)(cfg);
 141 }
 142
 143 static void s3c_cpufreq_setfvco(struct s3c_cpufreq_config *cfg)
 144 {
 145         cfg->mpll = _clk_mpll;
 146         (cfg->info->set_fvco)(cfg);
 147 }
 148
 149 static inline void s3c_cpufreq_updateclk(struct clk *clk,
 150                                          unsigned int freq)
 151 {
 152         clk_set_rate(clk, freq);
 153 }
 154
 155 static int s3c_cpufreq_settarget(struct cpufreq_policy *policy,
 156                                  unsigned int target_freq,
 157                                  struct cpufreq_frequency_table *pll)
 158 {
 159         struct s3c_cpufreq_freqs freqs;
 160         struct s3c_cpufreq_config cpu_new;
 161         unsigned long flags;
 162
 163         cpu_new = cpu_cur;  /* copy new from current */
 164
 165         s3c_cpufreq_show("cur", &cpu_cur);
 166
 167         /* TODO - check for DMA currently outstanding */
 168
 169         cpu_new.pll = pll ? *pll : cpu_cur.pll;
 170
 171         if (pll)
 172                 freqs.pll_changing = 1;
 173
 174         /* update our frequencies */
 175
 176         cpu_new.freq.armclk = target_freq;
 177         cpu_new.freq.fclk = cpu_new.pll.frequency;
 178
 179         if (s3c_cpufreq_calcdivs(&cpu_new) < 0) {
 180                 pr_err("no divisors for %d\n", target_freq);
 181                 goto err_notpossible;
 182         }
 183
 184         s3c_freq_dbg("%s: got divs\n", __func__);
 185
 186         s3c_cpufreq_calc(&cpu_new);
 187
 188         s3c_freq_dbg("%s: calculated frequencies for new\n", __func__);
 189
 190         if (cpu_new.freq.hclk != cpu_cur.freq.hclk) {
 191                 if (s3c_cpufreq_calcio(&cpu_new) < 0) {
 192                         pr_err("%s: no IO timings\n", __func__);
 193                         goto err_notpossible;
 194                 }
 195         }
 196
 197         s3c_cpufreq_show("new", &cpu_new);
 198
 199         /* setup our cpufreq parameters */
 200
 201         freqs.old = cpu_cur.freq;
 202         freqs.new = cpu_new.freq;
 203
 204         freqs.freqs.old = cpu_cur.freq.armclk / 1000;
 205         freqs.freqs.new = cpu_new.freq.armclk / 1000;
 206
 207         /* update f/h/p clock settings before we issue the change
 208          * notification, so that drivers do not need to do anything
 209          * special if they want to recalculate on CPUFREQ_PRECHANGE. */
 210
 211         s3c_cpufreq_updateclk(_clk_mpll, cpu_new.pll.frequency);
 212         s3c_cpufreq_updateclk(clk_fclk, cpu_new.freq.fclk);
 213         s3c_cpufreq_updateclk(clk_hclk, cpu_new.freq.hclk);
 214         s3c_cpufreq_updateclk(clk_pclk, cpu_new.freq.pclk);
 215
 216         /* start the frequency change */
 217         cpufreq_freq_transition_begin(policy, &freqs.freqs);
 218
 219         /* If hclk is staying the same, then we do not need to
 220          * re-write the IO or the refresh timings whilst we are changing
 221          * speed. */
 222
 223         local_irq_save(flags);
 224
 225         /* is our memory clock slowing down? */
 226         if (cpu_new.freq.hclk < cpu_cur.freq.hclk) {
 227                 s3c_cpufreq_setrefresh(&cpu_new);
 228                 s3c_cpufreq_setio(&cpu_new);
 229         }
 230
 231         if (cpu_new.freq.fclk == cpu_cur.freq.fclk) {
 232                 /* not changing PLL, just set the divisors */
 233
 234                 s3c_cpufreq_setdivs(&cpu_new);
 235         } else {
 236                 if (cpu_new.freq.fclk < cpu_cur.freq.fclk) {
 237                         /* slow the cpu down, then set divisors */
 238
 239                         s3c_cpufreq_setfvco(&cpu_new);
 240                         s3c_cpufreq_setdivs(&cpu_new);
 241                 } else {
 242                         /* set the divisors, then speed up */
 243
 244                         s3c_cpufreq_setdivs(&cpu_new);
 245                         s3c_cpufreq_setfvco(&cpu_new);
 246                 }
 247         }
 248
 249         /* did our memory clock speed up */
 250         if (cpu_new.freq.hclk > cpu_cur.freq.hclk) {
 251                 s3c_cpufreq_setrefresh(&cpu_new);
 252                 s3c_cpufreq_setio(&cpu_new);
 253         }
 254
 255         /* update our current settings */
 256         cpu_cur = cpu_new;
 257
 258         local_irq_restore(flags);
 259
 260         /* notify everyone we've done this */
 261         cpufreq_freq_transition_end(policy, &freqs.freqs, 0);
 262
 263         s3c_freq_dbg("%s: finished\n", __func__);
 264         return 0;
 265
 266  err_notpossible:
 267         pr_err("no compatible settings for %d\n", target_freq);
 268         return -EINVAL;
 269 }
 270
 271 /* s3c_cpufreq_target
 272  *
 273  * called by the cpufreq core to adjust the frequency that the CPU
 274  * is currently running at.
 275  */
 276
 277 static int s3c_cpufreq_target(struct cpufreq_policy *policy,
 278                               unsigned int target_freq,
 279                               unsigned int relation)
 280 {
 281         struct cpufreq_frequency_table *pll;
 282         unsigned int index;
 283
 284         /* avoid repeated calls which cause a needless amout of duplicated
 285          * logging output (and CPU time as the calculation process is
 286          * done) */
 287         if (target_freq == last_target)
 288                 return 0;
 289
 290         last_target = target_freq;
 291
 292         s3c_freq_dbg("%s: policy %p, target %u, relation %u\n",
 293                      __func__, policy, target_freq, relation);
 294
 295         if (ftab) {
 296                 index = cpufreq_frequency_table_target(policy, target_freq,
 297                                                        relation);
 298
 299                 s3c_freq_dbg("%s: adjust %d to entry %d (%u)\n", __func__,
 300                              target_freq, index, ftab[index].frequency);
 301                 target_freq = ftab[index].frequency;
 302         }
 303
 304         target_freq *= 1000;  /* convert target to Hz */
 305
 306         /* find the settings for our new frequency */
 307
 308         if (!pll_reg || cpu_cur.lock_pll) {
 309                 /* either we've not got any PLL values, or we've locked
 310                  * to the current one. */
 311                 pll = NULL;
 312         } else {
 313                 struct cpufreq_policy tmp_policy;
 314
 315                 /* we keep the cpu pll table in Hz, to ensure we get an
 316                  * accurate value for the PLL output. */
 317
 318                 tmp_policy.min = policy->min * 1000;
 319                 tmp_policy.max = policy->max * 1000;
 320                 tmp_policy.cpu = policy->cpu;
 321                 tmp_policy.freq_table = pll_reg;
 322
 323                 /* cpufreq_frequency_table_target returns the index
 324                  * of the table entry, not the value of
 325                  * the table entry's index field. */
 326
 327                 index = cpufreq_frequency_table_target(&tmp_policy, target_freq,
 328                                                        relation);
 329                 pll = pll_reg + index;
 330
 331                 s3c_freq_dbg("%s: target %u => %u\n",
 332                              __func__, target_freq, pll->frequency);
 333
 334                 target_freq = pll->frequency;
 335         }
 336
 337         return s3c_cpufreq_settarget(policy, target_freq, pll);
 338 }
 339
 340 struct clk *s3c_cpufreq_clk_get(struct device *dev, const char *name)
 341 {
 342         struct clk *clk;
 343
 344         clk = clk_get(dev, name);
 345         if (IS_ERR(clk))
 346                 pr_err("failed to get clock '%s'\n", name);
 347
 348         return clk;
 349 }
 350
 351 static int s3c_cpufreq_init(struct cpufreq_policy *policy)
 352 {
 353         policy->clk = clk_arm;
 354         policy->cpuinfo.transition_latency = cpu_cur.info->latency;
 355         policy->freq_table = ftab;
 356
 357         return 0;
 358 }
 359
 360 static int __init s3c_cpufreq_initclks(void)
 361 {
 362         _clk_mpll = s3c_cpufreq_clk_get(NULL, "mpll");
 363         _clk_xtal = s3c_cpufreq_clk_get(NULL, "xtal");
 364         clk_fclk = s3c_cpufreq_clk_get(NULL, "fclk");
 365         clk_hclk = s3c_cpufreq_clk_get(NULL, "hclk");
 366         clk_pclk = s3c_cpufreq_clk_get(NULL, "pclk");
 367         clk_arm = s3c_cpufreq_clk_get(NULL, "armclk");
 368
 369         if (IS_ERR(clk_fclk) || IS_ERR(clk_hclk) || IS_ERR(clk_pclk) ||
 370             IS_ERR(_clk_mpll) || IS_ERR(clk_arm) || IS_ERR(_clk_xtal)) {
 371                 pr_err("%s: could not get clock(s)\n", __func__);
 372                 return -ENOENT;
 373         }
 374
 375         pr_info("%s: clocks f=%lu,h=%lu,p=%lu,a=%lu\n",
 376                 __func__,
 377                 clk_get_rate(clk_fclk) / 1000,
 378                 clk_get_rate(clk_hclk) / 1000,
 379                 clk_get_rate(clk_pclk) / 1000,
 380                 clk_get_rate(clk_arm) / 1000);
 381
 382         return 0;
 383 }
 384
 385 #ifdef CONFIG_PM
 386 static struct cpufreq_frequency_table suspend_pll;
 387 static unsigned int suspend_freq;
 388
 389 static int s3c_cpufreq_suspend(struct cpufreq_policy *policy)
 390 {
 391         suspend_pll.frequency = clk_get_rate(_clk_mpll);
 392         suspend_pll.driver_data = __raw_readl(S3C2410_MPLLCON);
 393         suspend_freq = clk_get_rate(clk_arm);
 394
 395         return 0;
 396 }
 397
 398 static int s3c_cpufreq_resume(struct cpufreq_policy *policy)
 399 {
 400         int ret;
 401
 402         s3c_freq_dbg("%s: resuming with policy %p\n", __func__, policy);
 403
 404         last_target = ~0;       /* invalidate last_target setting */
 405
 406         /* whilst we will be called later on, we try and re-set the
 407          * cpu frequencies as soon as possible so that we do not end
 408          * up resuming devices and then immediately having to re-set
 409          * a number of settings once these devices have restarted.
 410          *
 411          * as a note, it is expected devices are not used until they
 412          * have been un-suspended and at that time they should have
 413          * used the updated clock settings.
 414          */
 415
 416         ret = s3c_cpufreq_settarget(NULL, suspend_freq, &suspend_pll);
 417         if (ret) {
 418                 pr_err("%s: failed to reset pll/freq\n", __func__);
 419                 return ret;
 420         }
 421
 422         return 0;
 423 }
 424 #else
 425 #define s3c_cpufreq_resume NULL
 426 #define s3c_cpufreq_suspend NULL
 427 #endif
 428
 429 static struct cpufreq_driver s3c24xx_driver = {
 430         .flags          = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
 431         .target         = s3c_cpufreq_target,
 432         .get            = cpufreq_generic_get,
 433         .init           = s3c_cpufreq_init,
 434         .suspend        = s3c_cpufreq_suspend,
 435         .resume         = s3c_cpufreq_resume,
 436         .name           = "s3c24xx",
 437 };
 438
 439
 440 int s3c_cpufreq_register(struct s3c_cpufreq_info *info)
 441 {
 442         if (!info || !info->name) {
 443                 pr_err("%s: failed to pass valid information\n", __func__);
 444                 return -EINVAL;
 445         }
 446
 447         pr_info("S3C24XX CPU Frequency driver, %s cpu support\n",
 448                 info->name);
 449
 450         /* check our driver info has valid data */
 451
 452         BUG_ON(info->set_refresh == NULL);
 453         BUG_ON(info->set_divs == NULL);
 454         BUG_ON(info->calc_divs == NULL);
 455
 456         /* info->set_fvco is optional, depending on whether there
 457          * is a need to set the clock code. */
 458
 459         cpu_cur.info = info;
 460
 461         /* Note, driver registering should probably update locktime */
 462
 463         return 0;
 464 }
 465
 466 int __init s3c_cpufreq_setboard(struct s3c_cpufreq_board *board)
 467 {
 468         struct s3c_cpufreq_board *ours;
 469
 470         if (!board) {
 471                 pr_info("%s: no board data\n", __func__);
 472                 return -EINVAL;
 473         }
 474
 475         /* Copy the board information so that each board can make this
 476          * initdata. */
 477
 478         ours = kzalloc(sizeof(*ours), GFP_KERNEL);
 479         if (!ours)
 480                 return -ENOMEM;
 481
 482         *ours = *board;
 483         cpu_cur.board = ours;
 484
 485         return 0;
 486 }
 487
 488 static int __init s3c_cpufreq_auto_io(void)
 489 {
 490         int ret;
 491
 492         if (!cpu_cur.info->get_iotiming) {
 493                 pr_err("%s: get_iotiming undefined\n", __func__);
 494                 return -ENOENT;
 495         }
 496
 497         pr_info("%s: working out IO settings\n", __func__);
 498
 499         ret = (cpu_cur.info->get_iotiming)(&cpu_cur, &s3c24xx_iotiming);
 500         if (ret)
 501                 pr_err("%s: failed to get timings\n", __func__);
 502
 503         return ret;
 504 }
 505
 506 /* if one or is zero, then return the other, otherwise return the min */
 507 #define do_min(_a, _b) ((_a) == 0 ? (_b) : (_b) == 0 ? (_a) : min(_a, _b))
 508
 509 /**
 510  * s3c_cpufreq_freq_min - find the minimum settings for the given freq.
 511  * @dst: The destination structure
 512  * @a: One argument.
 513  * @b: The other argument.
 514  *
 515  * Create a minimum of each frequency entry in the 'struct s3c_freq',
 516  * unless the entry is zero when it is ignored and the non-zero argument
 517  * used.
 518  */
 519 static void s3c_cpufreq_freq_min(struct s3c_freq *dst,
 520                                  struct s3c_freq *a, struct s3c_freq *b)
 521 {
 522         dst->fclk = do_min(a->fclk, b->fclk);
 523         dst->hclk = do_min(a->hclk, b->hclk);
 524         dst->pclk = do_min(a->pclk, b->pclk);
 525         dst->armclk = do_min(a->armclk, b->armclk);
 526 }
 527
 528 static inline u32 calc_locktime(u32 freq, u32 time_us)
 529 {
 530         u32 result;
 531
 532         result = freq * time_us;
 533         result = DIV_ROUND_UP(result, 1000 * 1000);
 534
 535         return result;
 536 }
 537
 538 static void s3c_cpufreq_update_loctkime(void)
 539 {
 540         unsigned int bits = cpu_cur.info->locktime_bits;
 541         u32 rate = (u32)clk_get_rate(_clk_xtal);
 542         u32 val;
 543
 544         if (bits == 0) {
 545                 WARN_ON(1);
 546                 return;
 547         }
 548
 549         val = calc_locktime(rate, cpu_cur.info->locktime_u) << bits;
 550         val |= calc_locktime(rate, cpu_cur.info->locktime_m);
 551
 552         pr_info("%s: new locktime is 0x%08x\n", __func__, val);
 553         __raw_writel(val, S3C2410_LOCKTIME);
 554 }
 555
 556 static int s3c_cpufreq_build_freq(void)
 557 {
 558         int size, ret;
 559
 560         kfree(ftab);
 561
 562         size = cpu_cur.info->calc_freqtable(&cpu_cur, NULL, 0);
 563         size++;
 564
 565         ftab = kcalloc(size, sizeof(*ftab), GFP_KERNEL);
 566         if (!ftab)
 567                 return -ENOMEM;
 568
 569         ftab_size = size;
 570
 571         ret = cpu_cur.info->calc_freqtable(&cpu_cur, ftab, size);
 572         s3c_cpufreq_addfreq(ftab, ret, size, CPUFREQ_TABLE_END);
 573
 574         return 0;
 575 }
 576
 577 static int __init s3c_cpufreq_initcall(void)
 578 {
 579         int ret = 0;
 580
 581         if (cpu_cur.info && cpu_cur.board) {
 582                 ret = s3c_cpufreq_initclks();
 583                 if (ret)
 584                         goto out;
 585
 586                 /* get current settings */
 587                 s3c_cpufreq_getcur(&cpu_cur);
 588                 s3c_cpufreq_show("cur", &cpu_cur);
 589
 590                 if (cpu_cur.board->auto_io) {
 591                         ret = s3c_cpufreq_auto_io();
 592                         if (ret) {
 593                                 pr_err("%s: failed to get io timing\n",
 594                                        __func__);
 595                                 goto out;
 596                         }
 597                 }
 598
 599                 if (cpu_cur.board->need_io && !cpu_cur.info->set_iotiming) {
 600                         pr_err("%s: no IO support registered\n", __func__);
 601                         ret = -EINVAL;
 602                         goto out;
 603                 }
 604
 605                 if (!cpu_cur.info->need_pll)
 606                         cpu_cur.lock_pll = 1;
 607
 608                 s3c_cpufreq_update_loctkime();
 609
 610                 s3c_cpufreq_freq_min(&cpu_cur.max, &cpu_cur.board->max,
 611                                      &cpu_cur.info->max);
 612
 613                 if (cpu_cur.info->calc_freqtable)
 614                         s3c_cpufreq_build_freq();
 615
 616                 ret = cpufreq_register_driver(&s3c24xx_driver);
 617         }
 618
 619  out:
 620         return ret;
 621 }
 622
 623 late_initcall(s3c_cpufreq_initcall);
 624
 625 /**
 626  * s3c_plltab_register - register CPU PLL table.
 627  * @plls: The list of PLL entries.
 628  * @plls_no: The size of the PLL entries @plls.
 629  *
 630  * Register the given set of PLLs with the system.
 631  */
 632 int s3c_plltab_register(struct cpufreq_frequency_table *plls,
 633                                unsigned int plls_no)
 634 {
 635         struct cpufreq_frequency_table *vals;
 636         unsigned int size;
 637
 638         size = sizeof(*vals) * (plls_no + 1);
 639
 640         vals = kzalloc(size, GFP_KERNEL);
 641         if (vals) {
 642                 memcpy(vals, plls, size);
 643                 pll_reg = vals;
 644
 645                 /* write a terminating entry, we don't store it in the
 646                  * table that is stored in the kernel */
 647                 vals += plls_no;
 648                 vals->frequency = CPUFREQ_TABLE_END;
 649
 650                 pr_info("%d PLL entries\n", plls_no);
 651         } else
 652                 pr_err("no memory for PLL tables\n");
 653
 654         return vals ? 0 : -ENOMEM;
 655 }