arch/arm/mach-shmobile/setup-r8a7779.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * r8a7779 processor support
   4  *
   5  * Copyright (C) 2011, 2013  Renesas Solutions Corp.
   6  * Copyright (C) 2011  Magnus Damm
   7  * Copyright (C) 2013  Cogent Embedded, Inc.
   8  */
   9 #include <linux/init.h>
  10 #include <linux/irq.h>
  11 #include <linux/irqchip.h>
  12 #include <linux/irqchip/arm-gic.h>
  13
  14 #include <asm/mach/arch.h>
  15 #include <asm/mach/map.h>
  16
  17 #include "common.h"
  18 #include "r8a7779.h"
  19
  20 static struct map_desc r8a7779_io_desc[] __initdata = {
  21         /* 2M identity mapping for 0xf0000000 (MPCORE) */
  22         {
  23                 .virtual        = 0xf0000000,
  24                 .pfn            = __phys_to_pfn(0xf0000000),
  25                 .length         = SZ_2M,
  26                 .type           = MT_DEVICE_NONSHARED
  27         },
  28         /* 16M identity mapping for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
  29         {
  30                 .virtual        = 0xfe000000,
  31                 .pfn            = __phys_to_pfn(0xfe000000),
  32                 .length         = SZ_16M,
  33                 .type           = MT_DEVICE_NONSHARED
  34         },
  35 };
  36
  37 static void __init r8a7779_map_io(void)
  38 {
  39         debug_ll_io_init();
  40         iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
  41 }
  42
  43 /* IRQ */
  44 #define INT2SMSKCR0 IOMEM(0xfe7822a0)
  45 #define INT2SMSKCR1 IOMEM(0xfe7822a4)
  46 #define INT2SMSKCR2 IOMEM(0xfe7822a8)
  47 #define INT2SMSKCR3 IOMEM(0xfe7822ac)
  48 #define INT2SMSKCR4 IOMEM(0xfe7822b0)
  49
  50 #define INT2NTSR0 IOMEM(0xfe700060)
  51 #define INT2NTSR1 IOMEM(0xfe700064)
  52
  53 static void __init r8a7779_init_irq_dt(void)
  54 {
  55         irqchip_init();
  56
  57         /* route all interrupts to ARM */
  58         __raw_writel(0xffffffff, INT2NTSR0);
  59         __raw_writel(0x3fffffff, INT2NTSR1);
  60
  61         /* unmask all known interrupts in INTCS2 */
  62         __raw_writel(0xfffffff0, INT2SMSKCR0);
  63         __raw_writel(0xfff7ffff, INT2SMSKCR1);
  64         __raw_writel(0xfffbffdf, INT2SMSKCR2);
  65         __raw_writel(0xbffffffc, INT2SMSKCR3);
  66         __raw_writel(0x003fee3f, INT2SMSKCR4);
  67 }
  68
  69 static const char *const r8a7779_compat_dt[] __initconst = {
  70         "renesas,r8a7779",
  71         NULL,
  72 };
  73
  74 DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)")
  75         .smp            = smp_ops(r8a7779_smp_ops),
  76         .map_io         = r8a7779_map_io,
  77         .init_early     = shmobile_init_delay,
  78         .init_irq       = r8a7779_init_irq_dt,
  79         .init_late      = shmobile_init_late,
  80         .dt_compat      = r8a7779_compat_dt,
  81 MACHINE_END