Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/klassert/ipsec...
[linux-2.6/btrfs-unstable.git] / include / linux / mfd / stm32-lptimer.h
blob77c7cf40d9b46deec2ad802136a53eda43cde019
1 /*
2 * STM32 Low-Power Timer parent driver.
4 * Copyright (C) STMicroelectronics 2017
6 * Author: Fabrice Gasnier <fabrice.gasnier@st.com>
8 * Inspired by Benjamin Gaignard's stm32-timers driver
10 * License terms: GNU General Public License (GPL), version 2
13 #ifndef _LINUX_STM32_LPTIMER_H_
14 #define _LINUX_STM32_LPTIMER_H_
16 #include <linux/clk.h>
17 #include <linux/regmap.h>
19 #define STM32_LPTIM_ISR 0x00 /* Interrupt and Status Reg */
20 #define STM32_LPTIM_ICR 0x04 /* Interrupt Clear Reg */
21 #define STM32_LPTIM_IER 0x08 /* Interrupt Enable Reg */
22 #define STM32_LPTIM_CFGR 0x0C /* Configuration Reg */
23 #define STM32_LPTIM_CR 0x10 /* Control Reg */
24 #define STM32_LPTIM_CMP 0x14 /* Compare Reg */
25 #define STM32_LPTIM_ARR 0x18 /* Autoreload Reg */
26 #define STM32_LPTIM_CNT 0x1C /* Counter Reg */
28 /* STM32_LPTIM_ISR - bit fields */
29 #define STM32_LPTIM_CMPOK_ARROK GENMASK(4, 3)
30 #define STM32_LPTIM_ARROK BIT(4)
31 #define STM32_LPTIM_CMPOK BIT(3)
33 /* STM32_LPTIM_ICR - bit fields */
34 #define STM32_LPTIM_CMPOKCF_ARROKCF GENMASK(4, 3)
36 /* STM32_LPTIM_CR - bit fields */
37 #define STM32_LPTIM_CNTSTRT BIT(2)
38 #define STM32_LPTIM_ENABLE BIT(0)
40 /* STM32_LPTIM_CFGR - bit fields */
41 #define STM32_LPTIM_ENC BIT(24)
42 #define STM32_LPTIM_COUNTMODE BIT(23)
43 #define STM32_LPTIM_WAVPOL BIT(21)
44 #define STM32_LPTIM_PRESC GENMASK(11, 9)
45 #define STM32_LPTIM_CKPOL GENMASK(2, 1)
47 /* STM32_LPTIM_ARR */
48 #define STM32_LPTIM_MAX_ARR 0xFFFF
50 /**
51 * struct stm32_lptimer - STM32 Low-Power Timer data assigned by parent device
52 * @clk: clock reference for this instance
53 * @regmap: register map reference for this instance
54 * @has_encoder: indicates this Low-Power Timer supports encoder mode
56 struct stm32_lptimer {
57 struct clk *clk;
58 struct regmap *regmap;
59 bool has_encoder;
62 #endif