drivers/gpu/drm/gma500/intel_opregion.c

   1 /*
   2  * Copyright 2010 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * FIXME: resolve with the i915 version
  24  */
  25
  26 #include "psb_drv.h"
  27
  28 #define PCI_ASLE 0xe4
  29 #define PCI_ASLS 0xfc
  30
  31 #define OPREGION_HEADER_OFFSET 0
  32 #define OPREGION_ACPI_OFFSET   0x100
  33 #define   ACPI_CLID 0x01ac /* current lid state indicator */
  34 #define   ACPI_CDCK 0x01b0 /* current docking state indicator */
  35 #define OPREGION_SWSCI_OFFSET  0x200
  36 #define OPREGION_ASLE_OFFSET   0x300
  37 #define OPREGION_VBT_OFFSET    0x400
  38
  39 #define OPREGION_SIGNATURE "IntelGraphicsMem"
  40 #define MBOX_ACPI      (1<<0)
  41 #define MBOX_SWSCI     (1<<1)
  42 #define MBOX_ASLE      (1<<2)
  43
  44 struct opregion_header {
  45         u8 signature[16];
  46         u32 size;
  47         u32 opregion_ver;
  48         u8 bios_ver[32];
  49         u8 vbios_ver[16];
  50         u8 driver_ver[16];
  51         u32 mboxes;
  52         u8 reserved[164];
  53 } __packed;
  54
  55 /* OpRegion mailbox #1: public ACPI methods */
  56 struct opregion_acpi {
  57         u32 drdy;       /* driver readiness */
  58         u32 csts;       /* notification status */
  59         u32 cevt;       /* current event */
  60         u8 rsvd1[20];
  61         u32 didl[8];    /* supported display devices ID list */
  62         u32 cpdl[8];    /* currently presented display list */
  63         u32 cadl[8];    /* currently active display list */
  64         u32 nadl[8];    /* next active devices list */
  65         u32 aslp;       /* ASL sleep time-out */
  66         u32 tidx;       /* toggle table index */
  67         u32 chpd;       /* current hotplug enable indicator */
  68         u32 clid;       /* current lid state*/
  69         u32 cdck;       /* current docking state */
  70         u32 sxsw;       /* Sx state resume */
  71         u32 evts;       /* ASL supported events */
  72         u32 cnot;       /* current OS notification */
  73         u32 nrdy;       /* driver status */
  74         u8 rsvd2[60];
  75 } __attribute__((packed));
  76
  77 /* OpRegion mailbox #2: SWSCI */
  78 struct opregion_swsci {
  79         u32 scic;       /* SWSCI command|status|data */
  80         u32 parm;       /* command parameters */
  81         u32 dslp;       /* driver sleep time-out */
  82         u8 rsvd[244];
  83 } __attribute__((packed));
  84
  85 /* OpRegion mailbox #3: ASLE */
  86 struct opregion_asle {
  87         u32 ardy;       /* driver readiness */
  88         u32 aslc;       /* ASLE interrupt command */
  89         u32 tche;       /* technology enabled indicator */
  90         u32 alsi;       /* current ALS illuminance reading */
  91         u32 bclp;       /* backlight brightness to set */
  92         u32 pfit;       /* panel fitting state */
  93         u32 cblv;       /* current brightness level */
  94         u16 bclm[20];   /* backlight level duty cycle mapping table */
  95         u32 cpfm;       /* current panel fitting mode */
  96         u32 epfm;       /* enabled panel fitting modes */
  97         u8 plut[74];    /* panel LUT and identifier */
  98         u32 pfmb;       /* PWM freq and min brightness */
  99         u8 rsvd[102];
 100 } __attribute__((packed));
 101
 102 /* ASLE irq request bits */
 103 #define ASLE_SET_ALS_ILLUM     (1 << 0)
 104 #define ASLE_SET_BACKLIGHT     (1 << 1)
 105 #define ASLE_SET_PFIT          (1 << 2)
 106 #define ASLE_SET_PWM_FREQ      (1 << 3)
 107 #define ASLE_REQ_MSK           0xf
 108
 109 /* response bits of ASLE irq request */
 110 #define ASLE_ALS_ILLUM_FAILED   (1<<10)
 111 #define ASLE_BACKLIGHT_FAILED   (1<<12)
 112 #define ASLE_PFIT_FAILED        (1<<14)
 113 #define ASLE_PWM_FREQ_FAILED    (1<<16)
 114
 115 /* ASLE backlight brightness to set */
 116 #define ASLE_BCLP_VALID                (1<<31)
 117 #define ASLE_BCLP_MSK          (~(1<<31))
 118
 119 /* ASLE panel fitting request */
 120 #define ASLE_PFIT_VALID         (1<<31)
 121 #define ASLE_PFIT_CENTER (1<<0)
 122 #define ASLE_PFIT_STRETCH_TEXT (1<<1)
 123 #define ASLE_PFIT_STRETCH_GFX (1<<2)
 124
 125 /* PWM frequency and minimum brightness */
 126 #define ASLE_PFMB_BRIGHTNESS_MASK (0xff)
 127 #define ASLE_PFMB_BRIGHTNESS_VALID (1<<8)
 128 #define ASLE_PFMB_PWM_MASK (0x7ffffe00)
 129 #define ASLE_PFMB_PWM_VALID (1<<31)
 130
 131 #define ASLE_CBLV_VALID         (1<<31)
 132
 133 #define ACPI_OTHER_OUTPUT (0<<8)
 134 #define ACPI_VGA_OUTPUT (1<<8)
 135 #define ACPI_TV_OUTPUT (2<<8)
 136 #define ACPI_DIGITAL_OUTPUT (3<<8)
 137 #define ACPI_LVDS_OUTPUT (4<<8)
 138
 139 int gma_intel_opregion_init(struct drm_device *dev)
 140 {
 141         struct drm_psb_private *dev_priv = dev->dev_private;
 142         struct psb_intel_opregion *opregion = &dev_priv->opregion;
 143         u32 opregion_phy;
 144         void *base;
 145         u32 *lid_state;
 146
 147         dev_priv->lid_state = NULL;
 148
 149         pci_read_config_dword(dev->pdev, 0xfc, &opregion_phy);
 150         if (opregion_phy == 0)
 151                 return -ENOTSUPP;
 152
 153         base = ioremap(opregion_phy, 8*1024);
 154         if (!base)
 155                 return -ENOMEM;
 156         /* FIXME: should use _io ops - ditto on i915 */
 157         if (memcmp(base, OPREGION_SIGNATURE, 16)) {
 158                 DRM_ERROR("opregion signature mismatch\n");
 159                 iounmap(base);
 160                 return -EINVAL;
 161         }
 162
 163         lid_state = base + 0x01ac;
 164
 165         dev_priv->lid_state = lid_state;
 166         dev_priv->lid_last_state = readl(lid_state);
 167         opregion->header = base;
 168         opregion->vbt = base + OPREGION_VBT_OFFSET;
 169         return 0;
 170 }
 171
 172 int gma_intel_opregion_exit(struct drm_device *dev)
 173 {
 174         struct drm_psb_private *dev_priv = dev->dev_private;
 175         if (dev_priv->opregion.header)
 176                 iounmap(dev_priv->opregion.header);
 177         return 0;
 178 }