drivers/pinctrl/sh-pfc/gpio.c

   1 /*
   2  * SuperH Pin Function Controller GPIO driver.
   3  *
   4  * Copyright (C) 2008 Magnus Damm
   5  * Copyright (C) 2009 - 2012 Paul Mundt
   6  *
   7  * This file is subject to the terms and conditions of the GNU General Public
   8  * License.  See the file "COPYING" in the main directory of this archive
   9  * for more details.
  10  */
  11
  12 #include <linux/device.h>
  13 #include <linux/gpio.h>
  14 #include <linux/init.h>
  15 #include <linux/module.h>
  16 #include <linux/pinctrl/consumer.h>
  17 #include <linux/slab.h>
  18 #include <linux/spinlock.h>
  19
  20 #include "core.h"
  21
  22 struct sh_pfc_gpio_data_reg {
  23         const struct pinmux_data_reg *info;
  24         unsigned long shadow;
  25 };
  26
  27 struct sh_pfc_gpio_pin {
  28         u8 dbit;
  29         u8 dreg;
  30 };
  31
  32 struct sh_pfc_chip {
  33         struct sh_pfc                   *pfc;
  34         struct gpio_chip                gpio_chip;
  35
  36         struct sh_pfc_window            *mem;
  37         struct sh_pfc_gpio_data_reg     *regs;
  38         struct sh_pfc_gpio_pin          *pins;
  39 };
  40
  41 static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
  42 {
  43         return container_of(gc, struct sh_pfc_chip, gpio_chip);
  44 }
  45
  46 static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
  47 {
  48         return gpio_to_pfc_chip(gc)->pfc;
  49 }
  50
  51 static void gpio_get_data_reg(struct sh_pfc_chip *chip, unsigned int gpio,
  52                               struct sh_pfc_gpio_data_reg **reg,
  53                               unsigned int *bit)
  54 {
  55         int idx = sh_pfc_get_pin_index(chip->pfc, gpio);
  56         struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[idx];
  57
  58         *reg = &chip->regs[gpio_pin->dreg];
  59         *bit = gpio_pin->dbit;
  60 }
  61
  62 static unsigned long gpio_read_data_reg(struct sh_pfc_chip *chip,
  63                                         const struct pinmux_data_reg *dreg)
  64 {
  65         void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
  66
  67         return sh_pfc_read_raw_reg(mem, dreg->reg_width);
  68 }
  69
  70 static void gpio_write_data_reg(struct sh_pfc_chip *chip,
  71                                 const struct pinmux_data_reg *dreg,
  72                                 unsigned long value)
  73 {
  74         void __iomem *mem = dreg->reg - chip->mem->phys + chip->mem->virt;
  75
  76         sh_pfc_write_raw_reg(mem, dreg->reg_width, value);
  77 }
  78
  79 static void gpio_setup_data_reg(struct sh_pfc_chip *chip, unsigned gpio)
  80 {
  81         struct sh_pfc *pfc = chip->pfc;
  82         struct sh_pfc_gpio_pin *gpio_pin = &chip->pins[gpio];
  83         const struct sh_pfc_pin *pin = &pfc->info->pins[gpio];
  84         const struct pinmux_data_reg *dreg;
  85         unsigned int bit;
  86         unsigned int i;
  87
  88         for (i = 0, dreg = pfc->info->data_regs; dreg->reg; ++i, ++dreg) {
  89                 for (bit = 0; bit < dreg->reg_width; bit++) {
  90                         if (dreg->enum_ids[bit] == pin->enum_id) {
  91                                 gpio_pin->dreg = i;
  92                                 gpio_pin->dbit = bit;
  93                                 return;
  94                         }
  95                 }
  96         }
  97
  98         BUG();
  99 }
 100
 101 static int gpio_setup_data_regs(struct sh_pfc_chip *chip)
 102 {
 103         struct sh_pfc *pfc = chip->pfc;
 104         unsigned long addr = pfc->info->data_regs[0].reg;
 105         const struct pinmux_data_reg *dreg;
 106         unsigned int i;
 107
 108         /* Find the window that contain the GPIO registers. */
 109         for (i = 0; i < pfc->num_windows; ++i) {
 110                 struct sh_pfc_window *window = &pfc->window[i];
 111
 112                 if (addr >= window->phys && addr < window->phys + window->size)
 113                         break;
 114         }
 115
 116         if (i == pfc->num_windows)
 117                 return -EINVAL;
 118
 119         /* GPIO data registers must be in the first memory resource. */
 120         chip->mem = &pfc->window[i];
 121
 122         /* Count the number of data registers, allocate memory and initialize
 123          * them.
 124          */
 125         for (i = 0; pfc->info->data_regs[i].reg_width; ++i)
 126                 ;
 127
 128         chip->regs = devm_kzalloc(pfc->dev, i * sizeof(*chip->regs),
 129                                   GFP_KERNEL);
 130         if (chip->regs == NULL)
 131                 return -ENOMEM;
 132
 133         for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) {
 134                 chip->regs[i].info = dreg;
 135                 chip->regs[i].shadow = gpio_read_data_reg(chip, dreg);
 136         }
 137
 138         for (i = 0; i < pfc->info->nr_pins; i++) {
 139                 if (pfc->info->pins[i].enum_id == 0)
 140                         continue;
 141
 142                 gpio_setup_data_reg(chip, i);
 143         }
 144
 145         return 0;
 146 }
 147
 148 /* -----------------------------------------------------------------------------
 149  * Pin GPIOs
 150  */
 151
 152 static int gpio_pin_request(struct gpio_chip *gc, unsigned offset)
 153 {
 154         struct sh_pfc *pfc = gpio_to_pfc(gc);
 155         int idx = sh_pfc_get_pin_index(pfc, offset);
 156
 157         if (idx < 0 || pfc->info->pins[idx].enum_id == 0)
 158                 return -EINVAL;
 159
 160         return pinctrl_request_gpio(offset);
 161 }
 162
 163 static void gpio_pin_free(struct gpio_chip *gc, unsigned offset)
 164 {
 165         return pinctrl_free_gpio(offset);
 166 }
 167
 168 static void gpio_pin_set_value(struct sh_pfc_chip *chip, unsigned offset,
 169                                int value)
 170 {
 171         struct sh_pfc_gpio_data_reg *reg;
 172         unsigned long pos;
 173         unsigned int bit;
 174
 175         gpio_get_data_reg(chip, offset, &reg, &bit);
 176
 177         pos = reg->info->reg_width - (bit + 1);
 178
 179         if (value)
 180                 set_bit(pos, &reg->shadow);
 181         else
 182                 clear_bit(pos, &reg->shadow);
 183
 184         gpio_write_data_reg(chip, reg->info, reg->shadow);
 185 }
 186
 187 static int gpio_pin_direction_input(struct gpio_chip *gc, unsigned offset)
 188 {
 189         return pinctrl_gpio_direction_input(offset);
 190 }
 191
 192 static int gpio_pin_direction_output(struct gpio_chip *gc, unsigned offset,
 193                                     int value)
 194 {
 195         gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
 196
 197         return pinctrl_gpio_direction_output(offset);
 198 }
 199
 200 static int gpio_pin_get(struct gpio_chip *gc, unsigned offset)
 201 {
 202         struct sh_pfc_chip *chip = gpio_to_pfc_chip(gc);
 203         struct sh_pfc_gpio_data_reg *reg;
 204         unsigned long pos;
 205         unsigned int bit;
 206
 207         gpio_get_data_reg(chip, offset, &reg, &bit);
 208
 209         pos = reg->info->reg_width - (bit + 1);
 210
 211         return (gpio_read_data_reg(chip, reg->info) >> pos) & 1;
 212 }
 213
 214 static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value)
 215 {
 216         gpio_pin_set_value(gpio_to_pfc_chip(gc), offset, value);
 217 }
 218
 219 static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
 220 {
 221         struct sh_pfc *pfc = gpio_to_pfc(gc);
 222         int i, k;
 223
 224         for (i = 0; i < pfc->info->gpio_irq_size; i++) {
 225                 unsigned short *gpios = pfc->info->gpio_irq[i].gpios;
 226
 227                 for (k = 0; gpios[k]; k++) {
 228                         if (gpios[k] == offset)
 229                                 return pfc->info->gpio_irq[i].irq;
 230                 }
 231         }
 232
 233         return -ENOSYS;
 234 }
 235
 236 static int gpio_pin_setup(struct sh_pfc_chip *chip)
 237 {
 238         struct sh_pfc *pfc = chip->pfc;
 239         struct gpio_chip *gc = &chip->gpio_chip;
 240         int ret;
 241
 242         chip->pins = devm_kzalloc(pfc->dev, pfc->nr_pins * sizeof(*chip->pins),
 243                                   GFP_KERNEL);
 244         if (chip->pins == NULL)
 245                 return -ENOMEM;
 246
 247         ret = gpio_setup_data_regs(chip);
 248         if (ret < 0)
 249                 return ret;
 250
 251         gc->request = gpio_pin_request;
 252         gc->free = gpio_pin_free;
 253         gc->direction_input = gpio_pin_direction_input;
 254         gc->get = gpio_pin_get;
 255         gc->direction_output = gpio_pin_direction_output;
 256         gc->set = gpio_pin_set;
 257         gc->to_irq = gpio_pin_to_irq;
 258
 259         gc->label = pfc->info->name;
 260         gc->dev = pfc->dev;
 261         gc->owner = THIS_MODULE;
 262         gc->base = 0;
 263         gc->ngpio = pfc->nr_pins;
 264
 265         return 0;
 266 }
 267
 268 /* -----------------------------------------------------------------------------
 269  * Function GPIOs
 270  */
 271
 272 static int gpio_function_request(struct gpio_chip *gc, unsigned offset)
 273 {
 274         static bool __print_once;
 275         struct sh_pfc *pfc = gpio_to_pfc(gc);
 276         unsigned int mark = pfc->info->func_gpios[offset].enum_id;
 277         unsigned long flags;
 278         int ret;
 279
 280         if (!__print_once) {
 281                 dev_notice(pfc->dev,
 282                            "Use of GPIO API for function requests is deprecated."
 283                            " Convert to pinctrl\n");
 284                 __print_once = true;
 285         }
 286
 287         if (mark == 0)
 288                 return -EINVAL;
 289
 290         spin_lock_irqsave(&pfc->lock, flags);
 291         ret = sh_pfc_config_mux(pfc, mark, PINMUX_TYPE_FUNCTION);
 292         spin_unlock_irqrestore(&pfc->lock, flags);
 293
 294         return ret;
 295 }
 296
 297 static void gpio_function_free(struct gpio_chip *gc, unsigned offset)
 298 {
 299 }
 300
 301 static int gpio_function_setup(struct sh_pfc_chip *chip)
 302 {
 303         struct sh_pfc *pfc = chip->pfc;
 304         struct gpio_chip *gc = &chip->gpio_chip;
 305
 306         gc->request = gpio_function_request;
 307         gc->free = gpio_function_free;
 308
 309         gc->label = pfc->info->name;
 310         gc->owner = THIS_MODULE;
 311         gc->base = pfc->nr_pins;
 312         gc->ngpio = pfc->info->nr_func_gpios;
 313
 314         return 0;
 315 }
 316
 317 /* -----------------------------------------------------------------------------
 318  * Register/unregister
 319  */
 320
 321 static struct sh_pfc_chip *
 322 sh_pfc_add_gpiochip(struct sh_pfc *pfc, int(*setup)(struct sh_pfc_chip *))
 323 {
 324         struct sh_pfc_chip *chip;
 325         int ret;
 326
 327         chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL);
 328         if (unlikely(!chip))
 329                 return ERR_PTR(-ENOMEM);
 330
 331         chip->pfc = pfc;
 332
 333         ret = setup(chip);
 334         if (ret < 0)
 335                 return ERR_PTR(ret);
 336
 337         ret = gpiochip_add(&chip->gpio_chip);
 338         if (unlikely(ret < 0))
 339                 return ERR_PTR(ret);
 340
 341         dev_info(pfc->dev, "%s handling gpio %u -> %u\n",
 342                  chip->gpio_chip.label, chip->gpio_chip.base,
 343                  chip->gpio_chip.base + chip->gpio_chip.ngpio - 1);
 344
 345         return chip;
 346 }
 347
 348 int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
 349 {
 350         const struct pinmux_range *ranges;
 351         struct pinmux_range def_range;
 352         struct sh_pfc_chip *chip;
 353         unsigned int nr_ranges;
 354         unsigned int i;
 355         int ret;
 356
 357         /* Register the real GPIOs chip. */
 358         chip = sh_pfc_add_gpiochip(pfc, gpio_pin_setup);
 359         if (IS_ERR(chip))
 360                 return PTR_ERR(chip);
 361
 362         pfc->gpio = chip;
 363
 364         /* Register the GPIO to pin mappings. */
 365         if (pfc->info->ranges == NULL) {
 366                 def_range.begin = 0;
 367                 def_range.end = pfc->info->nr_pins - 1;
 368                 ranges = &def_range;
 369                 nr_ranges = 1;
 370         } else {
 371                 ranges = pfc->info->ranges;
 372                 nr_ranges = pfc->info->nr_ranges;
 373         }
 374
 375         for (i = 0; i < nr_ranges; ++i) {
 376                 const struct pinmux_range *range = &ranges[i];
 377
 378                 ret = gpiochip_add_pin_range(&chip->gpio_chip,
 379                                              dev_name(pfc->dev),
 380                                              range->begin, range->begin,
 381                                              range->end - range->begin + 1);
 382                 if (ret < 0)
 383                         return ret;
 384         }
 385
 386         /* Register the function GPIOs chip. */
 387         chip = sh_pfc_add_gpiochip(pfc, gpio_function_setup);
 388         if (IS_ERR(chip))
 389                 return PTR_ERR(chip);
 390
 391         pfc->func = chip;
 392
 393         return 0;
 394 }
 395
 396 int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc)
 397 {
 398         int err;
 399         int ret;
 400
 401         ret = gpiochip_remove(&pfc->gpio->gpio_chip);
 402         err = gpiochip_remove(&pfc->func->gpio_chip);
 403
 404         return ret < 0 ? ret : err;
 405 }