?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
V4L/DVB (13975): [STV090x] Added internal structure with shared settings and data.
[linux-2.6/btrfs-unstable.git] / drivers / media / dvb / frontends / stv090x.c
blob9a817a69ed30f125d231b276606bb9dc642470a1
1 /*
2 STV0900/0903 Multistandard Broadcast Frontend driver
3 Copyright (C) Manu Abraham <abraham.manu@gmail.com>
4
5 Copyright (C) ST Microelectronics
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/init.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/string.h>
26 #include <linux/mutex.h>
27
28 #include <linux/dvb/frontend.h>
29 #include "dvb_frontend.h"
30
31 #include "stv6110x.h" /* for demodulator internal modes */
32
33 #include "stv090x_reg.h"
34 #include "stv090x.h"
35 #include "stv090x_priv.h"
36
37 static unsigned int verbose;
38 module_param(verbose, int, 0644);
39
40 /* internal params node */
41 struct stv090x_dev {
42 /* pointer for internal params, one for each pair of demods */
43 struct stv090x_internal *internal;
44 struct stv090x_dev *next_dev;
45 };
46
47 /* first internal params */
48 static struct stv090x_dev *stv090x_first_dev;
49
50 /* find chip by i2c adapter and i2c address */
51 static struct stv090x_dev *find_dev(struct i2c_adapter *i2c_adap,
52 u8 i2c_addr)
53 {
54 struct stv090x_dev *temp_dev = stv090x_first_dev;
55
56 /*
57 Search of the last stv0900 chip or
58 find it by i2c adapter and i2c address */
59 while ((temp_dev != NULL) &&
60 ((temp_dev->internal->i2c_adap != i2c_adap) ||
61 (temp_dev->internal->i2c_addr != i2c_addr))) {
62
63 temp_dev = temp_dev->next_dev;
64 }
65
66 return temp_dev;
67 }
68
69 /* deallocating chip */
70 static void remove_dev(struct stv090x_internal *internal)
71 {
72 struct stv090x_dev *prev_dev = stv090x_first_dev;
73 struct stv090x_dev *del_dev = find_dev(internal->i2c_adap,
74 internal->i2c_addr);
75
76 if (del_dev != NULL) {
77 if (del_dev == stv090x_first_dev) {
78 stv090x_first_dev = del_dev->next_dev;
79 } else {
80 while (prev_dev->next_dev != del_dev)
81 prev_dev = prev_dev->next_dev;
82
83 prev_dev->next_dev = del_dev->next_dev;
84 }
85
86 kfree(del_dev);
87 }
88 }
89
90 /* allocating new chip */
91 static struct stv090x_dev *append_internal(struct stv090x_internal *internal)
92 {
93 struct stv090x_dev *new_dev;
94 struct stv090x_dev *temp_dev;
95
96 new_dev = kmalloc(sizeof(struct stv090x_dev), GFP_KERNEL);
97 if (new_dev != NULL) {
98 new_dev->internal = internal;
99 new_dev->next_dev = NULL;
100
101 /* append to list */
102 if (stv090x_first_dev == NULL) {
103 stv090x_first_dev = new_dev;
104 } else {
105 temp_dev = stv090x_first_dev;
106 while (temp_dev->next_dev != NULL)
107 temp_dev = temp_dev->next_dev;
108
109 temp_dev->next_dev = new_dev;
110 }
111 }
112
113 return new_dev;
114 }
115
116
117 /* DVBS1 and DSS C/N Lookup table */
118 static const struct stv090x_tab stv090x_s1cn_tab[] = {
119 { 0, 8917 }, /* 0.0dB */
120 { 5, 8801 }, /* 0.5dB */
121 { 10, 8667 }, /* 1.0dB */
122 { 15, 8522 }, /* 1.5dB */
123 { 20, 8355 }, /* 2.0dB */
124 { 25, 8175 }, /* 2.5dB */
125 { 30, 7979 }, /* 3.0dB */
126 { 35, 7763 }, /* 3.5dB */
127 { 40, 7530 }, /* 4.0dB */
128 { 45, 7282 }, /* 4.5dB */
129 { 50, 7026 }, /* 5.0dB */
130 { 55, 6781 }, /* 5.5dB */
131 { 60, 6514 }, /* 6.0dB */
132 { 65, 6241 }, /* 6.5dB */
133 { 70, 5965 }, /* 7.0dB */
134 { 75, 5690 }, /* 7.5dB */
135 { 80, 5424 }, /* 8.0dB */
136 { 85, 5161 }, /* 8.5dB */
137 { 90, 4902 }, /* 9.0dB */
138 { 95, 4654 }, /* 9.5dB */
139 { 100, 4417 }, /* 10.0dB */
140 { 105, 4186 }, /* 10.5dB */
141 { 110, 3968 }, /* 11.0dB */
142 { 115, 3757 }, /* 11.5dB */
143 { 120, 3558 }, /* 12.0dB */
144 { 125, 3366 }, /* 12.5dB */
145 { 130, 3185 }, /* 13.0dB */
146 { 135, 3012 }, /* 13.5dB */
147 { 140, 2850 }, /* 14.0dB */
148 { 145, 2698 }, /* 14.5dB */
149 { 150, 2550 }, /* 15.0dB */
150 { 160, 2283 }, /* 16.0dB */
151 { 170, 2042 }, /* 17.0dB */
152 { 180, 1827 }, /* 18.0dB */
153 { 190, 1636 }, /* 19.0dB */
154 { 200, 1466 }, /* 20.0dB */
155 { 210, 1315 }, /* 21.0dB */
156 { 220, 1181 }, /* 22.0dB */
157 { 230, 1064 }, /* 23.0dB */
158 { 240, 960 }, /* 24.0dB */
159 { 250, 869 }, /* 25.0dB */
160 { 260, 792 }, /* 26.0dB */
161 { 270, 724 }, /* 27.0dB */
162 { 280, 665 }, /* 28.0dB */
163 { 290, 616 }, /* 29.0dB */
164 { 300, 573 }, /* 30.0dB */
165 { 310, 537 }, /* 31.0dB */
166 { 320, 507 }, /* 32.0dB */
167 { 330, 483 }, /* 33.0dB */
168 { 400, 398 }, /* 40.0dB */
169 { 450, 381 }, /* 45.0dB */
170 { 500, 377 } /* 50.0dB */
171 };
172
173 /* DVBS2 C/N Lookup table */
174 static const struct stv090x_tab stv090x_s2cn_tab[] = {
175 { -30, 13348 }, /* -3.0dB */
176 { -20, 12640 }, /* -2d.0B */
177 { -10, 11883 }, /* -1.0dB */
178 { 0, 11101 }, /* -0.0dB */
179 { 5, 10718 }, /* 0.5dB */
180 { 10, 10339 }, /* 1.0dB */
181 { 15, 9947 }, /* 1.5dB */
182 { 20, 9552 }, /* 2.0dB */
183 { 25, 9183 }, /* 2.5dB */
184 { 30, 8799 }, /* 3.0dB */
185 { 35, 8422 }, /* 3.5dB */
186 { 40, 8062 }, /* 4.0dB */
187 { 45, 7707 }, /* 4.5dB */
188 { 50, 7353 }, /* 5.0dB */
189 { 55, 7025 }, /* 5.5dB */
190 { 60, 6684 }, /* 6.0dB */
191 { 65, 6331 }, /* 6.5dB */
192 { 70, 6036 }, /* 7.0dB */
193 { 75, 5727 }, /* 7.5dB */
194 { 80, 5437 }, /* 8.0dB */
195 { 85, 5164 }, /* 8.5dB */
196 { 90, 4902 }, /* 9.0dB */
197 { 95, 4653 }, /* 9.5dB */
198 { 100, 4408 }, /* 10.0dB */
199 { 105, 4187 }, /* 10.5dB */
200 { 110, 3961 }, /* 11.0dB */
201 { 115, 3751 }, /* 11.5dB */
202 { 120, 3558 }, /* 12.0dB */
203 { 125, 3368 }, /* 12.5dB */
204 { 130, 3191 }, /* 13.0dB */
205 { 135, 3017 }, /* 13.5dB */
206 { 140, 2862 }, /* 14.0dB */
207 { 145, 2710 }, /* 14.5dB */
208 { 150, 2565 }, /* 15.0dB */
209 { 160, 2300 }, /* 16.0dB */
210 { 170, 2058 }, /* 17.0dB */
211 { 180, 1849 }, /* 18.0dB */
212 { 190, 1663 }, /* 19.0dB */
213 { 200, 1495 }, /* 20.0dB */
214 { 210, 1349 }, /* 21.0dB */
215 { 220, 1222 }, /* 22.0dB */
216 { 230, 1110 }, /* 23.0dB */
217 { 240, 1011 }, /* 24.0dB */
218 { 250, 925 }, /* 25.0dB */
219 { 260, 853 }, /* 26.0dB */
220 { 270, 789 }, /* 27.0dB */
221 { 280, 734 }, /* 28.0dB */
222 { 290, 690 }, /* 29.0dB */
223 { 300, 650 }, /* 30.0dB */
224 { 310, 619 }, /* 31.0dB */
225 { 320, 593 }, /* 32.0dB */
226 { 330, 571 }, /* 33.0dB */
227 { 400, 498 }, /* 40.0dB */
228 { 450, 484 }, /* 45.0dB */
229 { 500, 481 } /* 50.0dB */
230 };
231
232 /* RF level C/N lookup table */
233 static const struct stv090x_tab stv090x_rf_tab[] = {
234 { -5, 0xcaa1 }, /* -5dBm */
235 { -10, 0xc229 }, /* -10dBm */
236 { -15, 0xbb08 }, /* -15dBm */
237 { -20, 0xb4bc }, /* -20dBm */
238 { -25, 0xad5a }, /* -25dBm */
239 { -30, 0xa298 }, /* -30dBm */
240 { -35, 0x98a8 }, /* -35dBm */
241 { -40, 0x8389 }, /* -40dBm */
242 { -45, 0x59be }, /* -45dBm */
243 { -50, 0x3a14 }, /* -50dBm */
244 { -55, 0x2d11 }, /* -55dBm */
245 { -60, 0x210d }, /* -60dBm */
246 { -65, 0xa14f }, /* -65dBm */
247 { -70, 0x07aa } /* -70dBm */
248 };
249
250
251 static struct stv090x_reg stv0900_initval[] = {
252
253 { STV090x_OUTCFG, 0x00 },
254 { STV090x_MODECFG, 0xff },
255 { STV090x_AGCRF1CFG, 0x11 },
256 { STV090x_AGCRF2CFG, 0x13 },
257 { STV090x_TSGENERAL1X, 0x14 },
258 { STV090x_TSTTNR2, 0x21 },
259 { STV090x_TSTTNR4, 0x21 },
260 { STV090x_P2_DISTXCTL, 0x22 },
261 { STV090x_P2_F22TX, 0xc0 },
262 { STV090x_P2_F22RX, 0xc0 },
263 { STV090x_P2_DISRXCTL, 0x00 },
264 { STV090x_P2_DMDCFGMD, 0xF9 },
265 { STV090x_P2_DEMOD, 0x08 },
266 { STV090x_P2_DMDCFG3, 0xc4 },
267 { STV090x_P2_CARFREQ, 0xed },
268 { STV090x_P2_LDT, 0xd0 },
269 { STV090x_P2_LDT2, 0xb8 },
270 { STV090x_P2_TMGCFG, 0xd2 },
271 { STV090x_P2_TMGTHRISE, 0x20 },
272 { STV090x_P1_TMGCFG, 0xd2 },
273
274 { STV090x_P2_TMGTHFALL, 0x00 },
275 { STV090x_P2_FECSPY, 0x88 },
276 { STV090x_P2_FSPYDATA, 0x3a },
277 { STV090x_P2_FBERCPT4, 0x00 },
278 { STV090x_P2_FSPYBER, 0x10 },
279 { STV090x_P2_ERRCTRL1, 0x35 },
280 { STV090x_P2_ERRCTRL2, 0xc1 },
281 { STV090x_P2_CFRICFG, 0xf8 },
282 { STV090x_P2_NOSCFG, 0x1c },
283 { STV090x_P2_DMDTOM, 0x20 },
284 { STV090x_P2_CORRELMANT, 0x70 },
285 { STV090x_P2_CORRELABS, 0x88 },
286 { STV090x_P2_AGC2O, 0x5b },
287 { STV090x_P2_AGC2REF, 0x38 },
288 { STV090x_P2_CARCFG, 0xe4 },
289 { STV090x_P2_ACLC, 0x1A },
290 { STV090x_P2_BCLC, 0x09 },
291 { STV090x_P2_CARHDR, 0x08 },
292 { STV090x_P2_KREFTMG, 0xc1 },
293 { STV090x_P2_SFRUPRATIO, 0xf0 },
294 { STV090x_P2_SFRLOWRATIO, 0x70 },
295 { STV090x_P2_SFRSTEP, 0x58 },
296 { STV090x_P2_TMGCFG2, 0x01 },
297 { STV090x_P2_CAR2CFG, 0x26 },
298 { STV090x_P2_BCLC2S2Q, 0x86 },
299 { STV090x_P2_BCLC2S28, 0x86 },
300 { STV090x_P2_SMAPCOEF7, 0x77 },
301 { STV090x_P2_SMAPCOEF6, 0x85 },
302 { STV090x_P2_SMAPCOEF5, 0x77 },
303 { STV090x_P2_TSCFGL, 0x20 },
304 { STV090x_P2_DMDCFG2, 0x3b },
305 { STV090x_P2_MODCODLST0, 0xff },
306 { STV090x_P2_MODCODLST1, 0xff },
307 { STV090x_P2_MODCODLST2, 0xff },
308 { STV090x_P2_MODCODLST3, 0xff },
309 { STV090x_P2_MODCODLST4, 0xff },
310 { STV090x_P2_MODCODLST5, 0xff },
311 { STV090x_P2_MODCODLST6, 0xff },
312 { STV090x_P2_MODCODLST7, 0xcc },
313 { STV090x_P2_MODCODLST8, 0xcc },
314 { STV090x_P2_MODCODLST9, 0xcc },
315 { STV090x_P2_MODCODLSTA, 0xcc },
316 { STV090x_P2_MODCODLSTB, 0xcc },
317 { STV090x_P2_MODCODLSTC, 0xcc },
318 { STV090x_P2_MODCODLSTD, 0xcc },
319 { STV090x_P2_MODCODLSTE, 0xcc },
320 { STV090x_P2_MODCODLSTF, 0xcf },
321 { STV090x_P1_DISTXCTL, 0x22 },
322 { STV090x_P1_F22TX, 0xc0 },
323 { STV090x_P1_F22RX, 0xc0 },
324 { STV090x_P1_DISRXCTL, 0x00 },
325 { STV090x_P1_DMDCFGMD, 0xf9 },
326 { STV090x_P1_DEMOD, 0x08 },
327 { STV090x_P1_DMDCFG3, 0xc4 },
328 { STV090x_P1_DMDTOM, 0x20 },
329 { STV090x_P1_CARFREQ, 0xed },
330 { STV090x_P1_LDT, 0xd0 },
331 { STV090x_P1_LDT2, 0xb8 },
332 { STV090x_P1_TMGCFG, 0xd2 },
333 { STV090x_P1_TMGTHRISE, 0x20 },
334 { STV090x_P1_TMGTHFALL, 0x00 },
335 { STV090x_P1_SFRUPRATIO, 0xf0 },
336 { STV090x_P1_SFRLOWRATIO, 0x70 },
337 { STV090x_P1_TSCFGL, 0x20 },
338 { STV090x_P1_FECSPY, 0x88 },
339 { STV090x_P1_FSPYDATA, 0x3a },
340 { STV090x_P1_FBERCPT4, 0x00 },
341 { STV090x_P1_FSPYBER, 0x10 },
342 { STV090x_P1_ERRCTRL1, 0x35 },
343 { STV090x_P1_ERRCTRL2, 0xc1 },
344 { STV090x_P1_CFRICFG, 0xf8 },
345 { STV090x_P1_NOSCFG, 0x1c },
346 { STV090x_P1_CORRELMANT, 0x70 },
347 { STV090x_P1_CORRELABS, 0x88 },
348 { STV090x_P1_AGC2O, 0x5b },
349 { STV090x_P1_AGC2REF, 0x38 },
350 { STV090x_P1_CARCFG, 0xe4 },
351 { STV090x_P1_ACLC, 0x1A },
352 { STV090x_P1_BCLC, 0x09 },
353 { STV090x_P1_CARHDR, 0x08 },
354 { STV090x_P1_KREFTMG, 0xc1 },
355 { STV090x_P1_SFRSTEP, 0x58 },
356 { STV090x_P1_TMGCFG2, 0x01 },
357 { STV090x_P1_CAR2CFG, 0x26 },
358 { STV090x_P1_BCLC2S2Q, 0x86 },
359 { STV090x_P1_BCLC2S28, 0x86 },
360 { STV090x_P1_SMAPCOEF7, 0x77 },
361 { STV090x_P1_SMAPCOEF6, 0x85 },
362 { STV090x_P1_SMAPCOEF5, 0x77 },
363 { STV090x_P1_DMDCFG2, 0x3b },
364 { STV090x_P1_MODCODLST0, 0xff },
365 { STV090x_P1_MODCODLST1, 0xff },
366 { STV090x_P1_MODCODLST2, 0xff },
367 { STV090x_P1_MODCODLST3, 0xff },
368 { STV090x_P1_MODCODLST4, 0xff },
369 { STV090x_P1_MODCODLST5, 0xff },
370 { STV090x_P1_MODCODLST6, 0xff },
371 { STV090x_P1_MODCODLST7, 0xcc },
372 { STV090x_P1_MODCODLST8, 0xcc },
373 { STV090x_P1_MODCODLST9, 0xcc },
374 { STV090x_P1_MODCODLSTA, 0xcc },
375 { STV090x_P1_MODCODLSTB, 0xcc },
376 { STV090x_P1_MODCODLSTC, 0xcc },
377 { STV090x_P1_MODCODLSTD, 0xcc },
378 { STV090x_P1_MODCODLSTE, 0xcc },
379 { STV090x_P1_MODCODLSTF, 0xcf },
380 { STV090x_GENCFG, 0x1d },
381 { STV090x_NBITER_NF4, 0x37 },
382 { STV090x_NBITER_NF5, 0x29 },
383 { STV090x_NBITER_NF6, 0x37 },
384 { STV090x_NBITER_NF7, 0x33 },
385 { STV090x_NBITER_NF8, 0x31 },
386 { STV090x_NBITER_NF9, 0x2f },
387 { STV090x_NBITER_NF10, 0x39 },
388 { STV090x_NBITER_NF11, 0x3a },
389 { STV090x_NBITER_NF12, 0x29 },
390 { STV090x_NBITER_NF13, 0x37 },
391 { STV090x_NBITER_NF14, 0x33 },
392 { STV090x_NBITER_NF15, 0x2f },
393 { STV090x_NBITER_NF16, 0x39 },
394 { STV090x_NBITER_NF17, 0x3a },
395 { STV090x_NBITERNOERR, 0x04 },
396 { STV090x_GAINLLR_NF4, 0x0C },
397 { STV090x_GAINLLR_NF5, 0x0F },
398 { STV090x_GAINLLR_NF6, 0x11 },
399 { STV090x_GAINLLR_NF7, 0x14 },
400 { STV090x_GAINLLR_NF8, 0x17 },
401 { STV090x_GAINLLR_NF9, 0x19 },
402 { STV090x_GAINLLR_NF10, 0x20 },
403 { STV090x_GAINLLR_NF11, 0x21 },
404 { STV090x_GAINLLR_NF12, 0x0D },
405 { STV090x_GAINLLR_NF13, 0x0F },
406 { STV090x_GAINLLR_NF14, 0x13 },
407 { STV090x_GAINLLR_NF15, 0x1A },
408 { STV090x_GAINLLR_NF16, 0x1F },
409 { STV090x_GAINLLR_NF17, 0x21 },
410 { STV090x_RCCFGH, 0x20 },
411 { STV090x_P1_FECM, 0x01 }, /* disable DSS modes */
412 { STV090x_P2_FECM, 0x01 }, /* disable DSS modes */
413 { STV090x_P1_PRVIT, 0x2F }, /* disable PR 6/7 */
414 { STV090x_P2_PRVIT, 0x2F }, /* disable PR 6/7 */
415 };
416
417 static struct stv090x_reg stv0903_initval[] = {
418 { STV090x_OUTCFG, 0x00 },
419 { STV090x_AGCRF1CFG, 0x11 },
420 { STV090x_STOPCLK1, 0x48 },
421 { STV090x_STOPCLK2, 0x14 },
422 { STV090x_TSTTNR1, 0x27 },
423 { STV090x_TSTTNR2, 0x21 },
424 { STV090x_P1_DISTXCTL, 0x22 },
425 { STV090x_P1_F22TX, 0xc0 },
426 { STV090x_P1_F22RX, 0xc0 },
427 { STV090x_P1_DISRXCTL, 0x00 },
428 { STV090x_P1_DMDCFGMD, 0xF9 },
429 { STV090x_P1_DEMOD, 0x08 },
430 { STV090x_P1_DMDCFG3, 0xc4 },
431 { STV090x_P1_CARFREQ, 0xed },
432 { STV090x_P1_TNRCFG2, 0x82 },
433 { STV090x_P1_LDT, 0xd0 },
434 { STV090x_P1_LDT2, 0xb8 },
435 { STV090x_P1_TMGCFG, 0xd2 },
436 { STV090x_P1_TMGTHRISE, 0x20 },
437 { STV090x_P1_TMGTHFALL, 0x00 },
438 { STV090x_P1_SFRUPRATIO, 0xf0 },
439 { STV090x_P1_SFRLOWRATIO, 0x70 },
440 { STV090x_P1_TSCFGL, 0x20 },
441 { STV090x_P1_FECSPY, 0x88 },
442 { STV090x_P1_FSPYDATA, 0x3a },
443 { STV090x_P1_FBERCPT4, 0x00 },
444 { STV090x_P1_FSPYBER, 0x10 },
445 { STV090x_P1_ERRCTRL1, 0x35 },
446 { STV090x_P1_ERRCTRL2, 0xc1 },
447 { STV090x_P1_CFRICFG, 0xf8 },
448 { STV090x_P1_NOSCFG, 0x1c },
449 { STV090x_P1_DMDTOM, 0x20 },
450 { STV090x_P1_CORRELMANT, 0x70 },
451 { STV090x_P1_CORRELABS, 0x88 },
452 { STV090x_P1_AGC2O, 0x5b },
453 { STV090x_P1_AGC2REF, 0x38 },
454 { STV090x_P1_CARCFG, 0xe4 },
455 { STV090x_P1_ACLC, 0x1A },
456 { STV090x_P1_BCLC, 0x09 },
457 { STV090x_P1_CARHDR, 0x08 },
458 { STV090x_P1_KREFTMG, 0xc1 },
459 { STV090x_P1_SFRSTEP, 0x58 },
460 { STV090x_P1_TMGCFG2, 0x01 },
461 { STV090x_P1_CAR2CFG, 0x26 },
462 { STV090x_P1_BCLC2S2Q, 0x86 },
463 { STV090x_P1_BCLC2S28, 0x86 },
464 { STV090x_P1_SMAPCOEF7, 0x77 },
465 { STV090x_P1_SMAPCOEF6, 0x85 },
466 { STV090x_P1_SMAPCOEF5, 0x77 },
467 { STV090x_P1_DMDCFG2, 0x3b },
468 { STV090x_P1_MODCODLST0, 0xff },
469 { STV090x_P1_MODCODLST1, 0xff },
470 { STV090x_P1_MODCODLST2, 0xff },
471 { STV090x_P1_MODCODLST3, 0xff },
472 { STV090x_P1_MODCODLST4, 0xff },
473 { STV090x_P1_MODCODLST5, 0xff },
474 { STV090x_P1_MODCODLST6, 0xff },
475 { STV090x_P1_MODCODLST7, 0xcc },
476 { STV090x_P1_MODCODLST8, 0xcc },
477 { STV090x_P1_MODCODLST9, 0xcc },
478 { STV090x_P1_MODCODLSTA, 0xcc },
479 { STV090x_P1_MODCODLSTB, 0xcc },
480 { STV090x_P1_MODCODLSTC, 0xcc },
481 { STV090x_P1_MODCODLSTD, 0xcc },
482 { STV090x_P1_MODCODLSTE, 0xcc },
483 { STV090x_P1_MODCODLSTF, 0xcf },
484 { STV090x_GENCFG, 0x1c },
485 { STV090x_NBITER_NF4, 0x37 },
486 { STV090x_NBITER_NF5, 0x29 },
487 { STV090x_NBITER_NF6, 0x37 },
488 { STV090x_NBITER_NF7, 0x33 },
489 { STV090x_NBITER_NF8, 0x31 },
490 { STV090x_NBITER_NF9, 0x2f },
491 { STV090x_NBITER_NF10, 0x39 },
492 { STV090x_NBITER_NF11, 0x3a },
493 { STV090x_NBITER_NF12, 0x29 },
494 { STV090x_NBITER_NF13, 0x37 },
495 { STV090x_NBITER_NF14, 0x33 },
496 { STV090x_NBITER_NF15, 0x2f },
497 { STV090x_NBITER_NF16, 0x39 },
498 { STV090x_NBITER_NF17, 0x3a },
499 { STV090x_NBITERNOERR, 0x04 },
500 { STV090x_GAINLLR_NF4, 0x0C },
501 { STV090x_GAINLLR_NF5, 0x0F },
502 { STV090x_GAINLLR_NF6, 0x11 },
503 { STV090x_GAINLLR_NF7, 0x14 },
504 { STV090x_GAINLLR_NF8, 0x17 },
505 { STV090x_GAINLLR_NF9, 0x19 },
506 { STV090x_GAINLLR_NF10, 0x20 },
507 { STV090x_GAINLLR_NF11, 0x21 },
508 { STV090x_GAINLLR_NF12, 0x0D },
509 { STV090x_GAINLLR_NF13, 0x0F },
510 { STV090x_GAINLLR_NF14, 0x13 },
511 { STV090x_GAINLLR_NF15, 0x1A },
512 { STV090x_GAINLLR_NF16, 0x1F },
513 { STV090x_GAINLLR_NF17, 0x21 },
514 { STV090x_RCCFGH, 0x20 },
515 { STV090x_P1_FECM, 0x01 }, /*disable the DSS mode */
516 { STV090x_P1_PRVIT, 0x2f } /*disable puncture rate 6/7*/
517 };
518
519 static struct stv090x_reg stv0900_cut20_val[] = {
520
521 { STV090x_P2_DMDCFG3, 0xe8 },
522 { STV090x_P2_DMDCFG4, 0x10 },
523 { STV090x_P2_CARFREQ, 0x38 },
524 { STV090x_P2_CARHDR, 0x20 },
525 { STV090x_P2_KREFTMG, 0x5a },
526 { STV090x_P2_SMAPCOEF7, 0x06 },
527 { STV090x_P2_SMAPCOEF6, 0x00 },
528 { STV090x_P2_SMAPCOEF5, 0x04 },
529 { STV090x_P2_NOSCFG, 0x0c },
530 { STV090x_P1_DMDCFG3, 0xe8 },
531 { STV090x_P1_DMDCFG4, 0x10 },
532 { STV090x_P1_CARFREQ, 0x38 },
533 { STV090x_P1_CARHDR, 0x20 },
534 { STV090x_P1_KREFTMG, 0x5a },
535 { STV090x_P1_SMAPCOEF7, 0x06 },
536 { STV090x_P1_SMAPCOEF6, 0x00 },
537 { STV090x_P1_SMAPCOEF5, 0x04 },
538 { STV090x_P1_NOSCFG, 0x0c },
539 { STV090x_GAINLLR_NF4, 0x21 },
540 { STV090x_GAINLLR_NF5, 0x21 },
541 { STV090x_GAINLLR_NF6, 0x20 },
542 { STV090x_GAINLLR_NF7, 0x1F },
543 { STV090x_GAINLLR_NF8, 0x1E },
544 { STV090x_GAINLLR_NF9, 0x1E },
545 { STV090x_GAINLLR_NF10, 0x1D },
546 { STV090x_GAINLLR_NF11, 0x1B },
547 { STV090x_GAINLLR_NF12, 0x20 },
548 { STV090x_GAINLLR_NF13, 0x20 },
549 { STV090x_GAINLLR_NF14, 0x20 },
550 { STV090x_GAINLLR_NF15, 0x20 },
551 { STV090x_GAINLLR_NF16, 0x20 },
552 { STV090x_GAINLLR_NF17, 0x21 },
553 };
554
555 static struct stv090x_reg stv0903_cut20_val[] = {
556 { STV090x_P1_DMDCFG3, 0xe8 },
557 { STV090x_P1_DMDCFG4, 0x10 },
558 { STV090x_P1_CARFREQ, 0x38 },
559 { STV090x_P1_CARHDR, 0x20 },
560 { STV090x_P1_KREFTMG, 0x5a },
561 { STV090x_P1_SMAPCOEF7, 0x06 },
562 { STV090x_P1_SMAPCOEF6, 0x00 },
563 { STV090x_P1_SMAPCOEF5, 0x04 },
564 { STV090x_P1_NOSCFG, 0x0c },
565 { STV090x_GAINLLR_NF4, 0x21 },
566 { STV090x_GAINLLR_NF5, 0x21 },
567 { STV090x_GAINLLR_NF6, 0x20 },
568 { STV090x_GAINLLR_NF7, 0x1F },
569 { STV090x_GAINLLR_NF8, 0x1E },
570 { STV090x_GAINLLR_NF9, 0x1E },
571 { STV090x_GAINLLR_NF10, 0x1D },
572 { STV090x_GAINLLR_NF11, 0x1B },
573 { STV090x_GAINLLR_NF12, 0x20 },
574 { STV090x_GAINLLR_NF13, 0x20 },
575 { STV090x_GAINLLR_NF14, 0x20 },
576 { STV090x_GAINLLR_NF15, 0x20 },
577 { STV090x_GAINLLR_NF16, 0x20 },
578 { STV090x_GAINLLR_NF17, 0x21 }
579 };
580
581 /* Cut 2.0 Long Frame Tracking CR loop */
582 static struct stv090x_long_frame_crloop stv090x_s2_crl_cut20[] = {
583 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
584 { STV090x_QPSK_12, 0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x1e },
585 { STV090x_QPSK_35, 0x2f, 0x3f, 0x2e, 0x2f, 0x3d, 0x0f, 0x0e, 0x2e, 0x3d, 0x0e },
586 { STV090x_QPSK_23, 0x2f, 0x3f, 0x2e, 0x2f, 0x0e, 0x0f, 0x0e, 0x1e, 0x3d, 0x3d },
587 { STV090x_QPSK_34, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
588 { STV090x_QPSK_45, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
589 { STV090x_QPSK_56, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
590 { STV090x_QPSK_89, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
591 { STV090x_QPSK_910, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
592 { STV090x_8PSK_35, 0x3c, 0x3e, 0x1c, 0x2e, 0x0c, 0x1e, 0x2b, 0x2d, 0x1b, 0x1d },
593 { STV090x_8PSK_23, 0x1d, 0x3e, 0x3c, 0x2e, 0x2c, 0x1e, 0x0c, 0x2d, 0x2b, 0x1d },
594 { STV090x_8PSK_34, 0x0e, 0x3e, 0x3d, 0x2e, 0x0d, 0x1e, 0x2c, 0x2d, 0x0c, 0x1d },
595 { STV090x_8PSK_56, 0x2e, 0x3e, 0x1e, 0x2e, 0x2d, 0x1e, 0x3c, 0x2d, 0x2c, 0x1d },
596 { STV090x_8PSK_89, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x0d, 0x2d, 0x3c, 0x1d },
597 { STV090x_8PSK_910, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x1d, 0x2d, 0x0d, 0x1d }
598 };
599
600 /* Cut 3.0 Long Frame Tracking CR loop */
601 static struct stv090x_long_frame_crloop stv090x_s2_crl_cut30[] = {
602 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
603 { STV090x_QPSK_12, 0x3c, 0x2c, 0x0c, 0x2c, 0x1b, 0x2c, 0x1b, 0x1c, 0x0b, 0x3b },
604 { STV090x_QPSK_35, 0x0d, 0x0d, 0x0c, 0x0d, 0x1b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
605 { STV090x_QPSK_23, 0x1d, 0x0d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
606 { STV090x_QPSK_34, 0x1d, 0x1d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
607 { STV090x_QPSK_45, 0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
608 { STV090x_QPSK_56, 0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
609 { STV090x_QPSK_89, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
610 { STV090x_QPSK_910, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
611 { STV090x_8PSK_35, 0x39, 0x29, 0x39, 0x19, 0x19, 0x19, 0x19, 0x19, 0x09, 0x19 },
612 { STV090x_8PSK_23, 0x2a, 0x39, 0x1a, 0x0a, 0x39, 0x0a, 0x29, 0x39, 0x29, 0x0a },
613 { STV090x_8PSK_34, 0x2b, 0x3a, 0x1b, 0x1b, 0x3a, 0x1b, 0x1a, 0x0b, 0x1a, 0x3a },
614 { STV090x_8PSK_56, 0x0c, 0x1b, 0x3b, 0x3b, 0x1b, 0x3b, 0x3a, 0x3b, 0x3a, 0x1b },
615 { STV090x_8PSK_89, 0x0d, 0x3c, 0x2c, 0x2c, 0x2b, 0x0c, 0x0b, 0x3b, 0x0b, 0x1b },
616 { STV090x_8PSK_910, 0x0d, 0x0d, 0x2c, 0x3c, 0x3b, 0x1c, 0x0b, 0x3b, 0x0b, 0x1b }
617 };
618
619 /* Cut 2.0 Long Frame Tracking CR Loop */
620 static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut20[] = {
621 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
622 { STV090x_16APSK_23, 0x0c, 0x0c, 0x0c, 0x0c, 0x1d, 0x0c, 0x3c, 0x0c, 0x2c, 0x0c },
623 { STV090x_16APSK_34, 0x0c, 0x0c, 0x0c, 0x0c, 0x0e, 0x0c, 0x2d, 0x0c, 0x1d, 0x0c },
624 { STV090x_16APSK_45, 0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
625 { STV090x_16APSK_56, 0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
626 { STV090x_16APSK_89, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
627 { STV090x_16APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
628 { STV090x_32APSK_34, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
629 { STV090x_32APSK_45, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
630 { STV090x_32APSK_56, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
631 { STV090x_32APSK_89, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
632 { STV090x_32APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c }
633 };
634
635 /* Cut 3.0 Long Frame Tracking CR Loop */
636 static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut30[] = {
637 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
638 { STV090x_16APSK_23, 0x0a, 0x0a, 0x0a, 0x0a, 0x1a, 0x0a, 0x3a, 0x0a, 0x2a, 0x0a },
639 { STV090x_16APSK_34, 0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x0a, 0x3b, 0x0a, 0x1b, 0x0a },
640 { STV090x_16APSK_45, 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
641 { STV090x_16APSK_56, 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
642 { STV090x_16APSK_89, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
643 { STV090x_16APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
644 { STV090x_32APSK_34, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
645 { STV090x_32APSK_45, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
646 { STV090x_32APSK_56, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
647 { STV090x_32APSK_89, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
648 { STV090x_32APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a }
649 };
650
651 static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut20[] = {
652 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
653 { STV090x_QPSK_14, 0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x2d, 0x1f, 0x3d, 0x3e },
654 { STV090x_QPSK_13, 0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x3d, 0x0f, 0x3d, 0x2e },
655 { STV090x_QPSK_25, 0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x2e }
656 };
657
658 static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut30[] = {
659 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
660 { STV090x_QPSK_14, 0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x2a, 0x1c, 0x3a, 0x3b },
661 { STV090x_QPSK_13, 0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x3a, 0x0c, 0x3a, 0x2b },
662 { STV090x_QPSK_25, 0x1c, 0x3c, 0x1b, 0x3c, 0x3a, 0x1c, 0x3a, 0x3b, 0x3a, 0x2b }
663 };
664
665 /* Cut 2.0 Short Frame Tracking CR Loop */
666 static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut20[] = {
667 /* MODCOD 2M 5M 10M 20M 30M */
668 { STV090x_QPSK, 0x2f, 0x2e, 0x0e, 0x0e, 0x3d },
669 { STV090x_8PSK, 0x3e, 0x0e, 0x2d, 0x0d, 0x3c },
670 { STV090x_16APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d },
671 { STV090x_32APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d }
672 };
673
674 /* Cut 3.0 Short Frame Tracking CR Loop */
675 static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut30[] = {
676 /* MODCOD 2M 5M 10M 20M 30M */
677 { STV090x_QPSK, 0x2C, 0x2B, 0x0B, 0x0B, 0x3A },
678 { STV090x_8PSK, 0x3B, 0x0B, 0x2A, 0x0A, 0x39 },
679 { STV090x_16APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A },
680 { STV090x_32APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A }
681 };
682
683 static inline s32 comp2(s32 __x, s32 __width)
684 {
685 if (__width == 32)
686 return __x;
687 else
688 return (__x >= (1 << (__width - 1))) ? (__x - (1 << __width)) : __x;
689 }
690
691 static int stv090x_read_reg(struct stv090x_state *state, unsigned int reg)
692 {
693 const struct stv090x_config *config = state->config;
694 int ret;
695
696 u8 b0[] = { reg >> 8, reg & 0xff };
697 u8 buf;
698
699 struct i2c_msg msg[] = {
700 { .addr = config->address, .flags = 0, .buf = b0, .len = 2 },
701 { .addr = config->address, .flags = I2C_M_RD, .buf = &buf, .len = 1 }
702 };
703
704 ret = i2c_transfer(state->i2c, msg, 2);
705 if (ret != 2) {
706 if (ret != -ERESTARTSYS)
707 dprintk(FE_ERROR, 1,
708 "Read error, Reg=[0x%02x], Status=%d",
709 reg, ret);
710
711 return ret < 0 ? ret : -EREMOTEIO;
712 }
713 if (unlikely(*state->verbose >= FE_DEBUGREG))
714 dprintk(FE_ERROR, 1, "Reg=[0x%02x], data=%02x",
715 reg, buf);
716
717 return (unsigned int) buf;
718 }
719
720 static int stv090x_write_regs(struct stv090x_state *state, unsigned int reg, u8 *data, u32 count)
721 {
722 const struct stv090x_config *config = state->config;
723 int ret;
724 u8 buf[2 + count];
725 struct i2c_msg i2c_msg = { .addr = config->address, .flags = 0, .buf = buf, .len = 2 + count };
726
727 buf[0] = reg >> 8;
728 buf[1] = reg & 0xff;
729 memcpy(&buf[2], data, count);
730
731 if (unlikely(*state->verbose >= FE_DEBUGREG)) {
732 int i;
733
734 printk(KERN_DEBUG "%s [0x%04x]:", __func__, reg);
735 for (i = 0; i < count; i++)
736 printk(" %02x", data[i]);
737 printk("\n");
738 }
739
740 ret = i2c_transfer(state->i2c, &i2c_msg, 1);
741 if (ret != 1) {
742 if (ret != -ERESTARTSYS)
743 dprintk(FE_ERROR, 1, "Reg=[0x%04x], Data=[0x%02x ...], Count=%u, Status=%d",
744 reg, data[0], count, ret);
745 return ret < 0 ? ret : -EREMOTEIO;
746 }
747
748 return 0;
749 }
750
751 static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 data)
752 {
753 return stv090x_write_regs(state, reg, &data, 1);
754 }
755
756 static int stv090x_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
757 {
758 struct stv090x_state *state = fe->demodulator_priv;
759 u32 reg;
760
761 reg = STV090x_READ_DEMOD(state, I2CRPT);
762 if (enable) {
763 dprintk(FE_DEBUG, 1, "Enable Gate");
764 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 1);
765 if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0)
766 goto err;
767
768 } else {
769 dprintk(FE_DEBUG, 1, "Disable Gate");
770 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 0);
771 if ((STV090x_WRITE_DEMOD(state, I2CRPT, reg)) < 0)
772 goto err;
773 }
774 return 0;
775 err:
776 dprintk(FE_ERROR, 1, "I/O error");
777 return -1;
778 }
779
780 static void stv090x_get_lock_tmg(struct stv090x_state *state)
781 {
782 switch (state->algo) {
783 case STV090x_BLIND_SEARCH:
784 dprintk(FE_DEBUG, 1, "Blind Search");
785 if (state->srate <= 1500000) { /*10Msps< SR <=15Msps*/
786 state->DemodTimeout = 1500;
787 state->FecTimeout = 400;
788 } else if (state->srate <= 5000000) { /*10Msps< SR <=15Msps*/
789 state->DemodTimeout = 1000;
790 state->FecTimeout = 300;
791 } else { /*SR >20Msps*/
792 state->DemodTimeout = 700;
793 state->FecTimeout = 100;
794 }
795 break;
796
797 case STV090x_COLD_SEARCH:
798 case STV090x_WARM_SEARCH:
799 default:
800 dprintk(FE_DEBUG, 1, "Normal Search");
801 if (state->srate <= 1000000) { /*SR <=1Msps*/
802 state->DemodTimeout = 4500;
803 state->FecTimeout = 1700;
804 } else if (state->srate <= 2000000) { /*1Msps < SR <= 2Msps */
805 state->DemodTimeout = 2500;
806 state->FecTimeout = 1100;
807 } else if (state->srate <= 5000000) { /*2Msps < SR <= 5Msps */
808 state->DemodTimeout = 1000;
809 state->FecTimeout = 550;
810 } else if (state->srate <= 10000000) { /*5Msps < SR <= 10Msps */
811 state->DemodTimeout = 700;
812 state->FecTimeout = 250;
813 } else if (state->srate <= 20000000) { /*10Msps < SR <= 20Msps */
814 state->DemodTimeout = 400;
815 state->FecTimeout = 130;
816 } else { /*SR >20Msps*/
817 state->DemodTimeout = 300;
818 state->FecTimeout = 100;
819 }
820 break;
821 }
822
823 if (state->algo == STV090x_WARM_SEARCH)
824 state->DemodTimeout /= 2;
825 }
826
827 static int stv090x_set_srate(struct stv090x_state *state, u32 srate)
828 {
829 u32 sym;
830
831 if (srate > 60000000) {
832 sym = (srate << 4); /* SR * 2^16 / master_clk */
833 sym /= (state->internal->mclk >> 12);
834 } else if (srate > 6000000) {
835 sym = (srate << 6);
836 sym /= (state->internal->mclk >> 10);
837 } else {
838 sym = (srate << 9);
839 sym /= (state->internal->mclk >> 7);
840 }
841
842 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0x7f) < 0) /* MSB */
843 goto err;
844 if (STV090x_WRITE_DEMOD(state, SFRINIT0, (sym & 0xff)) < 0) /* LSB */
845 goto err;
846
847 return 0;
848 err:
849 dprintk(FE_ERROR, 1, "I/O error");
850 return -1;
851 }
852
853 static int stv090x_set_max_srate(struct stv090x_state *state, u32 clk, u32 srate)
854 {
855 u32 sym;
856
857 srate = 105 * (srate / 100);
858 if (srate > 60000000) {
859 sym = (srate << 4); /* SR * 2^16 / master_clk */
860 sym /= (state->internal->mclk >> 12);
861 } else if (srate > 6000000) {
862 sym = (srate << 6);
863 sym /= (state->internal->mclk >> 10);
864 } else {
865 sym = (srate << 9);
866 sym /= (state->internal->mclk >> 7);
867 }
868
869 if (sym < 0x7fff) {
870 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0) /* MSB */
871 goto err;
872 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0) /* LSB */
873 goto err;
874 } else {
875 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x7f) < 0) /* MSB */
876 goto err;
877 if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xff) < 0) /* LSB */
878 goto err;
879 }
880
881 return 0;
882 err:
883 dprintk(FE_ERROR, 1, "I/O error");
884 return -1;
885 }
886
887 static int stv090x_set_min_srate(struct stv090x_state *state, u32 clk, u32 srate)
888 {
889 u32 sym;
890
891 srate = 95 * (srate / 100);
892 if (srate > 60000000) {
893 sym = (srate << 4); /* SR * 2^16 / master_clk */
894 sym /= (state->internal->mclk >> 12);
895 } else if (srate > 6000000) {
896 sym = (srate << 6);
897 sym /= (state->internal->mclk >> 10);
898 } else {
899 sym = (srate << 9);
900 sym /= (state->internal->mclk >> 7);
901 }
902
903 if (STV090x_WRITE_DEMOD(state, SFRLOW1, ((sym >> 8) & 0x7f)) < 0) /* MSB */
904 goto err;
905 if (STV090x_WRITE_DEMOD(state, SFRLOW0, (sym & 0xff)) < 0) /* LSB */
906 goto err;
907 return 0;
908 err:
909 dprintk(FE_ERROR, 1, "I/O error");
910 return -1;
911 }
912
913 static u32 stv090x_car_width(u32 srate, enum stv090x_rolloff rolloff)
914 {
915 u32 ro;
916
917 switch (rolloff) {
918 case STV090x_RO_20:
919 ro = 20;
920 break;
921 case STV090x_RO_25:
922 ro = 25;
923 break;
924 case STV090x_RO_35:
925 default:
926 ro = 35;
927 break;
928 }
929
930 return srate + (srate * ro) / 100;
931 }
932
933 static int stv090x_set_vit_thacq(struct stv090x_state *state)
934 {
935 if (STV090x_WRITE_DEMOD(state, VTH12, 0x96) < 0)
936 goto err;
937 if (STV090x_WRITE_DEMOD(state, VTH23, 0x64) < 0)
938 goto err;
939 if (STV090x_WRITE_DEMOD(state, VTH34, 0x36) < 0)
940 goto err;
941 if (STV090x_WRITE_DEMOD(state, VTH56, 0x23) < 0)
942 goto err;
943 if (STV090x_WRITE_DEMOD(state, VTH67, 0x1e) < 0)
944 goto err;
945 if (STV090x_WRITE_DEMOD(state, VTH78, 0x19) < 0)
946 goto err;
947 return 0;
948 err:
949 dprintk(FE_ERROR, 1, "I/O error");
950 return -1;
951 }
952
953 static int stv090x_set_vit_thtracq(struct stv090x_state *state)
954 {
955 if (STV090x_WRITE_DEMOD(state, VTH12, 0xd0) < 0)
956 goto err;
957 if (STV090x_WRITE_DEMOD(state, VTH23, 0x7d) < 0)
958 goto err;
959 if (STV090x_WRITE_DEMOD(state, VTH34, 0x53) < 0)
960 goto err;
961 if (STV090x_WRITE_DEMOD(state, VTH56, 0x2f) < 0)
962 goto err;
963 if (STV090x_WRITE_DEMOD(state, VTH67, 0x24) < 0)
964 goto err;
965 if (STV090x_WRITE_DEMOD(state, VTH78, 0x1f) < 0)
966 goto err;
967 return 0;
968 err:
969 dprintk(FE_ERROR, 1, "I/O error");
970 return -1;
971 }
972
973 static int stv090x_set_viterbi(struct stv090x_state *state)
974 {
975 switch (state->search_mode) {
976 case STV090x_SEARCH_AUTO:
977 if (STV090x_WRITE_DEMOD(state, FECM, 0x10) < 0) /* DVB-S and DVB-S2 */
978 goto err;
979 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x3f) < 0) /* all puncture rate */
980 goto err;
981 break;
982 case STV090x_SEARCH_DVBS1:
983 if (STV090x_WRITE_DEMOD(state, FECM, 0x00) < 0) /* disable DSS */
984 goto err;
985 switch (state->fec) {
986 case STV090x_PR12:
987 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
988 goto err;
989 break;
990
991 case STV090x_PR23:
992 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
993 goto err;
994 break;
995
996 case STV090x_PR34:
997 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x04) < 0)
998 goto err;
999 break;
1000
1001 case STV090x_PR56:
1002 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x08) < 0)
1003 goto err;
1004 break;
1005
1006 case STV090x_PR78:
1007 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x20) < 0)
1008 goto err;
1009 break;
1010
1011 default:
1012 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x2f) < 0) /* all */
1013 goto err;
1014 break;
1015 }
1016 break;
1017 case STV090x_SEARCH_DSS:
1018 if (STV090x_WRITE_DEMOD(state, FECM, 0x80) < 0)
1019 goto err;
1020 switch (state->fec) {
1021 case STV090x_PR12:
1022 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
1023 goto err;
1024 break;
1025
1026 case STV090x_PR23:
1027 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
1028 goto err;
1029 break;
1030
1031 case STV090x_PR67:
1032 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x10) < 0)
1033 goto err;
1034 break;
1035
1036 default:
1037 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x13) < 0) /* 1/2, 2/3, 6/7 */
1038 goto err;
1039 break;
1040 }
1041 break;
1042 default:
1043 break;
1044 }
1045 return 0;
1046 err:
1047 dprintk(FE_ERROR, 1, "I/O error");
1048 return -1;
1049 }
1050
1051 static int stv090x_stop_modcod(struct stv090x_state *state)
1052 {
1053 if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1054 goto err;
1055 if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
1056 goto err;
1057 if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
1058 goto err;
1059 if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
1060 goto err;
1061 if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
1062 goto err;
1063 if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
1064 goto err;
1065 if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
1066 goto err;
1067 if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xff) < 0)
1068 goto err;
1069 if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xff) < 0)
1070 goto err;
1071 if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xff) < 0)
1072 goto err;
1073 if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xff) < 0)
1074 goto err;
1075 if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xff) < 0)
1076 goto err;
1077 if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xff) < 0)
1078 goto err;
1079 if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xff) < 0)
1080 goto err;
1081 if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
1082 goto err;
1083 if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xff) < 0)
1084 goto err;
1085 return 0;
1086 err:
1087 dprintk(FE_ERROR, 1, "I/O error");
1088 return -1;
1089 }
1090
1091 static int stv090x_activate_modcod(struct stv090x_state *state)
1092 {
1093 if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1094 goto err;
1095 if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xfc) < 0)
1096 goto err;
1097 if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xcc) < 0)
1098 goto err;
1099 if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xcc) < 0)
1100 goto err;
1101 if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xcc) < 0)
1102 goto err;
1103 if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xcc) < 0)
1104 goto err;
1105 if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xcc) < 0)
1106 goto err;
1107 if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
1108 goto err;
1109 if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
1110 goto err;
1111 if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
1112 goto err;
1113 if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
1114 goto err;
1115 if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
1116 goto err;
1117 if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
1118 goto err;
1119 if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
1120 goto err;
1121 if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xcc) < 0)
1122 goto err;
1123 if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
1124 goto err;
1125
1126 return 0;
1127 err:
1128 dprintk(FE_ERROR, 1, "I/O error");
1129 return -1;
1130 }
1131
1132 static int stv090x_activate_modcod_single(struct stv090x_state *state)
1133 {
1134
1135 if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1136 goto err;
1137 if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xf0) < 0)
1138 goto err;
1139 if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0x00) < 0)
1140 goto err;
1141 if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0x00) < 0)
1142 goto err;
1143 if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0x00) < 0)
1144 goto err;
1145 if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0x00) < 0)
1146 goto err;
1147 if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0x00) < 0)
1148 goto err;
1149 if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0x00) < 0)
1150 goto err;
1151 if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0x00) < 0)
1152 goto err;
1153 if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0x00) < 0)
1154 goto err;
1155 if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0x00) < 0)
1156 goto err;
1157 if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0x00) < 0)
1158 goto err;
1159 if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0x00) < 0)
1160 goto err;
1161 if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0x00) < 0)
1162 goto err;
1163 if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0x00) < 0)
1164 goto err;
1165 if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0x0f) < 0)
1166 goto err;
1167
1168 return 0;
1169
1170 err:
1171 dprintk(FE_ERROR, 1, "I/O error");
1172 return -1;
1173 }
1174
1175 static int stv090x_vitclk_ctl(struct stv090x_state *state, int enable)
1176 {
1177 u32 reg;
1178
1179 switch (state->demod) {
1180 case STV090x_DEMODULATOR_0:
1181 mutex_lock(&state->internal->demod_lock);
1182 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1183 STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, enable);
1184 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1185 goto err;
1186 mutex_unlock(&state->internal->demod_lock);
1187 break;
1188
1189 case STV090x_DEMODULATOR_1:
1190 mutex_lock(&state->internal->demod_lock);
1191 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1192 STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, enable);
1193 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1194 goto err;
1195 mutex_unlock(&state->internal->demod_lock);
1196 break;
1197
1198 default:
1199 dprintk(FE_ERROR, 1, "Wrong demodulator!");
1200 break;
1201 }
1202 return 0;
1203 err:
1204 mutex_unlock(&state->internal->demod_lock);
1205 dprintk(FE_ERROR, 1, "I/O error");
1206 return -1;
1207 }
1208
1209 static int stv090x_dvbs_track_crl(struct stv090x_state *state)
1210 {
1211 if (state->internal->dev_ver >= 0x30) {
1212 /* Set ACLC BCLC optimised value vs SR */
1213 if (state->srate >= 15000000) {
1214 if (STV090x_WRITE_DEMOD(state, ACLC, 0x2b) < 0)
1215 goto err;
1216 if (STV090x_WRITE_DEMOD(state, BCLC, 0x1a) < 0)
1217 goto err;
1218 } else if ((state->srate >= 7000000) && (15000000 > state->srate)) {
1219 if (STV090x_WRITE_DEMOD(state, ACLC, 0x0c) < 0)
1220 goto err;
1221 if (STV090x_WRITE_DEMOD(state, BCLC, 0x1b) < 0)
1222 goto err;
1223 } else if (state->srate < 7000000) {
1224 if (STV090x_WRITE_DEMOD(state, ACLC, 0x2c) < 0)
1225 goto err;
1226 if (STV090x_WRITE_DEMOD(state, BCLC, 0x1c) < 0)
1227 goto err;
1228 }
1229
1230 } else {
1231 /* Cut 2.0 */
1232 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0)
1233 goto err;
1234 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1235 goto err;
1236 }
1237 return 0;
1238 err:
1239 dprintk(FE_ERROR, 1, "I/O error");
1240 return -1;
1241 }
1242
1243 static int stv090x_delivery_search(struct stv090x_state *state)
1244 {
1245 u32 reg;
1246
1247 switch (state->search_mode) {
1248 case STV090x_SEARCH_DVBS1:
1249 case STV090x_SEARCH_DSS:
1250 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1251 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1252 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1253 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1254 goto err;
1255
1256 /* Activate Viterbi decoder in legacy search,
1257 * do not use FRESVIT1, might impact VITERBI2
1258 */
1259 if (stv090x_vitclk_ctl(state, 0) < 0)
1260 goto err;
1261
1262 if (stv090x_dvbs_track_crl(state) < 0)
1263 goto err;
1264
1265 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x22) < 0) /* disable DVB-S2 */
1266 goto err;
1267
1268 if (stv090x_set_vit_thacq(state) < 0)
1269 goto err;
1270 if (stv090x_set_viterbi(state) < 0)
1271 goto err;
1272 break;
1273
1274 case STV090x_SEARCH_DVBS2:
1275 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1276 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1277 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1278 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1279 goto err;
1280 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1281 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1282 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1283 goto err;
1284
1285 if (stv090x_vitclk_ctl(state, 1) < 0)
1286 goto err;
1287
1288 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0) /* stop DVB-S CR loop */
1289 goto err;
1290 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1291 goto err;
1292
1293 if (state->internal->dev_ver <= 0x20) {
1294 /* enable S2 carrier loop */
1295 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1296 goto err;
1297 } else {
1298 /* > Cut 3: Stop carrier 3 */
1299 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
1300 goto err;
1301 }
1302
1303 if (state->demod_mode != STV090x_SINGLE) {
1304 /* Cut 2: enable link during search */
1305 if (stv090x_activate_modcod(state) < 0)
1306 goto err;
1307 } else {
1308 /* Single demodulator
1309 * Authorize SHORT and LONG frames,
1310 * QPSK, 8PSK, 16APSK and 32APSK
1311 */
1312 if (stv090x_activate_modcod_single(state) < 0)
1313 goto err;
1314 }
1315
1316 if (stv090x_set_vit_thtracq(state) < 0)
1317 goto err;
1318 break;
1319
1320 case STV090x_SEARCH_AUTO:
1321 default:
1322 /* enable DVB-S2 and DVB-S2 in Auto MODE */
1323 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1324 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1325 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1326 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1327 goto err;
1328 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1329 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1330 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1331 goto err;
1332
1333 if (stv090x_vitclk_ctl(state, 0) < 0)
1334 goto err;
1335
1336 if (stv090x_dvbs_track_crl(state) < 0)
1337 goto err;
1338
1339 if (state->internal->dev_ver <= 0x20) {
1340 /* enable S2 carrier loop */
1341 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1342 goto err;
1343 } else {
1344 /* > Cut 3: Stop carrier 3 */
1345 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
1346 goto err;
1347 }
1348
1349 if (state->demod_mode != STV090x_SINGLE) {
1350 /* Cut 2: enable link during search */
1351 if (stv090x_activate_modcod(state) < 0)
1352 goto err;
1353 } else {
1354 /* Single demodulator
1355 * Authorize SHORT and LONG frames,
1356 * QPSK, 8PSK, 16APSK and 32APSK
1357 */
1358 if (stv090x_activate_modcod_single(state) < 0)
1359 goto err;
1360 }
1361
1362 if (stv090x_set_vit_thacq(state) < 0)
1363 goto err;
1364
1365 if (stv090x_set_viterbi(state) < 0)
1366 goto err;
1367 break;
1368 }
1369 return 0;
1370 err:
1371 dprintk(FE_ERROR, 1, "I/O error");
1372 return -1;
1373 }
1374
1375 static int stv090x_start_search(struct stv090x_state *state)
1376 {
1377 u32 reg, freq_abs;
1378 s16 freq;
1379
1380 /* Reset demodulator */
1381 reg = STV090x_READ_DEMOD(state, DMDISTATE);
1382 STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f);
1383 if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1384 goto err;
1385
1386 if (state->internal->dev_ver <= 0x20) {
1387 if (state->srate <= 5000000) {
1388 if (STV090x_WRITE_DEMOD(state, CARCFG, 0x44) < 0)
1389 goto err;
1390 if (STV090x_WRITE_DEMOD(state, CFRUP1, 0x0f) < 0)
1391 goto err;
1392 if (STV090x_WRITE_DEMOD(state, CFRUP0, 0xff) < 0)
1393 goto err;
1394 if (STV090x_WRITE_DEMOD(state, CFRLOW1, 0xf0) < 0)
1395 goto err;
1396 if (STV090x_WRITE_DEMOD(state, CFRLOW0, 0x00) < 0)
1397 goto err;
1398
1399 /*enlarge the timing bandwith for Low SR*/
1400 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0)
1401 goto err;
1402 } else {
1403 /* If the symbol rate is >5 Msps
1404 Set The carrier search up and low to auto mode */
1405 if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
1406 goto err;
1407 /*reduce the timing bandwith for high SR*/
1408 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
1409 goto err;
1410 }
1411 } else {
1412 /* >= Cut 3 */
1413 if (state->srate <= 5000000) {
1414 /* enlarge the timing bandwith for Low SR */
1415 STV090x_WRITE_DEMOD(state, RTCS2, 0x68);
1416 } else {
1417 /* reduce timing bandwith for high SR */
1418 STV090x_WRITE_DEMOD(state, RTCS2, 0x44);
1419 }
1420
1421 /* Set CFR min and max to manual mode */
1422 STV090x_WRITE_DEMOD(state, CARCFG, 0x46);
1423
1424 if (state->algo == STV090x_WARM_SEARCH) {
1425 /* WARM Start
1426 * CFR min = -1MHz,
1427 * CFR max = +1MHz
1428 */
1429 freq_abs = 1000 << 16;
1430 freq_abs /= (state->internal->mclk / 1000);
1431 freq = (s16) freq_abs;
1432 } else {
1433 /* COLD Start
1434 * CFR min =- (SearchRange / 2 + 600KHz)
1435 * CFR max = +(SearchRange / 2 + 600KHz)
1436 * (600KHz for the tuner step size)
1437 */
1438 freq_abs = (state->search_range / 2000) + 600;
1439 freq_abs = freq_abs << 16;
1440 freq_abs /= (state->internal->mclk / 1000);
1441 freq = (s16) freq_abs;
1442 }
1443
1444 if (STV090x_WRITE_DEMOD(state, CFRUP1, MSB(freq)) < 0)
1445 goto err;
1446 if (STV090x_WRITE_DEMOD(state, CFRUP0, LSB(freq)) < 0)
1447 goto err;
1448
1449 freq *= -1;
1450
1451 if (STV090x_WRITE_DEMOD(state, CFRLOW1, MSB(freq)) < 0)
1452 goto err;
1453 if (STV090x_WRITE_DEMOD(state, CFRLOW0, LSB(freq)) < 0)
1454 goto err;
1455
1456 }
1457
1458 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0) < 0)
1459 goto err;
1460 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0) < 0)
1461 goto err;
1462
1463 if (state->internal->dev_ver >= 0x20) {
1464 if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
1465 goto err;
1466 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
1467 goto err;
1468
1469 if ((state->search_mode == STV090x_DVBS1) ||
1470 (state->search_mode == STV090x_DSS) ||
1471 (state->search_mode == STV090x_SEARCH_AUTO)) {
1472
1473 if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
1474 goto err;
1475 if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0)
1476 goto err;
1477 }
1478 }
1479
1480 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00) < 0)
1481 goto err;
1482 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xe0) < 0)
1483 goto err;
1484 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xc0) < 0)
1485 goto err;
1486
1487 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1488 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
1489 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
1490 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1491 goto err;
1492 reg = STV090x_READ_DEMOD(state, DMDCFG2);
1493 STV090x_SETFIELD_Px(reg, S1S2_SEQUENTIAL_FIELD, 0x0);
1494 if (STV090x_WRITE_DEMOD(state, DMDCFG2, reg) < 0)
1495 goto err;
1496
1497 if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0)
1498 goto err;
1499
1500 if (state->internal->dev_ver >= 0x20) {
1501 /*Frequency offset detector setting*/
1502 if (state->srate < 2000000) {
1503 if (state->internal->dev_ver <= 0x20) {
1504 /* Cut 2 */
1505 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x39) < 0)
1506 goto err;
1507 } else {
1508 /* Cut 3 */
1509 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x89) < 0)
1510 goto err;
1511 }
1512 if (STV090x_WRITE_DEMOD(state, CARHDR, 0x40) < 0)
1513 goto err;
1514 } else if (state->srate < 10000000) {
1515 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4c) < 0)
1516 goto err;
1517 if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
1518 goto err;
1519 } else {
1520 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4b) < 0)
1521 goto err;
1522 if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
1523 goto err;
1524 }
1525 } else {
1526 if (state->srate < 10000000) {
1527 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
1528 goto err;
1529 } else {
1530 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
1531 goto err;
1532 }
1533 }
1534
1535 switch (state->algo) {
1536 case STV090x_WARM_SEARCH:
1537 /* The symbol rate and the exact
1538 * carrier Frequency are known
1539 */
1540 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1541 goto err;
1542 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
1543 goto err;
1544 break;
1545
1546 case STV090x_COLD_SEARCH:
1547 /* The symbol rate is known */
1548 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1549 goto err;
1550 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
1551 goto err;
1552 break;
1553
1554 default:
1555 break;
1556 }
1557 return 0;
1558 err:
1559 dprintk(FE_ERROR, 1, "I/O error");
1560 return -1;
1561 }
1562
1563 static int stv090x_get_agc2_min_level(struct stv090x_state *state)
1564 {
1565 u32 agc2_min = 0xffff, agc2 = 0, freq_init, freq_step, reg;
1566 s32 i, j, steps, dir;
1567
1568 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1569 goto err;
1570 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1571 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
1572 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
1573 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1574 goto err;
1575
1576 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0) /* SR = 65 Msps Max */
1577 goto err;
1578 if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1579 goto err;
1580 if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0) /* SR= 400 ksps Min */
1581 goto err;
1582 if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1583 goto err;
1584 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0) /* stop acq @ coarse carrier state */
1585 goto err;
1586 if (stv090x_set_srate(state, 1000000) < 0)
1587 goto err;
1588
1589 steps = state->search_range / 1000000;
1590 if (steps <= 0)
1591 steps = 1;
1592
1593 dir = 1;
1594 freq_step = (1000000 * 256) / (state->internal->mclk / 256);
1595 freq_init = 0;
1596
1597 for (i = 0; i < steps; i++) {
1598 if (dir > 0)
1599 freq_init = freq_init + (freq_step * i);
1600 else
1601 freq_init = freq_init - (freq_step * i);
1602
1603 dir *= -1;
1604
1605 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod RESET */
1606 goto err;
1607 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_init >> 8) & 0xff) < 0)
1608 goto err;
1609 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_init & 0xff) < 0)
1610 goto err;
1611 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x58) < 0) /* Demod RESET */
1612 goto err;
1613 msleep(10);
1614
1615 agc2 = 0;
1616 for (j = 0; j < 10; j++) {
1617 agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
1618 STV090x_READ_DEMOD(state, AGC2I0);
1619 }
1620 agc2 /= 10;
1621 if (agc2 < agc2_min)
1622 agc2_min = agc2;
1623 }
1624
1625 return agc2_min;
1626 err:
1627 dprintk(FE_ERROR, 1, "I/O error");
1628 return -1;
1629 }
1630
1631 static u32 stv090x_get_srate(struct stv090x_state *state, u32 clk)
1632 {
1633 u8 r3, r2, r1, r0;
1634 s32 srate, int_1, int_2, tmp_1, tmp_2;
1635
1636 r3 = STV090x_READ_DEMOD(state, SFR3);
1637 r2 = STV090x_READ_DEMOD(state, SFR2);
1638 r1 = STV090x_READ_DEMOD(state, SFR1);
1639 r0 = STV090x_READ_DEMOD(state, SFR0);
1640
1641 srate = ((r3 << 24) | (r2 << 16) | (r1 << 8) | r0);
1642
1643 int_1 = clk >> 16;
1644 int_2 = srate >> 16;
1645
1646 tmp_1 = clk % 0x10000;
1647 tmp_2 = srate % 0x10000;
1648
1649 srate = (int_1 * int_2) +
1650 ((int_1 * tmp_2) >> 16) +
1651 ((int_2 * tmp_1) >> 16);
1652
1653 return srate;
1654 }
1655
1656 static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
1657 {
1658 struct dvb_frontend *fe = &state->frontend;
1659
1660 int tmg_lock = 0, i;
1661 s32 tmg_cpt = 0, dir = 1, steps, cur_step = 0, freq;
1662 u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg;
1663 u32 agc2th;
1664
1665 if (state->internal->dev_ver >= 0x30)
1666 agc2th = 0x2e00;
1667 else
1668 agc2th = 0x1f00;
1669
1670 reg = STV090x_READ_DEMOD(state, DMDISTATE);
1671 STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f); /* Demod RESET */
1672 if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1673 goto err;
1674 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0x12) < 0)
1675 goto err;
1676 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0)
1677 goto err;
1678 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xf0) < 0)
1679 goto err;
1680 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xe0) < 0)
1681 goto err;
1682 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1683 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 1);
1684 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
1685 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1686 goto err;
1687
1688 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0)
1689 goto err;
1690 if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1691 goto err;
1692 if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0)
1693 goto err;
1694 if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1695 goto err;
1696 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0)
1697 goto err;
1698 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x50) < 0)
1699 goto err;
1700
1701 if (state->internal->dev_ver >= 0x30) {
1702 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x99) < 0)
1703 goto err;
1704 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x98) < 0)
1705 goto err;
1706
1707 } else if (state->internal->dev_ver >= 0x20) {
1708 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x6a) < 0)
1709 goto err;
1710 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0)
1711 goto err;
1712 }
1713
1714 if (state->srate <= 2000000)
1715 car_step = 1000;
1716 else if (state->srate <= 5000000)
1717 car_step = 2000;
1718 else if (state->srate <= 12000000)
1719 car_step = 3000;
1720 else
1721 car_step = 5000;
1722
1723 steps = -1 + ((state->search_range / 1000) / car_step);
1724 steps /= 2;
1725 steps = (2 * steps) + 1;
1726 if (steps < 0)
1727 steps = 1;
1728 else if (steps > 10) {
1729 steps = 11;
1730 car_step = (state->search_range / 1000) / 10;
1731 }
1732 cur_step = 0;
1733 dir = 1;
1734 freq = state->frequency;
1735
1736 while ((!tmg_lock) && (cur_step < steps)) {
1737 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5f) < 0) /* Demod RESET */
1738 goto err;
1739 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
1740 goto err;
1741 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
1742 goto err;
1743 if (STV090x_WRITE_DEMOD(state, SFRINIT1, 0x00) < 0)
1744 goto err;
1745 if (STV090x_WRITE_DEMOD(state, SFRINIT0, 0x00) < 0)
1746 goto err;
1747 /* trigger acquisition */
1748 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x40) < 0)
1749 goto err;
1750 msleep(50);
1751 for (i = 0; i < 10; i++) {
1752 reg = STV090x_READ_DEMOD(state, DSTATUS);
1753 if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
1754 tmg_cpt++;
1755 agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
1756 STV090x_READ_DEMOD(state, AGC2I0);
1757 }
1758 agc2 /= 10;
1759 srate_coarse = stv090x_get_srate(state, state->internal->mclk);
1760 cur_step++;
1761 dir *= -1;
1762 if ((tmg_cpt >= 5) && (agc2 < agc2th) &&
1763 (srate_coarse < 50000000) && (srate_coarse > 850000))
1764 tmg_lock = 1;
1765 else if (cur_step < steps) {
1766 if (dir > 0)
1767 freq += cur_step * car_step;
1768 else
1769 freq -= cur_step * car_step;
1770
1771 /* Setup tuner */
1772 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
1773 goto err;
1774
1775 if (state->config->tuner_set_frequency) {
1776 if (state->config->tuner_set_frequency(fe, freq) < 0)
1777 goto err;
1778 }
1779
1780 if (state->config->tuner_set_bandwidth) {
1781 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
1782 goto err;
1783 }
1784
1785 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
1786 goto err;
1787
1788 msleep(50);
1789
1790 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
1791 goto err;
1792
1793 if (state->config->tuner_get_status) {
1794 if (state->config->tuner_get_status(fe, &reg) < 0)
1795 goto err;
1796 }
1797
1798 if (reg)
1799 dprintk(FE_DEBUG, 1, "Tuner phase locked");
1800 else
1801 dprintk(FE_DEBUG, 1, "Tuner unlocked");
1802
1803 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
1804 goto err;
1805
1806 }
1807 }
1808 if (!tmg_lock)
1809 srate_coarse = 0;
1810 else
1811 srate_coarse = stv090x_get_srate(state, state->internal->mclk);
1812
1813 return srate_coarse;
1814 err:
1815 dprintk(FE_ERROR, 1, "I/O error");
1816 return -1;
1817 }
1818
1819 static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
1820 {
1821 u32 srate_coarse, freq_coarse, sym, reg;
1822
1823 srate_coarse = stv090x_get_srate(state, state->internal->mclk);
1824 freq_coarse = STV090x_READ_DEMOD(state, CFR2) << 8;
1825 freq_coarse |= STV090x_READ_DEMOD(state, CFR1);
1826 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1827
1828 if (sym < state->srate)
1829 srate_coarse = 0;
1830 else {
1831 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0) /* Demod RESET */
1832 goto err;
1833 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
1834 goto err;
1835 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
1836 goto err;
1837 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
1838 goto err;
1839 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
1840 goto err;
1841 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1842 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
1843 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1844 goto err;
1845
1846 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1847 goto err;
1848
1849 if (state->internal->dev_ver >= 0x30) {
1850 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x79) < 0)
1851 goto err;
1852 } else if (state->internal->dev_ver >= 0x20) {
1853 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
1854 goto err;
1855 }
1856
1857 if (srate_coarse > 3000000) {
1858 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1859 sym = (sym / 1000) * 65536;
1860 sym /= (state->internal->mclk / 1000);
1861 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1862 goto err;
1863 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1864 goto err;
1865 sym = 10 * (srate_coarse / 13); /* SFRLOW = SFR - 30% */
1866 sym = (sym / 1000) * 65536;
1867 sym /= (state->internal->mclk / 1000);
1868 if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1869 goto err;
1870 if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1871 goto err;
1872 sym = (srate_coarse / 1000) * 65536;
1873 sym /= (state->internal->mclk / 1000);
1874 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1875 goto err;
1876 if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1877 goto err;
1878 } else {
1879 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1880 sym = (sym / 100) * 65536;
1881 sym /= (state->internal->mclk / 100);
1882 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1883 goto err;
1884 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1885 goto err;
1886 sym = 10 * (srate_coarse / 14); /* SFRLOW = SFR - 30% */
1887 sym = (sym / 100) * 65536;
1888 sym /= (state->internal->mclk / 100);
1889 if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1890 goto err;
1891 if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1892 goto err;
1893 sym = (srate_coarse / 100) * 65536;
1894 sym /= (state->internal->mclk / 100);
1895 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1896 goto err;
1897 if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1898 goto err;
1899 }
1900 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
1901 goto err;
1902 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_coarse >> 8) & 0xff) < 0)
1903 goto err;
1904 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_coarse & 0xff) < 0)
1905 goto err;
1906 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0) /* trigger acquisition */
1907 goto err;
1908 }
1909
1910 return srate_coarse;
1911
1912 err:
1913 dprintk(FE_ERROR, 1, "I/O error");
1914 return -1;
1915 }
1916
1917 static int stv090x_get_dmdlock(struct stv090x_state *state, s32 timeout)
1918 {
1919 s32 timer = 0, lock = 0;
1920 u32 reg;
1921 u8 stat;
1922
1923 while ((timer < timeout) && (!lock)) {
1924 reg = STV090x_READ_DEMOD(state, DMDSTATE);
1925 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
1926
1927 switch (stat) {
1928 case 0: /* searching */
1929 case 1: /* first PLH detected */
1930 default:
1931 dprintk(FE_DEBUG, 1, "Demodulator searching ..");
1932 lock = 0;
1933 break;
1934 case 2: /* DVB-S2 mode */
1935 case 3: /* DVB-S1/legacy mode */
1936 reg = STV090x_READ_DEMOD(state, DSTATUS);
1937 lock = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
1938 break;
1939 }
1940
1941 if (!lock)
1942 msleep(10);
1943 else
1944 dprintk(FE_DEBUG, 1, "Demodulator acquired LOCK");
1945
1946 timer += 10;
1947 }
1948 return lock;
1949 }
1950
1951 static int stv090x_blind_search(struct stv090x_state *state)
1952 {
1953 u32 agc2, reg, srate_coarse;
1954 s32 cpt_fail, agc2_ovflw, i;
1955 u8 k_ref, k_max, k_min;
1956 int coarse_fail, lock;
1957
1958 k_max = 110;
1959 k_min = 10;
1960
1961 agc2 = stv090x_get_agc2_min_level(state);
1962
1963 if (agc2 > STV090x_SEARCH_AGC2_TH(state->internal->dev_ver)) {
1964 lock = 0;
1965 } else {
1966
1967 if (state->internal->dev_ver <= 0x20) {
1968 if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
1969 goto err;
1970 } else {
1971 /* > Cut 3 */
1972 if (STV090x_WRITE_DEMOD(state, CARCFG, 0x06) < 0)
1973 goto err;
1974 }
1975
1976 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
1977 goto err;
1978
1979 if (state->internal->dev_ver >= 0x20) {
1980 if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
1981 goto err;
1982 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
1983 goto err;
1984 if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
1985 goto err;
1986 if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0) /* set viterbi hysteresis */
1987 goto err;
1988 }
1989
1990 k_ref = k_max;
1991 do {
1992 if (STV090x_WRITE_DEMOD(state, KREFTMG, k_ref) < 0)
1993 goto err;
1994 if (stv090x_srate_srch_coarse(state) != 0) {
1995 srate_coarse = stv090x_srate_srch_fine(state);
1996 if (srate_coarse != 0) {
1997 stv090x_get_lock_tmg(state);
1998 lock = stv090x_get_dmdlock(state,
1999 state->DemodTimeout);
2000 } else {
2001 lock = 0;
2002 }
2003 } else {
2004 cpt_fail = 0;
2005 agc2_ovflw = 0;
2006 for (i = 0; i < 10; i++) {
2007 agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
2008 STV090x_READ_DEMOD(state, AGC2I0);
2009 if (agc2 >= 0xff00)
2010 agc2_ovflw++;
2011 reg = STV090x_READ_DEMOD(state, DSTATUS2);
2012 if ((STV090x_GETFIELD_Px(reg, CFR_OVERFLOW_FIELD) == 0x01) &&
2013 (STV090x_GETFIELD_Px(reg, DEMOD_DELOCK_FIELD) == 0x01))
2014
2015 cpt_fail++;
2016 }
2017 if ((cpt_fail > 7) || (agc2_ovflw > 7))
2018 coarse_fail = 1;
2019
2020 lock = 0;
2021 }
2022 k_ref -= 20;
2023 } while ((k_ref >= k_min) && (!lock) && (!coarse_fail));
2024 }
2025
2026 return lock;
2027
2028 err:
2029 dprintk(FE_ERROR, 1, "I/O error");
2030 return -1;
2031 }
2032
2033 static int stv090x_chk_tmg(struct stv090x_state *state)
2034 {
2035 u32 reg;
2036 s32 tmg_cpt = 0, i;
2037 u8 freq, tmg_thh, tmg_thl;
2038 int tmg_lock;
2039
2040 freq = STV090x_READ_DEMOD(state, CARFREQ);
2041 tmg_thh = STV090x_READ_DEMOD(state, TMGTHRISE);
2042 tmg_thl = STV090x_READ_DEMOD(state, TMGTHFALL);
2043 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
2044 goto err;
2045 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
2046 goto err;
2047
2048 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2049 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00); /* stop carrier offset search */
2050 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2051 goto err;
2052 if (STV090x_WRITE_DEMOD(state, RTC, 0x80) < 0)
2053 goto err;
2054
2055 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x40) < 0)
2056 goto err;
2057 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x00) < 0)
2058 goto err;
2059
2060 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0) /* set car ofset to 0 */
2061 goto err;
2062 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
2063 goto err;
2064 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x65) < 0)
2065 goto err;
2066
2067 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* trigger acquisition */
2068 goto err;
2069 msleep(10);
2070
2071 for (i = 0; i < 10; i++) {
2072 reg = STV090x_READ_DEMOD(state, DSTATUS);
2073 if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
2074 tmg_cpt++;
2075 msleep(1);
2076 }
2077 if (tmg_cpt >= 3)
2078 tmg_lock = 1;
2079
2080 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
2081 goto err;
2082 if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) /* DVB-S1 timing */
2083 goto err;
2084 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0) /* DVB-S2 timing */
2085 goto err;
2086
2087 if (STV090x_WRITE_DEMOD(state, CARFREQ, freq) < 0)
2088 goto err;
2089 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, tmg_thh) < 0)
2090 goto err;
2091 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, tmg_thl) < 0)
2092 goto err;
2093
2094 return tmg_lock;
2095
2096 err:
2097 dprintk(FE_ERROR, 1, "I/O error");
2098 return -1;
2099 }
2100
2101 static int stv090x_get_coldlock(struct stv090x_state *state, s32 timeout_dmd)
2102 {
2103 struct dvb_frontend *fe = &state->frontend;
2104
2105 u32 reg;
2106 s32 car_step, steps, cur_step, dir, freq, timeout_lock;
2107 int lock = 0;
2108
2109 if (state->srate >= 10000000)
2110 timeout_lock = timeout_dmd / 3;
2111 else
2112 timeout_lock = timeout_dmd / 2;
2113
2114 lock = stv090x_get_dmdlock(state, timeout_lock); /* cold start wait */
2115 if (!lock) {
2116 if (state->srate >= 10000000) {
2117 if (stv090x_chk_tmg(state)) {
2118 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2119 goto err;
2120 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
2121 goto err;
2122 lock = stv090x_get_dmdlock(state, timeout_dmd);
2123 } else {
2124 lock = 0;
2125 }
2126 } else {
2127 if (state->srate <= 4000000)
2128 car_step = 1000;
2129 else if (state->srate <= 7000000)
2130 car_step = 2000;
2131 else if (state->srate <= 10000000)
2132 car_step = 3000;
2133 else
2134 car_step = 5000;
2135
2136 steps = (state->search_range / 1000) / car_step;
2137 steps /= 2;
2138 steps = 2 * (steps + 1);
2139 if (steps < 0)
2140 steps = 2;
2141 else if (steps > 12)
2142 steps = 12;
2143
2144 cur_step = 1;
2145 dir = 1;
2146
2147 if (!lock) {
2148 freq = state->frequency;
2149 state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + state->srate;
2150 while ((cur_step <= steps) && (!lock)) {
2151 if (dir > 0)
2152 freq += cur_step * car_step;
2153 else
2154 freq -= cur_step * car_step;
2155
2156 /* Setup tuner */
2157 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
2158 goto err;
2159
2160 if (state->config->tuner_set_frequency) {
2161 if (state->config->tuner_set_frequency(fe, freq) < 0)
2162 goto err;
2163 }
2164
2165 if (state->config->tuner_set_bandwidth) {
2166 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
2167 goto err;
2168 }
2169
2170 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
2171 goto err;
2172
2173 msleep(50);
2174
2175 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
2176 goto err;
2177
2178 if (state->config->tuner_get_status) {
2179 if (state->config->tuner_get_status(fe, &reg) < 0)
2180 goto err;
2181 }
2182
2183 if (reg)
2184 dprintk(FE_DEBUG, 1, "Tuner phase locked");
2185 else
2186 dprintk(FE_DEBUG, 1, "Tuner unlocked");
2187
2188 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
2189 goto err;
2190
2191 STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c);
2192 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
2193 goto err;
2194 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
2195 goto err;
2196 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2197 goto err;
2198 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
2199 goto err;
2200 lock = stv090x_get_dmdlock(state, (timeout_dmd / 3));
2201
2202 dir *= -1;
2203 cur_step++;
2204 }
2205 }
2206 }
2207 }
2208
2209 return lock;
2210
2211 err:
2212 dprintk(FE_ERROR, 1, "I/O error");
2213 return -1;
2214 }
2215
2216 static int stv090x_get_loop_params(struct stv090x_state *state, s32 *freq_inc, s32 *timeout_sw, s32 *steps)
2217 {
2218 s32 timeout, inc, steps_max, srate, car_max;
2219
2220 srate = state->srate;
2221 car_max = state->search_range / 1000;
2222 car_max += car_max / 10;
2223 car_max = 65536 * (car_max / 2);
2224 car_max /= (state->internal->mclk / 1000);
2225
2226 if (car_max > 0x4000)
2227 car_max = 0x4000 ; /* maxcarrier should be<= +-1/4 Mclk */
2228
2229 inc = srate;
2230 inc /= state->internal->mclk / 1000;
2231 inc *= 256;
2232 inc *= 256;
2233 inc /= 1000;
2234
2235 switch (state->search_mode) {
2236 case STV090x_SEARCH_DVBS1:
2237 case STV090x_SEARCH_DSS:
2238 inc *= 3; /* freq step = 3% of srate */
2239 timeout = 20;
2240 break;
2241
2242 case STV090x_SEARCH_DVBS2:
2243 inc *= 4;
2244 timeout = 25;
2245 break;
2246
2247 case STV090x_SEARCH_AUTO:
2248 default:
2249 inc *= 3;
2250 timeout = 25;
2251 break;
2252 }
2253 inc /= 100;
2254 if ((inc > car_max) || (inc < 0))
2255 inc = car_max / 2; /* increment <= 1/8 Mclk */
2256
2257 timeout *= 27500; /* 27.5 Msps reference */
2258 if (srate > 0)
2259 timeout /= (srate / 1000);
2260
2261 if ((timeout > 100) || (timeout < 0))
2262 timeout = 100;
2263
2264 steps_max = (car_max / inc) + 1; /* min steps = 3 */
2265 if ((steps_max > 100) || (steps_max < 0)) {
2266 steps_max = 100; /* max steps <= 100 */
2267 inc = car_max / steps_max;
2268 }
2269 *freq_inc = inc;
2270 *timeout_sw = timeout;
2271 *steps = steps_max;
2272
2273 return 0;
2274 }
2275
2276 static int stv090x_chk_signal(struct stv090x_state *state)
2277 {
2278 s32 offst_car, agc2, car_max;
2279 int no_signal;
2280
2281 offst_car = STV090x_READ_DEMOD(state, CFR2) << 8;
2282 offst_car |= STV090x_READ_DEMOD(state, CFR1);
2283 offst_car = comp2(offst_car, 16);
2284
2285 agc2 = STV090x_READ_DEMOD(state, AGC2I1) << 8;
2286 agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
2287 car_max = state->search_range / 1000;
2288
2289 car_max += (car_max / 10); /* 10% margin */
2290 car_max = (65536 * car_max / 2);
2291 car_max /= state->internal->mclk / 1000;
2292
2293 if (car_max > 0x4000)
2294 car_max = 0x4000;
2295
2296 if ((agc2 > 0x2000) || (offst_car > 2 * car_max) || (offst_car < -2 * car_max)) {
2297 no_signal = 1;
2298 dprintk(FE_DEBUG, 1, "No Signal");
2299 } else {
2300 no_signal = 0;
2301 dprintk(FE_DEBUG, 1, "Found Signal");
2302 }
2303
2304 return no_signal;
2305 }
2306
2307 static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 timeout, int zigzag, s32 steps_max)
2308 {
2309 int no_signal, lock = 0;
2310 s32 cpt_step = 0, offst_freq, car_max;
2311 u32 reg;
2312
2313 car_max = state->search_range / 1000;
2314 car_max += (car_max / 10);
2315 car_max = (65536 * car_max / 2);
2316 car_max /= (state->internal->mclk / 1000);
2317 if (car_max > 0x4000)
2318 car_max = 0x4000;
2319
2320 if (zigzag)
2321 offst_freq = 0;
2322 else
2323 offst_freq = -car_max + inc;
2324
2325 do {
2326 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0)
2327 goto err;
2328 if (STV090x_WRITE_DEMOD(state, CFRINIT1, ((offst_freq / 256) & 0xff)) < 0)
2329 goto err;
2330 if (STV090x_WRITE_DEMOD(state, CFRINIT0, offst_freq & 0xff) < 0)
2331 goto err;
2332 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2333 goto err;
2334
2335 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2336 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x1); /* stop DVB-S2 packet delin */
2337 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2338 goto err;
2339
2340 if (zigzag) {
2341 if (offst_freq >= 0)
2342 offst_freq = -offst_freq - 2 * inc;
2343 else
2344 offst_freq = -offst_freq;
2345 } else {
2346 offst_freq += 2 * inc;
2347 }
2348
2349 cpt_step++;
2350
2351 lock = stv090x_get_dmdlock(state, timeout);
2352 no_signal = stv090x_chk_signal(state);
2353
2354 } while ((!lock) &&
2355 (!no_signal) &&
2356 ((offst_freq - inc) < car_max) &&
2357 ((offst_freq + inc) > -car_max) &&
2358 (cpt_step < steps_max));
2359
2360 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2361 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0);
2362 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2363 goto err;
2364
2365 return lock;
2366 err:
2367 dprintk(FE_ERROR, 1, "I/O error");
2368 return -1;
2369 }
2370
2371 static int stv090x_sw_algo(struct stv090x_state *state)
2372 {
2373 int no_signal, zigzag, lock = 0;
2374 u32 reg;
2375
2376 s32 dvbs2_fly_wheel;
2377 s32 inc, timeout_step, trials, steps_max;
2378
2379 /* get params */
2380 stv090x_get_loop_params(state, &inc, &timeout_step, &steps_max);
2381
2382 switch (state->search_mode) {
2383 case STV090x_SEARCH_DVBS1:
2384 case STV090x_SEARCH_DSS:
2385 /* accelerate the frequency detector */
2386 if (state->internal->dev_ver >= 0x20) {
2387 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3B) < 0)
2388 goto err;
2389 }
2390
2391 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x49) < 0)
2392 goto err;
2393 zigzag = 0;
2394 break;
2395
2396 case STV090x_SEARCH_DVBS2:
2397 if (state->internal->dev_ver >= 0x20) {
2398 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2399 goto err;
2400 }
2401
2402 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2403 goto err;
2404 zigzag = 1;
2405 break;
2406
2407 case STV090x_SEARCH_AUTO:
2408 default:
2409 /* accelerate the frequency detector */
2410 if (state->internal->dev_ver >= 0x20) {
2411 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3b) < 0)
2412 goto err;
2413 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2414 goto err;
2415 }
2416
2417 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0xc9) < 0)
2418 goto err;
2419 zigzag = 0;
2420 break;
2421 }
2422
2423 trials = 0;
2424 do {
2425 lock = stv090x_search_car_loop(state, inc, timeout_step, zigzag, steps_max);
2426 no_signal = stv090x_chk_signal(state);
2427 trials++;
2428
2429 /*run the SW search 2 times maximum*/
2430 if (lock || no_signal || (trials == 2)) {
2431 /*Check if the demod is not losing lock in DVBS2*/
2432 if (state->internal->dev_ver >= 0x20) {
2433 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
2434 goto err;
2435 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
2436 goto err;
2437 }
2438
2439 reg = STV090x_READ_DEMOD(state, DMDSTATE);
2440 if ((lock) && (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == STV090x_DVBS2)) {
2441 /*Check if the demod is not losing lock in DVBS2*/
2442 msleep(timeout_step);
2443 reg = STV090x_READ_DEMOD(state, DMDFLYW);
2444 dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2445 if (dvbs2_fly_wheel < 0xd) { /*if correct frames is decrementing */
2446 msleep(timeout_step);
2447 reg = STV090x_READ_DEMOD(state, DMDFLYW);
2448 dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2449 }
2450 if (dvbs2_fly_wheel < 0xd) {
2451 /*FALSE lock, The demod is loosing lock */
2452 lock = 0;
2453 if (trials < 2) {
2454 if (state->internal->dev_ver >= 0x20) {
2455 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2456 goto err;
2457 }
2458
2459 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2460 goto err;
2461 }
2462 }
2463 }
2464 }
2465 } while ((!lock) && (trials < 2) && (!no_signal));
2466
2467 return lock;
2468 err:
2469 dprintk(FE_ERROR, 1, "I/O error");
2470 return -1;
2471 }
2472
2473 static enum stv090x_delsys stv090x_get_std(struct stv090x_state *state)
2474 {
2475 u32 reg;
2476 enum stv090x_delsys delsys;
2477
2478 reg = STV090x_READ_DEMOD(state, DMDSTATE);
2479 if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 2)
2480 delsys = STV090x_DVBS2;
2481 else if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 3) {
2482 reg = STV090x_READ_DEMOD(state, FECM);
2483 if (STV090x_GETFIELD_Px(reg, DSS_DVB_FIELD) == 1)
2484 delsys = STV090x_DSS;
2485 else
2486 delsys = STV090x_DVBS1;
2487 } else {
2488 delsys = STV090x_ERROR;
2489 }
2490
2491 return delsys;
2492 }
2493
2494 /* in Hz */
2495 static s32 stv090x_get_car_freq(struct stv090x_state *state, u32 mclk)
2496 {
2497 s32 derot, int_1, int_2, tmp_1, tmp_2;
2498
2499 derot = STV090x_READ_DEMOD(state, CFR2) << 16;
2500 derot |= STV090x_READ_DEMOD(state, CFR1) << 8;
2501 derot |= STV090x_READ_DEMOD(state, CFR0);
2502
2503 derot = comp2(derot, 24);
2504 int_1 = mclk >> 12;
2505 int_2 = derot >> 12;
2506
2507 /* carrier_frequency = MasterClock * Reg / 2^24 */
2508 tmp_1 = mclk % 0x1000;
2509 tmp_2 = derot % 0x1000;
2510
2511 derot = (int_1 * int_2) +
2512 ((int_1 * tmp_2) >> 12) +
2513 ((int_2 * tmp_1) >> 12);
2514
2515 return derot;
2516 }
2517
2518 static int stv090x_get_viterbi(struct stv090x_state *state)
2519 {
2520 u32 reg, rate;
2521
2522 reg = STV090x_READ_DEMOD(state, VITCURPUN);
2523 rate = STV090x_GETFIELD_Px(reg, VIT_CURPUN_FIELD);
2524
2525 switch (rate) {
2526 case 13:
2527 state->fec = STV090x_PR12;
2528 break;
2529
2530 case 18:
2531 state->fec = STV090x_PR23;
2532 break;
2533
2534 case 21:
2535 state->fec = STV090x_PR34;
2536 break;
2537
2538 case 24:
2539 state->fec = STV090x_PR56;
2540 break;
2541
2542 case 25:
2543 state->fec = STV090x_PR67;
2544 break;
2545
2546 case 26:
2547 state->fec = STV090x_PR78;
2548 break;
2549
2550 default:
2551 state->fec = STV090x_PRERR;
2552 break;
2553 }
2554
2555 return 0;
2556 }
2557
2558 static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *state)
2559 {
2560 struct dvb_frontend *fe = &state->frontend;
2561
2562 u8 tmg;
2563 u32 reg;
2564 s32 i = 0, offst_freq;
2565
2566 msleep(5);
2567
2568 if (state->algo == STV090x_BLIND_SEARCH) {
2569 tmg = STV090x_READ_DEMOD(state, TMGREG2);
2570 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x5c);
2571 while ((i <= 50) && (tmg != 0) && (tmg != 0xff)) {
2572 tmg = STV090x_READ_DEMOD(state, TMGREG2);
2573 msleep(5);
2574 i += 5;
2575 }
2576 }
2577 state->delsys = stv090x_get_std(state);
2578
2579 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
2580 goto err;
2581
2582 if (state->config->tuner_get_frequency) {
2583 if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
2584 goto err;
2585 }
2586
2587 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
2588 goto err;
2589
2590 offst_freq = stv090x_get_car_freq(state, state->internal->mclk) / 1000;
2591 state->frequency += offst_freq;
2592
2593 if (stv090x_get_viterbi(state) < 0)
2594 goto err;
2595
2596 reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2597 state->modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2598 state->pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2599 state->frame_len = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) >> 1;
2600 reg = STV090x_READ_DEMOD(state, TMGOBS);
2601 state->rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
2602 reg = STV090x_READ_DEMOD(state, FECM);
2603 state->inversion = STV090x_GETFIELD_Px(reg, IQINV_FIELD);
2604
2605 if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000)) {
2606
2607 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
2608 goto err;
2609
2610 if (state->config->tuner_get_frequency) {
2611 if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
2612 goto err;
2613 }
2614
2615 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
2616 goto err;
2617
2618 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
2619 return STV090x_RANGEOK;
2620 else if (abs(offst_freq) <= (stv090x_car_width(state->srate, state->rolloff) / 2000))
2621 return STV090x_RANGEOK;
2622 else
2623 return STV090x_OUTOFRANGE; /* Out of Range */
2624 } else {
2625 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
2626 return STV090x_RANGEOK;
2627 else
2628 return STV090x_OUTOFRANGE;
2629 }
2630
2631 return STV090x_OUTOFRANGE;
2632 err:
2633 dprintk(FE_ERROR, 1, "I/O error");
2634 return -1;
2635 }
2636
2637 static u32 stv090x_get_tmgoffst(struct stv090x_state *state, u32 srate)
2638 {
2639 s32 offst_tmg;
2640
2641 offst_tmg = STV090x_READ_DEMOD(state, TMGREG2) << 16;
2642 offst_tmg |= STV090x_READ_DEMOD(state, TMGREG1) << 8;
2643 offst_tmg |= STV090x_READ_DEMOD(state, TMGREG0);
2644
2645 offst_tmg = comp2(offst_tmg, 24); /* 2's complement */
2646 if (!offst_tmg)
2647 offst_tmg = 1;
2648
2649 offst_tmg = ((s32) srate * 10) / ((s32) 0x1000000 / offst_tmg);
2650 offst_tmg /= 320;
2651
2652 return offst_tmg;
2653 }
2654
2655 static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_modcod modcod, s32 pilots)
2656 {
2657 u8 aclc = 0x29;
2658 s32 i;
2659 struct stv090x_long_frame_crloop *car_loop, *car_loop_qpsk_low, *car_loop_apsk_low;
2660
2661 if (state->internal->dev_ver == 0x20) {
2662 car_loop = stv090x_s2_crl_cut20;
2663 car_loop_qpsk_low = stv090x_s2_lowqpsk_crl_cut20;
2664 car_loop_apsk_low = stv090x_s2_apsk_crl_cut20;
2665 } else {
2666 /* >= Cut 3 */
2667 car_loop = stv090x_s2_crl_cut30;
2668 car_loop_qpsk_low = stv090x_s2_lowqpsk_crl_cut30;
2669 car_loop_apsk_low = stv090x_s2_apsk_crl_cut30;
2670 }
2671
2672 if (modcod < STV090x_QPSK_12) {
2673 i = 0;
2674 while ((i < 3) && (modcod != car_loop_qpsk_low[i].modcod))
2675 i++;
2676
2677 if (i >= 3)
2678 i = 2;
2679
2680 } else {
2681 i = 0;
2682 while ((i < 14) && (modcod != car_loop[i].modcod))
2683 i++;
2684
2685 if (i >= 14) {
2686 i = 0;
2687 while ((i < 11) && (modcod != car_loop_apsk_low[i].modcod))
2688 i++;
2689
2690 if (i >= 11)
2691 i = 10;
2692 }
2693 }
2694
2695 if (modcod <= STV090x_QPSK_25) {
2696 if (pilots) {
2697 if (state->srate <= 3000000)
2698 aclc = car_loop_qpsk_low[i].crl_pilots_on_2;
2699 else if (state->srate <= 7000000)
2700 aclc = car_loop_qpsk_low[i].crl_pilots_on_5;
2701 else if (state->srate <= 15000000)
2702 aclc = car_loop_qpsk_low[i].crl_pilots_on_10;
2703 else if (state->srate <= 25000000)
2704 aclc = car_loop_qpsk_low[i].crl_pilots_on_20;
2705 else
2706 aclc = car_loop_qpsk_low[i].crl_pilots_on_30;
2707 } else {
2708 if (state->srate <= 3000000)
2709 aclc = car_loop_qpsk_low[i].crl_pilots_off_2;
2710 else if (state->srate <= 7000000)
2711 aclc = car_loop_qpsk_low[i].crl_pilots_off_5;
2712 else if (state->srate <= 15000000)
2713 aclc = car_loop_qpsk_low[i].crl_pilots_off_10;
2714 else if (state->srate <= 25000000)
2715 aclc = car_loop_qpsk_low[i].crl_pilots_off_20;
2716 else
2717 aclc = car_loop_qpsk_low[i].crl_pilots_off_30;
2718 }
2719
2720 } else if (modcod <= STV090x_8PSK_910) {
2721 if (pilots) {
2722 if (state->srate <= 3000000)
2723 aclc = car_loop[i].crl_pilots_on_2;
2724 else if (state->srate <= 7000000)
2725 aclc = car_loop[i].crl_pilots_on_5;
2726 else if (state->srate <= 15000000)
2727 aclc = car_loop[i].crl_pilots_on_10;
2728 else if (state->srate <= 25000000)
2729 aclc = car_loop[i].crl_pilots_on_20;
2730 else
2731 aclc = car_loop[i].crl_pilots_on_30;
2732 } else {
2733 if (state->srate <= 3000000)
2734 aclc = car_loop[i].crl_pilots_off_2;
2735 else if (state->srate <= 7000000)
2736 aclc = car_loop[i].crl_pilots_off_5;
2737 else if (state->srate <= 15000000)
2738 aclc = car_loop[i].crl_pilots_off_10;
2739 else if (state->srate <= 25000000)
2740 aclc = car_loop[i].crl_pilots_off_20;
2741 else
2742 aclc = car_loop[i].crl_pilots_off_30;
2743 }
2744 } else { /* 16APSK and 32APSK */
2745 if (state->srate <= 3000000)
2746 aclc = car_loop_apsk_low[i].crl_pilots_on_2;
2747 else if (state->srate <= 7000000)
2748 aclc = car_loop_apsk_low[i].crl_pilots_on_5;
2749 else if (state->srate <= 15000000)
2750 aclc = car_loop_apsk_low[i].crl_pilots_on_10;
2751 else if (state->srate <= 25000000)
2752 aclc = car_loop_apsk_low[i].crl_pilots_on_20;
2753 else
2754 aclc = car_loop_apsk_low[i].crl_pilots_on_30;
2755 }
2756
2757 return aclc;
2758 }
2759
2760 static u8 stv090x_optimize_carloop_short(struct stv090x_state *state)
2761 {
2762 struct stv090x_short_frame_crloop *short_crl = NULL;
2763 s32 index = 0;
2764 u8 aclc = 0x0b;
2765
2766 switch (state->modulation) {
2767 case STV090x_QPSK:
2768 default:
2769 index = 0;
2770 break;
2771 case STV090x_8PSK:
2772 index = 1;
2773 break;
2774 case STV090x_16APSK:
2775 index = 2;
2776 break;
2777 case STV090x_32APSK:
2778 index = 3;
2779 break;
2780 }
2781
2782 if (state->internal->dev_ver >= 0x30) {
2783 /* Cut 3.0 and up */
2784 short_crl = stv090x_s2_short_crl_cut30;
2785 } else {
2786 /* Cut 2.0 and up: we don't support cuts older than 2.0 */
2787 short_crl = stv090x_s2_short_crl_cut20;
2788 }
2789
2790 if (state->srate <= 3000000)
2791 aclc = short_crl[index].crl_2;
2792 else if (state->srate <= 7000000)
2793 aclc = short_crl[index].crl_5;
2794 else if (state->srate <= 15000000)
2795 aclc = short_crl[index].crl_10;
2796 else if (state->srate <= 25000000)
2797 aclc = short_crl[index].crl_20;
2798 else
2799 aclc = short_crl[index].crl_30;
2800
2801 return aclc;
2802 }
2803
2804 static int stv090x_optimize_track(struct stv090x_state *state)
2805 {
2806 struct dvb_frontend *fe = &state->frontend;
2807
2808 enum stv090x_rolloff rolloff;
2809 enum stv090x_modcod modcod;
2810
2811 s32 srate, pilots, aclc, f_1, f_0, i = 0, blind_tune = 0;
2812 u32 reg;
2813
2814 srate = stv090x_get_srate(state, state->internal->mclk);
2815 srate += stv090x_get_tmgoffst(state, srate);
2816
2817 switch (state->delsys) {
2818 case STV090x_DVBS1:
2819 case STV090x_DSS:
2820 if (state->search_mode == STV090x_SEARCH_AUTO) {
2821 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2822 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2823 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
2824 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2825 goto err;
2826 }
2827 reg = STV090x_READ_DEMOD(state, DEMOD);
2828 STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
2829 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x01);
2830 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2831 goto err;
2832
2833 if (state->internal->dev_ver >= 0x30) {
2834 if (stv090x_get_viterbi(state) < 0)
2835 goto err;
2836
2837 if (state->fec == STV090x_PR12) {
2838 if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x98) < 0)
2839 goto err;
2840 if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
2841 goto err;
2842 } else {
2843 if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x18) < 0)
2844 goto err;
2845 if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
2846 goto err;
2847 }
2848 }
2849
2850 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
2851 goto err;
2852 break;
2853
2854 case STV090x_DVBS2:
2855 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2856 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
2857 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
2858 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2859 goto err;
2860 if (STV090x_WRITE_DEMOD(state, ACLC, 0) < 0)
2861 goto err;
2862 if (STV090x_WRITE_DEMOD(state, BCLC, 0) < 0)
2863 goto err;
2864 if (state->frame_len == STV090x_LONG_FRAME) {
2865 reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2866 modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2867 pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2868 aclc = stv090x_optimize_carloop(state, modcod, pilots);
2869 if (modcod <= STV090x_QPSK_910) {
2870 STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc);
2871 } else if (modcod <= STV090x_8PSK_910) {
2872 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2873 goto err;
2874 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2875 goto err;
2876 }
2877 if ((state->demod_mode == STV090x_SINGLE) && (modcod > STV090x_8PSK_910)) {
2878 if (modcod <= STV090x_16APSK_910) {
2879 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2880 goto err;
2881 if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2882 goto err;
2883 } else {
2884 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2885 goto err;
2886 if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2887 goto err;
2888 }
2889 }
2890 } else {
2891 /*Carrier loop setting for short frame*/
2892 aclc = stv090x_optimize_carloop_short(state);
2893 if (state->modulation == STV090x_QPSK) {
2894 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc) < 0)
2895 goto err;
2896 } else if (state->modulation == STV090x_8PSK) {
2897 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2898 goto err;
2899 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2900 goto err;
2901 } else if (state->modulation == STV090x_16APSK) {
2902 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2903 goto err;
2904 if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2905 goto err;
2906 } else if (state->modulation == STV090x_32APSK) {
2907 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2908 goto err;
2909 if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2910 goto err;
2911 }
2912 }
2913
2914 STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67); /* PER */
2915 break;
2916
2917 case STV090x_UNKNOWN:
2918 default:
2919 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2920 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2921 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
2922 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2923 goto err;
2924 break;
2925 }
2926
2927 f_1 = STV090x_READ_DEMOD(state, CFR2);
2928 f_0 = STV090x_READ_DEMOD(state, CFR1);
2929 reg = STV090x_READ_DEMOD(state, TMGOBS);
2930 rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
2931
2932 if (state->algo == STV090x_BLIND_SEARCH) {
2933 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00);
2934 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2935 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0x00);
2936 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
2937 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2938 goto err;
2939 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
2940 goto err;
2941
2942 if (stv090x_set_srate(state, srate) < 0)
2943 goto err;
2944 blind_tune = 1;
2945
2946 if (stv090x_dvbs_track_crl(state) < 0)
2947 goto err;
2948 }
2949
2950 if (state->internal->dev_ver >= 0x20) {
2951 if ((state->search_mode == STV090x_SEARCH_DVBS1) ||
2952 (state->search_mode == STV090x_SEARCH_DSS) ||
2953 (state->search_mode == STV090x_SEARCH_AUTO)) {
2954
2955 if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x0a) < 0)
2956 goto err;
2957 if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x00) < 0)
2958 goto err;
2959 }
2960 }
2961
2962 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
2963 goto err;
2964
2965 /* AUTO tracking MODE */
2966 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x80) < 0)
2967 goto err;
2968 /* AUTO tracking MODE */
2969 if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x80) < 0)
2970 goto err;
2971
2972 if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1) ||
2973 (state->srate < 10000000)) {
2974 /* update initial carrier freq with the found freq offset */
2975 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2976 goto err;
2977 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
2978 goto err;
2979 state->tuner_bw = stv090x_car_width(srate, state->rolloff) + 10000000;
2980
2981 if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1)) {
2982
2983 if (state->algo != STV090x_WARM_SEARCH) {
2984
2985 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
2986 goto err;
2987
2988 if (state->config->tuner_set_bandwidth) {
2989 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
2990 goto err;
2991 }
2992
2993 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
2994 goto err;
2995
2996 }
2997 }
2998 if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000))
2999 msleep(50); /* blind search: wait 50ms for SR stabilization */
3000 else
3001 msleep(5);
3002
3003 stv090x_get_lock_tmg(state);
3004
3005 if (!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) {
3006 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
3007 goto err;
3008 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
3009 goto err;
3010 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
3011 goto err;
3012 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
3013 goto err;
3014
3015 i = 0;
3016
3017 while ((!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) && (i <= 2)) {
3018
3019 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
3020 goto err;
3021 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
3022 goto err;
3023 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
3024 goto err;
3025 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
3026 goto err;
3027 i++;
3028 }
3029 }
3030
3031 }
3032
3033 if (state->internal->dev_ver >= 0x20) {
3034 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
3035 goto err;
3036 }
3037
3038 if ((state->delsys == STV090x_DVBS1) || (state->delsys == STV090x_DSS))
3039 stv090x_set_vit_thtracq(state);
3040
3041 return 0;
3042 err:
3043 dprintk(FE_ERROR, 1, "I/O error");
3044 return -1;
3045 }
3046
3047 static int stv090x_get_feclock(struct stv090x_state *state, s32 timeout)
3048 {
3049 s32 timer = 0, lock = 0, stat;
3050 u32 reg;
3051
3052 while ((timer < timeout) && (!lock)) {
3053 reg = STV090x_READ_DEMOD(state, DMDSTATE);
3054 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
3055
3056 switch (stat) {
3057 case 0: /* searching */
3058 case 1: /* first PLH detected */
3059 default:
3060 lock = 0;
3061 break;
3062
3063 case 2: /* DVB-S2 mode */
3064 reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
3065 lock = STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD);
3066 break;
3067
3068 case 3: /* DVB-S1/legacy mode */
3069 reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
3070 lock = STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD);
3071 break;
3072 }
3073 if (!lock) {
3074 msleep(10);
3075 timer += 10;
3076 }
3077 }
3078 return lock;
3079 }
3080
3081 static int stv090x_get_lock(struct stv090x_state *state, s32 timeout_dmd, s32 timeout_fec)
3082 {
3083 u32 reg;
3084 s32 timer = 0;
3085 int lock;
3086
3087 lock = stv090x_get_dmdlock(state, timeout_dmd);
3088 if (lock)
3089 lock = stv090x_get_feclock(state, timeout_fec);
3090
3091 if (lock) {
3092 lock = 0;
3093
3094 while ((timer < timeout_fec) && (!lock)) {
3095 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3096 lock = STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD);
3097 msleep(1);
3098 timer++;
3099 }
3100 }
3101
3102 return lock;
3103 }
3104
3105 static int stv090x_set_s2rolloff(struct stv090x_state *state)
3106 {
3107 u32 reg;
3108
3109 if (state->internal->dev_ver <= 0x20) {
3110 /* rolloff to auto mode if DVBS2 */
3111 reg = STV090x_READ_DEMOD(state, DEMOD);
3112 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x00);
3113 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3114 goto err;
3115 } else {
3116 /* DVB-S2 rolloff to auto mode if DVBS2 */
3117 reg = STV090x_READ_DEMOD(state, DEMOD);
3118 STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 0x00);
3119 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3120 goto err;
3121 }
3122 return 0;
3123 err:
3124 dprintk(FE_ERROR, 1, "I/O error");
3125 return -1;
3126 }
3127
3128
3129 static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
3130 {
3131 struct dvb_frontend *fe = &state->frontend;
3132 enum stv090x_signal_state signal_state = STV090x_NOCARRIER;
3133 u32 reg;
3134 s32 agc1_power, power_iq = 0, i;
3135 int lock = 0, low_sr = 0, no_signal = 0;
3136
3137 reg = STV090x_READ_DEMOD(state, TSCFGH);
3138 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* Stop path 1 stream merger */
3139 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3140 goto err;
3141
3142 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod stop */
3143 goto err;
3144
3145 if (state->internal->dev_ver >= 0x20) {
3146 if (state->srate > 5000000) {
3147 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
3148 goto err;
3149 } else {
3150 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x82) < 0)
3151 goto err;
3152 }
3153 }
3154
3155 stv090x_get_lock_tmg(state);
3156
3157 if (state->algo == STV090x_BLIND_SEARCH) {
3158 state->tuner_bw = 2 * 36000000; /* wide bw for unknown srate */
3159 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0) /* wider srate scan */
3160 goto err;
3161 if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
3162 goto err;
3163 if (stv090x_set_srate(state, 1000000) < 0) /* inital srate = 1Msps */
3164 goto err;
3165 } else {
3166 /* known srate */
3167 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
3168 goto err;
3169 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
3170 goto err;
3171
3172 if (state->srate < 2000000) {
3173 /* SR < 2MSPS */
3174 if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x63) < 0)
3175 goto err;
3176 } else {
3177 /* SR >= 2Msps */
3178 if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
3179 goto err;
3180 }
3181
3182 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
3183 goto err;
3184
3185 if (state->internal->dev_ver >= 0x20) {
3186 if (STV090x_WRITE_DEMOD(state, KREFTMG, 0x5a) < 0)
3187 goto err;
3188 if (state->algo == STV090x_COLD_SEARCH)
3189 state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 10000000)) / 10;
3190 else if (state->algo == STV090x_WARM_SEARCH)
3191 state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + 10000000;
3192 }
3193
3194 /* if cold start or warm (Symbolrate is known)
3195 * use a Narrow symbol rate scan range
3196 */
3197 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0) /* narrow srate scan */
3198 goto err;
3199
3200 if (stv090x_set_srate(state, state->srate) < 0)
3201 goto err;
3202
3203 if (stv090x_set_max_srate(state, state->internal->mclk,
3204 state->srate) < 0)
3205 goto err;
3206 if (stv090x_set_min_srate(state, state->internal->mclk,
3207 state->srate) < 0)
3208 goto err;
3209
3210 if (state->srate >= 10000000)
3211 low_sr = 0;
3212 else
3213 low_sr = 1;
3214 }
3215
3216 /* Setup tuner */
3217 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
3218 goto err;
3219
3220 if (state->config->tuner_set_bbgain) {
3221 if (state->config->tuner_set_bbgain(fe, 10) < 0) /* 10dB */
3222 goto err;
3223 }
3224
3225 if (state->config->tuner_set_frequency) {
3226 if (state->config->tuner_set_frequency(fe, state->frequency) < 0)
3227 goto err;
3228 }
3229
3230 if (state->config->tuner_set_bandwidth) {
3231 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
3232 goto err;
3233 }
3234
3235 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
3236 goto err;
3237
3238 msleep(50);
3239
3240 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
3241 goto err;
3242
3243 if (state->config->tuner_get_status) {
3244 if (state->config->tuner_get_status(fe, &reg) < 0)
3245 goto err;
3246 }
3247
3248 if (reg)
3249 dprintk(FE_DEBUG, 1, "Tuner phase locked");
3250 else
3251 dprintk(FE_DEBUG, 1, "Tuner unlocked");
3252
3253 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
3254 goto err;
3255
3256 msleep(10);
3257 agc1_power = MAKEWORD16(STV090x_READ_DEMOD(state, AGCIQIN1),
3258 STV090x_READ_DEMOD(state, AGCIQIN0));
3259
3260 if (agc1_power == 0) {
3261 /* If AGC1 integrator value is 0
3262 * then read POWERI, POWERQ
3263 */
3264 for (i = 0; i < 5; i++) {
3265 power_iq += (STV090x_READ_DEMOD(state, POWERI) +
3266 STV090x_READ_DEMOD(state, POWERQ)) >> 1;
3267 }
3268 power_iq /= 5;
3269 }
3270
3271 if ((agc1_power == 0) && (power_iq < STV090x_IQPOWER_THRESHOLD)) {
3272 dprintk(FE_ERROR, 1, "No Signal: POWER_IQ=0x%02x", power_iq);
3273 lock = 0;
3274 signal_state = STV090x_NOAGC1;
3275 } else {
3276 reg = STV090x_READ_DEMOD(state, DEMOD);
3277 STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, state->inversion);
3278
3279 if (state->internal->dev_ver <= 0x20) {
3280 /* rolloff to auto mode if DVBS2 */
3281 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 1);
3282 } else {
3283 /* DVB-S2 rolloff to auto mode if DVBS2 */
3284 STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 1);
3285 }
3286 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3287 goto err;
3288
3289 if (stv090x_delivery_search(state) < 0)
3290 goto err;
3291
3292 if (state->algo != STV090x_BLIND_SEARCH) {
3293 if (stv090x_start_search(state) < 0)
3294 goto err;
3295 }
3296 }
3297
3298 if (signal_state == STV090x_NOAGC1)
3299 return signal_state;
3300
3301 if (state->algo == STV090x_BLIND_SEARCH)
3302 lock = stv090x_blind_search(state);
3303
3304 else if (state->algo == STV090x_COLD_SEARCH)
3305 lock = stv090x_get_coldlock(state, state->DemodTimeout);
3306
3307 else if (state->algo == STV090x_WARM_SEARCH)
3308 lock = stv090x_get_dmdlock(state, state->DemodTimeout);
3309
3310 if ((!lock) && (state->algo == STV090x_COLD_SEARCH)) {
3311 if (!low_sr) {
3312 if (stv090x_chk_tmg(state))
3313 lock = stv090x_sw_algo(state);
3314 }
3315 }
3316
3317 if (lock)
3318 signal_state = stv090x_get_sig_params(state);
3319
3320 if ((lock) && (signal_state == STV090x_RANGEOK)) { /* signal within Range */
3321 stv090x_optimize_track(state);
3322
3323 if (state->internal->dev_ver >= 0x20) {
3324 /* >= Cut 2.0 :release TS reset after
3325 * demod lock and optimized Tracking
3326 */
3327 reg = STV090x_READ_DEMOD(state, TSCFGH);
3328 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3329 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3330 goto err;
3331
3332 msleep(3);
3333
3334 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
3335 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3336 goto err;
3337
3338 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3339 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3340 goto err;
3341 }
3342
3343 lock = stv090x_get_lock(state, state->FecTimeout,
3344 state->FecTimeout);
3345 if (lock) {
3346 if (state->delsys == STV090x_DVBS2) {
3347 stv090x_set_s2rolloff(state);
3348
3349 reg = STV090x_READ_DEMOD(state, PDELCTRL2);
3350 STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 1);
3351 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
3352 goto err;
3353 /* Reset DVBS2 packet delinator error counter */
3354 reg = STV090x_READ_DEMOD(state, PDELCTRL2);
3355 STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 0);
3356 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
3357 goto err;
3358
3359 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67) < 0) /* PER */
3360 goto err;
3361 } else {
3362 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
3363 goto err;
3364 }
3365 /* Reset the Total packet counter */
3366 if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0x00) < 0)
3367 goto err;
3368 /* Reset the packet Error counter2 */
3369 if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3370 goto err;
3371 } else {
3372 signal_state = STV090x_NODATA;
3373 no_signal = stv090x_chk_signal(state);
3374 }
3375 }
3376 return signal_state;
3377
3378 err:
3379 dprintk(FE_ERROR, 1, "I/O error");
3380 return -1;
3381 }
3382
3383 static enum dvbfe_search stv090x_search(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
3384 {
3385 struct stv090x_state *state = fe->demodulator_priv;
3386 struct dtv_frontend_properties *props = &fe->dtv_property_cache;
3387
3388 state->delsys = props->delivery_system;
3389 state->frequency = p->frequency;
3390 state->srate = p->u.qpsk.symbol_rate;
3391 state->search_mode = STV090x_SEARCH_AUTO;
3392 state->algo = STV090x_COLD_SEARCH;
3393 state->fec = STV090x_PRERR;
3394 if (state->srate > 10000000) {
3395 dprintk(FE_DEBUG, 1, "Search range: 10 MHz");
3396 state->search_range = 10000000;
3397 } else {
3398 dprintk(FE_DEBUG, 1, "Search range: 5 MHz");
3399 state->search_range = 5000000;
3400 }
3401
3402 if (stv090x_algo(state) == STV090x_RANGEOK) {
3403 dprintk(FE_DEBUG, 1, "Search success!");
3404 return DVBFE_ALGO_SEARCH_SUCCESS;
3405 } else {
3406 dprintk(FE_DEBUG, 1, "Search failed!");
3407 return DVBFE_ALGO_SEARCH_FAILED;
3408 }
3409
3410 return DVBFE_ALGO_SEARCH_ERROR;
3411 }
3412
3413 static int stv090x_read_status(struct dvb_frontend *fe, enum fe_status *status)
3414 {
3415 struct stv090x_state *state = fe->demodulator_priv;
3416 u32 reg;
3417 u8 search_state;
3418
3419 reg = STV090x_READ_DEMOD(state, DMDSTATE);
3420 search_state = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
3421
3422 switch (search_state) {
3423 case 0: /* searching */
3424 case 1: /* first PLH detected */
3425 default:
3426 dprintk(FE_DEBUG, 1, "Status: Unlocked (Searching ..)");
3427 *status = 0;
3428 break;
3429
3430 case 2: /* DVB-S2 mode */
3431 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S2");
3432 reg = STV090x_READ_DEMOD(state, DSTATUS);
3433 if (STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD)) {
3434 reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
3435 if (STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD)) {
3436 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3437 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) {
3438 *status = FE_HAS_CARRIER |
3439 FE_HAS_VITERBI |
3440 FE_HAS_SYNC |
3441 FE_HAS_LOCK;
3442 }
3443 }
3444 }
3445 break;
3446
3447 case 3: /* DVB-S1/legacy mode */
3448 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S");
3449 reg = STV090x_READ_DEMOD(state, DSTATUS);
3450 if (STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD)) {
3451 reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
3452 if (STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD)) {
3453 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3454 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) {
3455 *status = FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
3456 }
3457 }
3458 }
3459 break;
3460 }
3461
3462 return 0;
3463 }
3464
3465 static int stv090x_read_per(struct dvb_frontend *fe, u32 *per)
3466 {
3467 struct stv090x_state *state = fe->demodulator_priv;
3468
3469 s32 count_4, count_3, count_2, count_1, count_0, count;
3470 u32 reg, h, m, l;
3471 enum fe_status status;
3472
3473 stv090x_read_status(fe, &status);
3474 if (!(status & FE_HAS_LOCK)) {
3475 *per = 1 << 23; /* Max PER */
3476 } else {
3477 /* Counter 2 */
3478 reg = STV090x_READ_DEMOD(state, ERRCNT22);
3479 h = STV090x_GETFIELD_Px(reg, ERR_CNT2_FIELD);
3480
3481 reg = STV090x_READ_DEMOD(state, ERRCNT21);
3482 m = STV090x_GETFIELD_Px(reg, ERR_CNT21_FIELD);
3483
3484 reg = STV090x_READ_DEMOD(state, ERRCNT20);
3485 l = STV090x_GETFIELD_Px(reg, ERR_CNT20_FIELD);
3486
3487 *per = ((h << 16) | (m << 8) | l);
3488
3489 count_4 = STV090x_READ_DEMOD(state, FBERCPT4);
3490 count_3 = STV090x_READ_DEMOD(state, FBERCPT3);
3491 count_2 = STV090x_READ_DEMOD(state, FBERCPT2);
3492 count_1 = STV090x_READ_DEMOD(state, FBERCPT1);
3493 count_0 = STV090x_READ_DEMOD(state, FBERCPT0);
3494
3495 if ((!count_4) && (!count_3)) {
3496 count = (count_2 & 0xff) << 16;
3497 count |= (count_1 & 0xff) << 8;
3498 count |= count_0 & 0xff;
3499 } else {
3500 count = 1 << 24;
3501 }
3502 if (count == 0)
3503 *per = 1;
3504 }
3505 if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0) < 0)
3506 goto err;
3507 if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3508 goto err;
3509
3510 return 0;
3511 err:
3512 dprintk(FE_ERROR, 1, "I/O error");
3513 return -1;
3514 }
3515
3516 static int stv090x_table_lookup(const struct stv090x_tab *tab, int max, int val)
3517 {
3518 int res = 0;
3519 int min = 0, med;
3520
3521 if ((val >= tab[min].read && val < tab[max].read) ||
3522 (val >= tab[max].read && val < tab[min].read)) {
3523 while ((max - min) > 1) {
3524 med = (max + min) / 2;
3525 if ((val >= tab[min].read && val < tab[med].read) ||
3526 (val >= tab[med].read && val < tab[min].read))
3527 max = med;
3528 else
3529 min = med;
3530 }
3531 res = ((val - tab[min].read) *
3532 (tab[max].real - tab[min].real) /
3533 (tab[max].read - tab[min].read)) +
3534 tab[min].real;
3535 } else {
3536 if (tab[min].read < tab[max].read) {
3537 if (val < tab[min].read)
3538 res = tab[min].real;
3539 else if (val >= tab[max].read)
3540 res = tab[max].real;
3541 } else {
3542 if (val >= tab[min].read)
3543 res = tab[min].real;
3544 else if (val < tab[max].read)
3545 res = tab[max].real;
3546 }
3547 }
3548
3549 return res;
3550 }
3551
3552 static int stv090x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
3553 {
3554 struct stv090x_state *state = fe->demodulator_priv;
3555 u32 reg;
3556 s32 agc_0, agc_1, agc;
3557 s32 str;
3558
3559 reg = STV090x_READ_DEMOD(state, AGCIQIN1);
3560 agc_1 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
3561 reg = STV090x_READ_DEMOD(state, AGCIQIN0);
3562 agc_0 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
3563 agc = MAKEWORD16(agc_1, agc_0);
3564
3565 str = stv090x_table_lookup(stv090x_rf_tab,
3566 ARRAY_SIZE(stv090x_rf_tab) - 1, agc);
3567 if (agc > stv090x_rf_tab[0].read)
3568 str = 0;
3569 else if (agc < stv090x_rf_tab[ARRAY_SIZE(stv090x_rf_tab) - 1].read)
3570 str = -100;
3571 *strength = (str + 100) * 0xFFFF / 100;
3572
3573 return 0;
3574 }
3575
3576 static int stv090x_read_cnr(struct dvb_frontend *fe, u16 *cnr)
3577 {
3578 struct stv090x_state *state = fe->demodulator_priv;
3579 u32 reg_0, reg_1, reg, i;
3580 s32 val_0, val_1, val = 0;
3581 u8 lock_f;
3582 s32 div;
3583 u32 last;
3584
3585 switch (state->delsys) {
3586 case STV090x_DVBS2:
3587 reg = STV090x_READ_DEMOD(state, DSTATUS);
3588 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3589 if (lock_f) {
3590 msleep(5);
3591 for (i = 0; i < 16; i++) {
3592 reg_1 = STV090x_READ_DEMOD(state, NNOSPLHT1);
3593 val_1 = STV090x_GETFIELD_Px(reg_1, NOSPLHT_NORMED_FIELD);
3594 reg_0 = STV090x_READ_DEMOD(state, NNOSPLHT0);
3595 val_0 = STV090x_GETFIELD_Px(reg_0, NOSPLHT_NORMED_FIELD);
3596 val += MAKEWORD16(val_1, val_0);
3597 msleep(1);
3598 }
3599 val /= 16;
3600 last = ARRAY_SIZE(stv090x_s2cn_tab) - 1;
3601 div = stv090x_s2cn_tab[0].read -
3602 stv090x_s2cn_tab[last].read;
3603 *cnr = 0xFFFF - ((val * 0xFFFF) / div);
3604 }
3605 break;
3606
3607 case STV090x_DVBS1:
3608 case STV090x_DSS:
3609 reg = STV090x_READ_DEMOD(state, DSTATUS);
3610 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3611 if (lock_f) {
3612 msleep(5);
3613 for (i = 0; i < 16; i++) {
3614 reg_1 = STV090x_READ_DEMOD(state, NOSDATAT1);
3615 val_1 = STV090x_GETFIELD_Px(reg_1, NOSDATAT_UNNORMED_FIELD);
3616 reg_0 = STV090x_READ_DEMOD(state, NOSDATAT0);
3617 val_0 = STV090x_GETFIELD_Px(reg_0, NOSDATAT_UNNORMED_FIELD);
3618 val += MAKEWORD16(val_1, val_0);
3619 msleep(1);
3620 }
3621 val /= 16;
3622 last = ARRAY_SIZE(stv090x_s1cn_tab) - 1;
3623 div = stv090x_s1cn_tab[0].read -
3624 stv090x_s1cn_tab[last].read;
3625 *cnr = 0xFFFF - ((val * 0xFFFF) / div);
3626 }
3627 break;
3628 default:
3629 break;
3630 }
3631
3632 return 0;
3633 }
3634
3635 static int stv090x_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
3636 {
3637 struct stv090x_state *state = fe->demodulator_priv;
3638 u32 reg;
3639
3640 reg = STV090x_READ_DEMOD(state, DISTXCTL);
3641 switch (tone) {
3642 case SEC_TONE_ON:
3643 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3644 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3645 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3646 goto err;
3647 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3648 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3649 goto err;
3650 break;
3651
3652 case SEC_TONE_OFF:
3653 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3654 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3655 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3656 goto err;
3657 break;
3658 default:
3659 return -EINVAL;
3660 }
3661
3662 return 0;
3663 err:
3664 dprintk(FE_ERROR, 1, "I/O error");
3665 return -1;
3666 }
3667
3668
3669 static enum dvbfe_algo stv090x_frontend_algo(struct dvb_frontend *fe)
3670 {
3671 return DVBFE_ALGO_CUSTOM;
3672 }
3673
3674 static int stv090x_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
3675 {
3676 struct stv090x_state *state = fe->demodulator_priv;
3677 u32 reg, idle = 0, fifo_full = 1;
3678 int i;
3679
3680 reg = STV090x_READ_DEMOD(state, DISTXCTL);
3681
3682 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD,
3683 (state->config->diseqc_envelope_mode) ? 4 : 2);
3684 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3685 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3686 goto err;
3687 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3688 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3689 goto err;
3690
3691 STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
3692 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3693 goto err;
3694
3695 for (i = 0; i < cmd->msg_len; i++) {
3696
3697 while (fifo_full) {
3698 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3699 fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
3700 }
3701
3702 if (STV090x_WRITE_DEMOD(state, DISTXDATA, cmd->msg[i]) < 0)
3703 goto err;
3704 }
3705 reg = STV090x_READ_DEMOD(state, DISTXCTL);
3706 STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
3707 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3708 goto err;
3709
3710 i = 0;
3711
3712 while ((!idle) && (i < 10)) {
3713 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3714 idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
3715 msleep(10);
3716 i++;
3717 }
3718
3719 return 0;
3720 err:
3721 dprintk(FE_ERROR, 1, "I/O error");
3722 return -1;
3723 }
3724
3725 static int stv090x_send_diseqc_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t burst)
3726 {
3727 struct stv090x_state *state = fe->demodulator_priv;
3728 u32 reg, idle = 0, fifo_full = 1;
3729 u8 mode, value;
3730 int i;
3731
3732 reg = STV090x_READ_DEMOD(state, DISTXCTL);
3733
3734 if (burst == SEC_MINI_A) {
3735 mode = (state->config->diseqc_envelope_mode) ? 5 : 3;
3736 value = 0x00;
3737 } else {
3738 mode = (state->config->diseqc_envelope_mode) ? 4 : 2;
3739 value = 0xFF;
3740 }
3741
3742 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, mode);
3743 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3744 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3745 goto err;
3746 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3747 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3748 goto err;
3749
3750 STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
3751 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3752 goto err;
3753
3754 while (fifo_full) {
3755 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3756 fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
3757 }
3758
3759 if (STV090x_WRITE_DEMOD(state, DISTXDATA, value) < 0)
3760 goto err;
3761
3762 reg = STV090x_READ_DEMOD(state, DISTXCTL);
3763 STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
3764 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3765 goto err;
3766
3767 i = 0;
3768
3769 while ((!idle) && (i < 10)) {
3770 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3771 idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
3772 msleep(10);
3773 i++;
3774 }
3775
3776 return 0;
3777 err:
3778 dprintk(FE_ERROR, 1, "I/O error");
3779 return -1;
3780 }
3781
3782 static int stv090x_recv_slave_reply(struct dvb_frontend *fe, struct dvb_diseqc_slave_reply *reply)
3783 {
3784 struct stv090x_state *state = fe->demodulator_priv;
3785 u32 reg = 0, i = 0, rx_end = 0;
3786
3787 while ((rx_end != 1) && (i < 10)) {
3788 msleep(10);
3789 i++;
3790 reg = STV090x_READ_DEMOD(state, DISRX_ST0);
3791 rx_end = STV090x_GETFIELD_Px(reg, RX_END_FIELD);
3792 }
3793
3794 if (rx_end) {
3795 reply->msg_len = STV090x_GETFIELD_Px(reg, FIFO_BYTENBR_FIELD);
3796 for (i = 0; i < reply->msg_len; i++)
3797 reply->msg[i] = STV090x_READ_DEMOD(state, DISRXDATA);
3798 }
3799
3800 return 0;
3801 }
3802
3803 static int stv090x_sleep(struct dvb_frontend *fe)
3804 {
3805 struct stv090x_state *state = fe->demodulator_priv;
3806 u32 reg;
3807
3808 dprintk(FE_DEBUG, 1, "Set %s to sleep",
3809 state->device == STV0900 ? "STV0900" : "STV0903");
3810
3811 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3812 STV090x_SETFIELD(reg, STANDBY_FIELD, 0x01);
3813 if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
3814 goto err;
3815
3816 reg = stv090x_read_reg(state, STV090x_TSTTNR1);
3817 STV090x_SETFIELD(reg, ADC1_PON_FIELD, 0);
3818 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
3819 goto err;
3820
3821 return 0;
3822 err:
3823 dprintk(FE_ERROR, 1, "I/O error");
3824 return -1;
3825 }
3826
3827 static int stv090x_wakeup(struct dvb_frontend *fe)
3828 {
3829 struct stv090x_state *state = fe->demodulator_priv;
3830 u32 reg;
3831
3832 dprintk(FE_DEBUG, 1, "Wake %s from standby",
3833 state->device == STV0900 ? "STV0900" : "STV0903");
3834
3835 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3836 STV090x_SETFIELD(reg, STANDBY_FIELD, 0x00);
3837 if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
3838 goto err;
3839
3840 reg = stv090x_read_reg(state, STV090x_TSTTNR1);
3841 STV090x_SETFIELD(reg, ADC1_PON_FIELD, 1);
3842 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
3843 goto err;
3844
3845 return 0;
3846 err:
3847 dprintk(FE_ERROR, 1, "I/O error");
3848 return -1;
3849 }
3850
3851 static void stv090x_release(struct dvb_frontend *fe)
3852 {
3853 struct stv090x_state *state = fe->demodulator_priv;
3854
3855 state->internal->num_used--;
3856 if (state->internal->num_used <= 0) {
3857
3858 dprintk(FE_ERROR, 1, "Actually removing");
3859
3860 remove_dev(state->internal);
3861 kfree(state->internal);
3862 }
3863
3864 kfree(state);
3865 }
3866
3867 static int stv090x_ldpc_mode(struct stv090x_state *state, enum stv090x_mode ldpc_mode)
3868 {
3869 u32 reg = 0;
3870
3871 reg = stv090x_read_reg(state, STV090x_GENCFG);
3872
3873 switch (ldpc_mode) {
3874 case STV090x_DUAL:
3875 default:
3876 if ((state->demod_mode != STV090x_DUAL) || (STV090x_GETFIELD(reg, DDEMOD_FIELD) != 1)) {
3877 /* set LDPC to dual mode */
3878 if (stv090x_write_reg(state, STV090x_GENCFG, 0x1d) < 0)
3879 goto err;
3880
3881 state->demod_mode = STV090x_DUAL;
3882
3883 reg = stv090x_read_reg(state, STV090x_TSTRES0);
3884 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
3885 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3886 goto err;
3887 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
3888 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3889 goto err;
3890
3891 if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
3892 goto err;
3893 if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
3894 goto err;
3895 if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
3896 goto err;
3897 if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
3898 goto err;
3899 if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
3900 goto err;
3901 if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
3902 goto err;
3903 if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
3904 goto err;
3905
3906 if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
3907 goto err;
3908 if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
3909 goto err;
3910 if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
3911 goto err;
3912 if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
3913 goto err;
3914 if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
3915 goto err;
3916 if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
3917 goto err;
3918 if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
3919 goto err;
3920
3921 if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
3922 goto err;
3923 if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
3924 goto err;
3925 }
3926 break;
3927
3928 case STV090x_SINGLE:
3929 if (stv090x_stop_modcod(state) < 0)
3930 goto err;
3931 if (stv090x_activate_modcod_single(state) < 0)
3932 goto err;
3933
3934 if (state->demod == STV090x_DEMODULATOR_1) {
3935 if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */
3936 goto err;
3937 } else {
3938 if (stv090x_write_reg(state, STV090x_GENCFG, 0x04) < 0) /* path 1 */
3939 goto err;
3940 }
3941
3942 reg = stv090x_read_reg(state, STV090x_TSTRES0);
3943 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
3944 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3945 goto err;
3946 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
3947 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3948 goto err;
3949
3950 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
3951 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x01);
3952 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3953 goto err;
3954 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x00);
3955 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3956 goto err;
3957 break;
3958 }
3959
3960 return 0;
3961 err:
3962 dprintk(FE_ERROR, 1, "I/O error");
3963 return -1;
3964 }
3965
3966 /* return (Hz), clk in Hz*/
3967 static u32 stv090x_get_mclk(struct stv090x_state *state)
3968 {
3969 const struct stv090x_config *config = state->config;
3970 u32 div, reg;
3971 u8 ratio;
3972
3973 div = stv090x_read_reg(state, STV090x_NCOARSE);
3974 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3975 ratio = STV090x_GETFIELD(reg, SELX1RATIO_FIELD) ? 4 : 6;
3976
3977 return (div + 1) * config->xtal / ratio; /* kHz */
3978 }
3979
3980 static int stv090x_set_mclk(struct stv090x_state *state, u32 mclk, u32 clk)
3981 {
3982 const struct stv090x_config *config = state->config;
3983 u32 reg, div, clk_sel;
3984
3985 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3986 clk_sel = ((STV090x_GETFIELD(reg, SELX1RATIO_FIELD) == 1) ? 4 : 6);
3987
3988 div = ((clk_sel * mclk) / config->xtal) - 1;
3989
3990 reg = stv090x_read_reg(state, STV090x_NCOARSE);
3991 STV090x_SETFIELD(reg, M_DIV_FIELD, div);
3992 if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0)
3993 goto err;
3994
3995 state->internal->mclk = stv090x_get_mclk(state);
3996
3997 /*Set the DiseqC frequency to 22KHz */
3998 div = state->internal->mclk / 704000;
3999 if (STV090x_WRITE_DEMOD(state, F22TX, div) < 0)
4000 goto err;
4001 if (STV090x_WRITE_DEMOD(state, F22RX, div) < 0)
4002 goto err;
4003
4004 return 0;
4005 err:
4006 dprintk(FE_ERROR, 1, "I/O error");
4007 return -1;
4008 }
4009
4010 static int stv090x_set_tspath(struct stv090x_state *state)
4011 {
4012 u32 reg;
4013
4014 if (state->internal->dev_ver >= 0x20) {
4015 switch (state->config->ts1_mode) {
4016 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4017 case STV090x_TSMODE_DVBCI:
4018 switch (state->config->ts2_mode) {
4019 case STV090x_TSMODE_SERIAL_PUNCTURED:
4020 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4021 default:
4022 stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
4023 break;
4024
4025 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4026 case STV090x_TSMODE_DVBCI:
4027 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x06) < 0) /* Mux'd stream mode */
4028 goto err;
4029 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4030 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4031 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4032 goto err;
4033 reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
4034 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4035 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
4036 goto err;
4037 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
4038 goto err;
4039 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
4040 goto err;
4041 break;
4042 }
4043 break;
4044
4045 case STV090x_TSMODE_SERIAL_PUNCTURED:
4046 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4047 default:
4048 switch (state->config->ts2_mode) {
4049 case STV090x_TSMODE_SERIAL_PUNCTURED:
4050 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4051 default:
4052 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
4053 goto err;
4054 break;
4055
4056 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4057 case STV090x_TSMODE_DVBCI:
4058 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0a) < 0)
4059 goto err;
4060 break;
4061 }
4062 break;
4063 }
4064 } else {
4065 switch (state->config->ts1_mode) {
4066 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4067 case STV090x_TSMODE_DVBCI:
4068 switch (state->config->ts2_mode) {
4069 case STV090x_TSMODE_SERIAL_PUNCTURED:
4070 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4071 default:
4072 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
4073 break;
4074
4075 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4076 case STV090x_TSMODE_DVBCI:
4077 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x16);
4078 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4079 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
4080 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4081 goto err;
4082 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
4083 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 0);
4084 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
4085 goto err;
4086 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
4087 goto err;
4088 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
4089 goto err;
4090 break;
4091 }
4092 break;
4093
4094 case STV090x_TSMODE_SERIAL_PUNCTURED:
4095 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4096 default:
4097 switch (state->config->ts2_mode) {
4098 case STV090x_TSMODE_SERIAL_PUNCTURED:
4099 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4100 default:
4101 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
4102 break;
4103
4104 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4105 case STV090x_TSMODE_DVBCI:
4106 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x12);
4107 break;
4108 }
4109 break;
4110 }
4111 }
4112
4113 switch (state->config->ts1_mode) {
4114 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4115 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4116 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4117 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4118 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4119 goto err;
4120 break;
4121
4122 case STV090x_TSMODE_DVBCI:
4123 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4124 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4125 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4126 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4127 goto err;
4128 break;
4129
4130 case STV090x_TSMODE_SERIAL_PUNCTURED:
4131 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4132 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4133 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4134 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4135 goto err;
4136 break;
4137
4138 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4139 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4140 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4141 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4142 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4143 goto err;
4144 break;
4145
4146 default:
4147 break;
4148 }
4149
4150 switch (state->config->ts2_mode) {
4151 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4152 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4153 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4154 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4155 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4156 goto err;
4157 break;
4158
4159 case STV090x_TSMODE_DVBCI:
4160 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4161 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4162 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4163 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4164 goto err;
4165 break;
4166
4167 case STV090x_TSMODE_SERIAL_PUNCTURED:
4168 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4169 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4170 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4171 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4172 goto err;
4173 break;
4174
4175 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4176 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4177 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4178 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4179 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4180 goto err;
4181 break;
4182
4183 default:
4184 break;
4185 }
4186 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4187 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
4188 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4189 goto err;
4190 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
4191 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4192 goto err;
4193
4194 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4195 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
4196 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4197 goto err;
4198 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
4199 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4200 goto err;
4201
4202 return 0;
4203 err:
4204 dprintk(FE_ERROR, 1, "I/O error");
4205 return -1;
4206 }
4207
4208 static int stv090x_init(struct dvb_frontend *fe)
4209 {
4210 struct stv090x_state *state = fe->demodulator_priv;
4211 const struct stv090x_config *config = state->config;
4212 u32 reg;
4213
4214 if (stv090x_wakeup(fe) < 0) {
4215 dprintk(FE_ERROR, 1, "Error waking device");
4216 goto err;
4217 }
4218
4219 if (stv090x_ldpc_mode(state, state->demod_mode) < 0)
4220 goto err;
4221
4222 reg = STV090x_READ_DEMOD(state, TNRCFG2);
4223 STV090x_SETFIELD_Px(reg, TUN_IQSWAP_FIELD, state->inversion);
4224 if (STV090x_WRITE_DEMOD(state, TNRCFG2, reg) < 0)
4225 goto err;
4226 reg = STV090x_READ_DEMOD(state, DEMOD);
4227 STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
4228 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
4229 goto err;
4230
4231 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
4232 goto err;
4233
4234 if (config->tuner_set_mode) {
4235 if (config->tuner_set_mode(fe, TUNER_WAKE) < 0)
4236 goto err;
4237 }
4238
4239 if (config->tuner_init) {
4240 if (config->tuner_init(fe) < 0)
4241 goto err;
4242 }
4243
4244 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
4245 goto err;
4246
4247 if (stv090x_set_tspath(state) < 0)
4248 goto err;
4249
4250 return 0;
4251 err:
4252 dprintk(FE_ERROR, 1, "I/O error");
4253 return -1;
4254 }
4255
4256 static int stv090x_setup(struct dvb_frontend *fe)
4257 {
4258 struct stv090x_state *state = fe->demodulator_priv;
4259 const struct stv090x_config *config = state->config;
4260 const struct stv090x_reg *stv090x_initval = NULL;
4261 const struct stv090x_reg *stv090x_cut20_val = NULL;
4262 unsigned long t1_size = 0, t2_size = 0;
4263 u32 reg = 0;
4264
4265 int i;
4266
4267 if (state->device == STV0900) {
4268 dprintk(FE_DEBUG, 1, "Initializing STV0900");
4269 stv090x_initval = stv0900_initval;
4270 t1_size = ARRAY_SIZE(stv0900_initval);
4271 stv090x_cut20_val = stv0900_cut20_val;
4272 t2_size = ARRAY_SIZE(stv0900_cut20_val);
4273 } else if (state->device == STV0903) {
4274 dprintk(FE_DEBUG, 1, "Initializing STV0903");
4275 stv090x_initval = stv0903_initval;
4276 t1_size = ARRAY_SIZE(stv0903_initval);
4277 stv090x_cut20_val = stv0903_cut20_val;
4278 t2_size = ARRAY_SIZE(stv0903_cut20_val);
4279 }
4280
4281 /* STV090x init */
4282
4283 /* Stop Demod */
4284 if (stv090x_write_reg(state, STV090x_P1_DMDISTATE, 0x5c) < 0)
4285 goto err;
4286 if (stv090x_write_reg(state, STV090x_P2_DMDISTATE, 0x5c) < 0)
4287 goto err;
4288
4289 msleep(5);
4290
4291 /* Set No Tuner Mode */
4292 if (stv090x_write_reg(state, STV090x_P1_TNRCFG, 0x6c) < 0)
4293 goto err;
4294 if (stv090x_write_reg(state, STV090x_P2_TNRCFG, 0x6c) < 0)
4295 goto err;
4296
4297 /* I2C repeater OFF */
4298 STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level);
4299 if (stv090x_write_reg(state, STV090x_P1_I2CRPT, reg) < 0)
4300 goto err;
4301 if (stv090x_write_reg(state, STV090x_P2_I2CRPT, reg) < 0)
4302 goto err;
4303
4304 if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */
4305 goto err;
4306 msleep(5);
4307 if (stv090x_write_reg(state, STV090x_I2CCFG, 0x08) < 0) /* 1/41 oversampling */
4308 goto err;
4309 if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0) /* enable PLL */
4310 goto err;
4311 msleep(5);
4312
4313 /* write initval */
4314 dprintk(FE_DEBUG, 1, "Setting up initial values");
4315 for (i = 0; i < t1_size; i++) {
4316 if (stv090x_write_reg(state, stv090x_initval[i].addr, stv090x_initval[i].data) < 0)
4317 goto err;
4318 }
4319
4320 state->internal->dev_ver = stv090x_read_reg(state, STV090x_MID);
4321 if (state->internal->dev_ver >= 0x20) {
4322 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
4323 goto err;
4324
4325 /* write cut20_val*/
4326 dprintk(FE_DEBUG, 1, "Setting up Cut 2.0 initial values");
4327 for (i = 0; i < t2_size; i++) {
4328 if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0)
4329 goto err;
4330 }
4331
4332 } else if (state->internal->dev_ver < 0x20) {
4333 dprintk(FE_ERROR, 1, "ERROR: Unsupported Cut: 0x%02x!",
4334 state->internal->dev_ver);
4335
4336 goto err;
4337 } else if (state->internal->dev_ver > 0x30) {
4338 /* we shouldn't bail out from here */
4339 dprintk(FE_ERROR, 1, "INFO: Cut: 0x%02x probably incomplete support!",
4340 state->internal->dev_ver);
4341 }
4342
4343 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0)
4344 goto err;
4345 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0)
4346 goto err;
4347
4348 stv090x_set_mclk(state, 135000000, config->xtal); /* 135 Mhz */
4349 msleep(5);
4350 if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0)
4351 goto err;
4352 stv090x_get_mclk(state);
4353
4354 return 0;
4355 err:
4356 dprintk(FE_ERROR, 1, "I/O error");
4357 return -1;
4358 }
4359
4360 static struct dvb_frontend_ops stv090x_ops = {
4361
4362 .info = {
4363 .name = "STV090x Multistandard",
4364 .type = FE_QPSK,
4365 .frequency_min = 950000,
4366 .frequency_max = 2150000,
4367 .frequency_stepsize = 0,
4368 .frequency_tolerance = 0,
4369 .symbol_rate_min = 1000000,
4370 .symbol_rate_max = 45000000,
4371 .caps = FE_CAN_INVERSION_AUTO |
4372 FE_CAN_FEC_AUTO |
4373 FE_CAN_QPSK |
4374 FE_CAN_2G_MODULATION
4375 },
4376
4377 .release = stv090x_release,
4378 .init = stv090x_init,
4379
4380 .sleep = stv090x_sleep,
4381 .get_frontend_algo = stv090x_frontend_algo,
4382
4383 .i2c_gate_ctrl = stv090x_i2c_gate_ctrl,
4384
4385 .diseqc_send_master_cmd = stv090x_send_diseqc_msg,
4386 .diseqc_send_burst = stv090x_send_diseqc_burst,
4387 .diseqc_recv_slave_reply = stv090x_recv_slave_reply,
4388 .set_tone = stv090x_set_tone,
4389
4390 .search = stv090x_search,
4391 .read_status = stv090x_read_status,
4392 .read_ber = stv090x_read_per,
4393 .read_signal_strength = stv090x_read_signal_strength,
4394 .read_snr = stv090x_read_cnr
4395 };
4396
4397
4398 struct dvb_frontend *stv090x_attach(const struct stv090x_config *config,
4399 struct i2c_adapter *i2c,
4400 enum stv090x_demodulator demod)
4401 {
4402 struct stv090x_state *state = NULL;
4403 struct stv090x_dev *temp_int;
4404
4405 state = kzalloc(sizeof (struct stv090x_state), GFP_KERNEL);
4406 if (state == NULL)
4407 goto error;
4408
4409 state->verbose = &verbose;
4410 state->config = config;
4411 state->i2c = i2c;
4412 state->frontend.ops = stv090x_ops;
4413 state->frontend.demodulator_priv = state;
4414 state->demod = demod;
4415 state->demod_mode = config->demod_mode; /* Single or Dual mode */
4416 state->device = config->device;
4417 state->rolloff = STV090x_RO_35; /* default */
4418
4419 temp_int = find_dev(state->i2c,
4420 state->config->address);
4421
4422 if ((temp_int != NULL) && (state->demod_mode == STV090x_DUAL)) {
4423 state->internal = temp_int->internal;
4424 state->internal->num_used++;
4425 dprintk(FE_INFO, 1, "Found Internal Structure!");
4426 dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x",
4427 state->device == STV0900 ? "STV0900" : "STV0903",
4428 demod,
4429 state->internal->dev_ver);
4430 return &state->frontend;
4431 } else {
4432 state->internal = kmalloc(sizeof(struct stv090x_internal),
4433 GFP_KERNEL);
4434 temp_int = append_internal(state->internal);
4435 state->internal->num_used = 1;
4436 state->internal->i2c_adap = state->i2c;
4437 state->internal->i2c_addr = state->config->address;
4438 dprintk(FE_INFO, 1, "Create New Internal Structure!");
4439 }
4440
4441 mutex_init(&state->internal->demod_lock);
4442
4443 if (stv090x_sleep(&state->frontend) < 0) {
4444 dprintk(FE_ERROR, 1, "Error putting device to sleep");
4445 goto error;
4446 }
4447
4448 if (stv090x_setup(&state->frontend) < 0) {
4449 dprintk(FE_ERROR, 1, "Error setting up device");
4450 goto error;
4451 }
4452 if (stv090x_wakeup(&state->frontend) < 0) {
4453 dprintk(FE_ERROR, 1, "Error waking device");
4454 goto error;
4455 }
4456
4457 dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x",
4458 state->device == STV0900 ? "STV0900" : "STV0903",
4459 demod,
4460 state->internal->dev_ver);
4461
4462 return &state->frontend;
4463
4464 error:
4465 kfree(state);
4466 return NULL;
4467 }
4468 EXPORT_SYMBOL(stv090x_attach);
4469 MODULE_PARM_DESC(verbose, "Set Verbosity level");
4470 MODULE_AUTHOR("Manu Abraham");
4471 MODULE_DESCRIPTION("STV090x Multi-Std Broadcast frontend");
4472 MODULE_LICENSE("GPL");
(deprecated) Btrfs devel tree