2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
10 * Most of this originates from head_64.S and thus has the same
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
20 * We layout physical memory as follows:
21 * 0x0000 - 0x00ff : Secondary processor spin code
22 * 0x0100 - 0x17ff : pSeries Interrupt prologs
23 * 0x1800 - 0x4000 : interrupt support common interrupt prologs
24 * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1
25 * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1
26 * 0x7000 - 0x7fff : FWNMI data area
27 * 0x8000 - 0x8fff : Initial (CPU0) segment table
28 * 0x9000 - : Early init and support code
30 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
31 #define SYSCALL_PSERIES_1 \
35 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
38 mfspr r11,SPRN_SRR0 ; \
41 #define SYSCALL_PSERIES_2_RFID \
42 mfspr r12,SPRN_SRR1 ; \
43 ld r10,PACAKBASE(r13) ; \
44 LOAD_HANDLER(r10, system_call_entry) ; \
45 mtspr SPRN_SRR0,r10 ; \
46 ld r10,PACAKMSR(r13) ; \
47 mtspr SPRN_SRR1,r10 ; \
49 b . ; /* prevent speculative execution */
51 #define SYSCALL_PSERIES_3 \
52 /* Fast LE/BE switch system call */ \
53 1: mfspr r12,SPRN_SRR1 ; \
54 xori r12,r12,MSR_LE ; \
55 mtspr SPRN_SRR1,r12 ; \
56 rfid ; /* return to userspace */ \
58 2: mfspr r12,SPRN_SRR1 ; \
59 andi. r12,r12,MSR_PR ; \
61 mtspr SPRN_SRR0,r3 ; \
62 mtspr SPRN_SRR1,r4 ; \
63 mtspr SPRN_SDR1,r5 ; \
65 b . ; /* prevent speculative execution */
67 #if defined(CONFIG_RELOCATABLE)
69 * We can't branch directly; in the direct case we use LR
70 * and system_call_entry restores LR. (We thus need to move
71 * LR to r10 in the RFID case too.)
73 #define SYSCALL_PSERIES_2_DIRECT \
75 ld r12,PACAKBASE(r13) ; \
76 LOAD_HANDLER(r12, system_call_entry_direct) ; \
78 mfspr r12,SPRN_SRR1 ; \
79 /* Re-use of r13... No spare regs to do this */ \
82 GET_PACA(r13) ; /* get r13 back */ \
85 /* We can branch directly */
86 #define SYSCALL_PSERIES_2_DIRECT \
87 mfspr r12,SPRN_SRR1 ; \
89 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
90 b system_call_entry_direct ;
94 * This is the start of the interrupt handlers for pSeries
95 * This code runs with relocation off.
96 * Code from here to __end_interrupts gets copied down to real
97 * address 0x100 when we are running a relocatable kernel.
98 * Therefore any relative branches in this section must only
99 * branch to labels in this section.
102 .globl __start_interrupts
105 .globl system_reset_pSeries;
106 system_reset_pSeries:
107 HMT_MEDIUM_PPR_DISCARD
109 #ifdef CONFIG_PPC_P7_NAP
111 /* Running native on arch 2.06 or later, check if we are
112 * waking up from nap. We only handle no state loss and
113 * supervisor state loss. We do -not- handle hypervisor
114 * state loss at this time.
117 rlwinm. r13,r13,47-31,30,31
120 /* waking up from powersave (nap) state */
122 /* Total loss of HV state is fatal, we could try to use the
123 * PIR to locate a PACA, then use an emergency stack etc...
124 * OPAL v3 based powernv platforms have new idle states
125 * which fall in this catagory.
130 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
131 li r0,KVM_HWTHREAD_IN_KERNEL
132 stb r0,HSTATE_HWTHREAD_STATE(r13)
133 /* Order setting hwthread_state vs. testing hwthread_req */
135 lbz r0,HSTATE_HWTHREAD_REQ(r13)
143 b .power7_wakeup_noloss
144 2: b .power7_wakeup_loss
146 /* Fast Sleep wakeup on PowerNV */
148 b .power7_wakeup_tb_loss
151 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
152 #endif /* CONFIG_PPC_P7_NAP */
153 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
157 machine_check_pSeries_1:
158 /* This is moved out of line as it can be patched by FW, but
159 * some code path might still want to branch into the original
162 HMT_MEDIUM_PPR_DISCARD
163 SET_SCRATCH0(r13) /* save r13 */
164 #ifdef CONFIG_PPC_P7_NAP
166 /* Running native on arch 2.06 or later, check if we are
167 * waking up from nap. We only handle no state loss and
168 * supervisor state loss. We do -not- handle hypervisor
169 * state loss at this time.
172 rlwinm. r13,r13,47-31,30,31
175 /* waking up from powersave (nap) state */
177 /* Total loss of HV state is fatal. let's just stay stuck here */
180 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
181 #endif /* CONFIG_PPC_P7_NAP */
182 EXCEPTION_PROLOG_0(PACA_EXMC)
184 b machine_check_pSeries_early
186 b machine_check_pSeries_0
187 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
190 .globl data_access_pSeries
192 HMT_MEDIUM_PPR_DISCARD
195 b data_access_check_stab
196 data_access_not_stab:
197 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
198 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
202 .globl data_access_slb_pSeries
203 data_access_slb_pSeries:
204 HMT_MEDIUM_PPR_DISCARD
206 EXCEPTION_PROLOG_0(PACA_EXSLB)
207 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
208 std r3,PACA_EXSLB+EX_R3(r13)
211 /* Keep that around for when we re-implement dynamic VSIDs */
213 bge slb_miss_user_pseries
214 #endif /* __DISABLED__ */
216 #ifndef CONFIG_RELOCATABLE
220 * We can't just use a direct branch to .slb_miss_realmode
221 * because the distance from here to there depends on where
222 * the kernel ends up being put.
225 ld r10,PACAKBASE(r13)
226 LOAD_HANDLER(r10, .slb_miss_realmode)
231 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
234 .globl instruction_access_slb_pSeries
235 instruction_access_slb_pSeries:
236 HMT_MEDIUM_PPR_DISCARD
238 EXCEPTION_PROLOG_0(PACA_EXSLB)
239 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
240 std r3,PACA_EXSLB+EX_R3(r13)
241 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
243 /* Keep that around for when we re-implement dynamic VSIDs */
245 bge slb_miss_user_pseries
246 #endif /* __DISABLED__ */
248 #ifndef CONFIG_RELOCATABLE
252 ld r10,PACAKBASE(r13)
253 LOAD_HANDLER(r10, .slb_miss_realmode)
258 /* We open code these as we can't have a ". = x" (even with
259 * x = "." within a feature section
262 .globl hardware_interrupt_pSeries;
263 .globl hardware_interrupt_hv;
264 hardware_interrupt_pSeries:
265 hardware_interrupt_hv:
266 HMT_MEDIUM_PPR_DISCARD
268 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
269 EXC_HV, SOFTEN_TEST_HV)
270 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
272 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
273 EXC_STD, SOFTEN_TEST_HV_201)
274 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
275 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
277 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
278 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
280 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
281 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
283 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
284 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
287 .globl decrementer_pSeries
289 _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR)
291 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
293 MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
294 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
296 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
297 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
300 .globl system_call_pSeries
303 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
306 std r9,PACA_EXGEN+EX_R9(r13)
307 std r10,PACA_EXGEN+EX_R10(r13)
313 SYSCALL_PSERIES_2_RFID
315 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
317 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
318 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
320 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
321 * out of line to handle them
324 hv_data_storage_trampoline:
326 EXCEPTION_PROLOG_0(PACA_EXGEN)
330 hv_instr_storage_trampoline:
332 EXCEPTION_PROLOG_0(PACA_EXGEN)
336 emulation_assist_trampoline:
338 EXCEPTION_PROLOG_0(PACA_EXGEN)
339 b emulation_assist_hv
342 hv_exception_trampoline:
344 EXCEPTION_PROLOG_0(PACA_EXGEN)
348 hv_doorbell_trampoline:
350 EXCEPTION_PROLOG_0(PACA_EXGEN)
353 /* We need to deal with the Altivec unavailable exception
354 * here which is at 0xf20, thus in the middle of the
355 * prolog code of the PerformanceMonitor one. A little
356 * trickery is thus necessary
359 performance_monitor_pseries_trampoline:
361 EXCEPTION_PROLOG_0(PACA_EXGEN)
362 b performance_monitor_pSeries
365 altivec_unavailable_pseries_trampoline:
367 EXCEPTION_PROLOG_0(PACA_EXGEN)
368 b altivec_unavailable_pSeries
371 vsx_unavailable_pseries_trampoline:
373 EXCEPTION_PROLOG_0(PACA_EXGEN)
374 b vsx_unavailable_pSeries
377 facility_unavailable_trampoline:
379 EXCEPTION_PROLOG_0(PACA_EXGEN)
380 b facility_unavailable_pSeries
383 hv_facility_unavailable_trampoline:
385 EXCEPTION_PROLOG_0(PACA_EXGEN)
386 b facility_unavailable_hv
388 #ifdef CONFIG_CBE_RAS
389 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
390 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
391 #endif /* CONFIG_CBE_RAS */
393 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
394 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
397 .global denorm_exception_hv
399 HMT_MEDIUM_PPR_DISCARD
400 mtspr SPRN_SPRG_HSCRATCH0,r13
401 EXCEPTION_PROLOG_0(PACA_EXGEN)
402 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
404 #ifdef CONFIG_PPC_DENORMALISATION
406 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
407 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
408 addi r11,r11,-4 /* HSRR0 is next instruction */
413 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
414 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500)
416 #ifdef CONFIG_CBE_RAS
417 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
418 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
419 #endif /* CONFIG_CBE_RAS */
421 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
422 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
424 #ifdef CONFIG_CBE_RAS
425 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
426 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
429 #endif /* CONFIG_CBE_RAS */
432 /*** Out of line interrupts support ***/
435 /* moved from 0x200 */
436 machine_check_pSeries_early:
438 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200)
443 * Original R9 to R13 is saved on PACA_EXMC
445 * Switch to mc_emergency stack and handle re-entrancy (though we
446 * currently don't test for overflow). Save MCE registers srr1,
447 * srr0, dar and dsisr and then set ME=1
449 * We use paca->in_mce to check whether this is the first entry or
450 * nested machine check. We increment paca->in_mce to track nested
453 * If this is the first entry then set stack pointer to
454 * paca->mc_emergency_sp, otherwise r1 is already pointing to
455 * stack frame on mc_emergency stack.
457 * NOTE: We are here with MSR_ME=0 (off), which means we risk a
458 * checkstop if we get another machine check exception before we do
459 * rfid with MSR_ME=1.
461 mr r11,r1 /* Save r1 */
462 lhz r10,PACA_IN_MCE(r13)
463 cmpwi r10,0 /* Are we in nested machine check */
464 bne 0f /* Yes, we are. */
465 /* First machine check entry */
466 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */
467 0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
468 addi r10,r10,1 /* increment paca->in_mce */
469 sth r10,PACA_IN_MCE(r13)
470 std r11,GPR1(r1) /* Save r1 on the stack. */
471 std r11,0(r1) /* make stack chain pointer */
472 mfspr r11,SPRN_SRR0 /* Save SRR0 */
474 mfspr r11,SPRN_SRR1 /* Save SRR1 */
476 mfspr r11,SPRN_DAR /* Save DAR */
478 mfspr r11,SPRN_DSISR /* Save DSISR */
480 std r9,_CCR(r1) /* Save CR in stackframe */
481 /* Save r9 through r13 from EXMC save area to stack frame. */
482 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC)
483 mfmsr r11 /* get MSR value */
484 ori r11,r11,MSR_ME /* turn on ME bit */
485 ori r11,r11,MSR_RI /* turn on RI bit */
486 ld r12,PACAKBASE(r13) /* get high part of &label */
487 LOAD_HANDLER(r12, machine_check_handle_early)
491 b . /* prevent speculative execution */
492 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
494 machine_check_pSeries:
495 .globl machine_check_fwnmi
497 HMT_MEDIUM_PPR_DISCARD
498 SET_SCRATCH0(r13) /* save r13 */
499 EXCEPTION_PROLOG_0(PACA_EXMC)
500 machine_check_pSeries_0:
501 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200)
502 EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD)
503 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
505 /* moved from 0x300 */
506 data_access_check_stab:
508 std r9,PACA_EXSLB+EX_R9(r13)
509 std r10,PACA_EXSLB+EX_R10(r13)
513 rlwimi r10,r9,16,0x20
514 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
515 lbz r9,HSTATE_IN_GUEST(r13)
516 rlwimi r10,r9,8,0x300
520 beq do_stab_bolted_pSeries
522 ld r9,PACA_EXSLB+EX_R9(r13)
523 ld r10,PACA_EXSLB+EX_R10(r13)
524 b data_access_not_stab
525 do_stab_bolted_pSeries:
526 std r11,PACA_EXSLB+EX_R11(r13)
527 std r12,PACA_EXSLB+EX_R12(r13)
529 std r10,PACA_EXSLB+EX_R13(r13)
530 EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
532 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
533 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
534 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
535 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
536 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
537 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
539 #ifdef CONFIG_PPC_DENORMALISATION
543 * To denormalise we need to move a copy of the register to itself.
544 * For POWER6 do that here for all FP regs.
547 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
548 xori r10,r10,(MSR_FE0|MSR_FE1)
552 #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1
553 #define FMR4(n) FMR2(n) ; FMR2(n+2)
554 #define FMR8(n) FMR4(n) ; FMR4(n+4)
555 #define FMR16(n) FMR8(n) ; FMR8(n+8)
556 #define FMR32(n) FMR16(n) ; FMR16(n+16)
561 * To denormalise we need to move a copy of the register to itself.
562 * For POWER7 do that here for the first 32 VSX registers only.
565 oris r10,r10,MSR_VSX@h
569 #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1)
570 #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2)
571 #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4)
572 #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8)
573 #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16)
576 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
580 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
582 * To denormalise we need to move a copy of the register to itself.
583 * For POWER8 we need to do that for all 64 VSX registers
589 ld r9,PACA_EXGEN+EX_R9(r13)
590 RESTORE_PPR_PACA(PACA_EXGEN, r10)
592 ld r10,PACA_EXGEN+EX_CFAR(r13)
594 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
595 ld r10,PACA_EXGEN+EX_R10(r13)
596 ld r11,PACA_EXGEN+EX_R11(r13)
597 ld r12,PACA_EXGEN+EX_R12(r13)
598 ld r13,PACA_EXGEN+EX_R13(r13)
604 /* moved from 0xe00 */
605 STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
606 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
607 STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage)
608 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
609 STD_EXCEPTION_HV_OOL(0xe42, emulation_assist)
610 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
611 STD_EXCEPTION_HV_OOL(0xe62, hmi_exception) /* need to flush cache ? */
612 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
613 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell)
614 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82)
616 /* moved from 0xf00 */
617 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
618 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
619 STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
620 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
621 STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
622 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
623 STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
624 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf60)
625 STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable)
626 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82)
629 * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
630 * - If it was a decrementer interrupt, we bump the dec to max and and return.
631 * - If it was a doorbell we return immediately since doorbells are edge
632 * triggered and won't automatically refire.
633 * - else we hard disable and return.
634 * This is called with r10 containing the value to OR to the paca field.
636 #define MASKED_INTERRUPT(_H) \
637 masked_##_H##interrupt: \
638 std r11,PACA_EXGEN+EX_R11(r13); \
639 lbz r11,PACAIRQHAPPENED(r13); \
641 stb r11,PACAIRQHAPPENED(r13); \
642 cmpwi r10,PACA_IRQ_DEC; \
645 ori r10,r10,0xffff; \
646 mtspr SPRN_DEC,r10; \
648 1: cmpwi r10,PACA_IRQ_DBELL; \
650 mfspr r10,SPRN_##_H##SRR1; \
651 rldicl r10,r10,48,1; /* clear MSR_EE */ \
653 mtspr SPRN_##_H##SRR1,r10; \
655 ld r9,PACA_EXGEN+EX_R9(r13); \
656 ld r10,PACA_EXGEN+EX_R10(r13); \
657 ld r11,PACA_EXGEN+EX_R11(r13); \
666 * Called from arch_local_irq_enable when an interrupt needs
667 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
668 * which kind of interrupt. MSR:EE is already off. We generate a
669 * stackframe like if a real interrupt had happened.
671 * Note: While MSR:EE is off, we need to make sure that _MSR
672 * in the generated frame has EE set to 1 or the exception
673 * handler will not properly re-enable them.
675 _GLOBAL(__replay_interrupt)
676 /* We are going to jump to the exception common code which
677 * will retrieve various register values from the PACA which
678 * we don't give a damn about, so we don't bother storing them.
685 beq decrementer_common
687 beq hardware_interrupt_common
690 beq h_doorbell_common
693 beq doorbell_super_common
694 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
697 #ifdef CONFIG_PPC_PSERIES
699 * Vectors for the FWNMI option. Share common code.
701 .globl system_reset_fwnmi
704 HMT_MEDIUM_PPR_DISCARD
705 SET_SCRATCH0(r13) /* save r13 */
706 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
709 #endif /* CONFIG_PPC_PSERIES */
713 * This is used for when the SLB miss handler has to go virtual,
714 * which doesn't happen for now anymore but will once we re-implement
715 * dynamic VSIDs for shared page tables
717 slb_miss_user_pseries:
718 std r10,PACA_EXGEN+EX_R10(r13)
719 std r11,PACA_EXGEN+EX_R11(r13)
720 std r12,PACA_EXGEN+EX_R12(r13)
722 ld r11,PACA_EXSLB+EX_R9(r13)
723 ld r12,PACA_EXSLB+EX_R3(r13)
724 std r10,PACA_EXGEN+EX_R13(r13)
725 std r11,PACA_EXGEN+EX_R9(r13)
726 std r12,PACA_EXGEN+EX_R3(r13)
729 mfspr r11,SRR0 /* save SRR0 */
730 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
731 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
733 mfspr r12,SRR1 /* and SRR1 */
736 b . /* prevent spec. execution */
737 #endif /* __DISABLED__ */
739 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
740 kvmppc_skip_interrupt:
742 * Here all GPRs are unchanged from when the interrupt happened
743 * except for r13, which is saved in SPRG_SCRATCH0.
752 kvmppc_skip_Hinterrupt:
754 * Here all GPRs are unchanged from when the interrupt happened
755 * except for r13, which is saved in SPRG_SCRATCH0.
757 mfspr r13, SPRN_HSRR0
759 mtspr SPRN_HSRR0, r13
766 * Code from here down to __end_handlers is invoked from the
767 * exception prologs above. Because the prologs assemble the
768 * addresses of these handlers using the LOAD_HANDLER macro,
769 * which uses an ori instruction, these handlers must be in
770 * the first 64k of the kernel image.
773 /*** Common interrupt handlers ***/
775 STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
777 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
778 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
779 STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
780 #ifdef CONFIG_PPC_DOORBELL
781 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .doorbell_exception)
783 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, .unknown_exception)
785 STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
786 STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
787 STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
788 STD_EXCEPTION_COMMON(0xe40, emulation_assist, .emulation_assist_interrupt)
789 STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
790 #ifdef CONFIG_PPC_DOORBELL
791 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, .doorbell_exception)
793 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, .unknown_exception)
795 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, .performance_monitor_exception)
796 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
797 STD_EXCEPTION_COMMON(0x1502, denorm, .unknown_exception)
798 #ifdef CONFIG_ALTIVEC
799 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
801 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
803 #ifdef CONFIG_CBE_RAS
804 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
805 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
806 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
807 #endif /* CONFIG_CBE_RAS */
810 * Relocation-on interrupts: A subset of the interrupts can be delivered
811 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
812 * it. Addresses are the same as the original interrupt addresses, but
813 * offset by 0xc000000000004000.
814 * It's impossible to receive interrupts below 0x300 via this mechanism.
815 * KVM: None of these traps are from the guest ; anything that escalated
816 * to HV=1 from HV=0 is delivered via real mode handlers.
820 * This uses the standard macro, since the original 0x300 vector
821 * only has extra guff for STAB-based processors -- which never
824 STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access)
826 .globl data_access_slb_relon_pSeries
827 data_access_slb_relon_pSeries:
829 EXCEPTION_PROLOG_0(PACA_EXSLB)
830 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
831 std r3,PACA_EXSLB+EX_R3(r13)
834 #ifndef CONFIG_RELOCATABLE
838 * We can't just use a direct branch to .slb_miss_realmode
839 * because the distance from here to there depends on where
840 * the kernel ends up being put.
843 ld r10,PACAKBASE(r13)
844 LOAD_HANDLER(r10, .slb_miss_realmode)
849 STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access)
851 .globl instruction_access_slb_relon_pSeries
852 instruction_access_slb_relon_pSeries:
854 EXCEPTION_PROLOG_0(PACA_EXSLB)
855 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
856 std r3,PACA_EXSLB+EX_R3(r13)
857 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
859 #ifndef CONFIG_RELOCATABLE
863 ld r10,PACAKBASE(r13)
864 LOAD_HANDLER(r10, .slb_miss_realmode)
870 .globl hardware_interrupt_relon_pSeries;
871 .globl hardware_interrupt_relon_hv;
872 hardware_interrupt_relon_pSeries:
873 hardware_interrupt_relon_hv:
875 _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV)
877 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR)
878 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
879 STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment)
880 STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
881 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
882 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer)
883 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
884 MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super)
885 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
888 .globl system_call_relon_pSeries
889 system_call_relon_pSeries:
892 SYSCALL_PSERIES_2_DIRECT
895 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step)
898 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
901 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
904 emulation_assist_relon_trampoline:
906 EXCEPTION_PROLOG_0(PACA_EXGEN)
907 b emulation_assist_relon_hv
910 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
913 h_doorbell_relon_trampoline:
915 EXCEPTION_PROLOG_0(PACA_EXGEN)
916 b h_doorbell_relon_hv
919 performance_monitor_relon_pseries_trampoline:
921 EXCEPTION_PROLOG_0(PACA_EXGEN)
922 b performance_monitor_relon_pSeries
925 altivec_unavailable_relon_pseries_trampoline:
927 EXCEPTION_PROLOG_0(PACA_EXGEN)
928 b altivec_unavailable_relon_pSeries
931 vsx_unavailable_relon_pseries_trampoline:
933 EXCEPTION_PROLOG_0(PACA_EXGEN)
934 b vsx_unavailable_relon_pSeries
937 facility_unavailable_relon_trampoline:
939 EXCEPTION_PROLOG_0(PACA_EXGEN)
940 b facility_unavailable_relon_pSeries
943 hv_facility_unavailable_relon_trampoline:
945 EXCEPTION_PROLOG_0(PACA_EXGEN)
946 b hv_facility_unavailable_relon_hv
948 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint)
949 #ifdef CONFIG_PPC_DENORMALISATION
951 b denorm_exception_hv
953 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist)
955 /* Other future vectors */
957 .globl __end_interrupts
961 system_call_entry_direct:
962 #if defined(CONFIG_RELOCATABLE)
963 /* The first level prologue may have used LR to get here, saving
964 * orig in r10. To save hacking/ifdeffing common code, restore here.
971 ppc64_runlatch_on_trampoline:
972 b .__ppc64_runlatch_on
975 * Here we have detected that the kernel stack pointer is bad.
976 * R9 contains the saved CR, r13 points to the paca,
977 * r10 contains the (bad) kernel stack pointer,
978 * r11 and r12 contain the saved SRR0 and SRR1.
979 * We switch to using an emergency stack, save the registers there,
980 * and call kernel_bad_stack(), which panics.
983 ld r1,PACAEMERGSP(r13)
984 subi r1,r1,64+INT_FRAME_SIZE
1016 std r10,ORIG_GPR3(r1)
1017 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1020 lhz r12,PACA_TRAP_SAVE(r13)
1022 addi r11,r1,INT_FRAME_SIZE
1027 ld r11,exception_marker@toc(r2)
1029 std r11,STACK_FRAME_OVERHEAD-16(r1)
1030 1: addi r3,r1,STACK_FRAME_OVERHEAD
1031 bl .kernel_bad_stack
1035 * Here r13 points to the paca, r9 contains the saved CR,
1036 * SRR0 and SRR1 are saved in r11 and r12,
1037 * r9 - r13 are saved in paca->exgen.
1040 .globl data_access_common
1043 std r10,PACA_EXGEN+EX_DAR(r13)
1044 mfspr r10,SPRN_DSISR
1045 stw r10,PACA_EXGEN+EX_DSISR(r13)
1046 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
1049 ld r3,PACA_EXGEN+EX_DAR(r13)
1050 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1052 b .do_hash_page /* Try to handle as hpte fault */
1055 .globl h_data_storage_common
1056 h_data_storage_common:
1058 std r10,PACA_EXGEN+EX_DAR(r13)
1059 mfspr r10,SPRN_HDSISR
1060 stw r10,PACA_EXGEN+EX_DSISR(r13)
1061 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
1064 addi r3,r1,STACK_FRAME_OVERHEAD
1065 bl .unknown_exception
1069 .globl instruction_access_common
1070 instruction_access_common:
1071 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
1075 andis. r4,r12,0x5820
1077 b .do_hash_page /* Try to handle as hpte fault */
1079 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
1082 * Here is the common SLB miss user that is used when going to virtual
1083 * mode for SLB misses, that is currently not used
1087 .globl slb_miss_user_common
1088 slb_miss_user_common:
1090 std r3,PACA_EXGEN+EX_DAR(r13)
1091 stw r9,PACA_EXGEN+EX_CCR(r13)
1092 std r10,PACA_EXGEN+EX_LR(r13)
1093 std r11,PACA_EXGEN+EX_SRR0(r13)
1094 bl .slb_allocate_user
1096 ld r10,PACA_EXGEN+EX_LR(r13)
1097 ld r3,PACA_EXGEN+EX_R3(r13)
1098 lwz r9,PACA_EXGEN+EX_CCR(r13)
1099 ld r11,PACA_EXGEN+EX_SRR0(r13)
1103 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1104 beq- unrecov_user_slb
1112 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
1118 ld r9,PACA_EXGEN+EX_R9(r13)
1119 ld r10,PACA_EXGEN+EX_R10(r13)
1120 ld r11,PACA_EXGEN+EX_R11(r13)
1121 ld r12,PACA_EXGEN+EX_R12(r13)
1122 ld r13,PACA_EXGEN+EX_R13(r13)
1127 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
1128 ld r4,PACA_EXGEN+EX_DAR(r13)
1135 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
1138 1: addi r3,r1,STACK_FRAME_OVERHEAD
1139 bl .unrecoverable_exception
1142 #endif /* __DISABLED__ */
1146 * Machine check is different because we use a different
1147 * save area: PACA_EXMC instead of PACA_EXGEN.
1150 .globl machine_check_common
1151 machine_check_common:
1154 std r10,PACA_EXGEN+EX_DAR(r13)
1155 mfspr r10,SPRN_DSISR
1156 stw r10,PACA_EXGEN+EX_DSISR(r13)
1157 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
1160 ld r3,PACA_EXGEN+EX_DAR(r13)
1161 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1165 addi r3,r1,STACK_FRAME_OVERHEAD
1166 bl .machine_check_exception
1170 .globl alignment_common
1173 std r10,PACA_EXGEN+EX_DAR(r13)
1174 mfspr r10,SPRN_DSISR
1175 stw r10,PACA_EXGEN+EX_DSISR(r13)
1176 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
1177 ld r3,PACA_EXGEN+EX_DAR(r13)
1178 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1183 addi r3,r1,STACK_FRAME_OVERHEAD
1184 bl .alignment_exception
1188 .globl program_check_common
1189 program_check_common:
1190 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
1193 addi r3,r1,STACK_FRAME_OVERHEAD
1194 bl .program_check_exception
1198 .globl fp_unavailable_common
1199 fp_unavailable_common:
1200 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
1201 bne 1f /* if from user, just load it up */
1204 addi r3,r1,STACK_FRAME_OVERHEAD
1205 bl .kernel_fp_unavailable_exception
1208 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1210 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1211 * transaction), go do TM stuff
1213 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1215 END_FTR_SECTION_IFSET(CPU_FTR_TM)
1218 b fast_exception_return
1219 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1220 2: /* User process was in a transaction */
1223 addi r3,r1,STACK_FRAME_OVERHEAD
1224 bl .fp_unavailable_tm
1228 .globl altivec_unavailable_common
1229 altivec_unavailable_common:
1230 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1231 #ifdef CONFIG_ALTIVEC
1234 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1235 BEGIN_FTR_SECTION_NESTED(69)
1236 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1237 * transaction), go do TM stuff
1239 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1241 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1244 b fast_exception_return
1245 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1246 2: /* User process was in a transaction */
1249 addi r3,r1,STACK_FRAME_OVERHEAD
1250 bl .altivec_unavailable_tm
1254 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1258 addi r3,r1,STACK_FRAME_OVERHEAD
1259 bl .altivec_unavailable_exception
1263 .globl vsx_unavailable_common
1264 vsx_unavailable_common:
1265 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1269 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1270 BEGIN_FTR_SECTION_NESTED(69)
1271 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1272 * transaction), go do TM stuff
1274 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1276 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1279 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1280 2: /* User process was in a transaction */
1283 addi r3,r1,STACK_FRAME_OVERHEAD
1284 bl .vsx_unavailable_tm
1288 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1292 addi r3,r1,STACK_FRAME_OVERHEAD
1293 bl .vsx_unavailable_exception
1296 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, .facility_unavailable_exception)
1297 STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, .facility_unavailable_exception)
1300 .globl __end_handlers
1303 /* Equivalents to the above handlers for relocation-on interrupt vectors */
1304 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist)
1305 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell)
1307 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
1308 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
1309 STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
1310 STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
1311 STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable)
1313 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1315 * Data area reserved for FWNMI option.
1316 * This address (0x7000) is fixed by the RPA.
1319 .globl fwnmi_data_area
1322 /* pseries and powernv need to keep the whole page from
1323 * 0x7000 to 0x8000 free for use by the firmware
1326 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1328 /* Space for CPU0's segment table */
1334 #ifdef CONFIG_PPC_POWERNV
1335 _GLOBAL(opal_mc_secondary_handler)
1336 HMT_MEDIUM_PPR_DISCARD
1341 std r3,PACA_OPAL_MC_EVT(r13)
1342 ld r13,OPAL_MC_SRR0(r3)
1344 ld r13,OPAL_MC_SRR1(r3)
1346 ld r3,OPAL_MC_GPR3(r3)
1348 b machine_check_pSeries
1349 #endif /* CONFIG_PPC_POWERNV */
1352 #define MACHINE_CHECK_HANDLER_WINDUP \
1353 /* Clear MSR_RI before setting SRR0 and SRR1. */\
1355 mfmsr r9; /* get MSR value */ \
1357 mtmsrd r9,1; /* Clear MSR_RI */ \
1358 /* Move original SRR0 and SRR1 into the respective regs */ \
1360 mtspr SPRN_SRR1,r9; \
1362 mtspr SPRN_SRR0,r3; \
1370 REST_8GPRS(2, r1); \
1374 /* Decrement paca->in_mce. */ \
1375 lhz r12,PACA_IN_MCE(r13); \
1377 sth r12,PACA_IN_MCE(r13); \
1379 REST_2GPRS(12, r1); \
1380 /* restore original r1. */ \
1384 * Handle machine check early in real mode. We come here with
1385 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
1388 .globl machine_check_handle_early
1389 machine_check_handle_early:
1390 std r0,GPR0(r1) /* Save r0 */
1391 EXCEPTION_PROLOG_COMMON_3(0x200)
1393 addi r3,r1,STACK_FRAME_OVERHEAD
1394 bl .machine_check_early
1396 #ifdef CONFIG_PPC_P7_NAP
1398 * Check if thread was in power saving mode. We come here when any
1399 * of the following is true:
1400 * a. thread wasn't in power saving mode
1401 * b. thread was in power saving mode with no state loss or
1402 * supervisor state loss
1404 * Go back to nap again if (b) is true.
1406 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */
1407 beq 4f /* No, it wasn;t */
1408 /* Thread was in power saving mode. Go back to nap again. */
1411 /* Supervisor state loss */
1413 stb r0,PACA_NAPSTATELOST(r13)
1414 3: bl .machine_check_queue_event
1415 MACHINE_CHECK_HANDLER_WINDUP
1418 b .power7_enter_nap_mode
1422 * Check if we are coming from hypervisor userspace. If yes then we
1423 * continue in host kernel in V mode to deliver the MC event.
1425 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */
1427 andi. r11,r12,MSR_PR /* See if coming from user. */
1428 bne 9f /* continue in V mode if we are. */
1431 #ifdef CONFIG_KVM_BOOK3S_64_HV
1433 * We are coming from kernel context. Check if we are coming from
1434 * guest. if yes, then we can continue. We will fall through
1435 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
1437 lbz r11,HSTATE_IN_GUEST(r13)
1438 cmpwi r11,0 /* Check if coming from guest */
1439 bne 9f /* continue if we are. */
1442 * At this point we are not sure about what context we come from.
1443 * Queue up the MCE event and return from the interrupt.
1444 * But before that, check if this is an un-recoverable exception.
1445 * If yes, then stay on emergency stack and panic.
1447 andi. r11,r12,MSR_RI
1449 1: addi r3,r1,STACK_FRAME_OVERHEAD
1450 bl .unrecoverable_exception
1454 * Return from MC interrupt.
1455 * Queue up the MCE event so that we can log it later, while
1456 * returning from kernel or opal call.
1458 bl .machine_check_queue_event
1459 MACHINE_CHECK_HANDLER_WINDUP
1462 /* Deliver the machine check to host kernel in V mode. */
1463 MACHINE_CHECK_HANDLER_WINDUP
1464 b machine_check_pSeries
1467 * r13 points to the PACA, r9 contains the saved CR,
1468 * r12 contain the saved SRR1, SRR0 is still ready for return
1469 * r3 has the faulting address
1470 * r9 - r13 are saved in paca->exslb.
1471 * r3 is saved in paca->slb_r3
1472 * We assume we aren't going to take any exceptions during this procedure.
1474 _GLOBAL(slb_miss_realmode)
1476 #ifdef CONFIG_RELOCATABLE
1480 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1481 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
1483 bl .slb_allocate_realmode
1485 /* All done -- return from exception. */
1487 ld r10,PACA_EXSLB+EX_LR(r13)
1488 ld r3,PACA_EXSLB+EX_R3(r13)
1489 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1493 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1499 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
1502 RESTORE_PPR_PACA(PACA_EXSLB, r9)
1503 ld r9,PACA_EXSLB+EX_R9(r13)
1504 ld r10,PACA_EXSLB+EX_R10(r13)
1505 ld r11,PACA_EXSLB+EX_R11(r13)
1506 ld r12,PACA_EXSLB+EX_R12(r13)
1507 ld r13,PACA_EXSLB+EX_R13(r13)
1509 b . /* prevent speculative execution */
1511 2: mfspr r11,SPRN_SRR0
1512 ld r10,PACAKBASE(r13)
1513 LOAD_HANDLER(r10,unrecov_slb)
1515 ld r10,PACAKMSR(r13)
1521 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
1524 1: addi r3,r1,STACK_FRAME_OVERHEAD
1525 bl .unrecoverable_exception
1529 #ifdef CONFIG_PPC_970_NAP
1532 std r9,TI_LOCAL_FLAGS(r11)
1533 ld r10,_LINK(r1) /* make idle task do the */
1534 std r10,_NIP(r1) /* equivalent of a blr */
1542 _STATIC(do_hash_page)
1546 andis. r0,r4,0xa410 /* weird error? */
1547 bne- handle_page_fault /* if not, try to insert a HPTE */
1548 andis. r0,r4,DSISR_DABRMATCH@h
1549 bne- handle_dabr_fault
1552 andis. r0,r4,0x0020 /* Is it a segment table fault? */
1553 bne- do_ste_alloc /* If so handle it */
1554 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
1556 CURRENT_THREAD_INFO(r11, r1)
1557 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1558 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1559 bne 77f /* then don't call hash_page now */
1561 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
1562 * accessing a userspace segment (even from the kernel). We assume
1563 * kernel addresses always have the high bit set.
1565 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
1566 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
1567 orc r0,r12,r0 /* MSR_PR | ~high_bit */
1568 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
1569 ori r4,r4,1 /* add _PAGE_PRESENT */
1570 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
1573 * r3 contains the faulting address
1574 * r4 contains the required access permissions
1575 * r5 contains the trap number
1577 * at return r3 = 0 for success, 1 for page fault, negative for error
1579 bl .hash_page /* build HPTE if possible */
1580 cmpdi r3,0 /* see if hash_page succeeded */
1583 beq fast_exc_return_irq /* Return from exception on success */
1588 /* Here we have a page fault that hash_page can't handle. */
1592 addi r3,r1,STACK_FRAME_OVERHEAD
1598 addi r3,r1,STACK_FRAME_OVERHEAD
1603 /* We have a data breakpoint exception - handle it */
1608 addi r3,r1,STACK_FRAME_OVERHEAD
1610 12: b .ret_from_except_lite
1613 /* We have a page fault that hash_page could handle but HV refused
1618 addi r3,r1,STACK_FRAME_OVERHEAD
1624 * We come here as a result of a DSI at a point where we don't want
1625 * to call hash_page, such as when we are accessing memory (possibly
1626 * user memory) inside a PMU interrupt that occurred while interrupts
1627 * were soft-disabled. We want to invoke the exception handler for
1628 * the access, or panic if there isn't a handler.
1632 addi r3,r1,STACK_FRAME_OVERHEAD
1637 /* here we have a segment miss */
1639 bl .ste_allocate /* try to insert stab entry */
1641 bne- handle_page_fault
1642 b fast_exception_return
1645 * r13 points to the PACA, r9 contains the saved CR,
1646 * r11 and r12 contain the saved SRR0 and SRR1.
1647 * r9 - r13 are saved in paca->exslb.
1648 * We assume we aren't going to take any exceptions during this procedure.
1649 * We assume (DAR >> 60) == 0xc.
1652 _GLOBAL(do_stab_bolted)
1653 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1654 std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
1655 mfspr r11,SPRN_DAR /* ea */
1658 * check for bad kernel/user address
1659 * (ea & ~REGION_MASK) >= PGTABLE_RANGE
1661 rldicr. r9,r11,4,(63 - 46 - 4)
1662 li r9,0 /* VSID = 0 for bad address */
1667 * This is the kernel vsid, we take the top for context from
1668 * the range. context = (MAX_USER_CONTEXT) + ((ea >> 60) - 0xc) + 1
1669 * Here we know that (ea >> 60) == 0xc
1671 lis r9,(MAX_USER_CONTEXT + 1)@ha
1672 addi r9,r9,(MAX_USER_CONTEXT + 1)@l
1674 srdi r10,r11,SID_SHIFT
1675 rldimi r10,r9,ESID_BITS,0 /* proto vsid */
1676 ASM_VSID_SCRAMBLE(r10, r9, 256M)
1677 rldic r9,r10,12,16 /* r9 = vsid << 12 */
1680 /* Hash to the primary group */
1681 ld r10,PACASTABVIRT(r13)
1682 srdi r11,r11,SID_SHIFT
1683 rldimi r10,r11,7,52 /* r10 = first ste of the group */
1685 /* Search the primary group for a free entry */
1686 1: ld r11,0(r10) /* Test valid bit of the current ste */
1693 /* Stick for only searching the primary group for now. */
1694 /* At least for now, we use a very simple random castout scheme */
1695 /* Use the TB as a random number ; OR in 1 to avoid entry 0 */
1697 rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */
1700 /* r10 currently points to an ste one past the group of interest */
1701 /* make it point to the randomly selected entry */
1703 or r10,r10,r11 /* r10 is the entry to invalidate */
1705 isync /* mark the entry invalid */
1707 rldicl r11,r11,56,1 /* clear the valid bit */
1712 clrrdi r11,r11,28 /* Get the esid part of the ste */
1715 2: std r9,8(r10) /* Store the vsid part of the ste */
1718 mfspr r11,SPRN_DAR /* Get the new esid */
1719 clrrdi r11,r11,28 /* Permits a full 32b of ESID */
1720 ori r11,r11,0x90 /* Turn on valid and kp */
1721 std r11,0(r10) /* Put new entry back into the stab */
1725 /* All done -- return from exception. */
1726 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1727 ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */
1729 andi. r10,r12,MSR_RI
1732 mtcrf 0x80,r9 /* restore CR */
1740 ld r9,PACA_EXSLB+EX_R9(r13)
1741 ld r10,PACA_EXSLB+EX_R10(r13)
1742 ld r11,PACA_EXSLB+EX_R11(r13)
1743 ld r12,PACA_EXSLB+EX_R12(r13)
1744 ld r13,PACA_EXSLB+EX_R13(r13)
1746 b . /* prevent speculative execution */